cpufreq_32.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/pmu.h>
  23. #include <linux/slab.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/init.h>
  26. #include <linux/sysdev.h>
  27. #include <linux/hardirq.h>
  28. #include <asm/prom.h>
  29. #include <asm/machdep.h>
  30. #include <asm/irq.h>
  31. #include <asm/pmac_feature.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/sections.h>
  34. #include <asm/cputable.h>
  35. #include <asm/time.h>
  36. #include <asm/system.h>
  37. #include <asm/mpic.h>
  38. #include <asm/keylargo.h>
  39. /* WARNING !!! This will cause calibrate_delay() to be called,
  40. * but this is an __init function ! So you MUST go edit
  41. * init/main.c to make it non-init before enabling DEBUG_FREQ
  42. */
  43. #undef DEBUG_FREQ
  44. /*
  45. * There is a problem with the core cpufreq code on SMP kernels,
  46. * it won't recalculate the Bogomips properly
  47. */
  48. #ifdef CONFIG_SMP
  49. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  50. #endif
  51. extern void low_choose_7447a_dfs(int dfs);
  52. extern void low_choose_750fx_pll(int pll);
  53. extern void low_sleep_handler(void);
  54. /*
  55. * Currently, PowerMac cpufreq supports only high & low frequencies
  56. * that are set by the firmware
  57. */
  58. static unsigned int low_freq;
  59. static unsigned int hi_freq;
  60. static unsigned int cur_freq;
  61. static unsigned int sleep_freq;
  62. /*
  63. * Different models uses different mechanisms to switch the frequency
  64. */
  65. static int (*set_speed_proc)(int low_speed);
  66. static unsigned int (*get_speed_proc)(void);
  67. /*
  68. * Some definitions used by the various speedprocs
  69. */
  70. static u32 voltage_gpio;
  71. static u32 frequency_gpio;
  72. static u32 slew_done_gpio;
  73. static int no_schedule;
  74. static int has_cpu_l2lve;
  75. static int is_pmu_based;
  76. /* There are only two frequency states for each processor. Values
  77. * are in kHz for the time being.
  78. */
  79. #define CPUFREQ_HIGH 0
  80. #define CPUFREQ_LOW 1
  81. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  82. {CPUFREQ_HIGH, 0},
  83. {CPUFREQ_LOW, 0},
  84. {0, CPUFREQ_TABLE_END},
  85. };
  86. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  87. &cpufreq_freq_attr_scaling_available_freqs,
  88. NULL,
  89. };
  90. static inline void local_delay(unsigned long ms)
  91. {
  92. if (no_schedule)
  93. mdelay(ms);
  94. else
  95. msleep(ms);
  96. }
  97. #ifdef DEBUG_FREQ
  98. static inline void debug_calc_bogomips(void)
  99. {
  100. /* This will cause a recalc of bogomips and display the
  101. * result. We backup/restore the value to avoid affecting the
  102. * core cpufreq framework's own calculation.
  103. */
  104. extern void calibrate_delay(void);
  105. unsigned long save_lpj = loops_per_jiffy;
  106. calibrate_delay();
  107. loops_per_jiffy = save_lpj;
  108. }
  109. #endif /* DEBUG_FREQ */
  110. /* Switch CPU speed under 750FX CPU control
  111. */
  112. static int cpu_750fx_cpu_speed(int low_speed)
  113. {
  114. u32 hid2;
  115. if (low_speed == 0) {
  116. /* ramping up, set voltage first */
  117. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  118. /* Make sure we sleep for at least 1ms */
  119. local_delay(10);
  120. /* tweak L2 for high voltage */
  121. if (has_cpu_l2lve) {
  122. hid2 = mfspr(SPRN_HID2);
  123. hid2 &= ~0x2000;
  124. mtspr(SPRN_HID2, hid2);
  125. }
  126. }
  127. #ifdef CONFIG_6xx
  128. low_choose_750fx_pll(low_speed);
  129. #endif
  130. if (low_speed == 1) {
  131. /* tweak L2 for low voltage */
  132. if (has_cpu_l2lve) {
  133. hid2 = mfspr(SPRN_HID2);
  134. hid2 |= 0x2000;
  135. mtspr(SPRN_HID2, hid2);
  136. }
  137. /* ramping down, set voltage last */
  138. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  139. local_delay(10);
  140. }
  141. return 0;
  142. }
  143. static unsigned int cpu_750fx_get_cpu_speed(void)
  144. {
  145. if (mfspr(SPRN_HID1) & HID1_PS)
  146. return low_freq;
  147. else
  148. return hi_freq;
  149. }
  150. /* Switch CPU speed using DFS */
  151. static int dfs_set_cpu_speed(int low_speed)
  152. {
  153. if (low_speed == 0) {
  154. /* ramping up, set voltage first */
  155. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  156. /* Make sure we sleep for at least 1ms */
  157. local_delay(1);
  158. }
  159. /* set frequency */
  160. #ifdef CONFIG_6xx
  161. low_choose_7447a_dfs(low_speed);
  162. #endif
  163. udelay(100);
  164. if (low_speed == 1) {
  165. /* ramping down, set voltage last */
  166. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  167. local_delay(1);
  168. }
  169. return 0;
  170. }
  171. static unsigned int dfs_get_cpu_speed(void)
  172. {
  173. if (mfspr(SPRN_HID1) & HID1_DFS)
  174. return low_freq;
  175. else
  176. return hi_freq;
  177. }
  178. /* Switch CPU speed using slewing GPIOs
  179. */
  180. static int gpios_set_cpu_speed(int low_speed)
  181. {
  182. int gpio, timeout = 0;
  183. /* If ramping up, set voltage first */
  184. if (low_speed == 0) {
  185. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  186. /* Delay is way too big but it's ok, we schedule */
  187. local_delay(10);
  188. }
  189. /* Set frequency */
  190. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  191. if (low_speed == ((gpio & 0x01) == 0))
  192. goto skip;
  193. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  194. low_speed ? 0x04 : 0x05);
  195. udelay(200);
  196. do {
  197. if (++timeout > 100)
  198. break;
  199. local_delay(1);
  200. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  201. } while((gpio & 0x02) == 0);
  202. skip:
  203. /* If ramping down, set voltage last */
  204. if (low_speed == 1) {
  205. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  206. /* Delay is way too big but it's ok, we schedule */
  207. local_delay(10);
  208. }
  209. #ifdef DEBUG_FREQ
  210. debug_calc_bogomips();
  211. #endif
  212. return 0;
  213. }
  214. /* Switch CPU speed under PMU control
  215. */
  216. static int pmu_set_cpu_speed(int low_speed)
  217. {
  218. struct adb_request req;
  219. unsigned long save_l2cr;
  220. unsigned long save_l3cr;
  221. unsigned int pic_prio;
  222. unsigned long flags;
  223. preempt_disable();
  224. #ifdef DEBUG_FREQ
  225. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  226. #endif
  227. pmu_suspend();
  228. /* Disable all interrupt sources on openpic */
  229. pic_prio = mpic_cpu_get_priority();
  230. mpic_cpu_set_priority(0xf);
  231. /* Make sure the decrementer won't interrupt us */
  232. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  233. /* Make sure any pending DEC interrupt occurring while we did
  234. * the above didn't re-enable the DEC */
  235. mb();
  236. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  237. /* We can now disable MSR_EE */
  238. local_irq_save(flags);
  239. /* Giveup the FPU & vec */
  240. enable_kernel_fp();
  241. #ifdef CONFIG_ALTIVEC
  242. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  243. enable_kernel_altivec();
  244. #endif /* CONFIG_ALTIVEC */
  245. /* Save & disable L2 and L3 caches */
  246. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  247. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  248. /* Send the new speed command. My assumption is that this command
  249. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  250. */
  251. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  252. while (!req.complete)
  253. pmu_poll();
  254. /* Prepare the northbridge for the speed transition */
  255. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  256. /* Call low level code to backup CPU state and recover from
  257. * hardware reset
  258. */
  259. low_sleep_handler();
  260. /* Restore the northbridge */
  261. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  262. /* Restore L2 cache */
  263. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  264. _set_L2CR(save_l2cr);
  265. /* Restore L3 cache */
  266. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  267. _set_L3CR(save_l3cr);
  268. /* Restore userland MMU context */
  269. set_context(current->active_mm->context.id, current->active_mm->pgd);
  270. #ifdef DEBUG_FREQ
  271. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  272. #endif
  273. /* Restore low level PMU operations */
  274. pmu_unlock();
  275. /* Restore decrementer */
  276. wakeup_decrementer();
  277. /* Restore interrupts */
  278. mpic_cpu_set_priority(pic_prio);
  279. /* Let interrupts flow again ... */
  280. local_irq_restore(flags);
  281. #ifdef DEBUG_FREQ
  282. debug_calc_bogomips();
  283. #endif
  284. pmu_resume();
  285. preempt_enable();
  286. return 0;
  287. }
  288. static int do_set_cpu_speed(int speed_mode, int notify)
  289. {
  290. struct cpufreq_freqs freqs;
  291. unsigned long l3cr;
  292. static unsigned long prev_l3cr;
  293. freqs.old = cur_freq;
  294. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  295. freqs.cpu = smp_processor_id();
  296. if (freqs.old == freqs.new)
  297. return 0;
  298. if (notify)
  299. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  300. if (speed_mode == CPUFREQ_LOW &&
  301. cpu_has_feature(CPU_FTR_L3CR)) {
  302. l3cr = _get_L3CR();
  303. if (l3cr & L3CR_L3E) {
  304. prev_l3cr = l3cr;
  305. _set_L3CR(0);
  306. }
  307. }
  308. set_speed_proc(speed_mode == CPUFREQ_LOW);
  309. if (speed_mode == CPUFREQ_HIGH &&
  310. cpu_has_feature(CPU_FTR_L3CR)) {
  311. l3cr = _get_L3CR();
  312. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  313. _set_L3CR(prev_l3cr);
  314. }
  315. if (notify)
  316. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  317. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  318. return 0;
  319. }
  320. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  321. {
  322. return cur_freq;
  323. }
  324. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  325. {
  326. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  327. }
  328. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  329. unsigned int target_freq,
  330. unsigned int relation)
  331. {
  332. unsigned int newstate = 0;
  333. int rc;
  334. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  335. target_freq, relation, &newstate))
  336. return -EINVAL;
  337. rc = do_set_cpu_speed(newstate, 1);
  338. ppc_proc_freq = cur_freq * 1000ul;
  339. return rc;
  340. }
  341. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  342. {
  343. if (policy->cpu != 0)
  344. return -ENODEV;
  345. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  346. policy->cur = cur_freq;
  347. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  348. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  349. }
  350. static u32 read_gpio(struct device_node *np)
  351. {
  352. const u32 *reg = of_get_property(np, "reg", NULL);
  353. u32 offset;
  354. if (reg == NULL)
  355. return 0;
  356. /* That works for all keylargos but shall be fixed properly
  357. * some day... The problem is that it seems we can't rely
  358. * on the "reg" property of the GPIO nodes, they are either
  359. * relative to the base of KeyLargo or to the base of the
  360. * GPIO space, and the device-tree doesn't help.
  361. */
  362. offset = *reg;
  363. if (offset < KEYLARGO_GPIO_LEVELS0)
  364. offset += KEYLARGO_GPIO_LEVELS0;
  365. return offset;
  366. }
  367. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  368. {
  369. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  370. * always force a speed change to high speed before sleep, to make sure
  371. * we have appropriate voltage and/or bus speed for the wakeup process,
  372. * and to make sure our loops_per_jiffies are "good enough", that is will
  373. * not cause too short delays if we sleep in low speed and wake in high
  374. * speed..
  375. */
  376. no_schedule = 1;
  377. sleep_freq = cur_freq;
  378. if (cur_freq == low_freq && !is_pmu_based)
  379. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  380. return 0;
  381. }
  382. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  383. {
  384. /* If we resume, first check if we have a get() function */
  385. if (get_speed_proc)
  386. cur_freq = get_speed_proc();
  387. else
  388. cur_freq = 0;
  389. /* We don't, hrm... we don't really know our speed here, best
  390. * is that we force a switch to whatever it was, which is
  391. * probably high speed due to our suspend() routine
  392. */
  393. do_set_cpu_speed(sleep_freq == low_freq ?
  394. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  395. ppc_proc_freq = cur_freq * 1000ul;
  396. no_schedule = 0;
  397. return 0;
  398. }
  399. static struct cpufreq_driver pmac_cpufreq_driver = {
  400. .verify = pmac_cpufreq_verify,
  401. .target = pmac_cpufreq_target,
  402. .get = pmac_cpufreq_get_speed,
  403. .init = pmac_cpufreq_cpu_init,
  404. .suspend = pmac_cpufreq_suspend,
  405. .resume = pmac_cpufreq_resume,
  406. .flags = CPUFREQ_PM_NO_WARN,
  407. .attr = pmac_cpu_freqs_attr,
  408. .name = "powermac",
  409. .owner = THIS_MODULE,
  410. };
  411. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  412. {
  413. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  414. "voltage-gpio");
  415. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  416. "frequency-gpio");
  417. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  418. "slewing-done");
  419. const u32 *value;
  420. /*
  421. * Check to see if it's GPIO driven or PMU only
  422. *
  423. * The way we extract the GPIO address is slightly hackish, but it
  424. * works well enough for now. We need to abstract the whole GPIO
  425. * stuff sooner or later anyway
  426. */
  427. if (volt_gpio_np)
  428. voltage_gpio = read_gpio(volt_gpio_np);
  429. if (freq_gpio_np)
  430. frequency_gpio = read_gpio(freq_gpio_np);
  431. if (slew_done_gpio_np)
  432. slew_done_gpio = read_gpio(slew_done_gpio_np);
  433. /* If we use the frequency GPIOs, calculate the min/max speeds based
  434. * on the bus frequencies
  435. */
  436. if (frequency_gpio && slew_done_gpio) {
  437. int lenp, rc;
  438. const u32 *freqs, *ratio;
  439. freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
  440. lenp /= sizeof(u32);
  441. if (freqs == NULL || lenp != 2) {
  442. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  443. return 1;
  444. }
  445. ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
  446. NULL);
  447. if (ratio == NULL) {
  448. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  449. return 1;
  450. }
  451. /* Get the min/max bus frequencies */
  452. low_freq = min(freqs[0], freqs[1]);
  453. hi_freq = max(freqs[0], freqs[1]);
  454. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  455. * frequency, it claims it to be around 84Mhz on some models while
  456. * it appears to be approx. 101Mhz on all. Let's hack around here...
  457. * fortunately, we don't need to be too precise
  458. */
  459. if (low_freq < 98000000)
  460. low_freq = 101000000;
  461. /* Convert those to CPU core clocks */
  462. low_freq = (low_freq * (*ratio)) / 2000;
  463. hi_freq = (hi_freq * (*ratio)) / 2000;
  464. /* Now we get the frequencies, we read the GPIO to see what is out current
  465. * speed
  466. */
  467. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  468. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  469. set_speed_proc = gpios_set_cpu_speed;
  470. return 1;
  471. }
  472. /* If we use the PMU, look for the min & max frequencies in the
  473. * device-tree
  474. */
  475. value = of_get_property(cpunode, "min-clock-frequency", NULL);
  476. if (!value)
  477. return 1;
  478. low_freq = (*value) / 1000;
  479. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  480. * here */
  481. if (low_freq < 100000)
  482. low_freq *= 10;
  483. value = of_get_property(cpunode, "max-clock-frequency", NULL);
  484. if (!value)
  485. return 1;
  486. hi_freq = (*value) / 1000;
  487. set_speed_proc = pmu_set_cpu_speed;
  488. is_pmu_based = 1;
  489. return 0;
  490. }
  491. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  492. {
  493. struct device_node *volt_gpio_np;
  494. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  495. return 1;
  496. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  497. if (volt_gpio_np)
  498. voltage_gpio = read_gpio(volt_gpio_np);
  499. if (!voltage_gpio){
  500. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  501. return 1;
  502. }
  503. /* OF only reports the high frequency */
  504. hi_freq = cur_freq;
  505. low_freq = cur_freq/2;
  506. /* Read actual frequency from CPU */
  507. cur_freq = dfs_get_cpu_speed();
  508. set_speed_proc = dfs_set_cpu_speed;
  509. get_speed_proc = dfs_get_cpu_speed;
  510. return 0;
  511. }
  512. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  513. {
  514. struct device_node *volt_gpio_np;
  515. u32 pvr;
  516. const u32 *value;
  517. if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  518. return 1;
  519. hi_freq = cur_freq;
  520. value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
  521. if (!value)
  522. return 1;
  523. low_freq = (*value) / 1000;
  524. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  525. if (volt_gpio_np)
  526. voltage_gpio = read_gpio(volt_gpio_np);
  527. pvr = mfspr(SPRN_PVR);
  528. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  529. set_speed_proc = cpu_750fx_cpu_speed;
  530. get_speed_proc = cpu_750fx_get_cpu_speed;
  531. cur_freq = cpu_750fx_get_cpu_speed();
  532. return 0;
  533. }
  534. /* Currently, we support the following machines:
  535. *
  536. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  537. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  538. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  539. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  540. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  541. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  542. * - Recent MacRISC3 laptops
  543. * - All new machines with 7447A CPUs
  544. */
  545. static int __init pmac_cpufreq_setup(void)
  546. {
  547. struct device_node *cpunode;
  548. const u32 *value;
  549. if (strstr(cmd_line, "nocpufreq"))
  550. return 0;
  551. /* Assume only one CPU */
  552. cpunode = of_find_node_by_type(NULL, "cpu");
  553. if (!cpunode)
  554. goto out;
  555. /* Get current cpu clock freq */
  556. value = of_get_property(cpunode, "clock-frequency", NULL);
  557. if (!value)
  558. goto out;
  559. cur_freq = (*value) / 1000;
  560. /* Check for 7447A based MacRISC3 */
  561. if (machine_is_compatible("MacRISC3") &&
  562. of_get_property(cpunode, "dynamic-power-step", NULL) &&
  563. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  564. pmac_cpufreq_init_7447A(cpunode);
  565. /* Check for other MacRISC3 machines */
  566. } else if (machine_is_compatible("PowerBook3,4") ||
  567. machine_is_compatible("PowerBook3,5") ||
  568. machine_is_compatible("MacRISC3")) {
  569. pmac_cpufreq_init_MacRISC3(cpunode);
  570. /* Else check for iBook2 500/600 */
  571. } else if (machine_is_compatible("PowerBook4,1")) {
  572. hi_freq = cur_freq;
  573. low_freq = 400000;
  574. set_speed_proc = pmu_set_cpu_speed;
  575. is_pmu_based = 1;
  576. }
  577. /* Else check for TiPb 550 */
  578. else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  579. hi_freq = cur_freq;
  580. low_freq = 500000;
  581. set_speed_proc = pmu_set_cpu_speed;
  582. is_pmu_based = 1;
  583. }
  584. /* Else check for TiPb 400 & 500 */
  585. else if (machine_is_compatible("PowerBook3,2")) {
  586. /* We only know about the 400 MHz and the 500Mhz model
  587. * they both have 300 MHz as low frequency
  588. */
  589. if (cur_freq < 350000 || cur_freq > 550000)
  590. goto out;
  591. hi_freq = cur_freq;
  592. low_freq = 300000;
  593. set_speed_proc = pmu_set_cpu_speed;
  594. is_pmu_based = 1;
  595. }
  596. /* Else check for 750FX */
  597. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  598. pmac_cpufreq_init_750FX(cpunode);
  599. out:
  600. of_node_put(cpunode);
  601. if (set_speed_proc == NULL)
  602. return -ENODEV;
  603. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  604. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  605. ppc_proc_freq = cur_freq * 1000ul;
  606. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  607. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  608. low_freq/1000, hi_freq/1000, cur_freq/1000);
  609. return cpufreq_register_driver(&pmac_cpufreq_driver);
  610. }
  611. module_init(pmac_cpufreq_setup);