iommu.c 6.9 KB

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  1. /*
  2. * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
  3. *
  4. * Rewrite, cleanup:
  5. *
  6. * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
  7. * Copyright (C) 2006 Olof Johansson <olof@lixom.net>
  8. *
  9. * Dynamic DMA mapping support, iSeries-specific parts.
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/types.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/list.h>
  29. #include <linux/pci.h>
  30. #include <linux/module.h>
  31. #include <asm/iommu.h>
  32. #include <asm/vio.h>
  33. #include <asm/tce.h>
  34. #include <asm/machdep.h>
  35. #include <asm/abs_addr.h>
  36. #include <asm/prom.h>
  37. #include <asm/pci-bridge.h>
  38. #include <asm/iseries/hv_call_xm.h>
  39. #include <asm/iseries/hv_call_event.h>
  40. #include <asm/iseries/iommu.h>
  41. static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
  42. unsigned long uaddr, enum dma_data_direction direction)
  43. {
  44. u64 rc;
  45. u64 tce, rpn;
  46. while (npages--) {
  47. rpn = virt_to_abs(uaddr) >> TCE_SHIFT;
  48. tce = (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
  49. if (tbl->it_type == TCE_VB) {
  50. /* Virtual Bus */
  51. tce |= TCE_VALID|TCE_ALLIO;
  52. if (direction != DMA_TO_DEVICE)
  53. tce |= TCE_VB_WRITE;
  54. } else {
  55. /* PCI Bus */
  56. tce |= TCE_PCI_READ; /* Read allowed */
  57. if (direction != DMA_TO_DEVICE)
  58. tce |= TCE_PCI_WRITE;
  59. }
  60. rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, tce);
  61. if (rc)
  62. panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
  63. rc);
  64. index++;
  65. uaddr += TCE_PAGE_SIZE;
  66. }
  67. }
  68. static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
  69. {
  70. u64 rc;
  71. while (npages--) {
  72. rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
  73. if (rc)
  74. panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
  75. rc);
  76. index++;
  77. }
  78. }
  79. /*
  80. * Structure passed to HvCallXm_getTceTableParms
  81. */
  82. struct iommu_table_cb {
  83. unsigned long itc_busno; /* Bus number for this tce table */
  84. unsigned long itc_start; /* Will be NULL for secondary */
  85. unsigned long itc_totalsize; /* Size (in pages) of whole table */
  86. unsigned long itc_offset; /* Index into real tce table of the
  87. start of our section */
  88. unsigned long itc_size; /* Size (in pages) of our section */
  89. unsigned long itc_index; /* Index of this tce table */
  90. unsigned short itc_maxtables; /* Max num of tables for partition */
  91. unsigned char itc_virtbus; /* Flag to indicate virtual bus */
  92. unsigned char itc_slotno; /* IOA Tce Slot Index */
  93. unsigned char itc_rsvd[4];
  94. };
  95. /*
  96. * Call Hv with the architected data structure to get TCE table info.
  97. * info. Put the returned data into the Linux representation of the
  98. * TCE table data.
  99. * The Hardware Tce table comes in three flavors.
  100. * 1. TCE table shared between Buses.
  101. * 2. TCE table per Bus.
  102. * 3. TCE Table per IOA.
  103. */
  104. void iommu_table_getparms_iSeries(unsigned long busno,
  105. unsigned char slotno,
  106. unsigned char virtbus,
  107. struct iommu_table* tbl)
  108. {
  109. struct iommu_table_cb *parms;
  110. parms = kzalloc(sizeof(*parms), GFP_KERNEL);
  111. if (parms == NULL)
  112. panic("PCI_DMA: TCE Table Allocation failed.");
  113. parms->itc_busno = busno;
  114. parms->itc_slotno = slotno;
  115. parms->itc_virtbus = virtbus;
  116. HvCallXm_getTceTableParms(iseries_hv_addr(parms));
  117. if (parms->itc_size == 0)
  118. panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
  119. /* itc_size is in pages worth of table, it_size is in # of entries */
  120. tbl->it_size = (parms->itc_size * TCE_PAGE_SIZE) / TCE_ENTRY_SIZE;
  121. tbl->it_busno = parms->itc_busno;
  122. tbl->it_offset = parms->itc_offset;
  123. tbl->it_index = parms->itc_index;
  124. tbl->it_blocksize = 1;
  125. tbl->it_type = virtbus ? TCE_VB : TCE_PCI;
  126. kfree(parms);
  127. }
  128. #ifdef CONFIG_PCI
  129. /*
  130. * This function compares the known tables to find an iommu_table
  131. * that has already been built for hardware TCEs.
  132. */
  133. static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
  134. {
  135. struct device_node *node;
  136. for (node = NULL; (node = of_find_all_nodes(node)); ) {
  137. struct pci_dn *pdn = PCI_DN(node);
  138. struct iommu_table *it;
  139. if (pdn == NULL)
  140. continue;
  141. it = pdn->iommu_table;
  142. if ((it != NULL) &&
  143. (it->it_type == TCE_PCI) &&
  144. (it->it_offset == tbl->it_offset) &&
  145. (it->it_index == tbl->it_index) &&
  146. (it->it_size == tbl->it_size))
  147. return it;
  148. }
  149. return NULL;
  150. }
  151. void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn)
  152. {
  153. struct iommu_table *tbl;
  154. struct pci_dn *pdn = PCI_DN(dn);
  155. const u32 *lsn = of_get_property(dn, "linux,logical-slot-number", NULL);
  156. BUG_ON(lsn == NULL);
  157. tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
  158. iommu_table_getparms_iSeries(pdn->busno, *lsn, 0, tbl);
  159. /* Look for existing tce table */
  160. pdn->iommu_table = iommu_table_find(tbl);
  161. if (pdn->iommu_table == NULL)
  162. pdn->iommu_table = iommu_init_table(tbl, -1);
  163. else
  164. kfree(tbl);
  165. pdev->dev.archdata.dma_data = pdn->iommu_table;
  166. }
  167. #endif
  168. static struct iommu_table veth_iommu_table;
  169. static struct iommu_table vio_iommu_table;
  170. void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag)
  171. {
  172. return iommu_alloc_coherent(&vio_iommu_table, size, dma_handle,
  173. DMA_32BIT_MASK, flag, -1);
  174. }
  175. EXPORT_SYMBOL_GPL(iseries_hv_alloc);
  176. void iseries_hv_free(size_t size, void *vaddr, dma_addr_t dma_handle)
  177. {
  178. iommu_free_coherent(&vio_iommu_table, size, vaddr, dma_handle);
  179. }
  180. EXPORT_SYMBOL_GPL(iseries_hv_free);
  181. dma_addr_t iseries_hv_map(void *vaddr, size_t size,
  182. enum dma_data_direction direction)
  183. {
  184. return iommu_map_single(&vio_iommu_table, vaddr, size,
  185. DMA_32BIT_MASK, direction);
  186. }
  187. void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
  188. enum dma_data_direction direction)
  189. {
  190. iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction);
  191. }
  192. void __init iommu_vio_init(void)
  193. {
  194. iommu_table_getparms_iSeries(255, 0, 0xff, &veth_iommu_table);
  195. veth_iommu_table.it_size /= 2;
  196. vio_iommu_table = veth_iommu_table;
  197. vio_iommu_table.it_offset += veth_iommu_table.it_size;
  198. if (!iommu_init_table(&veth_iommu_table, -1))
  199. printk("Virtual Bus VETH TCE table failed.\n");
  200. if (!iommu_init_table(&vio_iommu_table, -1))
  201. printk("Virtual Bus VIO TCE table failed.\n");
  202. }
  203. struct iommu_table *vio_build_iommu_table_iseries(struct vio_dev *dev)
  204. {
  205. if (strcmp(dev->type, "network") == 0)
  206. return &veth_iommu_table;
  207. return &vio_iommu_table;
  208. }
  209. void iommu_init_early_iSeries(void)
  210. {
  211. ppc_md.tce_build = tce_build_iSeries;
  212. ppc_md.tce_free = tce_free_iSeries;
  213. set_pci_dma_ops(&dma_iommu_ops);
  214. }