spu_base.c 16 KB

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  1. /*
  2. * Low-level SPU handling
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/module.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/slab.h>
  28. #include <linux/wait.h>
  29. #include <linux/mm.h>
  30. #include <linux/io.h>
  31. #include <linux/mutex.h>
  32. #include <linux/linux_logo.h>
  33. #include <asm/spu.h>
  34. #include <asm/spu_priv1.h>
  35. #include <asm/xmon.h>
  36. #include <asm/prom.h>
  37. const struct spu_management_ops *spu_management_ops;
  38. EXPORT_SYMBOL_GPL(spu_management_ops);
  39. const struct spu_priv1_ops *spu_priv1_ops;
  40. EXPORT_SYMBOL_GPL(spu_priv1_ops);
  41. struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
  42. EXPORT_SYMBOL_GPL(cbe_spu_info);
  43. /*
  44. * Protects cbe_spu_info and spu->number.
  45. */
  46. static DEFINE_SPINLOCK(spu_lock);
  47. /*
  48. * List of all spus in the system.
  49. *
  50. * This list is iterated by callers from irq context and callers that
  51. * want to sleep. Thus modifications need to be done with both
  52. * spu_full_list_lock and spu_full_list_mutex held, while iterating
  53. * through it requires either of these locks.
  54. *
  55. * In addition spu_full_list_lock protects all assignmens to
  56. * spu->mm.
  57. */
  58. static LIST_HEAD(spu_full_list);
  59. static DEFINE_SPINLOCK(spu_full_list_lock);
  60. static DEFINE_MUTEX(spu_full_list_mutex);
  61. void spu_invalidate_slbs(struct spu *spu)
  62. {
  63. struct spu_priv2 __iomem *priv2 = spu->priv2;
  64. if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
  65. out_be64(&priv2->slb_invalidate_all_W, 0UL);
  66. }
  67. EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
  68. /* This is called by the MM core when a segment size is changed, to
  69. * request a flush of all the SPEs using a given mm
  70. */
  71. void spu_flush_all_slbs(struct mm_struct *mm)
  72. {
  73. struct spu *spu;
  74. unsigned long flags;
  75. spin_lock_irqsave(&spu_full_list_lock, flags);
  76. list_for_each_entry(spu, &spu_full_list, full_list) {
  77. if (spu->mm == mm)
  78. spu_invalidate_slbs(spu);
  79. }
  80. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  81. }
  82. /* The hack below stinks... try to do something better one of
  83. * these days... Does it even work properly with NR_CPUS == 1 ?
  84. */
  85. static inline void mm_needs_global_tlbie(struct mm_struct *mm)
  86. {
  87. int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
  88. /* Global TLBIE broadcast required with SPEs. */
  89. __cpus_setall(&mm->cpu_vm_mask, nr);
  90. }
  91. void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
  92. {
  93. unsigned long flags;
  94. spin_lock_irqsave(&spu_full_list_lock, flags);
  95. spu->mm = mm;
  96. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  97. if (mm)
  98. mm_needs_global_tlbie(mm);
  99. }
  100. EXPORT_SYMBOL_GPL(spu_associate_mm);
  101. static int __spu_trap_invalid_dma(struct spu *spu)
  102. {
  103. pr_debug("%s\n", __FUNCTION__);
  104. spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
  105. return 0;
  106. }
  107. static int __spu_trap_dma_align(struct spu *spu)
  108. {
  109. pr_debug("%s\n", __FUNCTION__);
  110. spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
  111. return 0;
  112. }
  113. static int __spu_trap_error(struct spu *spu)
  114. {
  115. pr_debug("%s\n", __FUNCTION__);
  116. spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
  117. return 0;
  118. }
  119. static void spu_restart_dma(struct spu *spu)
  120. {
  121. struct spu_priv2 __iomem *priv2 = spu->priv2;
  122. if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
  123. out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
  124. }
  125. static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
  126. {
  127. struct spu_priv2 __iomem *priv2 = spu->priv2;
  128. struct mm_struct *mm = spu->mm;
  129. u64 esid, vsid, llp;
  130. int psize;
  131. pr_debug("%s\n", __FUNCTION__);
  132. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  133. /* SLBs are pre-loaded for context switch, so
  134. * we should never get here!
  135. */
  136. printk("%s: invalid access during switch!\n", __func__);
  137. return 1;
  138. }
  139. esid = (ea & ESID_MASK) | SLB_ESID_V;
  140. switch(REGION_ID(ea)) {
  141. case USER_REGION_ID:
  142. #ifdef CONFIG_PPC_MM_SLICES
  143. psize = get_slice_psize(mm, ea);
  144. #else
  145. psize = mm->context.user_psize;
  146. #endif
  147. vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  148. SLB_VSID_USER;
  149. break;
  150. case VMALLOC_REGION_ID:
  151. if (ea < VMALLOC_END)
  152. psize = mmu_vmalloc_psize;
  153. else
  154. psize = mmu_io_psize;
  155. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  156. SLB_VSID_KERNEL;
  157. break;
  158. case KERNEL_REGION_ID:
  159. psize = mmu_linear_psize;
  160. vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  161. SLB_VSID_KERNEL;
  162. break;
  163. default:
  164. /* Future: support kernel segments so that drivers
  165. * can use SPUs.
  166. */
  167. pr_debug("invalid region access at %016lx\n", ea);
  168. return 1;
  169. }
  170. llp = mmu_psize_defs[psize].sllp;
  171. out_be64(&priv2->slb_index_W, spu->slb_replace);
  172. out_be64(&priv2->slb_vsid_RW, vsid | llp);
  173. out_be64(&priv2->slb_esid_RW, esid);
  174. spu->slb_replace++;
  175. if (spu->slb_replace >= 8)
  176. spu->slb_replace = 0;
  177. spu_restart_dma(spu);
  178. spu->stats.slb_flt++;
  179. return 0;
  180. }
  181. extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
  182. static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
  183. {
  184. pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
  185. /* Handle kernel space hash faults immediately.
  186. User hash faults need to be deferred to process context. */
  187. if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
  188. && REGION_ID(ea) != USER_REGION_ID
  189. && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
  190. spu_restart_dma(spu);
  191. return 0;
  192. }
  193. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  194. printk("%s: invalid access during switch!\n", __func__);
  195. return 1;
  196. }
  197. spu->dar = ea;
  198. spu->dsisr = dsisr;
  199. mb();
  200. spu->stop_callback(spu);
  201. return 0;
  202. }
  203. static irqreturn_t
  204. spu_irq_class_0(int irq, void *data)
  205. {
  206. struct spu *spu;
  207. unsigned long stat, mask;
  208. spu = data;
  209. mask = spu_int_mask_get(spu, 0);
  210. stat = spu_int_stat_get(spu, 0);
  211. stat &= mask;
  212. spin_lock(&spu->register_lock);
  213. spu->class_0_pending |= stat;
  214. spin_unlock(&spu->register_lock);
  215. spu->stop_callback(spu);
  216. spu_int_stat_clear(spu, 0, stat);
  217. return IRQ_HANDLED;
  218. }
  219. int
  220. spu_irq_class_0_bottom(struct spu *spu)
  221. {
  222. unsigned long flags;
  223. unsigned long stat;
  224. spin_lock_irqsave(&spu->register_lock, flags);
  225. stat = spu->class_0_pending;
  226. spu->class_0_pending = 0;
  227. if (stat & 1) /* invalid DMA alignment */
  228. __spu_trap_dma_align(spu);
  229. if (stat & 2) /* invalid MFC DMA */
  230. __spu_trap_invalid_dma(spu);
  231. if (stat & 4) /* error on SPU */
  232. __spu_trap_error(spu);
  233. spin_unlock_irqrestore(&spu->register_lock, flags);
  234. return (stat & 0x7) ? -EIO : 0;
  235. }
  236. EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
  237. static irqreturn_t
  238. spu_irq_class_1(int irq, void *data)
  239. {
  240. struct spu *spu;
  241. unsigned long stat, mask, dar, dsisr;
  242. spu = data;
  243. /* atomically read & clear class1 status. */
  244. spin_lock(&spu->register_lock);
  245. mask = spu_int_mask_get(spu, 1);
  246. stat = spu_int_stat_get(spu, 1) & mask;
  247. dar = spu_mfc_dar_get(spu);
  248. dsisr = spu_mfc_dsisr_get(spu);
  249. if (stat & 2) /* mapping fault */
  250. spu_mfc_dsisr_set(spu, 0ul);
  251. spu_int_stat_clear(spu, 1, stat);
  252. spin_unlock(&spu->register_lock);
  253. pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
  254. dar, dsisr);
  255. if (stat & 1) /* segment fault */
  256. __spu_trap_data_seg(spu, dar);
  257. if (stat & 2) { /* mapping fault */
  258. __spu_trap_data_map(spu, dar, dsisr);
  259. }
  260. if (stat & 4) /* ls compare & suspend on get */
  261. ;
  262. if (stat & 8) /* ls compare & suspend on put */
  263. ;
  264. return stat ? IRQ_HANDLED : IRQ_NONE;
  265. }
  266. static irqreturn_t
  267. spu_irq_class_2(int irq, void *data)
  268. {
  269. struct spu *spu;
  270. unsigned long stat;
  271. unsigned long mask;
  272. spu = data;
  273. spin_lock(&spu->register_lock);
  274. stat = spu_int_stat_get(spu, 2);
  275. mask = spu_int_mask_get(spu, 2);
  276. /* ignore interrupts we're not waiting for */
  277. stat &= mask;
  278. /*
  279. * mailbox interrupts (0x1 and 0x10) are level triggered.
  280. * mask them now before acknowledging.
  281. */
  282. if (stat & 0x11)
  283. spu_int_mask_and(spu, 2, ~(stat & 0x11));
  284. /* acknowledge all interrupts before the callbacks */
  285. spu_int_stat_clear(spu, 2, stat);
  286. spin_unlock(&spu->register_lock);
  287. pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
  288. if (stat & 1) /* PPC core mailbox */
  289. spu->ibox_callback(spu);
  290. if (stat & 2) /* SPU stop-and-signal */
  291. spu->stop_callback(spu);
  292. if (stat & 4) /* SPU halted */
  293. spu->stop_callback(spu);
  294. if (stat & 8) /* DMA tag group complete */
  295. spu->mfc_callback(spu);
  296. if (stat & 0x10) /* SPU mailbox threshold */
  297. spu->wbox_callback(spu);
  298. spu->stats.class2_intr++;
  299. return stat ? IRQ_HANDLED : IRQ_NONE;
  300. }
  301. static int spu_request_irqs(struct spu *spu)
  302. {
  303. int ret = 0;
  304. if (spu->irqs[0] != NO_IRQ) {
  305. snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
  306. spu->number);
  307. ret = request_irq(spu->irqs[0], spu_irq_class_0,
  308. IRQF_DISABLED,
  309. spu->irq_c0, spu);
  310. if (ret)
  311. goto bail0;
  312. }
  313. if (spu->irqs[1] != NO_IRQ) {
  314. snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
  315. spu->number);
  316. ret = request_irq(spu->irqs[1], spu_irq_class_1,
  317. IRQF_DISABLED,
  318. spu->irq_c1, spu);
  319. if (ret)
  320. goto bail1;
  321. }
  322. if (spu->irqs[2] != NO_IRQ) {
  323. snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
  324. spu->number);
  325. ret = request_irq(spu->irqs[2], spu_irq_class_2,
  326. IRQF_DISABLED,
  327. spu->irq_c2, spu);
  328. if (ret)
  329. goto bail2;
  330. }
  331. return 0;
  332. bail2:
  333. if (spu->irqs[1] != NO_IRQ)
  334. free_irq(spu->irqs[1], spu);
  335. bail1:
  336. if (spu->irqs[0] != NO_IRQ)
  337. free_irq(spu->irqs[0], spu);
  338. bail0:
  339. return ret;
  340. }
  341. static void spu_free_irqs(struct spu *spu)
  342. {
  343. if (spu->irqs[0] != NO_IRQ)
  344. free_irq(spu->irqs[0], spu);
  345. if (spu->irqs[1] != NO_IRQ)
  346. free_irq(spu->irqs[1], spu);
  347. if (spu->irqs[2] != NO_IRQ)
  348. free_irq(spu->irqs[2], spu);
  349. }
  350. void spu_init_channels(struct spu *spu)
  351. {
  352. static const struct {
  353. unsigned channel;
  354. unsigned count;
  355. } zero_list[] = {
  356. { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
  357. { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
  358. }, count_list[] = {
  359. { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
  360. { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
  361. { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
  362. };
  363. struct spu_priv2 __iomem *priv2;
  364. int i;
  365. priv2 = spu->priv2;
  366. /* initialize all channel data to zero */
  367. for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
  368. int count;
  369. out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
  370. for (count = 0; count < zero_list[i].count; count++)
  371. out_be64(&priv2->spu_chnldata_RW, 0);
  372. }
  373. /* initialize channel counts to meaningful values */
  374. for (i = 0; i < ARRAY_SIZE(count_list); i++) {
  375. out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
  376. out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
  377. }
  378. }
  379. EXPORT_SYMBOL_GPL(spu_init_channels);
  380. static int spu_shutdown(struct sys_device *sysdev)
  381. {
  382. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  383. spu_free_irqs(spu);
  384. spu_destroy_spu(spu);
  385. return 0;
  386. }
  387. static struct sysdev_class spu_sysdev_class = {
  388. set_kset_name("spu"),
  389. .shutdown = spu_shutdown,
  390. };
  391. int spu_add_sysdev_attr(struct sysdev_attribute *attr)
  392. {
  393. struct spu *spu;
  394. mutex_lock(&spu_full_list_mutex);
  395. list_for_each_entry(spu, &spu_full_list, full_list)
  396. sysdev_create_file(&spu->sysdev, attr);
  397. mutex_unlock(&spu_full_list_mutex);
  398. return 0;
  399. }
  400. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
  401. int spu_add_sysdev_attr_group(struct attribute_group *attrs)
  402. {
  403. struct spu *spu;
  404. mutex_lock(&spu_full_list_mutex);
  405. list_for_each_entry(spu, &spu_full_list, full_list)
  406. sysfs_create_group(&spu->sysdev.kobj, attrs);
  407. mutex_unlock(&spu_full_list_mutex);
  408. return 0;
  409. }
  410. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
  411. void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
  412. {
  413. struct spu *spu;
  414. mutex_lock(&spu_full_list_mutex);
  415. list_for_each_entry(spu, &spu_full_list, full_list)
  416. sysdev_remove_file(&spu->sysdev, attr);
  417. mutex_unlock(&spu_full_list_mutex);
  418. }
  419. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
  420. void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
  421. {
  422. struct spu *spu;
  423. mutex_lock(&spu_full_list_mutex);
  424. list_for_each_entry(spu, &spu_full_list, full_list)
  425. sysfs_remove_group(&spu->sysdev.kobj, attrs);
  426. mutex_unlock(&spu_full_list_mutex);
  427. }
  428. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
  429. static int spu_create_sysdev(struct spu *spu)
  430. {
  431. int ret;
  432. spu->sysdev.id = spu->number;
  433. spu->sysdev.cls = &spu_sysdev_class;
  434. ret = sysdev_register(&spu->sysdev);
  435. if (ret) {
  436. printk(KERN_ERR "Can't register SPU %d with sysfs\n",
  437. spu->number);
  438. return ret;
  439. }
  440. sysfs_add_device_to_node(&spu->sysdev, spu->node);
  441. return 0;
  442. }
  443. static int __init create_spu(void *data)
  444. {
  445. struct spu *spu;
  446. int ret;
  447. static int number;
  448. unsigned long flags;
  449. struct timespec ts;
  450. ret = -ENOMEM;
  451. spu = kzalloc(sizeof (*spu), GFP_KERNEL);
  452. if (!spu)
  453. goto out;
  454. spu->alloc_state = SPU_FREE;
  455. spin_lock_init(&spu->register_lock);
  456. spin_lock(&spu_lock);
  457. spu->number = number++;
  458. spin_unlock(&spu_lock);
  459. ret = spu_create_spu(spu, data);
  460. if (ret)
  461. goto out_free;
  462. spu_mfc_sdr_setup(spu);
  463. spu_mfc_sr1_set(spu, 0x33);
  464. ret = spu_request_irqs(spu);
  465. if (ret)
  466. goto out_destroy;
  467. ret = spu_create_sysdev(spu);
  468. if (ret)
  469. goto out_free_irqs;
  470. mutex_lock(&cbe_spu_info[spu->node].list_mutex);
  471. list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
  472. cbe_spu_info[spu->node].n_spus++;
  473. mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
  474. mutex_lock(&spu_full_list_mutex);
  475. spin_lock_irqsave(&spu_full_list_lock, flags);
  476. list_add(&spu->full_list, &spu_full_list);
  477. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  478. mutex_unlock(&spu_full_list_mutex);
  479. spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
  480. ktime_get_ts(&ts);
  481. spu->stats.tstamp = timespec_to_ns(&ts);
  482. INIT_LIST_HEAD(&spu->aff_list);
  483. goto out;
  484. out_free_irqs:
  485. spu_free_irqs(spu);
  486. out_destroy:
  487. spu_destroy_spu(spu);
  488. out_free:
  489. kfree(spu);
  490. out:
  491. return ret;
  492. }
  493. static const char *spu_state_names[] = {
  494. "user", "system", "iowait", "idle"
  495. };
  496. static unsigned long long spu_acct_time(struct spu *spu,
  497. enum spu_utilization_state state)
  498. {
  499. struct timespec ts;
  500. unsigned long long time = spu->stats.times[state];
  501. /*
  502. * If the spu is idle or the context is stopped, utilization
  503. * statistics are not updated. Apply the time delta from the
  504. * last recorded state of the spu.
  505. */
  506. if (spu->stats.util_state == state) {
  507. ktime_get_ts(&ts);
  508. time += timespec_to_ns(&ts) - spu->stats.tstamp;
  509. }
  510. return time / NSEC_PER_MSEC;
  511. }
  512. static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
  513. {
  514. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  515. return sprintf(buf, "%s %llu %llu %llu %llu "
  516. "%llu %llu %llu %llu %llu %llu %llu %llu\n",
  517. spu_state_names[spu->stats.util_state],
  518. spu_acct_time(spu, SPU_UTIL_USER),
  519. spu_acct_time(spu, SPU_UTIL_SYSTEM),
  520. spu_acct_time(spu, SPU_UTIL_IOWAIT),
  521. spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
  522. spu->stats.vol_ctx_switch,
  523. spu->stats.invol_ctx_switch,
  524. spu->stats.slb_flt,
  525. spu->stats.hash_flt,
  526. spu->stats.min_flt,
  527. spu->stats.maj_flt,
  528. spu->stats.class2_intr,
  529. spu->stats.libassist);
  530. }
  531. static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
  532. static int __init init_spu_base(void)
  533. {
  534. int i, ret = 0;
  535. for (i = 0; i < MAX_NUMNODES; i++) {
  536. mutex_init(&cbe_spu_info[i].list_mutex);
  537. INIT_LIST_HEAD(&cbe_spu_info[i].spus);
  538. }
  539. if (!spu_management_ops)
  540. goto out;
  541. /* create sysdev class for spus */
  542. ret = sysdev_class_register(&spu_sysdev_class);
  543. if (ret)
  544. goto out;
  545. ret = spu_enumerate_spus(create_spu);
  546. if (ret < 0) {
  547. printk(KERN_WARNING "%s: Error initializing spus\n",
  548. __FUNCTION__);
  549. goto out_unregister_sysdev_class;
  550. }
  551. if (ret > 0) {
  552. /*
  553. * We cannot put the forward declaration in
  554. * <linux/linux_logo.h> because of conflicting session type
  555. * conflicts for const and __initdata with different compiler
  556. * versions
  557. */
  558. extern const struct linux_logo logo_spe_clut224;
  559. fb_append_extra_logo(&logo_spe_clut224, ret);
  560. }
  561. mutex_lock(&spu_full_list_mutex);
  562. xmon_register_spus(&spu_full_list);
  563. crash_register_spus(&spu_full_list);
  564. mutex_unlock(&spu_full_list_mutex);
  565. spu_add_sysdev_attr(&attr_stat);
  566. spu_init_affinity();
  567. return 0;
  568. out_unregister_sysdev_class:
  569. sysdev_class_unregister(&spu_sysdev_class);
  570. out:
  571. return ret;
  572. }
  573. module_init(init_spu_base);
  574. MODULE_LICENSE("GPL");
  575. MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");