interrupt.c 10 KB

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  1. /*
  2. * Cell Internal Interrupt Controller
  3. *
  4. * Copyright (C) 2006 Benjamin Herrenschmidt (benh@kernel.crashing.org)
  5. * IBM, Corp.
  6. *
  7. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  8. *
  9. * Author: Arnd Bergmann <arndb@de.ibm.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2, or (at your option)
  14. * any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * TODO:
  26. * - Fix various assumptions related to HW CPU numbers vs. linux CPU numbers
  27. * vs node numbers in the setup code
  28. * - Implement proper handling of maxcpus=1/2 (that is, routing of irqs from
  29. * a non-active node to the active node)
  30. */
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <linux/module.h>
  34. #include <linux/percpu.h>
  35. #include <linux/types.h>
  36. #include <linux/ioport.h>
  37. #include <asm/io.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/prom.h>
  40. #include <asm/ptrace.h>
  41. #include <asm/machdep.h>
  42. #include <asm/cell-regs.h>
  43. #include "interrupt.h"
  44. struct iic {
  45. struct cbe_iic_thread_regs __iomem *regs;
  46. u8 target_id;
  47. u8 eoi_stack[16];
  48. int eoi_ptr;
  49. struct device_node *node;
  50. };
  51. static DEFINE_PER_CPU(struct iic, iic);
  52. #define IIC_NODE_COUNT 2
  53. static struct irq_host *iic_host;
  54. /* Convert between "pending" bits and hw irq number */
  55. static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)
  56. {
  57. unsigned char unit = bits.source & 0xf;
  58. unsigned char node = bits.source >> 4;
  59. unsigned char class = bits.class & 3;
  60. /* Decode IPIs */
  61. if (bits.flags & CBE_IIC_IRQ_IPI)
  62. return IIC_IRQ_TYPE_IPI | (bits.prio >> 4);
  63. else
  64. return (node << IIC_IRQ_NODE_SHIFT) | (class << 4) | unit;
  65. }
  66. static void iic_mask(unsigned int irq)
  67. {
  68. }
  69. static void iic_unmask(unsigned int irq)
  70. {
  71. }
  72. static void iic_eoi(unsigned int irq)
  73. {
  74. struct iic *iic = &__get_cpu_var(iic);
  75. out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
  76. BUG_ON(iic->eoi_ptr < 0);
  77. }
  78. static struct irq_chip iic_chip = {
  79. .typename = " CELL-IIC ",
  80. .mask = iic_mask,
  81. .unmask = iic_unmask,
  82. .eoi = iic_eoi,
  83. };
  84. static void iic_ioexc_eoi(unsigned int irq)
  85. {
  86. }
  87. static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
  88. {
  89. struct cbe_iic_regs __iomem *node_iic = (void __iomem *)desc->handler_data;
  90. unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
  91. unsigned long bits, ack;
  92. int cascade;
  93. for (;;) {
  94. bits = in_be64(&node_iic->iic_is);
  95. if (bits == 0)
  96. break;
  97. /* pre-ack edge interrupts */
  98. ack = bits & IIC_ISR_EDGE_MASK;
  99. if (ack)
  100. out_be64(&node_iic->iic_is, ack);
  101. /* handle them */
  102. for (cascade = 63; cascade >= 0; cascade--)
  103. if (bits & (0x8000000000000000UL >> cascade)) {
  104. unsigned int cirq =
  105. irq_linear_revmap(iic_host,
  106. base | cascade);
  107. if (cirq != NO_IRQ)
  108. generic_handle_irq(cirq);
  109. }
  110. /* post-ack level interrupts */
  111. ack = bits & ~IIC_ISR_EDGE_MASK;
  112. if (ack)
  113. out_be64(&node_iic->iic_is, ack);
  114. }
  115. desc->chip->eoi(irq);
  116. }
  117. static struct irq_chip iic_ioexc_chip = {
  118. .typename = " CELL-IOEX",
  119. .mask = iic_mask,
  120. .unmask = iic_unmask,
  121. .eoi = iic_ioexc_eoi,
  122. };
  123. /* Get an IRQ number from the pending state register of the IIC */
  124. static unsigned int iic_get_irq(void)
  125. {
  126. struct cbe_iic_pending_bits pending;
  127. struct iic *iic;
  128. unsigned int virq;
  129. iic = &__get_cpu_var(iic);
  130. *(unsigned long *) &pending =
  131. in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
  132. if (!(pending.flags & CBE_IIC_IRQ_VALID))
  133. return NO_IRQ;
  134. virq = irq_linear_revmap(iic_host, iic_pending_to_hwnum(pending));
  135. if (virq == NO_IRQ)
  136. return NO_IRQ;
  137. iic->eoi_stack[++iic->eoi_ptr] = pending.prio;
  138. BUG_ON(iic->eoi_ptr > 15);
  139. return virq;
  140. }
  141. #ifdef CONFIG_SMP
  142. /* Use the highest interrupt priorities for IPI */
  143. static inline int iic_ipi_to_irq(int ipi)
  144. {
  145. return IIC_IRQ_TYPE_IPI + 0xf - ipi;
  146. }
  147. void iic_setup_cpu(void)
  148. {
  149. out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
  150. }
  151. void iic_cause_IPI(int cpu, int mesg)
  152. {
  153. out_be64(&per_cpu(iic, cpu).regs->generate, (0xf - mesg) << 4);
  154. }
  155. u8 iic_get_target_id(int cpu)
  156. {
  157. return per_cpu(iic, cpu).target_id;
  158. }
  159. EXPORT_SYMBOL_GPL(iic_get_target_id);
  160. struct irq_host *iic_get_irq_host(int node)
  161. {
  162. return iic_host;
  163. }
  164. EXPORT_SYMBOL_GPL(iic_get_irq_host);
  165. static irqreturn_t iic_ipi_action(int irq, void *dev_id)
  166. {
  167. int ipi = (int)(long)dev_id;
  168. smp_message_recv(ipi);
  169. return IRQ_HANDLED;
  170. }
  171. static void iic_request_ipi(int ipi, const char *name)
  172. {
  173. int virq;
  174. virq = irq_create_mapping(iic_host, iic_ipi_to_irq(ipi));
  175. if (virq == NO_IRQ) {
  176. printk(KERN_ERR
  177. "iic: failed to map IPI %s\n", name);
  178. return;
  179. }
  180. if (request_irq(virq, iic_ipi_action, IRQF_DISABLED, name,
  181. (void *)(long)ipi))
  182. printk(KERN_ERR
  183. "iic: failed to request IPI %s\n", name);
  184. }
  185. void iic_request_IPIs(void)
  186. {
  187. iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
  188. iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
  189. #ifdef CONFIG_DEBUGGER
  190. iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
  191. #endif /* CONFIG_DEBUGGER */
  192. }
  193. #endif /* CONFIG_SMP */
  194. static int iic_host_match(struct irq_host *h, struct device_node *node)
  195. {
  196. return of_device_is_compatible(node,
  197. "IBM,CBEA-Internal-Interrupt-Controller");
  198. }
  199. static int iic_host_map(struct irq_host *h, unsigned int virq,
  200. irq_hw_number_t hw)
  201. {
  202. switch (hw & IIC_IRQ_TYPE_MASK) {
  203. case IIC_IRQ_TYPE_IPI:
  204. set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
  205. break;
  206. case IIC_IRQ_TYPE_IOEXC:
  207. set_irq_chip_and_handler(virq, &iic_ioexc_chip,
  208. handle_fasteoi_irq);
  209. break;
  210. default:
  211. set_irq_chip_and_handler(virq, &iic_chip, handle_fasteoi_irq);
  212. }
  213. return 0;
  214. }
  215. static int iic_host_xlate(struct irq_host *h, struct device_node *ct,
  216. u32 *intspec, unsigned int intsize,
  217. irq_hw_number_t *out_hwirq, unsigned int *out_flags)
  218. {
  219. unsigned int node, ext, unit, class;
  220. const u32 *val;
  221. if (!of_device_is_compatible(ct,
  222. "IBM,CBEA-Internal-Interrupt-Controller"))
  223. return -ENODEV;
  224. if (intsize != 1)
  225. return -ENODEV;
  226. val = of_get_property(ct, "#interrupt-cells", NULL);
  227. if (val == NULL || *val != 1)
  228. return -ENODEV;
  229. node = intspec[0] >> 24;
  230. ext = (intspec[0] >> 16) & 0xff;
  231. class = (intspec[0] >> 8) & 0xff;
  232. unit = intspec[0] & 0xff;
  233. /* Check if node is in supported range */
  234. if (node > 1)
  235. return -EINVAL;
  236. /* Build up interrupt number, special case for IO exceptions */
  237. *out_hwirq = (node << IIC_IRQ_NODE_SHIFT);
  238. if (unit == IIC_UNIT_IIC && class == 1)
  239. *out_hwirq |= IIC_IRQ_TYPE_IOEXC | ext;
  240. else
  241. *out_hwirq |= IIC_IRQ_TYPE_NORMAL |
  242. (class << IIC_IRQ_CLASS_SHIFT) | unit;
  243. /* Dummy flags, ignored by iic code */
  244. *out_flags = IRQ_TYPE_EDGE_RISING;
  245. return 0;
  246. }
  247. static struct irq_host_ops iic_host_ops = {
  248. .match = iic_host_match,
  249. .map = iic_host_map,
  250. .xlate = iic_host_xlate,
  251. };
  252. static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr,
  253. struct device_node *node)
  254. {
  255. /* XXX FIXME: should locate the linux CPU number from the HW cpu
  256. * number properly. We are lucky for now
  257. */
  258. struct iic *iic = &per_cpu(iic, hw_cpu);
  259. iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs));
  260. BUG_ON(iic->regs == NULL);
  261. iic->target_id = ((hw_cpu & 2) << 3) | ((hw_cpu & 1) ? 0xf : 0xe);
  262. iic->eoi_stack[0] = 0xff;
  263. iic->node = of_node_get(node);
  264. out_be64(&iic->regs->prio, 0);
  265. printk(KERN_INFO "IIC for CPU %d target id 0x%x : %s\n",
  266. hw_cpu, iic->target_id, node->full_name);
  267. }
  268. static int __init setup_iic(void)
  269. {
  270. struct device_node *dn;
  271. struct resource r0, r1;
  272. unsigned int node, cascade, found = 0;
  273. struct cbe_iic_regs __iomem *node_iic;
  274. const u32 *np;
  275. for (dn = NULL;
  276. (dn = of_find_node_by_name(dn,"interrupt-controller")) != NULL;) {
  277. if (!of_device_is_compatible(dn,
  278. "IBM,CBEA-Internal-Interrupt-Controller"))
  279. continue;
  280. np = of_get_property(dn, "ibm,interrupt-server-ranges", NULL);
  281. if (np == NULL) {
  282. printk(KERN_WARNING "IIC: CPU association not found\n");
  283. of_node_put(dn);
  284. return -ENODEV;
  285. }
  286. if (of_address_to_resource(dn, 0, &r0) ||
  287. of_address_to_resource(dn, 1, &r1)) {
  288. printk(KERN_WARNING "IIC: Can't resolve addresses\n");
  289. of_node_put(dn);
  290. return -ENODEV;
  291. }
  292. found++;
  293. init_one_iic(np[0], r0.start, dn);
  294. init_one_iic(np[1], r1.start, dn);
  295. /* Setup cascade for IO exceptions. XXX cleanup tricks to get
  296. * node vs CPU etc...
  297. * Note that we configure the IIC_IRR here with a hard coded
  298. * priority of 1. We might want to improve that later.
  299. */
  300. node = np[0] >> 1;
  301. node_iic = cbe_get_cpu_iic_regs(np[0]);
  302. cascade = node << IIC_IRQ_NODE_SHIFT;
  303. cascade |= 1 << IIC_IRQ_CLASS_SHIFT;
  304. cascade |= IIC_UNIT_IIC;
  305. cascade = irq_create_mapping(iic_host, cascade);
  306. if (cascade == NO_IRQ)
  307. continue;
  308. /*
  309. * irq_data is a generic pointer that gets passed back
  310. * to us later, so the forced cast is fine.
  311. */
  312. set_irq_data(cascade, (void __force *)node_iic);
  313. set_irq_chained_handler(cascade , iic_ioexc_cascade);
  314. out_be64(&node_iic->iic_ir,
  315. (1 << 12) /* priority */ |
  316. (node << 4) /* dest node */ |
  317. IIC_UNIT_THREAD_0 /* route them to thread 0 */);
  318. /* Flush pending (make sure it triggers if there is
  319. * anything pending
  320. */
  321. out_be64(&node_iic->iic_is, 0xfffffffffffffffful);
  322. }
  323. if (found)
  324. return 0;
  325. else
  326. return -ENODEV;
  327. }
  328. void __init iic_init_IRQ(void)
  329. {
  330. /* Setup an irq host data structure */
  331. iic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_LINEAR, IIC_SOURCE_COUNT,
  332. &iic_host_ops, IIC_IRQ_INVALID);
  333. BUG_ON(iic_host == NULL);
  334. irq_set_default_host(iic_host);
  335. /* Discover and initialize iics */
  336. if (setup_iic() < 0)
  337. panic("IIC: Failed to initialize !\n");
  338. /* Set master interrupt handling function */
  339. ppc_md.get_irq = iic_get_irq;
  340. /* Enable on current CPU */
  341. iic_setup_cpu();
  342. }
  343. void iic_set_interrupt_routing(int cpu, int thread, int priority)
  344. {
  345. struct cbe_iic_regs __iomem *iic_regs = cbe_get_cpu_iic_regs(cpu);
  346. u64 iic_ir = 0;
  347. int node = cpu >> 1;
  348. /* Set which node and thread will handle the next interrupt */
  349. iic_ir |= CBE_IIC_IR_PRIO(priority) |
  350. CBE_IIC_IR_DEST_NODE(node);
  351. if (thread == 0)
  352. iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_0);
  353. else
  354. iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_1);
  355. out_be64(&iic_regs->iic_ir, iic_ir);
  356. }