44x_mmu.c 2.0 KB

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  1. /*
  2. * Modifications by Matt Porter (mporter@mvista.com) to support
  3. * PPC44x Book E processors.
  4. *
  5. * This file contains the routines for initializing the MMU
  6. * on the 4xx series of chips.
  7. * -- paulus
  8. *
  9. * Derived from arch/ppc/mm/init.c:
  10. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  11. *
  12. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  13. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  14. * Copyright (C) 1996 Paul Mackerras
  15. *
  16. * Derived from "arch/i386/mm/init.c"
  17. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. */
  25. #include <linux/init.h>
  26. #include <asm/mmu.h>
  27. #include <asm/system.h>
  28. #include <asm/page.h>
  29. #include "mmu_decl.h"
  30. /* Used by the 44x TLB replacement exception handler.
  31. * Just needed it declared someplace.
  32. */
  33. unsigned int tlb_44x_index; /* = 0 */
  34. unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
  35. /*
  36. * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
  37. */
  38. static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
  39. {
  40. __asm__ __volatile__(
  41. "tlbwe %2,%3,%4\n"
  42. "tlbwe %1,%3,%5\n"
  43. "tlbwe %0,%3,%6\n"
  44. :
  45. : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
  46. "r" (phys),
  47. "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
  48. "r" (tlb_44x_hwater--), /* slot for this TLB entry */
  49. "i" (PPC44x_TLB_PAGEID),
  50. "i" (PPC44x_TLB_XLAT),
  51. "i" (PPC44x_TLB_ATTRIB));
  52. }
  53. void __init MMU_init_hw(void)
  54. {
  55. flush_instruction_cache();
  56. }
  57. unsigned long __init mmu_mapin_ram(void)
  58. {
  59. unsigned long addr;
  60. /* Pin in enough TLBs to cover any lowmem not covered by the
  61. * initial 256M mapping established in head_44x.S */
  62. for (addr = PPC_PIN_SIZE; addr < total_lowmem;
  63. addr += PPC_PIN_SIZE)
  64. ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
  65. return total_lowmem;
  66. }