rtas_pci.c 8.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367
  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
  3. * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
  4. *
  5. * RTAS specific routines for PCI.
  6. *
  7. * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/threads.h>
  25. #include <linux/pci.h>
  26. #include <linux/string.h>
  27. #include <linux/init.h>
  28. #include <linux/bootmem.h>
  29. #include <asm/io.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/irq.h>
  32. #include <asm/prom.h>
  33. #include <asm/machdep.h>
  34. #include <asm/pci-bridge.h>
  35. #include <asm/iommu.h>
  36. #include <asm/rtas.h>
  37. #include <asm/mpic.h>
  38. #include <asm/ppc-pci.h>
  39. #include <asm/eeh.h>
  40. /* RTAS tokens */
  41. static int read_pci_config;
  42. static int write_pci_config;
  43. static int ibm_read_pci_config;
  44. static int ibm_write_pci_config;
  45. static inline int config_access_valid(struct pci_dn *dn, int where)
  46. {
  47. if (where < 256)
  48. return 1;
  49. if (where < 4096 && dn->pci_ext_config_space)
  50. return 1;
  51. return 0;
  52. }
  53. static int of_device_available(struct device_node * dn)
  54. {
  55. const char *status;
  56. status = of_get_property(dn, "status", NULL);
  57. if (!status)
  58. return 1;
  59. if (!strcmp(status, "okay"))
  60. return 1;
  61. return 0;
  62. }
  63. int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
  64. {
  65. int returnval = -1;
  66. unsigned long buid, addr;
  67. int ret;
  68. if (!pdn)
  69. return PCIBIOS_DEVICE_NOT_FOUND;
  70. if (!config_access_valid(pdn, where))
  71. return PCIBIOS_BAD_REGISTER_NUMBER;
  72. addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
  73. buid = pdn->phb->buid;
  74. if (buid) {
  75. ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
  76. addr, BUID_HI(buid), BUID_LO(buid), size);
  77. } else {
  78. ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
  79. }
  80. *val = returnval;
  81. if (ret)
  82. return PCIBIOS_DEVICE_NOT_FOUND;
  83. if (returnval == EEH_IO_ERROR_VALUE(size) &&
  84. eeh_dn_check_failure (pdn->node, NULL))
  85. return PCIBIOS_DEVICE_NOT_FOUND;
  86. return PCIBIOS_SUCCESSFUL;
  87. }
  88. static int rtas_pci_read_config(struct pci_bus *bus,
  89. unsigned int devfn,
  90. int where, int size, u32 *val)
  91. {
  92. struct device_node *busdn, *dn;
  93. if (bus->self)
  94. busdn = pci_device_to_OF_node(bus->self);
  95. else
  96. busdn = bus->sysdata; /* must be a phb */
  97. /* Search only direct children of the bus */
  98. for (dn = busdn->child; dn; dn = dn->sibling) {
  99. struct pci_dn *pdn = PCI_DN(dn);
  100. if (pdn && pdn->devfn == devfn
  101. && of_device_available(dn))
  102. return rtas_read_config(pdn, where, size, val);
  103. }
  104. return PCIBIOS_DEVICE_NOT_FOUND;
  105. }
  106. int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
  107. {
  108. unsigned long buid, addr;
  109. int ret;
  110. if (!pdn)
  111. return PCIBIOS_DEVICE_NOT_FOUND;
  112. if (!config_access_valid(pdn, where))
  113. return PCIBIOS_BAD_REGISTER_NUMBER;
  114. addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
  115. buid = pdn->phb->buid;
  116. if (buid) {
  117. ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
  118. BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
  119. } else {
  120. ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
  121. }
  122. if (ret)
  123. return PCIBIOS_DEVICE_NOT_FOUND;
  124. return PCIBIOS_SUCCESSFUL;
  125. }
  126. static int rtas_pci_write_config(struct pci_bus *bus,
  127. unsigned int devfn,
  128. int where, int size, u32 val)
  129. {
  130. struct device_node *busdn, *dn;
  131. if (bus->self)
  132. busdn = pci_device_to_OF_node(bus->self);
  133. else
  134. busdn = bus->sysdata; /* must be a phb */
  135. /* Search only direct children of the bus */
  136. for (dn = busdn->child; dn; dn = dn->sibling) {
  137. struct pci_dn *pdn = PCI_DN(dn);
  138. if (pdn && pdn->devfn == devfn
  139. && of_device_available(dn))
  140. return rtas_write_config(pdn, where, size, val);
  141. }
  142. return PCIBIOS_DEVICE_NOT_FOUND;
  143. }
  144. struct pci_ops rtas_pci_ops = {
  145. .read = rtas_pci_read_config,
  146. .write = rtas_pci_write_config,
  147. };
  148. int is_python(struct device_node *dev)
  149. {
  150. const char *model = of_get_property(dev, "model", NULL);
  151. if (model && strstr(model, "Python"))
  152. return 1;
  153. return 0;
  154. }
  155. static void python_countermeasures(struct device_node *dev)
  156. {
  157. struct resource registers;
  158. void __iomem *chip_regs;
  159. volatile u32 val;
  160. if (of_address_to_resource(dev, 0, &registers)) {
  161. printk(KERN_ERR "Can't get address for Python workarounds !\n");
  162. return;
  163. }
  164. /* Python's register file is 1 MB in size. */
  165. chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
  166. /*
  167. * Firmware doesn't always clear this bit which is critical
  168. * for good performance - Anton
  169. */
  170. #define PRG_CL_RESET_VALID 0x00010000
  171. val = in_be32(chip_regs + 0xf6030);
  172. if (val & PRG_CL_RESET_VALID) {
  173. printk(KERN_INFO "Python workaround: ");
  174. val &= ~PRG_CL_RESET_VALID;
  175. out_be32(chip_regs + 0xf6030, val);
  176. /*
  177. * We must read it back for changes to
  178. * take effect
  179. */
  180. val = in_be32(chip_regs + 0xf6030);
  181. printk("reg0: %x\n", val);
  182. }
  183. iounmap(chip_regs);
  184. }
  185. void __init init_pci_config_tokens (void)
  186. {
  187. read_pci_config = rtas_token("read-pci-config");
  188. write_pci_config = rtas_token("write-pci-config");
  189. ibm_read_pci_config = rtas_token("ibm,read-pci-config");
  190. ibm_write_pci_config = rtas_token("ibm,write-pci-config");
  191. }
  192. unsigned long __devinit get_phb_buid (struct device_node *phb)
  193. {
  194. struct resource r;
  195. if (ibm_read_pci_config == -1)
  196. return 0;
  197. if (of_address_to_resource(phb, 0, &r))
  198. return 0;
  199. return r.start;
  200. }
  201. static int phb_set_bus_ranges(struct device_node *dev,
  202. struct pci_controller *phb)
  203. {
  204. const int *bus_range;
  205. unsigned int len;
  206. bus_range = of_get_property(dev, "bus-range", &len);
  207. if (bus_range == NULL || len < 2 * sizeof(int)) {
  208. return 1;
  209. }
  210. phb->first_busno = bus_range[0];
  211. phb->last_busno = bus_range[1];
  212. return 0;
  213. }
  214. int __devinit rtas_setup_phb(struct pci_controller *phb)
  215. {
  216. struct device_node *dev = phb->arch_data;
  217. if (is_python(dev))
  218. python_countermeasures(dev);
  219. if (phb_set_bus_ranges(dev, phb))
  220. return 1;
  221. phb->ops = &rtas_pci_ops;
  222. phb->buid = get_phb_buid(dev);
  223. return 0;
  224. }
  225. void __init find_and_init_phbs(void)
  226. {
  227. struct device_node *node;
  228. struct pci_controller *phb;
  229. struct device_node *root = of_find_node_by_path("/");
  230. for (node = of_get_next_child(root, NULL);
  231. node != NULL;
  232. node = of_get_next_child(root, node)) {
  233. if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
  234. strcmp(node->type, "pciex") != 0))
  235. continue;
  236. phb = pcibios_alloc_controller(node);
  237. if (!phb)
  238. continue;
  239. rtas_setup_phb(phb);
  240. pci_process_bridge_OF_ranges(phb, node, 0);
  241. isa_bridge_find_early(phb);
  242. }
  243. of_node_put(root);
  244. pci_devs_phb_init();
  245. /*
  246. * pci_probe_only and pci_assign_all_buses can be set via properties
  247. * in chosen.
  248. */
  249. if (of_chosen) {
  250. const int *prop;
  251. prop = of_get_property(of_chosen,
  252. "linux,pci-probe-only", NULL);
  253. if (prop)
  254. pci_probe_only = *prop;
  255. prop = of_get_property(of_chosen,
  256. "linux,pci-assign-all-buses", NULL);
  257. if (prop)
  258. pci_assign_all_buses = *prop;
  259. }
  260. }
  261. /* RPA-specific bits for removing PHBs */
  262. int pcibios_remove_root_bus(struct pci_controller *phb)
  263. {
  264. struct pci_bus *b = phb->bus;
  265. struct resource *res;
  266. int rc, i;
  267. res = b->resource[0];
  268. if (!res->flags) {
  269. printk(KERN_ERR "%s: no IO resource for PHB %s\n", __FUNCTION__,
  270. b->name);
  271. return 1;
  272. }
  273. rc = pcibios_unmap_io_space(b);
  274. if (rc) {
  275. printk(KERN_ERR "%s: failed to unmap IO on bus %s\n",
  276. __FUNCTION__, b->name);
  277. return 1;
  278. }
  279. if (release_resource(res)) {
  280. printk(KERN_ERR "%s: failed to release IO on bus %s\n",
  281. __FUNCTION__, b->name);
  282. return 1;
  283. }
  284. for (i = 1; i < 3; ++i) {
  285. res = b->resource[i];
  286. if (!res->flags && i == 0) {
  287. printk(KERN_ERR "%s: no MEM resource for PHB %s\n",
  288. __FUNCTION__, b->name);
  289. return 1;
  290. }
  291. if (res->flags && release_resource(res)) {
  292. printk(KERN_ERR
  293. "%s: failed to release IO %d on bus %s\n",
  294. __FUNCTION__, i, b->name);
  295. return 1;
  296. }
  297. }
  298. pcibios_free_controller(phb);
  299. return 0;
  300. }
  301. EXPORT_SYMBOL(pcibios_remove_root_bus);