walnut.dts 4.0 KB

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  1. /*
  2. * Device Tree Source for IBM Walnut
  3. *
  4. * Copyright 2007 IBM Corp.
  5. * Josh Boyer <jwboyer@linux.vnet.ibm.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without
  9. * any warranty of any kind, whether express or implied.
  10. */
  11. / {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. model = "ibm,walnut";
  15. compatible = "ibm,walnut";
  16. dcr-parent = <&/cpus/PowerPC,405GP@0>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,405GP@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. clock-frequency = <bebc200>; /* Filled in by zImage */
  24. timebase-frequency = <0>; /* Filled in by zImage */
  25. i-cache-line-size = <20>;
  26. d-cache-line-size = <20>;
  27. i-cache-size = <4000>;
  28. d-cache-size = <4000>;
  29. dcr-controller;
  30. dcr-access-method = "native";
  31. };
  32. };
  33. memory {
  34. device_type = "memory";
  35. reg = <0 0>; /* Filled in by zImage */
  36. };
  37. UIC0: interrupt-controller {
  38. compatible = "ibm,uic";
  39. interrupt-controller;
  40. cell-index = <0>;
  41. dcr-reg = <0c0 9>;
  42. #address-cells = <0>;
  43. #size-cells = <0>;
  44. #interrupt-cells = <2>;
  45. };
  46. plb {
  47. compatible = "ibm,plb3";
  48. #address-cells = <1>;
  49. #size-cells = <1>;
  50. ranges;
  51. clock-frequency = <0>; /* Filled in by zImage */
  52. SDRAM0: memory-controller {
  53. compatible = "ibm,sdram-405gp";
  54. dcr-reg = <010 2>;
  55. };
  56. MAL: mcmal {
  57. compatible = "ibm,mcmal-405gp", "ibm,mcmal";
  58. dcr-reg = <180 62>;
  59. num-tx-chans = <2>;
  60. num-rx-chans = <1>;
  61. interrupt-parent = <&UIC0>;
  62. interrupts = <a 4 b 4 c 4 d 4 e 4>;
  63. };
  64. POB0: opb {
  65. compatible = "ibm,opb-405gp", "ibm,opb";
  66. #address-cells = <1>;
  67. #size-cells = <1>;
  68. ranges = <ef600000 ef600000 a00000>;
  69. dcr-reg = <0a0 5>;
  70. clock-frequency = <0>; /* Filled in by zImage */
  71. UART0: serial@ef600300 {
  72. device_type = "serial";
  73. compatible = "ns16550";
  74. reg = <ef600300 8>;
  75. virtual-reg = <ef600300>;
  76. clock-frequency = <0>; /* Filled in by zImage */
  77. current-speed = <2580>;
  78. interrupt-parent = <&UIC0>;
  79. interrupts = <0 4>;
  80. };
  81. UART1: serial@ef600400 {
  82. device_type = "serial";
  83. compatible = "ns16550";
  84. reg = <ef600400 8>;
  85. virtual-reg = <ef600400>;
  86. clock-frequency = <0>; /* Filled in by zImage */
  87. current-speed = <2580>;
  88. interrupt-parent = <&UIC0>;
  89. interrupts = <1 4>;
  90. };
  91. IIC: i2c@ef600500 {
  92. compatible = "ibm,iic-405gp", "ibm,iic";
  93. reg = <ef600500 11>;
  94. interrupt-parent = <&UIC0>;
  95. interrupts = <2 4>;
  96. };
  97. GPIO: gpio@ef600700 {
  98. compatible = "ibm,gpio-405gp";
  99. reg = <ef600700 20>;
  100. };
  101. EMAC: ethernet@ef600800 {
  102. linux,network-index = <0>;
  103. device_type = "network";
  104. compatible = "ibm,emac-405gp", "ibm,emac";
  105. interrupt-parent = <&UIC0>;
  106. interrupts = <9 4 f 4>;
  107. reg = <ef600800 70>;
  108. mal-device = <&MAL>;
  109. mal-tx-channel = <0 1>;
  110. mal-rx-channel = <0>;
  111. cell-index = <0>;
  112. max-frame-size = <5dc>;
  113. rx-fifo-size = <1000>;
  114. tx-fifo-size = <800>;
  115. phy-mode = "rmii";
  116. phy-map = <00000001>;
  117. };
  118. };
  119. EBC0: ebc {
  120. compatible = "ibm,ebc-405gp", "ibm,ebc";
  121. dcr-reg = <012 2>;
  122. #address-cells = <2>;
  123. #size-cells = <1>;
  124. /* The ranges property is supplied by the bootwrapper
  125. * and is based on the firmware's configuration of the
  126. * EBC bridge
  127. */
  128. clock-frequency = <0>; /* Filled in by zImage */
  129. sram@0,0 {
  130. reg = <0 0 80000>;
  131. };
  132. flash@0,80000 {
  133. compatible = "jedec-flash";
  134. bank-width = <1>;
  135. reg = <0 80000 80000>;
  136. #address-cells = <1>;
  137. #size-cells = <1>;
  138. partition@0 {
  139. label = "OpenBIOS";
  140. reg = <0 80000>;
  141. read-only;
  142. };
  143. };
  144. ds1743@1,0 {
  145. /* NVRAM and RTC */
  146. compatible = "ds1743";
  147. reg = <1 0 2000>;
  148. };
  149. keyboard@2,0 {
  150. compatible = "intel,82C42PC";
  151. reg = <2 0 2>;
  152. };
  153. ir@3,0 {
  154. compatible = "ti,TIR2000PAG";
  155. reg = <3 0 10>;
  156. };
  157. fpga@7,0 {
  158. compatible = "Walnut-FPGA";
  159. reg = <7 0 10>;
  160. virtual-reg = <f0300005>;
  161. };
  162. };
  163. };
  164. chosen {
  165. linux,stdout-path = "/plb/opb/serial@ef600300";
  166. };
  167. };