mpc8641_hpcn.dts 8.5 KB

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  1. /*
  2. * MPC8641 HPCN Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8641HPCN";
  13. compatible = "mpc86xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8641@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <8000>; // L1, 32K
  25. i-cache-size = <8000>; // L1, 32K
  26. timebase-frequency = <0>; // 33 MHz, from uboot
  27. bus-frequency = <0>; // From uboot
  28. clock-frequency = <0>; // From uboot
  29. };
  30. PowerPC,8641@1 {
  31. device_type = "cpu";
  32. reg = <1>;
  33. d-cache-line-size = <20>; // 32 bytes
  34. i-cache-line-size = <20>; // 32 bytes
  35. d-cache-size = <8000>; // L1, 32K
  36. i-cache-size = <8000>; // L1, 32K
  37. timebase-frequency = <0>; // 33 MHz, from uboot
  38. bus-frequency = <0>; // From uboot
  39. clock-frequency = <0>; // From uboot
  40. };
  41. };
  42. memory {
  43. device_type = "memory";
  44. reg = <00000000 40000000>; // 1G at 0x0
  45. };
  46. soc8641@f8000000 {
  47. #address-cells = <1>;
  48. #size-cells = <1>;
  49. device_type = "soc";
  50. ranges = <00000000 f8000000 00100000>;
  51. reg = <f8000000 00001000>; // CCSRBAR
  52. bus-frequency = <0>;
  53. i2c@3000 {
  54. device_type = "i2c";
  55. compatible = "fsl-i2c";
  56. reg = <3000 100>;
  57. interrupts = <2b 2>;
  58. interrupt-parent = <&mpic>;
  59. dfsrr;
  60. };
  61. i2c@3100 {
  62. device_type = "i2c";
  63. compatible = "fsl-i2c";
  64. reg = <3100 100>;
  65. interrupts = <2b 2>;
  66. interrupt-parent = <&mpic>;
  67. dfsrr;
  68. };
  69. mdio@24520 {
  70. #address-cells = <1>;
  71. #size-cells = <0>;
  72. device_type = "mdio";
  73. compatible = "gianfar";
  74. reg = <24520 20>;
  75. phy0: ethernet-phy@0 {
  76. interrupt-parent = <&mpic>;
  77. interrupts = <a 1>;
  78. reg = <0>;
  79. device_type = "ethernet-phy";
  80. };
  81. phy1: ethernet-phy@1 {
  82. interrupt-parent = <&mpic>;
  83. interrupts = <a 1>;
  84. reg = <1>;
  85. device_type = "ethernet-phy";
  86. };
  87. phy2: ethernet-phy@2 {
  88. interrupt-parent = <&mpic>;
  89. interrupts = <a 1>;
  90. reg = <2>;
  91. device_type = "ethernet-phy";
  92. };
  93. phy3: ethernet-phy@3 {
  94. interrupt-parent = <&mpic>;
  95. interrupts = <a 1>;
  96. reg = <3>;
  97. device_type = "ethernet-phy";
  98. };
  99. };
  100. ethernet@24000 {
  101. #address-cells = <1>;
  102. #size-cells = <0>;
  103. device_type = "network";
  104. model = "TSEC";
  105. compatible = "gianfar";
  106. reg = <24000 1000>;
  107. /*
  108. * mac-address is deprecated and will be removed
  109. * in 2.6.25. Only recent versions of
  110. * U-Boot support local-mac-address, however.
  111. */
  112. mac-address = [ 00 00 00 00 00 00 ];
  113. local-mac-address = [ 00 00 00 00 00 00 ];
  114. interrupts = <1d 2 1e 2 22 2>;
  115. interrupt-parent = <&mpic>;
  116. phy-handle = <&phy0>;
  117. phy-connection-type = "rgmii-id";
  118. };
  119. ethernet@25000 {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. device_type = "network";
  123. model = "TSEC";
  124. compatible = "gianfar";
  125. reg = <25000 1000>;
  126. /*
  127. * mac-address is deprecated and will be removed
  128. * in 2.6.25. Only recent versions of
  129. * U-Boot support local-mac-address, however.
  130. */
  131. mac-address = [ 00 00 00 00 00 00 ];
  132. local-mac-address = [ 00 00 00 00 00 00 ];
  133. interrupts = <23 2 24 2 28 2>;
  134. interrupt-parent = <&mpic>;
  135. phy-handle = <&phy1>;
  136. phy-connection-type = "rgmii-id";
  137. };
  138. ethernet@26000 {
  139. #address-cells = <1>;
  140. #size-cells = <0>;
  141. device_type = "network";
  142. model = "TSEC";
  143. compatible = "gianfar";
  144. reg = <26000 1000>;
  145. /*
  146. * mac-address is deprecated and will be removed
  147. * in 2.6.25. Only recent versions of
  148. * U-Boot support local-mac-address, however.
  149. */
  150. mac-address = [ 00 00 00 00 00 00 ];
  151. local-mac-address = [ 00 00 00 00 00 00 ];
  152. interrupts = <1F 2 20 2 21 2>;
  153. interrupt-parent = <&mpic>;
  154. phy-handle = <&phy2>;
  155. phy-connection-type = "rgmii-id";
  156. };
  157. ethernet@27000 {
  158. #address-cells = <1>;
  159. #size-cells = <0>;
  160. device_type = "network";
  161. model = "TSEC";
  162. compatible = "gianfar";
  163. reg = <27000 1000>;
  164. /*
  165. * mac-address is deprecated and will be removed
  166. * in 2.6.25. Only recent versions of
  167. * U-Boot support local-mac-address, however.
  168. */
  169. mac-address = [ 00 00 00 00 00 00 ];
  170. local-mac-address = [ 00 00 00 00 00 00 ];
  171. interrupts = <25 2 26 2 27 2>;
  172. interrupt-parent = <&mpic>;
  173. phy-handle = <&phy3>;
  174. phy-connection-type = "rgmii-id";
  175. };
  176. serial@4500 {
  177. device_type = "serial";
  178. compatible = "ns16550";
  179. reg = <4500 100>;
  180. clock-frequency = <0>;
  181. interrupts = <2a 2>;
  182. interrupt-parent = <&mpic>;
  183. };
  184. serial@4600 {
  185. device_type = "serial";
  186. compatible = "ns16550";
  187. reg = <4600 100>;
  188. clock-frequency = <0>;
  189. interrupts = <1c 2>;
  190. interrupt-parent = <&mpic>;
  191. };
  192. mpic: pic@40000 {
  193. clock-frequency = <0>;
  194. interrupt-controller;
  195. #address-cells = <0>;
  196. #interrupt-cells = <2>;
  197. reg = <40000 40000>;
  198. compatible = "chrp,open-pic";
  199. device_type = "open-pic";
  200. big-endian;
  201. };
  202. global-utilities@e0000 {
  203. compatible = "fsl,mpc8641-guts";
  204. reg = <e0000 1000>;
  205. fsl,has-rstcr;
  206. };
  207. };
  208. pcie@f8008000 {
  209. compatible = "fsl,mpc8641-pcie";
  210. device_type = "pci";
  211. #interrupt-cells = <1>;
  212. #size-cells = <2>;
  213. #address-cells = <3>;
  214. reg = <f8008000 1000>;
  215. bus-range = <0 ff>;
  216. ranges = <02000000 0 80000000 80000000 0 20000000
  217. 01000000 0 00000000 e2000000 0 00100000>;
  218. clock-frequency = <1fca055>;
  219. interrupt-parent = <&mpic>;
  220. interrupts = <18 2>;
  221. interrupt-map-mask = <fb00 0 0 0>;
  222. interrupt-map = <
  223. /* IDSEL 0x11 */
  224. 8800 0 0 1 &i8259 9 2
  225. 8800 0 0 2 &i8259 a 2
  226. 8800 0 0 3 &i8259 b 2
  227. 8800 0 0 4 &i8259 c 2
  228. /* IDSEL 0x12 */
  229. 9000 0 0 1 &i8259 a 2
  230. 9000 0 0 2 &i8259 b 2
  231. 9000 0 0 3 &i8259 c 2
  232. 9000 0 0 4 &i8259 9 2
  233. // IDSEL 0x1c USB
  234. e000 0 0 0 &i8259 c 2
  235. e100 0 0 0 &i8259 9 2
  236. e200 0 0 0 &i8259 a 2
  237. e300 0 0 0 &i8259 b 2
  238. // IDSEL 0x1d Audio
  239. e800 0 0 0 &i8259 6 2
  240. // IDSEL 0x1e Legacy
  241. f000 0 0 0 &i8259 7 2
  242. f100 0 0 0 &i8259 7 2
  243. // IDSEL 0x1f IDE/SATA
  244. f800 0 0 0 &i8259 e 2
  245. f900 0 0 0 &i8259 5 2
  246. >;
  247. pcie@0 {
  248. reg = <0 0 0 0 0>;
  249. #size-cells = <2>;
  250. #address-cells = <3>;
  251. device_type = "pci";
  252. ranges = <02000000 0 80000000
  253. 02000000 0 80000000
  254. 0 20000000
  255. 01000000 0 00000000
  256. 01000000 0 00000000
  257. 0 00100000>;
  258. uli1575@0 {
  259. reg = <0 0 0 0 0>;
  260. #size-cells = <2>;
  261. #address-cells = <3>;
  262. ranges = <02000000 0 80000000
  263. 02000000 0 80000000
  264. 0 20000000
  265. 01000000 0 00000000
  266. 01000000 0 00000000
  267. 0 00100000>;
  268. isa@1e {
  269. device_type = "isa";
  270. #interrupt-cells = <2>;
  271. #size-cells = <1>;
  272. #address-cells = <2>;
  273. reg = <f000 0 0 0 0>;
  274. ranges = <1 0 01000000 0 0
  275. 00001000>;
  276. interrupt-parent = <&i8259>;
  277. i8259: interrupt-controller@20 {
  278. reg = <1 20 2
  279. 1 a0 2
  280. 1 4d0 2>;
  281. interrupt-controller;
  282. device_type = "interrupt-controller";
  283. #address-cells = <0>;
  284. #interrupt-cells = <2>;
  285. compatible = "chrp,iic";
  286. interrupts = <9 2>;
  287. interrupt-parent = <&mpic>;
  288. };
  289. i8042@60 {
  290. #size-cells = <0>;
  291. #address-cells = <1>;
  292. reg = <1 60 1 1 64 1>;
  293. interrupts = <1 3 c 3>;
  294. interrupt-parent =
  295. <&i8259>;
  296. keyboard@0 {
  297. reg = <0>;
  298. compatible = "pnpPNP,303";
  299. };
  300. mouse@1 {
  301. reg = <1>;
  302. compatible = "pnpPNP,f03";
  303. };
  304. };
  305. rtc@70 {
  306. compatible =
  307. "pnpPNP,b00";
  308. reg = <1 70 2>;
  309. };
  310. gpio@400 {
  311. reg = <1 400 80>;
  312. };
  313. };
  314. };
  315. };
  316. };
  317. pcie@f8009000 {
  318. compatible = "fsl,mpc8641-pcie";
  319. device_type = "pci";
  320. #interrupt-cells = <1>;
  321. #size-cells = <2>;
  322. #address-cells = <3>;
  323. reg = <f8009000 1000>;
  324. bus-range = <0 ff>;
  325. ranges = <02000000 0 a0000000 a0000000 0 20000000
  326. 01000000 0 00000000 e3000000 0 00100000>;
  327. clock-frequency = <1fca055>;
  328. interrupt-parent = <&mpic>;
  329. interrupts = <19 2>;
  330. interrupt-map-mask = <f800 0 0 7>;
  331. interrupt-map = <
  332. /* IDSEL 0x0 */
  333. 0000 0 0 1 &mpic 4 1
  334. 0000 0 0 2 &mpic 5 1
  335. 0000 0 0 3 &mpic 6 1
  336. 0000 0 0 4 &mpic 7 1
  337. >;
  338. pcie@0 {
  339. reg = <0 0 0 0 0>;
  340. #size-cells = <2>;
  341. #address-cells = <3>;
  342. device_type = "pci";
  343. ranges = <02000000 0 a0000000
  344. 02000000 0 a0000000
  345. 0 20000000
  346. 01000000 0 00000000
  347. 01000000 0 00000000
  348. 0 00100000>;
  349. };
  350. };
  351. };