mpc836x_mds.dts 8.4 KB

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  1. /*
  2. * MPC8360E EMDS Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /*
  12. /memreserve/ 00000000 1000000;
  13. */
  14. / {
  15. model = "MPC8360MDS";
  16. compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. cpus {
  20. #address-cells = <1>;
  21. #size-cells = <0>;
  22. PowerPC,8360@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <8000>; // L1, 32K
  28. i-cache-size = <8000>; // L1, 32K
  29. timebase-frequency = <3EF1480>;
  30. bus-frequency = <FBC5200>;
  31. clock-frequency = <1F78A400>;
  32. };
  33. };
  34. memory {
  35. device_type = "memory";
  36. reg = <00000000 10000000>;
  37. };
  38. bcsr@f8000000 {
  39. device_type = "board-control";
  40. reg = <f8000000 8000>;
  41. };
  42. soc8360@e0000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. device_type = "soc";
  46. ranges = <0 e0000000 00100000>;
  47. reg = <e0000000 00000200>;
  48. bus-frequency = <FBC5200>;
  49. wdt@200 {
  50. device_type = "watchdog";
  51. compatible = "mpc83xx_wdt";
  52. reg = <200 100>;
  53. };
  54. i2c@3000 {
  55. device_type = "i2c";
  56. compatible = "fsl-i2c";
  57. reg = <3000 100>;
  58. interrupts = <e 8>;
  59. interrupt-parent = < &ipic >;
  60. dfsrr;
  61. };
  62. i2c@3100 {
  63. device_type = "i2c";
  64. compatible = "fsl-i2c";
  65. reg = <3100 100>;
  66. interrupts = <f 8>;
  67. interrupt-parent = < &ipic >;
  68. dfsrr;
  69. };
  70. serial@4500 {
  71. device_type = "serial";
  72. compatible = "ns16550";
  73. reg = <4500 100>;
  74. clock-frequency = <FBC5200>;
  75. interrupts = <9 8>;
  76. interrupt-parent = < &ipic >;
  77. };
  78. serial@4600 {
  79. device_type = "serial";
  80. compatible = "ns16550";
  81. reg = <4600 100>;
  82. clock-frequency = <FBC5200>;
  83. interrupts = <a 8>;
  84. interrupt-parent = < &ipic >;
  85. };
  86. crypto@30000 {
  87. device_type = "crypto";
  88. model = "SEC2";
  89. compatible = "talitos";
  90. reg = <30000 10000>;
  91. interrupts = <b 8>;
  92. interrupt-parent = < &ipic >;
  93. num-channels = <4>;
  94. channel-fifo-len = <18>;
  95. exec-units-mask = <0000007e>;
  96. /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
  97. descriptor-types-mask = <01010ebf>;
  98. };
  99. ipic: pic@700 {
  100. interrupt-controller;
  101. #address-cells = <0>;
  102. #interrupt-cells = <2>;
  103. reg = <700 100>;
  104. device_type = "ipic";
  105. };
  106. par_io@1400 {
  107. reg = <1400 100>;
  108. device_type = "par_io";
  109. num-ports = <7>;
  110. pio1: ucc_pin@01 {
  111. pio-map = <
  112. /* port pin dir open_drain assignment has_irq */
  113. 0 3 1 0 1 0 /* TxD0 */
  114. 0 4 1 0 1 0 /* TxD1 */
  115. 0 5 1 0 1 0 /* TxD2 */
  116. 0 6 1 0 1 0 /* TxD3 */
  117. 1 6 1 0 3 0 /* TxD4 */
  118. 1 7 1 0 1 0 /* TxD5 */
  119. 1 9 1 0 2 0 /* TxD6 */
  120. 1 a 1 0 2 0 /* TxD7 */
  121. 0 9 2 0 1 0 /* RxD0 */
  122. 0 a 2 0 1 0 /* RxD1 */
  123. 0 b 2 0 1 0 /* RxD2 */
  124. 0 c 2 0 1 0 /* RxD3 */
  125. 0 d 2 0 1 0 /* RxD4 */
  126. 1 1 2 0 2 0 /* RxD5 */
  127. 1 0 2 0 2 0 /* RxD6 */
  128. 1 4 2 0 2 0 /* RxD7 */
  129. 0 7 1 0 1 0 /* TX_EN */
  130. 0 8 1 0 1 0 /* TX_ER */
  131. 0 f 2 0 1 0 /* RX_DV */
  132. 0 10 2 0 1 0 /* RX_ER */
  133. 0 0 2 0 1 0 /* RX_CLK */
  134. 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
  135. 2 8 2 0 1 0>; /* GTX125 - CLK9 */
  136. };
  137. pio2: ucc_pin@02 {
  138. pio-map = <
  139. /* port pin dir open_drain assignment has_irq */
  140. 0 11 1 0 1 0 /* TxD0 */
  141. 0 12 1 0 1 0 /* TxD1 */
  142. 0 13 1 0 1 0 /* TxD2 */
  143. 0 14 1 0 1 0 /* TxD3 */
  144. 1 2 1 0 1 0 /* TxD4 */
  145. 1 3 1 0 2 0 /* TxD5 */
  146. 1 5 1 0 3 0 /* TxD6 */
  147. 1 8 1 0 3 0 /* TxD7 */
  148. 0 17 2 0 1 0 /* RxD0 */
  149. 0 18 2 0 1 0 /* RxD1 */
  150. 0 19 2 0 1 0 /* RxD2 */
  151. 0 1a 2 0 1 0 /* RxD3 */
  152. 0 1b 2 0 1 0 /* RxD4 */
  153. 1 c 2 0 2 0 /* RxD5 */
  154. 1 d 2 0 3 0 /* RxD6 */
  155. 1 b 2 0 2 0 /* RxD7 */
  156. 0 15 1 0 1 0 /* TX_EN */
  157. 0 16 1 0 1 0 /* TX_ER */
  158. 0 1d 2 0 1 0 /* RX_DV */
  159. 0 1e 2 0 1 0 /* RX_ER */
  160. 0 1f 2 0 1 0 /* RX_CLK */
  161. 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
  162. 2 3 2 0 1 0 /* GTX125 - CLK4 */
  163. 0 1 3 0 2 0 /* MDIO */
  164. 0 2 1 0 1 0>; /* MDC */
  165. };
  166. };
  167. };
  168. qe@e0100000 {
  169. #address-cells = <1>;
  170. #size-cells = <1>;
  171. device_type = "qe";
  172. model = "QE";
  173. ranges = <0 e0100000 00100000>;
  174. reg = <e0100000 480>;
  175. brg-frequency = <0>;
  176. bus-frequency = <179A7B00>;
  177. muram@10000 {
  178. device_type = "muram";
  179. ranges = <0 00010000 0000c000>;
  180. data-only@0{
  181. reg = <0 c000>;
  182. };
  183. };
  184. spi@4c0 {
  185. device_type = "spi";
  186. compatible = "fsl_spi";
  187. reg = <4c0 40>;
  188. interrupts = <2>;
  189. interrupt-parent = < &qeic >;
  190. mode = "cpu";
  191. };
  192. spi@500 {
  193. device_type = "spi";
  194. compatible = "fsl_spi";
  195. reg = <500 40>;
  196. interrupts = <1>;
  197. interrupt-parent = < &qeic >;
  198. mode = "cpu";
  199. };
  200. usb@6c0 {
  201. device_type = "usb";
  202. compatible = "qe_udc";
  203. reg = <6c0 40 8B00 100>;
  204. interrupts = <b>;
  205. interrupt-parent = < &qeic >;
  206. mode = "slave";
  207. };
  208. ucc@2000 {
  209. device_type = "network";
  210. compatible = "ucc_geth";
  211. model = "UCC";
  212. device-id = <1>;
  213. reg = <2000 200>;
  214. interrupts = <20>;
  215. interrupt-parent = < &qeic >;
  216. /*
  217. * mac-address is deprecated and will be removed
  218. * in 2.6.25. Only recent versions of
  219. * U-Boot support local-mac-address, however.
  220. */
  221. mac-address = [ 00 00 00 00 00 00 ];
  222. local-mac-address = [ 00 00 00 00 00 00 ];
  223. rx-clock = <0>;
  224. tx-clock = <19>;
  225. phy-handle = < &phy0 >;
  226. phy-connection-type = "rgmii-id";
  227. pio-handle = < &pio1 >;
  228. };
  229. ucc@3000 {
  230. device_type = "network";
  231. compatible = "ucc_geth";
  232. model = "UCC";
  233. device-id = <2>;
  234. reg = <3000 200>;
  235. interrupts = <21>;
  236. interrupt-parent = < &qeic >;
  237. /*
  238. * mac-address is deprecated and will be removed
  239. * in 2.6.25. Only recent versions of
  240. * U-Boot support local-mac-address, however.
  241. */
  242. mac-address = [ 00 00 00 00 00 00 ];
  243. local-mac-address = [ 00 00 00 00 00 00 ];
  244. rx-clock = <0>;
  245. tx-clock = <14>;
  246. phy-handle = < &phy1 >;
  247. phy-connection-type = "rgmii-id";
  248. pio-handle = < &pio2 >;
  249. };
  250. mdio@2120 {
  251. #address-cells = <1>;
  252. #size-cells = <0>;
  253. reg = <2120 18>;
  254. device_type = "mdio";
  255. compatible = "ucc_geth_phy";
  256. phy0: ethernet-phy@00 {
  257. interrupt-parent = < &ipic >;
  258. interrupts = <11 8>;
  259. reg = <0>;
  260. device_type = "ethernet-phy";
  261. };
  262. phy1: ethernet-phy@01 {
  263. interrupt-parent = < &ipic >;
  264. interrupts = <12 8>;
  265. reg = <1>;
  266. device_type = "ethernet-phy";
  267. };
  268. };
  269. qeic: qeic@80 {
  270. interrupt-controller;
  271. device_type = "qeic";
  272. #address-cells = <0>;
  273. #interrupt-cells = <1>;
  274. reg = <80 80>;
  275. big-endian;
  276. interrupts = <20 8 21 8>; //high:32 low:33
  277. interrupt-parent = < &ipic >;
  278. };
  279. };
  280. pci@e0008500 {
  281. interrupt-map-mask = <f800 0 0 7>;
  282. interrupt-map = <
  283. /* IDSEL 0x11 AD17 */
  284. 8800 0 0 1 &ipic 14 8
  285. 8800 0 0 2 &ipic 15 8
  286. 8800 0 0 3 &ipic 16 8
  287. 8800 0 0 4 &ipic 17 8
  288. /* IDSEL 0x12 AD18 */
  289. 9000 0 0 1 &ipic 16 8
  290. 9000 0 0 2 &ipic 17 8
  291. 9000 0 0 3 &ipic 14 8
  292. 9000 0 0 4 &ipic 15 8
  293. /* IDSEL 0x13 AD19 */
  294. 9800 0 0 1 &ipic 17 8
  295. 9800 0 0 2 &ipic 14 8
  296. 9800 0 0 3 &ipic 15 8
  297. 9800 0 0 4 &ipic 16 8
  298. /* IDSEL 0x15 AD21*/
  299. a800 0 0 1 &ipic 14 8
  300. a800 0 0 2 &ipic 15 8
  301. a800 0 0 3 &ipic 16 8
  302. a800 0 0 4 &ipic 17 8
  303. /* IDSEL 0x16 AD22*/
  304. b000 0 0 1 &ipic 17 8
  305. b000 0 0 2 &ipic 14 8
  306. b000 0 0 3 &ipic 15 8
  307. b000 0 0 4 &ipic 16 8
  308. /* IDSEL 0x17 AD23*/
  309. b800 0 0 1 &ipic 16 8
  310. b800 0 0 2 &ipic 17 8
  311. b800 0 0 3 &ipic 14 8
  312. b800 0 0 4 &ipic 15 8
  313. /* IDSEL 0x18 AD24*/
  314. c000 0 0 1 &ipic 15 8
  315. c000 0 0 2 &ipic 16 8
  316. c000 0 0 3 &ipic 17 8
  317. c000 0 0 4 &ipic 14 8>;
  318. interrupt-parent = < &ipic >;
  319. interrupts = <42 8>;
  320. bus-range = <0 0>;
  321. ranges = <02000000 0 a0000000 a0000000 0 10000000
  322. 42000000 0 80000000 80000000 0 10000000
  323. 01000000 0 00000000 e2000000 0 00100000>;
  324. clock-frequency = <3f940aa>;
  325. #interrupt-cells = <1>;
  326. #size-cells = <2>;
  327. #address-cells = <3>;
  328. reg = <e0008500 100>;
  329. compatible = "fsl,mpc8349-pci";
  330. device_type = "pci";
  331. };
  332. };