mpc8349emitxgp.dts 3.9 KB

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  1. /*
  2. * MPC8349E-mITX-GP Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMITXGP";
  13. compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8349@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>;
  23. i-cache-line-size = <20>;
  24. d-cache-size = <8000>;
  25. i-cache-size = <8000>;
  26. timebase-frequency = <0>; // from bootloader
  27. bus-frequency = <0>; // from bootloader
  28. clock-frequency = <0>; // from bootloader
  29. };
  30. };
  31. memory {
  32. device_type = "memory";
  33. reg = <00000000 10000000>;
  34. };
  35. soc8349@e0000000 {
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. device_type = "soc";
  39. ranges = <0 e0000000 00100000>;
  40. reg = <e0000000 00000200>;
  41. bus-frequency = <0>; // from bootloader
  42. wdt@200 {
  43. device_type = "watchdog";
  44. compatible = "mpc83xx_wdt";
  45. reg = <200 100>;
  46. };
  47. i2c@3000 {
  48. device_type = "i2c";
  49. compatible = "fsl-i2c";
  50. reg = <3000 100>;
  51. interrupts = <e 8>;
  52. interrupt-parent = < &ipic >;
  53. dfsrr;
  54. };
  55. i2c@3100 {
  56. device_type = "i2c";
  57. compatible = "fsl-i2c";
  58. reg = <3100 100>;
  59. interrupts = <f 8>;
  60. interrupt-parent = < &ipic >;
  61. dfsrr;
  62. };
  63. spi@7000 {
  64. device_type = "spi";
  65. compatible = "fsl_spi";
  66. reg = <7000 1000>;
  67. interrupts = <10 8>;
  68. interrupt-parent = < &ipic >;
  69. mode = "cpu";
  70. };
  71. usb@23000 {
  72. device_type = "usb";
  73. compatible = "fsl-usb2-dr";
  74. reg = <23000 1000>;
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. interrupt-parent = < &ipic >;
  78. interrupts = <26 8>;
  79. dr_mode = "otg";
  80. phy_type = "ulpi";
  81. };
  82. mdio@24520 {
  83. device_type = "mdio";
  84. compatible = "gianfar";
  85. reg = <24520 20>;
  86. #address-cells = <1>;
  87. #size-cells = <0>;
  88. /* Vitesse 8201 */
  89. phy1c: ethernet-phy@1c {
  90. interrupt-parent = < &ipic >;
  91. interrupts = <12 8>;
  92. reg = <1c>;
  93. device_type = "ethernet-phy";
  94. };
  95. };
  96. ethernet@24000 {
  97. device_type = "network";
  98. model = "TSEC";
  99. compatible = "gianfar";
  100. reg = <24000 1000>;
  101. local-mac-address = [ 00 00 00 00 00 00 ];
  102. interrupts = <20 8 21 8 22 8>;
  103. interrupt-parent = < &ipic >;
  104. phy-handle = < &phy1c >;
  105. linux,network-index = <0>;
  106. };
  107. serial@4500 {
  108. device_type = "serial";
  109. compatible = "ns16550";
  110. reg = <4500 100>;
  111. clock-frequency = <0>; // from bootloader
  112. interrupts = <9 8>;
  113. interrupt-parent = < &ipic >;
  114. };
  115. serial@4600 {
  116. device_type = "serial";
  117. compatible = "ns16550";
  118. reg = <4600 100>;
  119. clock-frequency = <0>; // from bootloader
  120. interrupts = <a 8>;
  121. interrupt-parent = < &ipic >;
  122. };
  123. crypto@30000 {
  124. device_type = "crypto";
  125. model = "SEC2";
  126. compatible = "talitos";
  127. reg = <30000 10000>;
  128. interrupts = <b 8>;
  129. interrupt-parent = < &ipic >;
  130. num-channels = <4>;
  131. channel-fifo-len = <18>;
  132. exec-units-mask = <0000007e>;
  133. descriptor-types-mask = <01010ebf>;
  134. };
  135. ipic: pic@700 {
  136. interrupt-controller;
  137. #address-cells = <0>;
  138. #interrupt-cells = <2>;
  139. reg = <700 100>;
  140. device_type = "ipic";
  141. };
  142. };
  143. pci@e0008600 {
  144. interrupt-map-mask = <f800 0 0 7>;
  145. interrupt-map = <
  146. /* IDSEL 0x0F - PCI Slot */
  147. 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
  148. 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
  149. >;
  150. interrupt-parent = < &ipic >;
  151. interrupts = <43 8>;
  152. bus-range = <1 1>;
  153. ranges = <42000000 0 a0000000 a0000000 0 10000000
  154. 02000000 0 b0000000 b0000000 0 10000000
  155. 01000000 0 00000000 e3000000 0 01000000>;
  156. clock-frequency = <3f940aa>;
  157. #interrupt-cells = <1>;
  158. #size-cells = <2>;
  159. #address-cells = <3>;
  160. reg = <e0008600 100>;
  161. compatible = "fsl,mpc8349-pci";
  162. device_type = "pci";
  163. };
  164. };