kuroboxHG.dts 3.3 KB

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  1. /*
  2. * Device Tree Souce for Buffalo KuroboxHG
  3. *
  4. * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
  5. * the default configuration linkstation_defconfig.
  6. *
  7. * Based on sandpoint.dts
  8. *
  9. * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
  10. *
  11. * This file is licensed under
  12. * the terms of the GNU General Public License version 2. This program
  13. * is licensed "as is" without any warranty of any kind, whether express
  14. * or implied.
  15. XXXX add flash parts, rtc, ??
  16. */
  17. / {
  18. model = "KuroboxHG";
  19. compatible = "linkstation";
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. PowerPC,603e { /* Really 8241 */
  26. device_type = "cpu";
  27. reg = <0>;
  28. clock-frequency = <fdad680>; /* Fixed by bootloader */
  29. timebase-frequency = <1F04000>; /* Fixed by bootloader */
  30. bus-frequency = <0>; /* Fixed by bootloader */
  31. /* Following required by dtc but not used */
  32. i-cache-size = <4000>;
  33. d-cache-size = <4000>;
  34. };
  35. };
  36. memory {
  37. device_type = "memory";
  38. reg = <00000000 08000000>;
  39. };
  40. soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. device_type = "soc";
  44. compatible = "mpc10x";
  45. store-gathering = <0>; /* 0 == off, !0 == on */
  46. reg = <80000000 00100000>;
  47. ranges = <80000000 80000000 70000000 /* pci mem space */
  48. fc000000 fc000000 00100000 /* EUMB */
  49. fe000000 fe000000 00c00000 /* pci i/o space */
  50. fec00000 fec00000 00300000 /* pci cfg regs */
  51. fef00000 fef00000 00100000>; /* pci iack */
  52. i2c@80003000 {
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. device_type = "i2c";
  56. compatible = "fsl-i2c";
  57. reg = <80003000 1000>;
  58. interrupts = <5 2>;
  59. interrupt-parent = <&mpic>;
  60. rtc@32 {
  61. device_type = "rtc";
  62. compatible = "ricoh,rs5c372a";
  63. reg = <32>;
  64. };
  65. };
  66. serial@80004500 {
  67. device_type = "serial";
  68. compatible = "ns16550";
  69. reg = <80004500 8>;
  70. clock-frequency = <7c044a8>;
  71. current-speed = <2580>;
  72. interrupts = <9 0>;
  73. interrupt-parent = <&mpic>;
  74. };
  75. serial@80004600 {
  76. device_type = "serial";
  77. compatible = "ns16550";
  78. reg = <80004600 8>;
  79. clock-frequency = <7c044a8>;
  80. current-speed = <e100>;
  81. interrupts = <a 0>;
  82. interrupt-parent = <&mpic>;
  83. };
  84. mpic: interrupt-controller@80040000 {
  85. #interrupt-cells = <2>;
  86. #address-cells = <0>;
  87. device_type = "open-pic";
  88. compatible = "chrp,open-pic";
  89. interrupt-controller;
  90. reg = <80040000 40000>;
  91. };
  92. pci@fec00000 {
  93. #address-cells = <3>;
  94. #size-cells = <2>;
  95. #interrupt-cells = <1>;
  96. device_type = "pci";
  97. compatible = "mpc10x-pci";
  98. reg = <fec00000 400000>;
  99. ranges = <01000000 0 0 fe000000 0 00c00000
  100. 02000000 0 80000000 80000000 0 70000000>;
  101. bus-range = <0 ff>;
  102. clock-frequency = <7f28155>;
  103. interrupt-parent = <&mpic>;
  104. interrupt-map-mask = <f800 0 0 7>;
  105. interrupt-map = <
  106. /* IDSEL 11 - IRQ0 ETH */
  107. 5800 0 0 1 &mpic 0 1
  108. 5800 0 0 2 &mpic 1 1
  109. 5800 0 0 3 &mpic 2 1
  110. 5800 0 0 4 &mpic 3 1
  111. /* IDSEL 12 - IRQ1 IDE0 */
  112. 6000 0 0 1 &mpic 1 1
  113. 6000 0 0 2 &mpic 2 1
  114. 6000 0 0 3 &mpic 3 1
  115. 6000 0 0 4 &mpic 0 1
  116. /* IDSEL 14 - IRQ3 USB2.0 */
  117. 7000 0 0 1 &mpic 3 1
  118. 7000 0 0 2 &mpic 3 1
  119. 7000 0 0 3 &mpic 3 1
  120. 7000 0 0 4 &mpic 3 1
  121. >;
  122. };
  123. };
  124. };