ops-mace.c 1.8 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 2000, 2001 Keith M Wesolowski
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/pci.h>
  11. #include <linux/types.h>
  12. #include <asm/pci.h>
  13. #include <asm/ip32/mace.h>
  14. #if 0
  15. # define DPRINTK(args...) printk(args);
  16. #else
  17. # define DPRINTK(args...)
  18. #endif
  19. /*
  20. * O2 has up to 5 PCI devices connected into the MACE bridge. The device
  21. * map looks like this:
  22. *
  23. * 0 aic7xxx 0
  24. * 1 aic7xxx 1
  25. * 2 expansion slot
  26. * 3 N/C
  27. * 4 N/C
  28. */
  29. static inline int mkaddr(struct pci_bus *bus, unsigned int devfn,
  30. unsigned int reg)
  31. {
  32. return ((bus->number & 0xff) << 16) |
  33. ((devfn & 0xff) << 8) |
  34. (reg & 0xfc);
  35. }
  36. static int
  37. mace_pci_read_config(struct pci_bus *bus, unsigned int devfn,
  38. int reg, int size, u32 *val)
  39. {
  40. mace->pci.config_addr = mkaddr(bus, devfn, reg);
  41. switch (size) {
  42. case 1:
  43. *val = mace->pci.config_data.b[(reg & 3) ^ 3];
  44. break;
  45. case 2:
  46. *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1];
  47. break;
  48. case 4:
  49. *val = mace->pci.config_data.l;
  50. break;
  51. }
  52. DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val);
  53. return PCIBIOS_SUCCESSFUL;
  54. }
  55. static int
  56. mace_pci_write_config(struct pci_bus *bus, unsigned int devfn,
  57. int reg, int size, u32 val)
  58. {
  59. mace->pci.config_addr = mkaddr(bus, devfn, reg);
  60. switch (size) {
  61. case 1:
  62. mace->pci.config_data.b[(reg & 3) ^ 3] = val;
  63. break;
  64. case 2:
  65. mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val;
  66. break;
  67. case 4:
  68. mace->pci.config_data.l = val;
  69. break;
  70. }
  71. DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val);
  72. return PCIBIOS_SUCCESSFUL;
  73. }
  74. struct pci_ops mace_pci_ops = {
  75. .read = mace_pci_read_config,
  76. .write = mace_pci_write_config,
  77. };