fixup-jmr3927.c 3.0 KB

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  1. /*
  2. *
  3. * BRIEF MODULE DESCRIPTION
  4. * Board specific pci fixups.
  5. *
  6. * Copyright 2001 MontaVista Software Inc.
  7. * Author: MontaVista Software, Inc.
  8. * ppopov@mvista.com or source@mvista.com
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  16. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  17. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  18. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  21. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  22. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. *
  26. * You should have received a copy of the GNU General Public License along
  27. * with this program; if not, write to the Free Software Foundation, Inc.,
  28. * 675 Mass Ave, Cambridge, MA 02139, USA.
  29. */
  30. #include <linux/types.h>
  31. #include <linux/pci.h>
  32. #include <linux/init.h>
  33. #include <asm/jmr3927/jmr3927.h>
  34. int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
  35. {
  36. unsigned char irq = pin;
  37. /* SMSC SLC90E66 IDE uses irq 14, 15 (default) */
  38. if (dev->vendor == PCI_VENDOR_ID_EFAR &&
  39. dev->device == PCI_DEVICE_ID_EFAR_SLC90E66_1)
  40. return irq;
  41. /* IRQ rotation (PICMG) */
  42. irq--; /* 0-3 */
  43. if (dev->bus->parent == NULL &&
  44. slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(23)) {
  45. /* PCI CardSlot (IDSEL=A23, DevNu=12) */
  46. /* PCIA => PCIC (IDSEL=A23) */
  47. /* NOTE: JMR3927 JP1 must be set to OPEN */
  48. irq = (irq + 2) % 4;
  49. } else if (dev->bus->parent == NULL &&
  50. slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(22)) {
  51. /* PCI CardSlot (IDSEL=A22, DevNu=11) */
  52. /* PCIA => PCIA (IDSEL=A22) */
  53. /* NOTE: JMR3927 JP1 must be set to OPEN */
  54. irq = (irq + 0) % 4;
  55. } else {
  56. /* PCI Backplane */
  57. irq = (irq + 3 + slot) % 4;
  58. }
  59. irq++; /* 1-4 */
  60. switch (irq) {
  61. case 1:
  62. irq = JMR3927_IRQ_IOC_PCIA;
  63. break;
  64. case 2:
  65. // wrong for backplane irq = JMR3927_IRQ_IOC_PCIB;
  66. irq = JMR3927_IRQ_IOC_PCID;
  67. break;
  68. case 3:
  69. irq = JMR3927_IRQ_IOC_PCIC;
  70. break;
  71. case 4:
  72. // wrong for backplane irq = JMR3927_IRQ_IOC_PCID;
  73. irq = JMR3927_IRQ_IOC_PCIB;
  74. break;
  75. }
  76. /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
  77. if (dev->bus->parent == NULL &&
  78. slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
  79. irq = JMR3927_IRQ_ETHER0;
  80. return irq;
  81. }
  82. /* Do platform specific device initialization at pci_enable_device() time */
  83. int pcibios_plat_dev_init(struct pci_dev *dev)
  84. {
  85. return 0;
  86. }