smp.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version 2
  5. * of the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2000, 2001 Kanoj Sarcar
  17. * Copyright (C) 2000, 2001 Ralf Baechle
  18. * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19. * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20. */
  21. #include <linux/cache.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/threads.h>
  27. #include <linux/module.h>
  28. #include <linux/time.h>
  29. #include <linux/timex.h>
  30. #include <linux/sched.h>
  31. #include <linux/cpumask.h>
  32. #include <linux/cpu.h>
  33. #include <linux/err.h>
  34. #include <asm/atomic.h>
  35. #include <asm/cpu.h>
  36. #include <asm/processor.h>
  37. #include <asm/system.h>
  38. #include <asm/mmu_context.h>
  39. #include <asm/smp.h>
  40. #include <asm/time.h>
  41. #ifdef CONFIG_MIPS_MT_SMTC
  42. #include <asm/mipsmtregs.h>
  43. #endif /* CONFIG_MIPS_MT_SMTC */
  44. cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
  45. volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
  46. cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
  47. int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
  48. int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
  49. EXPORT_SYMBOL(phys_cpu_present_map);
  50. EXPORT_SYMBOL(cpu_online_map);
  51. extern void __init calibrate_delay(void);
  52. extern void cpu_idle(void);
  53. /*
  54. * First C code run on the secondary CPUs after being started up by
  55. * the master.
  56. */
  57. asmlinkage __cpuinit void start_secondary(void)
  58. {
  59. unsigned int cpu;
  60. #ifdef CONFIG_MIPS_MT_SMTC
  61. /* Only do cpu_probe for first TC of CPU */
  62. if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
  63. #endif /* CONFIG_MIPS_MT_SMTC */
  64. cpu_probe();
  65. cpu_report();
  66. per_cpu_trap_init();
  67. mips_clockevent_init();
  68. prom_init_secondary();
  69. /*
  70. * XXX parity protection should be folded in here when it's converted
  71. * to an option instead of something based on .cputype
  72. */
  73. calibrate_delay();
  74. preempt_disable();
  75. cpu = smp_processor_id();
  76. cpu_data[cpu].udelay_val = loops_per_jiffy;
  77. prom_smp_finish();
  78. cpu_set(cpu, cpu_callin_map);
  79. cpu_idle();
  80. }
  81. DEFINE_SPINLOCK(smp_call_lock);
  82. struct call_data_struct *call_data;
  83. /*
  84. * Run a function on all other CPUs.
  85. *
  86. * <mask> cpuset_t of all processors to run the function on.
  87. * <func> The function to run. This must be fast and non-blocking.
  88. * <info> An arbitrary pointer to pass to the function.
  89. * <retry> If true, keep retrying until ready.
  90. * <wait> If true, wait until function has completed on other CPUs.
  91. * [RETURNS] 0 on success, else a negative status code.
  92. *
  93. * Does not return until remote CPUs are nearly ready to execute <func>
  94. * or are or have executed.
  95. *
  96. * You must not call this function with disabled interrupts or from a
  97. * hardware interrupt handler or from a bottom half handler:
  98. *
  99. * CPU A CPU B
  100. * Disable interrupts
  101. * smp_call_function()
  102. * Take call_lock
  103. * Send IPIs
  104. * Wait for all cpus to acknowledge IPI
  105. * CPU A has not responded, spin waiting
  106. * for cpu A to respond, holding call_lock
  107. * smp_call_function()
  108. * Spin waiting for call_lock
  109. * Deadlock Deadlock
  110. */
  111. int smp_call_function_mask(cpumask_t mask, void (*func) (void *info),
  112. void *info, int retry, int wait)
  113. {
  114. struct call_data_struct data;
  115. int cpu = smp_processor_id();
  116. int cpus;
  117. /*
  118. * Can die spectacularly if this CPU isn't yet marked online
  119. */
  120. BUG_ON(!cpu_online(cpu));
  121. cpu_clear(cpu, mask);
  122. cpus = cpus_weight(mask);
  123. if (!cpus)
  124. return 0;
  125. /* Can deadlock when called with interrupts disabled */
  126. WARN_ON(irqs_disabled());
  127. data.func = func;
  128. data.info = info;
  129. atomic_set(&data.started, 0);
  130. data.wait = wait;
  131. if (wait)
  132. atomic_set(&data.finished, 0);
  133. spin_lock(&smp_call_lock);
  134. call_data = &data;
  135. smp_mb();
  136. /* Send a message to all other CPUs and wait for them to respond */
  137. core_send_ipi_mask(mask, SMP_CALL_FUNCTION);
  138. /* Wait for response */
  139. /* FIXME: lock-up detection, backtrace on lock-up */
  140. while (atomic_read(&data.started) != cpus)
  141. barrier();
  142. if (wait)
  143. while (atomic_read(&data.finished) != cpus)
  144. barrier();
  145. call_data = NULL;
  146. spin_unlock(&smp_call_lock);
  147. return 0;
  148. }
  149. int smp_call_function(void (*func) (void *info), void *info, int retry,
  150. int wait)
  151. {
  152. return smp_call_function_mask(cpu_online_map, func, info, retry, wait);
  153. }
  154. void smp_call_function_interrupt(void)
  155. {
  156. void (*func) (void *info) = call_data->func;
  157. void *info = call_data->info;
  158. int wait = call_data->wait;
  159. /*
  160. * Notify initiating CPU that I've grabbed the data and am
  161. * about to execute the function.
  162. */
  163. smp_mb();
  164. atomic_inc(&call_data->started);
  165. /*
  166. * At this point the info structure may be out of scope unless wait==1.
  167. */
  168. irq_enter();
  169. (*func)(info);
  170. irq_exit();
  171. if (wait) {
  172. smp_mb();
  173. atomic_inc(&call_data->finished);
  174. }
  175. }
  176. int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
  177. int retry, int wait)
  178. {
  179. int ret, me;
  180. /*
  181. * Can die spectacularly if this CPU isn't yet marked online
  182. */
  183. if (!cpu_online(cpu))
  184. return 0;
  185. me = get_cpu();
  186. BUG_ON(!cpu_online(me));
  187. if (cpu == me) {
  188. local_irq_disable();
  189. func(info);
  190. local_irq_enable();
  191. put_cpu();
  192. return 0;
  193. }
  194. ret = smp_call_function_mask(cpumask_of_cpu(cpu), func, info, retry,
  195. wait);
  196. put_cpu();
  197. return 0;
  198. }
  199. static void stop_this_cpu(void *dummy)
  200. {
  201. /*
  202. * Remove this CPU:
  203. */
  204. cpu_clear(smp_processor_id(), cpu_online_map);
  205. local_irq_enable(); /* May need to service _machine_restart IPI */
  206. for (;;); /* Wait if available. */
  207. }
  208. void smp_send_stop(void)
  209. {
  210. smp_call_function(stop_this_cpu, NULL, 1, 0);
  211. }
  212. void __init smp_cpus_done(unsigned int max_cpus)
  213. {
  214. prom_cpus_done();
  215. }
  216. /* called from main before smp_init() */
  217. void __init smp_prepare_cpus(unsigned int max_cpus)
  218. {
  219. init_new_context(current, &init_mm);
  220. current_thread_info()->cpu = 0;
  221. plat_prepare_cpus(max_cpus);
  222. #ifndef CONFIG_HOTPLUG_CPU
  223. cpu_present_map = cpu_possible_map;
  224. #endif
  225. }
  226. /* preload SMP state for boot cpu */
  227. void __devinit smp_prepare_boot_cpu(void)
  228. {
  229. /*
  230. * This assumes that bootup is always handled by the processor
  231. * with the logic and physical number 0.
  232. */
  233. __cpu_number_map[0] = 0;
  234. __cpu_logical_map[0] = 0;
  235. cpu_set(0, phys_cpu_present_map);
  236. cpu_set(0, cpu_online_map);
  237. cpu_set(0, cpu_callin_map);
  238. }
  239. /*
  240. * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
  241. * and keep control until "cpu_online(cpu)" is set. Note: cpu is
  242. * physical, not logical.
  243. */
  244. int __cpuinit __cpu_up(unsigned int cpu)
  245. {
  246. struct task_struct *idle;
  247. /*
  248. * Processor goes to start_secondary(), sets online flag
  249. * The following code is purely to make sure
  250. * Linux can schedule processes on this slave.
  251. */
  252. idle = fork_idle(cpu);
  253. if (IS_ERR(idle))
  254. panic(KERN_ERR "Fork failed for CPU %d", cpu);
  255. prom_boot_secondary(cpu, idle);
  256. /*
  257. * Trust is futile. We should really have timeouts ...
  258. */
  259. while (!cpu_isset(cpu, cpu_callin_map))
  260. udelay(100);
  261. cpu_set(cpu, cpu_online_map);
  262. return 0;
  263. }
  264. /* Not really SMP stuff ... */
  265. int setup_profiling_timer(unsigned int multiplier)
  266. {
  267. return 0;
  268. }
  269. static void flush_tlb_all_ipi(void *info)
  270. {
  271. local_flush_tlb_all();
  272. }
  273. void flush_tlb_all(void)
  274. {
  275. on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
  276. }
  277. static void flush_tlb_mm_ipi(void *mm)
  278. {
  279. local_flush_tlb_mm((struct mm_struct *)mm);
  280. }
  281. /*
  282. * Special Variant of smp_call_function for use by TLB functions:
  283. *
  284. * o No return value
  285. * o collapses to normal function call on UP kernels
  286. * o collapses to normal function call on systems with a single shared
  287. * primary cache.
  288. * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
  289. */
  290. static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
  291. {
  292. #ifndef CONFIG_MIPS_MT_SMTC
  293. smp_call_function(func, info, 1, 1);
  294. #endif
  295. }
  296. static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
  297. {
  298. preempt_disable();
  299. smp_on_other_tlbs(func, info);
  300. func(info);
  301. preempt_enable();
  302. }
  303. /*
  304. * The following tlb flush calls are invoked when old translations are
  305. * being torn down, or pte attributes are changing. For single threaded
  306. * address spaces, a new context is obtained on the current cpu, and tlb
  307. * context on other cpus are invalidated to force a new context allocation
  308. * at switch_mm time, should the mm ever be used on other cpus. For
  309. * multithreaded address spaces, intercpu interrupts have to be sent.
  310. * Another case where intercpu interrupts are required is when the target
  311. * mm might be active on another cpu (eg debuggers doing the flushes on
  312. * behalf of debugees, kswapd stealing pages from another process etc).
  313. * Kanoj 07/00.
  314. */
  315. void flush_tlb_mm(struct mm_struct *mm)
  316. {
  317. preempt_disable();
  318. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  319. smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
  320. } else {
  321. cpumask_t mask = cpu_online_map;
  322. unsigned int cpu;
  323. cpu_clear(smp_processor_id(), mask);
  324. for_each_cpu_mask(cpu, mask)
  325. if (cpu_context(cpu, mm))
  326. cpu_context(cpu, mm) = 0;
  327. }
  328. local_flush_tlb_mm(mm);
  329. preempt_enable();
  330. }
  331. struct flush_tlb_data {
  332. struct vm_area_struct *vma;
  333. unsigned long addr1;
  334. unsigned long addr2;
  335. };
  336. static void flush_tlb_range_ipi(void *info)
  337. {
  338. struct flush_tlb_data *fd = info;
  339. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  340. }
  341. void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  342. {
  343. struct mm_struct *mm = vma->vm_mm;
  344. preempt_disable();
  345. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  346. struct flush_tlb_data fd = {
  347. .vma = vma,
  348. .addr1 = start,
  349. .addr2 = end,
  350. };
  351. smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
  352. } else {
  353. cpumask_t mask = cpu_online_map;
  354. unsigned int cpu;
  355. cpu_clear(smp_processor_id(), mask);
  356. for_each_cpu_mask(cpu, mask)
  357. if (cpu_context(cpu, mm))
  358. cpu_context(cpu, mm) = 0;
  359. }
  360. local_flush_tlb_range(vma, start, end);
  361. preempt_enable();
  362. }
  363. static void flush_tlb_kernel_range_ipi(void *info)
  364. {
  365. struct flush_tlb_data *fd = info;
  366. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  367. }
  368. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  369. {
  370. struct flush_tlb_data fd = {
  371. .addr1 = start,
  372. .addr2 = end,
  373. };
  374. on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1, 1);
  375. }
  376. static void flush_tlb_page_ipi(void *info)
  377. {
  378. struct flush_tlb_data *fd = info;
  379. local_flush_tlb_page(fd->vma, fd->addr1);
  380. }
  381. void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  382. {
  383. preempt_disable();
  384. if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
  385. struct flush_tlb_data fd = {
  386. .vma = vma,
  387. .addr1 = page,
  388. };
  389. smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
  390. } else {
  391. cpumask_t mask = cpu_online_map;
  392. unsigned int cpu;
  393. cpu_clear(smp_processor_id(), mask);
  394. for_each_cpu_mask(cpu, mask)
  395. if (cpu_context(cpu, vma->vm_mm))
  396. cpu_context(cpu, vma->vm_mm) = 0;
  397. }
  398. local_flush_tlb_page(vma, page);
  399. preempt_enable();
  400. }
  401. static void flush_tlb_one_ipi(void *info)
  402. {
  403. unsigned long vaddr = (unsigned long) info;
  404. local_flush_tlb_one(vaddr);
  405. }
  406. void flush_tlb_one(unsigned long vaddr)
  407. {
  408. smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
  409. }
  410. EXPORT_SYMBOL(flush_tlb_page);
  411. EXPORT_SYMBOL(flush_tlb_one);