setup.c 3.3 KB

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  1. /*
  2. * Setup pointers to hardware dependent routines.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
  9. * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  10. *
  11. */
  12. #include <linux/interrupt.h>
  13. #include <linux/init.h>
  14. #include <linux/pm.h>
  15. #include <asm/bootinfo.h>
  16. #include <asm/time.h>
  17. #include <asm/i8253.h>
  18. #include <asm/io.h>
  19. #include <asm/reboot.h>
  20. #include <asm/gt64120.h>
  21. #include <cobalt.h>
  22. #include <irq.h>
  23. extern void cobalt_machine_restart(char *command);
  24. extern void cobalt_machine_halt(void);
  25. const char *get_system_type(void)
  26. {
  27. switch (cobalt_board_id) {
  28. case COBALT_BRD_ID_QUBE1:
  29. return "Cobalt Qube";
  30. case COBALT_BRD_ID_RAQ1:
  31. return "Cobalt RaQ";
  32. case COBALT_BRD_ID_QUBE2:
  33. return "Cobalt Qube2";
  34. case COBALT_BRD_ID_RAQ2:
  35. return "Cobalt RaQ2";
  36. }
  37. return "MIPS Cobalt";
  38. }
  39. void __init plat_timer_setup(struct irqaction *irq)
  40. {
  41. /* Load timer value for HZ (TCLK is 50MHz) */
  42. GT_WRITE(GT_TC0_OFS, 50*1000*1000 / HZ);
  43. /* Enable timer0 */
  44. GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK);
  45. setup_irq(GT641XX_TIMER0_IRQ, irq);
  46. }
  47. /*
  48. * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
  49. * keyboard conntroller is never used.
  50. * Also PCI-ISA bridge DMA contoroller is never used.
  51. */
  52. static struct resource cobalt_reserved_resources[] = {
  53. { /* dma1 */
  54. .start = 0x00,
  55. .end = 0x1f,
  56. .name = "reserved",
  57. .flags = IORESOURCE_BUSY | IORESOURCE_IO,
  58. },
  59. { /* keyboard */
  60. .start = 0x60,
  61. .end = 0x6f,
  62. .name = "reserved",
  63. .flags = IORESOURCE_BUSY | IORESOURCE_IO,
  64. },
  65. { /* dma page reg */
  66. .start = 0x80,
  67. .end = 0x8f,
  68. .name = "reserved",
  69. .flags = IORESOURCE_BUSY | IORESOURCE_IO,
  70. },
  71. { /* dma2 */
  72. .start = 0xc0,
  73. .end = 0xdf,
  74. .name = "reserved",
  75. .flags = IORESOURCE_BUSY | IORESOURCE_IO,
  76. },
  77. };
  78. void __init plat_time_init(void)
  79. {
  80. setup_pit_timer();
  81. }
  82. void __init plat_mem_setup(void)
  83. {
  84. int i;
  85. _machine_restart = cobalt_machine_restart;
  86. _machine_halt = cobalt_machine_halt;
  87. pm_power_off = cobalt_machine_halt;
  88. set_io_port_base(CKSEG1ADDR(GT_DEF_PCI0_IO_BASE));
  89. /* I/O port resource must include LCD/buttons */
  90. ioport_resource.end = 0x0fffffff;
  91. /* These resources have been reserved by VIA SuperI/O chip. */
  92. for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++)
  93. request_resource(&ioport_resource, cobalt_reserved_resources + i);
  94. }
  95. /*
  96. * Prom init. We read our one and only communication with the firmware.
  97. * Grab the amount of installed memory.
  98. * Better boot loaders (CoLo) pass a command line too :-)
  99. */
  100. void __init prom_init(void)
  101. {
  102. int narg, indx, posn, nchr;
  103. unsigned long memsz;
  104. char **argv;
  105. memsz = fw_arg0 & 0x7fff0000;
  106. narg = fw_arg0 & 0x0000ffff;
  107. if (narg) {
  108. arcs_cmdline[0] = '\0';
  109. argv = (char **) fw_arg1;
  110. posn = 0;
  111. for (indx = 1; indx < narg; ++indx) {
  112. nchr = strlen(argv[indx]);
  113. if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
  114. break;
  115. if (posn)
  116. arcs_cmdline[posn++] = ' ';
  117. strcpy(arcs_cmdline + posn, argv[indx]);
  118. posn += nchr;
  119. }
  120. }
  121. add_memory_region(0x0, memsz, BOOT_MEM_RAM);
  122. }
  123. void __init prom_free_prom_memory(void)
  124. {
  125. /* Nothing to do! */
  126. }