traps.c 30 KB

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  1. /*
  2. * linux/arch/m68k/kernel/traps.c
  3. *
  4. * Copyright (C) 1993, 1994 by Hamish Macdonald
  5. *
  6. * 68040 fixes by Michael Rausch
  7. * 68040 fixes by Martin Apel
  8. * 68040 fixes and writeback by Richard Zidlicky
  9. * 68060 fixes by Roman Hodek
  10. * 68060 fixes by Jesper Skov
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file COPYING in the main directory of this archive
  14. * for more details.
  15. */
  16. /*
  17. * Sets up all exception vectors
  18. */
  19. #include <linux/sched.h>
  20. #include <linux/signal.h>
  21. #include <linux/kernel.h>
  22. #include <linux/mm.h>
  23. #include <linux/module.h>
  24. #include <linux/a.out.h>
  25. #include <linux/user.h>
  26. #include <linux/string.h>
  27. #include <linux/linkage.h>
  28. #include <linux/init.h>
  29. #include <linux/ptrace.h>
  30. #include <linux/kallsyms.h>
  31. #include <asm/setup.h>
  32. #include <asm/fpu.h>
  33. #include <asm/system.h>
  34. #include <asm/uaccess.h>
  35. #include <asm/traps.h>
  36. #include <asm/pgalloc.h>
  37. #include <asm/machdep.h>
  38. #include <asm/siginfo.h>
  39. /* assembler routines */
  40. asmlinkage void system_call(void);
  41. asmlinkage void buserr(void);
  42. asmlinkage void trap(void);
  43. asmlinkage void nmihandler(void);
  44. #ifdef CONFIG_M68KFPU_EMU
  45. asmlinkage void fpu_emu(void);
  46. #endif
  47. e_vector vectors[256] = {
  48. [VEC_BUSERR] = buserr,
  49. [VEC_SYS] = system_call,
  50. };
  51. /* nmi handler for the Amiga */
  52. asm(".text\n"
  53. __ALIGN_STR "\n"
  54. "nmihandler: rte");
  55. /*
  56. * this must be called very early as the kernel might
  57. * use some instruction that are emulated on the 060
  58. */
  59. void __init base_trap_init(void)
  60. {
  61. if(MACH_IS_SUN3X) {
  62. extern e_vector *sun3x_prom_vbr;
  63. __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr));
  64. }
  65. /* setup the exception vector table */
  66. __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors));
  67. if (CPU_IS_060) {
  68. /* set up ISP entry points */
  69. asmlinkage void unimp_vec(void) asm ("_060_isp_unimp");
  70. vectors[VEC_UNIMPII] = unimp_vec;
  71. }
  72. }
  73. void __init trap_init (void)
  74. {
  75. int i;
  76. for (i = VEC_SPUR; i <= VEC_INT7; i++)
  77. vectors[i] = bad_inthandler;
  78. for (i = 0; i < VEC_USER; i++)
  79. if (!vectors[i])
  80. vectors[i] = trap;
  81. for (i = VEC_USER; i < 256; i++)
  82. vectors[i] = bad_inthandler;
  83. #ifdef CONFIG_M68KFPU_EMU
  84. if (FPU_IS_EMU)
  85. vectors[VEC_LINE11] = fpu_emu;
  86. #endif
  87. if (CPU_IS_040 && !FPU_IS_EMU) {
  88. /* set up FPSP entry points */
  89. asmlinkage void dz_vec(void) asm ("dz");
  90. asmlinkage void inex_vec(void) asm ("inex");
  91. asmlinkage void ovfl_vec(void) asm ("ovfl");
  92. asmlinkage void unfl_vec(void) asm ("unfl");
  93. asmlinkage void snan_vec(void) asm ("snan");
  94. asmlinkage void operr_vec(void) asm ("operr");
  95. asmlinkage void bsun_vec(void) asm ("bsun");
  96. asmlinkage void fline_vec(void) asm ("fline");
  97. asmlinkage void unsupp_vec(void) asm ("unsupp");
  98. vectors[VEC_FPDIVZ] = dz_vec;
  99. vectors[VEC_FPIR] = inex_vec;
  100. vectors[VEC_FPOVER] = ovfl_vec;
  101. vectors[VEC_FPUNDER] = unfl_vec;
  102. vectors[VEC_FPNAN] = snan_vec;
  103. vectors[VEC_FPOE] = operr_vec;
  104. vectors[VEC_FPBRUC] = bsun_vec;
  105. vectors[VEC_LINE11] = fline_vec;
  106. vectors[VEC_FPUNSUP] = unsupp_vec;
  107. }
  108. if (CPU_IS_060 && !FPU_IS_EMU) {
  109. /* set up IFPSP entry points */
  110. asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan");
  111. asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr");
  112. asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl");
  113. asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl");
  114. asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz");
  115. asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex");
  116. asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline");
  117. asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp");
  118. asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd");
  119. vectors[VEC_FPNAN] = snan_vec6;
  120. vectors[VEC_FPOE] = operr_vec6;
  121. vectors[VEC_FPOVER] = ovfl_vec6;
  122. vectors[VEC_FPUNDER] = unfl_vec6;
  123. vectors[VEC_FPDIVZ] = dz_vec6;
  124. vectors[VEC_FPIR] = inex_vec6;
  125. vectors[VEC_LINE11] = fline_vec6;
  126. vectors[VEC_FPUNSUP] = unsupp_vec6;
  127. vectors[VEC_UNIMPEA] = effadd_vec6;
  128. }
  129. /* if running on an amiga, make the NMI interrupt do nothing */
  130. if (MACH_IS_AMIGA) {
  131. vectors[VEC_INT7] = nmihandler;
  132. }
  133. }
  134. static const char *vec_names[] = {
  135. [VEC_RESETSP] = "RESET SP",
  136. [VEC_RESETPC] = "RESET PC",
  137. [VEC_BUSERR] = "BUS ERROR",
  138. [VEC_ADDRERR] = "ADDRESS ERROR",
  139. [VEC_ILLEGAL] = "ILLEGAL INSTRUCTION",
  140. [VEC_ZERODIV] = "ZERO DIVIDE",
  141. [VEC_CHK] = "CHK",
  142. [VEC_TRAP] = "TRAPcc",
  143. [VEC_PRIV] = "PRIVILEGE VIOLATION",
  144. [VEC_TRACE] = "TRACE",
  145. [VEC_LINE10] = "LINE 1010",
  146. [VEC_LINE11] = "LINE 1111",
  147. [VEC_RESV12] = "UNASSIGNED RESERVED 12",
  148. [VEC_COPROC] = "COPROCESSOR PROTOCOL VIOLATION",
  149. [VEC_FORMAT] = "FORMAT ERROR",
  150. [VEC_UNINT] = "UNINITIALIZED INTERRUPT",
  151. [VEC_RESV16] = "UNASSIGNED RESERVED 16",
  152. [VEC_RESV17] = "UNASSIGNED RESERVED 17",
  153. [VEC_RESV18] = "UNASSIGNED RESERVED 18",
  154. [VEC_RESV19] = "UNASSIGNED RESERVED 19",
  155. [VEC_RESV20] = "UNASSIGNED RESERVED 20",
  156. [VEC_RESV21] = "UNASSIGNED RESERVED 21",
  157. [VEC_RESV22] = "UNASSIGNED RESERVED 22",
  158. [VEC_RESV23] = "UNASSIGNED RESERVED 23",
  159. [VEC_SPUR] = "SPURIOUS INTERRUPT",
  160. [VEC_INT1] = "LEVEL 1 INT",
  161. [VEC_INT2] = "LEVEL 2 INT",
  162. [VEC_INT3] = "LEVEL 3 INT",
  163. [VEC_INT4] = "LEVEL 4 INT",
  164. [VEC_INT5] = "LEVEL 5 INT",
  165. [VEC_INT6] = "LEVEL 6 INT",
  166. [VEC_INT7] = "LEVEL 7 INT",
  167. [VEC_SYS] = "SYSCALL",
  168. [VEC_TRAP1] = "TRAP #1",
  169. [VEC_TRAP2] = "TRAP #2",
  170. [VEC_TRAP3] = "TRAP #3",
  171. [VEC_TRAP4] = "TRAP #4",
  172. [VEC_TRAP5] = "TRAP #5",
  173. [VEC_TRAP6] = "TRAP #6",
  174. [VEC_TRAP7] = "TRAP #7",
  175. [VEC_TRAP8] = "TRAP #8",
  176. [VEC_TRAP9] = "TRAP #9",
  177. [VEC_TRAP10] = "TRAP #10",
  178. [VEC_TRAP11] = "TRAP #11",
  179. [VEC_TRAP12] = "TRAP #12",
  180. [VEC_TRAP13] = "TRAP #13",
  181. [VEC_TRAP14] = "TRAP #14",
  182. [VEC_TRAP15] = "TRAP #15",
  183. [VEC_FPBRUC] = "FPCP BSUN",
  184. [VEC_FPIR] = "FPCP INEXACT",
  185. [VEC_FPDIVZ] = "FPCP DIV BY 0",
  186. [VEC_FPUNDER] = "FPCP UNDERFLOW",
  187. [VEC_FPOE] = "FPCP OPERAND ERROR",
  188. [VEC_FPOVER] = "FPCP OVERFLOW",
  189. [VEC_FPNAN] = "FPCP SNAN",
  190. [VEC_FPUNSUP] = "FPCP UNSUPPORTED OPERATION",
  191. [VEC_MMUCFG] = "MMU CONFIGURATION ERROR",
  192. [VEC_MMUILL] = "MMU ILLEGAL OPERATION ERROR",
  193. [VEC_MMUACC] = "MMU ACCESS LEVEL VIOLATION ERROR",
  194. [VEC_RESV59] = "UNASSIGNED RESERVED 59",
  195. [VEC_UNIMPEA] = "UNASSIGNED RESERVED 60",
  196. [VEC_UNIMPII] = "UNASSIGNED RESERVED 61",
  197. [VEC_RESV62] = "UNASSIGNED RESERVED 62",
  198. [VEC_RESV63] = "UNASSIGNED RESERVED 63",
  199. };
  200. static const char *space_names[] = {
  201. [0] = "Space 0",
  202. [USER_DATA] = "User Data",
  203. [USER_PROGRAM] = "User Program",
  204. #ifndef CONFIG_SUN3
  205. [3] = "Space 3",
  206. #else
  207. [FC_CONTROL] = "Control",
  208. #endif
  209. [4] = "Space 4",
  210. [SUPER_DATA] = "Super Data",
  211. [SUPER_PROGRAM] = "Super Program",
  212. [CPU_SPACE] = "CPU"
  213. };
  214. void die_if_kernel(char *,struct pt_regs *,int);
  215. asmlinkage int do_page_fault(struct pt_regs *regs, unsigned long address,
  216. unsigned long error_code);
  217. int send_fault_sig(struct pt_regs *regs);
  218. asmlinkage void trap_c(struct frame *fp);
  219. #if defined (CONFIG_M68060)
  220. static inline void access_error060 (struct frame *fp)
  221. {
  222. unsigned long fslw = fp->un.fmt4.pc; /* is really FSLW for access error */
  223. #ifdef DEBUG
  224. printk("fslw=%#lx, fa=%#lx\n", fslw, fp->un.fmt4.effaddr);
  225. #endif
  226. if (fslw & MMU060_BPE) {
  227. /* branch prediction error -> clear branch cache */
  228. __asm__ __volatile__ ("movec %/cacr,%/d0\n\t"
  229. "orl #0x00400000,%/d0\n\t"
  230. "movec %/d0,%/cacr"
  231. : : : "d0" );
  232. /* return if there's no other error */
  233. if (!(fslw & MMU060_ERR_BITS) && !(fslw & MMU060_SEE))
  234. return;
  235. }
  236. if (fslw & (MMU060_DESC_ERR | MMU060_WP | MMU060_SP)) {
  237. unsigned long errorcode;
  238. unsigned long addr = fp->un.fmt4.effaddr;
  239. if (fslw & MMU060_MA)
  240. addr = (addr + PAGE_SIZE - 1) & PAGE_MASK;
  241. errorcode = 1;
  242. if (fslw & MMU060_DESC_ERR) {
  243. __flush_tlb040_one(addr);
  244. errorcode = 0;
  245. }
  246. if (fslw & MMU060_W)
  247. errorcode |= 2;
  248. #ifdef DEBUG
  249. printk("errorcode = %d\n", errorcode );
  250. #endif
  251. do_page_fault(&fp->ptregs, addr, errorcode);
  252. } else if (fslw & (MMU060_SEE)){
  253. /* Software Emulation Error.
  254. * fault during mem_read/mem_write in ifpsp060/os.S
  255. */
  256. send_fault_sig(&fp->ptregs);
  257. } else if (!(fslw & (MMU060_RE|MMU060_WE)) ||
  258. send_fault_sig(&fp->ptregs) > 0) {
  259. printk("pc=%#lx, fa=%#lx\n", fp->ptregs.pc, fp->un.fmt4.effaddr);
  260. printk( "68060 access error, fslw=%lx\n", fslw );
  261. trap_c( fp );
  262. }
  263. }
  264. #endif /* CONFIG_M68060 */
  265. #if defined (CONFIG_M68040)
  266. static inline unsigned long probe040(int iswrite, unsigned long addr, int wbs)
  267. {
  268. unsigned long mmusr;
  269. mm_segment_t old_fs = get_fs();
  270. set_fs(MAKE_MM_SEG(wbs));
  271. if (iswrite)
  272. asm volatile (".chip 68040; ptestw (%0); .chip 68k" : : "a" (addr));
  273. else
  274. asm volatile (".chip 68040; ptestr (%0); .chip 68k" : : "a" (addr));
  275. asm volatile (".chip 68040; movec %%mmusr,%0; .chip 68k" : "=r" (mmusr));
  276. set_fs(old_fs);
  277. return mmusr;
  278. }
  279. static inline int do_040writeback1(unsigned short wbs, unsigned long wba,
  280. unsigned long wbd)
  281. {
  282. int res = 0;
  283. mm_segment_t old_fs = get_fs();
  284. /* set_fs can not be moved, otherwise put_user() may oops */
  285. set_fs(MAKE_MM_SEG(wbs));
  286. switch (wbs & WBSIZ_040) {
  287. case BA_SIZE_BYTE:
  288. res = put_user(wbd & 0xff, (char __user *)wba);
  289. break;
  290. case BA_SIZE_WORD:
  291. res = put_user(wbd & 0xffff, (short __user *)wba);
  292. break;
  293. case BA_SIZE_LONG:
  294. res = put_user(wbd, (int __user *)wba);
  295. break;
  296. }
  297. /* set_fs can not be moved, otherwise put_user() may oops */
  298. set_fs(old_fs);
  299. #ifdef DEBUG
  300. printk("do_040writeback1, res=%d\n",res);
  301. #endif
  302. return res;
  303. }
  304. /* after an exception in a writeback the stack frame corresponding
  305. * to that exception is discarded, set a few bits in the old frame
  306. * to simulate what it should look like
  307. */
  308. static inline void fix_xframe040(struct frame *fp, unsigned long wba, unsigned short wbs)
  309. {
  310. fp->un.fmt7.faddr = wba;
  311. fp->un.fmt7.ssw = wbs & 0xff;
  312. if (wba != current->thread.faddr)
  313. fp->un.fmt7.ssw |= MA_040;
  314. }
  315. static inline void do_040writebacks(struct frame *fp)
  316. {
  317. int res = 0;
  318. #if 0
  319. if (fp->un.fmt7.wb1s & WBV_040)
  320. printk("access_error040: cannot handle 1st writeback. oops.\n");
  321. #endif
  322. if ((fp->un.fmt7.wb2s & WBV_040) &&
  323. !(fp->un.fmt7.wb2s & WBTT_040)) {
  324. res = do_040writeback1(fp->un.fmt7.wb2s, fp->un.fmt7.wb2a,
  325. fp->un.fmt7.wb2d);
  326. if (res)
  327. fix_xframe040(fp, fp->un.fmt7.wb2a, fp->un.fmt7.wb2s);
  328. else
  329. fp->un.fmt7.wb2s = 0;
  330. }
  331. /* do the 2nd wb only if the first one was successful (except for a kernel wb) */
  332. if (fp->un.fmt7.wb3s & WBV_040 && (!res || fp->un.fmt7.wb3s & 4)) {
  333. res = do_040writeback1(fp->un.fmt7.wb3s, fp->un.fmt7.wb3a,
  334. fp->un.fmt7.wb3d);
  335. if (res)
  336. {
  337. fix_xframe040(fp, fp->un.fmt7.wb3a, fp->un.fmt7.wb3s);
  338. fp->un.fmt7.wb2s = fp->un.fmt7.wb3s;
  339. fp->un.fmt7.wb3s &= (~WBV_040);
  340. fp->un.fmt7.wb2a = fp->un.fmt7.wb3a;
  341. fp->un.fmt7.wb2d = fp->un.fmt7.wb3d;
  342. }
  343. else
  344. fp->un.fmt7.wb3s = 0;
  345. }
  346. if (res)
  347. send_fault_sig(&fp->ptregs);
  348. }
  349. /*
  350. * called from sigreturn(), must ensure userspace code didn't
  351. * manipulate exception frame to circumvent protection, then complete
  352. * pending writebacks
  353. * we just clear TM2 to turn it into an userspace access
  354. */
  355. asmlinkage void berr_040cleanup(struct frame *fp)
  356. {
  357. fp->un.fmt7.wb2s &= ~4;
  358. fp->un.fmt7.wb3s &= ~4;
  359. do_040writebacks(fp);
  360. }
  361. static inline void access_error040(struct frame *fp)
  362. {
  363. unsigned short ssw = fp->un.fmt7.ssw;
  364. unsigned long mmusr;
  365. #ifdef DEBUG
  366. printk("ssw=%#x, fa=%#lx\n", ssw, fp->un.fmt7.faddr);
  367. printk("wb1s=%#x, wb2s=%#x, wb3s=%#x\n", fp->un.fmt7.wb1s,
  368. fp->un.fmt7.wb2s, fp->un.fmt7.wb3s);
  369. printk ("wb2a=%lx, wb3a=%lx, wb2d=%lx, wb3d=%lx\n",
  370. fp->un.fmt7.wb2a, fp->un.fmt7.wb3a,
  371. fp->un.fmt7.wb2d, fp->un.fmt7.wb3d);
  372. #endif
  373. if (ssw & ATC_040) {
  374. unsigned long addr = fp->un.fmt7.faddr;
  375. unsigned long errorcode;
  376. /*
  377. * The MMU status has to be determined AFTER the address
  378. * has been corrected if there was a misaligned access (MA).
  379. */
  380. if (ssw & MA_040)
  381. addr = (addr + 7) & -8;
  382. /* MMU error, get the MMUSR info for this access */
  383. mmusr = probe040(!(ssw & RW_040), addr, ssw);
  384. #ifdef DEBUG
  385. printk("mmusr = %lx\n", mmusr);
  386. #endif
  387. errorcode = 1;
  388. if (!(mmusr & MMU_R_040)) {
  389. /* clear the invalid atc entry */
  390. __flush_tlb040_one(addr);
  391. errorcode = 0;
  392. }
  393. /* despite what documentation seems to say, RMW
  394. * accesses have always both the LK and RW bits set */
  395. if (!(ssw & RW_040) || (ssw & LK_040))
  396. errorcode |= 2;
  397. if (do_page_fault(&fp->ptregs, addr, errorcode)) {
  398. #ifdef DEBUG
  399. printk("do_page_fault() !=0 \n");
  400. #endif
  401. if (user_mode(&fp->ptregs)){
  402. /* delay writebacks after signal delivery */
  403. #ifdef DEBUG
  404. printk(".. was usermode - return\n");
  405. #endif
  406. return;
  407. }
  408. /* disable writeback into user space from kernel
  409. * (if do_page_fault didn't fix the mapping,
  410. * the writeback won't do good)
  411. */
  412. #ifdef DEBUG
  413. printk(".. disabling wb2\n");
  414. #endif
  415. if (fp->un.fmt7.wb2a == fp->un.fmt7.faddr)
  416. fp->un.fmt7.wb2s &= ~WBV_040;
  417. }
  418. } else if (send_fault_sig(&fp->ptregs) > 0) {
  419. printk("68040 access error, ssw=%x\n", ssw);
  420. trap_c(fp);
  421. }
  422. do_040writebacks(fp);
  423. }
  424. #endif /* CONFIG_M68040 */
  425. #if defined(CONFIG_SUN3)
  426. #include <asm/sun3mmu.h>
  427. extern int mmu_emu_handle_fault (unsigned long, int, int);
  428. /* sun3 version of bus_error030 */
  429. static inline void bus_error030 (struct frame *fp)
  430. {
  431. unsigned char buserr_type = sun3_get_buserr ();
  432. unsigned long addr, errorcode;
  433. unsigned short ssw = fp->un.fmtb.ssw;
  434. extern unsigned long _sun3_map_test_start, _sun3_map_test_end;
  435. #ifdef DEBUG
  436. if (ssw & (FC | FB))
  437. printk ("Instruction fault at %#010lx\n",
  438. ssw & FC ?
  439. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  440. :
  441. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  442. if (ssw & DF)
  443. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  444. ssw & RW ? "read" : "write",
  445. fp->un.fmtb.daddr,
  446. space_names[ssw & DFC], fp->ptregs.pc);
  447. #endif
  448. /*
  449. * Check if this page should be demand-mapped. This needs to go before
  450. * the testing for a bad kernel-space access (demand-mapping applies
  451. * to kernel accesses too).
  452. */
  453. if ((ssw & DF)
  454. && (buserr_type & (SUN3_BUSERR_PROTERR | SUN3_BUSERR_INVALID))) {
  455. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 0))
  456. return;
  457. }
  458. /* Check for kernel-space pagefault (BAD). */
  459. if (fp->ptregs.sr & PS_S) {
  460. /* kernel fault must be a data fault to user space */
  461. if (! ((ssw & DF) && ((ssw & DFC) == USER_DATA))) {
  462. // try checking the kernel mappings before surrender
  463. if (mmu_emu_handle_fault (fp->un.fmtb.daddr, ssw & RW, 1))
  464. return;
  465. /* instruction fault or kernel data fault! */
  466. if (ssw & (FC | FB))
  467. printk ("Instruction fault at %#010lx\n",
  468. fp->ptregs.pc);
  469. if (ssw & DF) {
  470. /* was this fault incurred testing bus mappings? */
  471. if((fp->ptregs.pc >= (unsigned long)&_sun3_map_test_start) &&
  472. (fp->ptregs.pc <= (unsigned long)&_sun3_map_test_end)) {
  473. send_fault_sig(&fp->ptregs);
  474. return;
  475. }
  476. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  477. ssw & RW ? "read" : "write",
  478. fp->un.fmtb.daddr,
  479. space_names[ssw & DFC], fp->ptregs.pc);
  480. }
  481. printk ("BAD KERNEL BUSERR\n");
  482. die_if_kernel("Oops", &fp->ptregs,0);
  483. force_sig(SIGKILL, current);
  484. return;
  485. }
  486. } else {
  487. /* user fault */
  488. if (!(ssw & (FC | FB)) && !(ssw & DF))
  489. /* not an instruction fault or data fault! BAD */
  490. panic ("USER BUSERR w/o instruction or data fault");
  491. }
  492. /* First handle the data fault, if any. */
  493. if (ssw & DF) {
  494. addr = fp->un.fmtb.daddr;
  495. // errorcode bit 0: 0 -> no page 1 -> protection fault
  496. // errorcode bit 1: 0 -> read fault 1 -> write fault
  497. // (buserr_type & SUN3_BUSERR_PROTERR) -> protection fault
  498. // (buserr_type & SUN3_BUSERR_INVALID) -> invalid page fault
  499. if (buserr_type & SUN3_BUSERR_PROTERR)
  500. errorcode = 0x01;
  501. else if (buserr_type & SUN3_BUSERR_INVALID)
  502. errorcode = 0x00;
  503. else {
  504. #ifdef DEBUG
  505. printk ("*** unexpected busfault type=%#04x\n", buserr_type);
  506. printk ("invalid %s access at %#lx from pc %#lx\n",
  507. !(ssw & RW) ? "write" : "read", addr,
  508. fp->ptregs.pc);
  509. #endif
  510. die_if_kernel ("Oops", &fp->ptregs, buserr_type);
  511. force_sig (SIGBUS, current);
  512. return;
  513. }
  514. //todo: wtf is RM bit? --m
  515. if (!(ssw & RW) || ssw & RM)
  516. errorcode |= 0x02;
  517. /* Handle page fault. */
  518. do_page_fault (&fp->ptregs, addr, errorcode);
  519. /* Retry the data fault now. */
  520. return;
  521. }
  522. /* Now handle the instruction fault. */
  523. /* Get the fault address. */
  524. if (fp->ptregs.format == 0xA)
  525. addr = fp->ptregs.pc + 4;
  526. else
  527. addr = fp->un.fmtb.baddr;
  528. if (ssw & FC)
  529. addr -= 2;
  530. if (buserr_type & SUN3_BUSERR_INVALID) {
  531. if (!mmu_emu_handle_fault (fp->un.fmtb.daddr, 1, 0))
  532. do_page_fault (&fp->ptregs, addr, 0);
  533. } else {
  534. #ifdef DEBUG
  535. printk ("protection fault on insn access (segv).\n");
  536. #endif
  537. force_sig (SIGSEGV, current);
  538. }
  539. }
  540. #else
  541. #if defined(CPU_M68020_OR_M68030)
  542. static inline void bus_error030 (struct frame *fp)
  543. {
  544. volatile unsigned short temp;
  545. unsigned short mmusr;
  546. unsigned long addr, errorcode;
  547. unsigned short ssw = fp->un.fmtb.ssw;
  548. #ifdef DEBUG
  549. unsigned long desc;
  550. printk ("pid = %x ", current->pid);
  551. printk ("SSW=%#06x ", ssw);
  552. if (ssw & (FC | FB))
  553. printk ("Instruction fault at %#010lx\n",
  554. ssw & FC ?
  555. fp->ptregs.format == 0xa ? fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2
  556. :
  557. fp->ptregs.format == 0xa ? fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  558. if (ssw & DF)
  559. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  560. ssw & RW ? "read" : "write",
  561. fp->un.fmtb.daddr,
  562. space_names[ssw & DFC], fp->ptregs.pc);
  563. #endif
  564. /* ++andreas: If a data fault and an instruction fault happen
  565. at the same time map in both pages. */
  566. /* First handle the data fault, if any. */
  567. if (ssw & DF) {
  568. addr = fp->un.fmtb.daddr;
  569. #ifdef DEBUG
  570. asm volatile ("ptestr %3,%2@,#7,%0\n\t"
  571. "pmove %%psr,%1@"
  572. : "=a&" (desc)
  573. : "a" (&temp), "a" (addr), "d" (ssw));
  574. #else
  575. asm volatile ("ptestr %2,%1@,#7\n\t"
  576. "pmove %%psr,%0@"
  577. : : "a" (&temp), "a" (addr), "d" (ssw));
  578. #endif
  579. mmusr = temp;
  580. #ifdef DEBUG
  581. printk("mmusr is %#x for addr %#lx in task %p\n",
  582. mmusr, addr, current);
  583. printk("descriptor address is %#lx, contents %#lx\n",
  584. __va(desc), *(unsigned long *)__va(desc));
  585. #endif
  586. errorcode = (mmusr & MMU_I) ? 0 : 1;
  587. if (!(ssw & RW) || (ssw & RM))
  588. errorcode |= 2;
  589. if (mmusr & (MMU_I | MMU_WP)) {
  590. if (ssw & 4) {
  591. printk("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  592. ssw & RW ? "read" : "write",
  593. fp->un.fmtb.daddr,
  594. space_names[ssw & DFC], fp->ptregs.pc);
  595. goto buserr;
  596. }
  597. /* Don't try to do anything further if an exception was
  598. handled. */
  599. if (do_page_fault (&fp->ptregs, addr, errorcode) < 0)
  600. return;
  601. } else if (!(mmusr & MMU_I)) {
  602. /* probably a 020 cas fault */
  603. if (!(ssw & RM) && send_fault_sig(&fp->ptregs) > 0)
  604. printk("unexpected bus error (%#x,%#x)\n", ssw, mmusr);
  605. } else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  606. printk("invalid %s access at %#lx from pc %#lx\n",
  607. !(ssw & RW) ? "write" : "read", addr,
  608. fp->ptregs.pc);
  609. die_if_kernel("Oops",&fp->ptregs,mmusr);
  610. force_sig(SIGSEGV, current);
  611. return;
  612. } else {
  613. #if 0
  614. static volatile long tlong;
  615. #endif
  616. printk("weird %s access at %#lx from pc %#lx (ssw is %#x)\n",
  617. !(ssw & RW) ? "write" : "read", addr,
  618. fp->ptregs.pc, ssw);
  619. asm volatile ("ptestr #1,%1@,#0\n\t"
  620. "pmove %%psr,%0@"
  621. : /* no outputs */
  622. : "a" (&temp), "a" (addr));
  623. mmusr = temp;
  624. printk ("level 0 mmusr is %#x\n", mmusr);
  625. #if 0
  626. asm volatile ("pmove %%tt0,%0@"
  627. : /* no outputs */
  628. : "a" (&tlong));
  629. printk("tt0 is %#lx, ", tlong);
  630. asm volatile ("pmove %%tt1,%0@"
  631. : /* no outputs */
  632. : "a" (&tlong));
  633. printk("tt1 is %#lx\n", tlong);
  634. #endif
  635. #ifdef DEBUG
  636. printk("Unknown SIGSEGV - 1\n");
  637. #endif
  638. die_if_kernel("Oops",&fp->ptregs,mmusr);
  639. force_sig(SIGSEGV, current);
  640. return;
  641. }
  642. /* setup an ATC entry for the access about to be retried */
  643. if (!(ssw & RW) || (ssw & RM))
  644. asm volatile ("ploadw %1,%0@" : /* no outputs */
  645. : "a" (addr), "d" (ssw));
  646. else
  647. asm volatile ("ploadr %1,%0@" : /* no outputs */
  648. : "a" (addr), "d" (ssw));
  649. }
  650. /* Now handle the instruction fault. */
  651. if (!(ssw & (FC|FB)))
  652. return;
  653. if (fp->ptregs.sr & PS_S) {
  654. printk("Instruction fault at %#010lx\n",
  655. fp->ptregs.pc);
  656. buserr:
  657. printk ("BAD KERNEL BUSERR\n");
  658. die_if_kernel("Oops",&fp->ptregs,0);
  659. force_sig(SIGKILL, current);
  660. return;
  661. }
  662. /* get the fault address */
  663. if (fp->ptregs.format == 10)
  664. addr = fp->ptregs.pc + 4;
  665. else
  666. addr = fp->un.fmtb.baddr;
  667. if (ssw & FC)
  668. addr -= 2;
  669. if ((ssw & DF) && ((addr ^ fp->un.fmtb.daddr) & PAGE_MASK) == 0)
  670. /* Insn fault on same page as data fault. But we
  671. should still create the ATC entry. */
  672. goto create_atc_entry;
  673. #ifdef DEBUG
  674. asm volatile ("ptestr #1,%2@,#7,%0\n\t"
  675. "pmove %%psr,%1@"
  676. : "=a&" (desc)
  677. : "a" (&temp), "a" (addr));
  678. #else
  679. asm volatile ("ptestr #1,%1@,#7\n\t"
  680. "pmove %%psr,%0@"
  681. : : "a" (&temp), "a" (addr));
  682. #endif
  683. mmusr = temp;
  684. #ifdef DEBUG
  685. printk ("mmusr is %#x for addr %#lx in task %p\n",
  686. mmusr, addr, current);
  687. printk ("descriptor address is %#lx, contents %#lx\n",
  688. __va(desc), *(unsigned long *)__va(desc));
  689. #endif
  690. if (mmusr & MMU_I)
  691. do_page_fault (&fp->ptregs, addr, 0);
  692. else if (mmusr & (MMU_B|MMU_L|MMU_S)) {
  693. printk ("invalid insn access at %#lx from pc %#lx\n",
  694. addr, fp->ptregs.pc);
  695. #ifdef DEBUG
  696. printk("Unknown SIGSEGV - 2\n");
  697. #endif
  698. die_if_kernel("Oops",&fp->ptregs,mmusr);
  699. force_sig(SIGSEGV, current);
  700. return;
  701. }
  702. create_atc_entry:
  703. /* setup an ATC entry for the access about to be retried */
  704. asm volatile ("ploadr #2,%0@" : /* no outputs */
  705. : "a" (addr));
  706. }
  707. #endif /* CPU_M68020_OR_M68030 */
  708. #endif /* !CONFIG_SUN3 */
  709. asmlinkage void buserr_c(struct frame *fp)
  710. {
  711. /* Only set esp0 if coming from user mode */
  712. if (user_mode(&fp->ptregs))
  713. current->thread.esp0 = (unsigned long) fp;
  714. #ifdef DEBUG
  715. printk ("*** Bus Error *** Format is %x\n", fp->ptregs.format);
  716. #endif
  717. switch (fp->ptregs.format) {
  718. #if defined (CONFIG_M68060)
  719. case 4: /* 68060 access error */
  720. access_error060 (fp);
  721. break;
  722. #endif
  723. #if defined (CONFIG_M68040)
  724. case 0x7: /* 68040 access error */
  725. access_error040 (fp);
  726. break;
  727. #endif
  728. #if defined (CPU_M68020_OR_M68030)
  729. case 0xa:
  730. case 0xb:
  731. bus_error030 (fp);
  732. break;
  733. #endif
  734. default:
  735. die_if_kernel("bad frame format",&fp->ptregs,0);
  736. #ifdef DEBUG
  737. printk("Unknown SIGSEGV - 4\n");
  738. #endif
  739. force_sig(SIGSEGV, current);
  740. }
  741. }
  742. static int kstack_depth_to_print = 48;
  743. void show_trace(unsigned long *stack)
  744. {
  745. unsigned long *endstack;
  746. unsigned long addr;
  747. int i;
  748. printk("Call Trace:");
  749. addr = (unsigned long)stack + THREAD_SIZE - 1;
  750. endstack = (unsigned long *)(addr & -THREAD_SIZE);
  751. i = 0;
  752. while (stack + 1 <= endstack) {
  753. addr = *stack++;
  754. /*
  755. * If the address is either in the text segment of the
  756. * kernel, or in the region which contains vmalloc'ed
  757. * memory, it *may* be the address of a calling
  758. * routine; if so, print it so that someone tracing
  759. * down the cause of the crash will be able to figure
  760. * out the call path that was taken.
  761. */
  762. if (__kernel_text_address(addr)) {
  763. #ifndef CONFIG_KALLSYMS
  764. if (i % 5 == 0)
  765. printk("\n ");
  766. #endif
  767. printk(" [<%08lx>]", addr);
  768. print_symbol(" %s\n", addr);
  769. i++;
  770. }
  771. }
  772. printk("\n");
  773. }
  774. void show_registers(struct pt_regs *regs)
  775. {
  776. struct frame *fp = (struct frame *)regs;
  777. mm_segment_t old_fs = get_fs();
  778. u16 c, *cp;
  779. unsigned long addr;
  780. int i;
  781. print_modules();
  782. printk("PC: [<%08lx>]",regs->pc);
  783. print_symbol(" %s", regs->pc);
  784. printk("\nSR: %04x SP: %p a2: %08lx\n",
  785. regs->sr, regs, regs->a2);
  786. printk("d0: %08lx d1: %08lx d2: %08lx d3: %08lx\n",
  787. regs->d0, regs->d1, regs->d2, regs->d3);
  788. printk("d4: %08lx d5: %08lx a0: %08lx a1: %08lx\n",
  789. regs->d4, regs->d5, regs->a0, regs->a1);
  790. printk("Process %s (pid: %d, task=%p)\n",
  791. current->comm, current->pid, current);
  792. addr = (unsigned long)&fp->un;
  793. printk("Frame format=%X ", regs->format);
  794. switch (regs->format) {
  795. case 0x2:
  796. printk("instr addr=%08lx\n", fp->un.fmt2.iaddr);
  797. addr += sizeof(fp->un.fmt2);
  798. break;
  799. case 0x3:
  800. printk("eff addr=%08lx\n", fp->un.fmt3.effaddr);
  801. addr += sizeof(fp->un.fmt3);
  802. break;
  803. case 0x4:
  804. printk((CPU_IS_060 ? "fault addr=%08lx fslw=%08lx\n"
  805. : "eff addr=%08lx pc=%08lx\n"),
  806. fp->un.fmt4.effaddr, fp->un.fmt4.pc);
  807. addr += sizeof(fp->un.fmt4);
  808. break;
  809. case 0x7:
  810. printk("eff addr=%08lx ssw=%04x faddr=%08lx\n",
  811. fp->un.fmt7.effaddr, fp->un.fmt7.ssw, fp->un.fmt7.faddr);
  812. printk("wb 1 stat/addr/data: %04x %08lx %08lx\n",
  813. fp->un.fmt7.wb1s, fp->un.fmt7.wb1a, fp->un.fmt7.wb1dpd0);
  814. printk("wb 2 stat/addr/data: %04x %08lx %08lx\n",
  815. fp->un.fmt7.wb2s, fp->un.fmt7.wb2a, fp->un.fmt7.wb2d);
  816. printk("wb 3 stat/addr/data: %04x %08lx %08lx\n",
  817. fp->un.fmt7.wb3s, fp->un.fmt7.wb3a, fp->un.fmt7.wb3d);
  818. printk("push data: %08lx %08lx %08lx %08lx\n",
  819. fp->un.fmt7.wb1dpd0, fp->un.fmt7.pd1, fp->un.fmt7.pd2,
  820. fp->un.fmt7.pd3);
  821. addr += sizeof(fp->un.fmt7);
  822. break;
  823. case 0x9:
  824. printk("instr addr=%08lx\n", fp->un.fmt9.iaddr);
  825. addr += sizeof(fp->un.fmt9);
  826. break;
  827. case 0xa:
  828. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  829. fp->un.fmta.ssw, fp->un.fmta.isc, fp->un.fmta.isb,
  830. fp->un.fmta.daddr, fp->un.fmta.dobuf);
  831. addr += sizeof(fp->un.fmta);
  832. break;
  833. case 0xb:
  834. printk("ssw=%04x isc=%04x isb=%04x daddr=%08lx dobuf=%08lx\n",
  835. fp->un.fmtb.ssw, fp->un.fmtb.isc, fp->un.fmtb.isb,
  836. fp->un.fmtb.daddr, fp->un.fmtb.dobuf);
  837. printk("baddr=%08lx dibuf=%08lx ver=%x\n",
  838. fp->un.fmtb.baddr, fp->un.fmtb.dibuf, fp->un.fmtb.ver);
  839. addr += sizeof(fp->un.fmtb);
  840. break;
  841. default:
  842. printk("\n");
  843. }
  844. show_stack(NULL, (unsigned long *)addr);
  845. printk("Code:");
  846. set_fs(KERNEL_DS);
  847. cp = (u16 *)regs->pc;
  848. for (i = -8; i < 16; i++) {
  849. if (get_user(c, cp + i) && i >= 0) {
  850. printk(" Bad PC value.");
  851. break;
  852. }
  853. printk(i ? " %04x" : " <%04x>", c);
  854. }
  855. set_fs(old_fs);
  856. printk ("\n");
  857. }
  858. void show_stack(struct task_struct *task, unsigned long *stack)
  859. {
  860. unsigned long *p;
  861. unsigned long *endstack;
  862. int i;
  863. if (!stack) {
  864. if (task)
  865. stack = (unsigned long *)task->thread.esp0;
  866. else
  867. stack = (unsigned long *)&stack;
  868. }
  869. endstack = (unsigned long *)(((unsigned long)stack + THREAD_SIZE - 1) & -THREAD_SIZE);
  870. printk("Stack from %08lx:", (unsigned long)stack);
  871. p = stack;
  872. for (i = 0; i < kstack_depth_to_print; i++) {
  873. if (p + 1 > endstack)
  874. break;
  875. if (i % 8 == 0)
  876. printk("\n ");
  877. printk(" %08lx", *p++);
  878. }
  879. printk("\n");
  880. show_trace(stack);
  881. }
  882. /*
  883. * The architecture-independent backtrace generator
  884. */
  885. void dump_stack(void)
  886. {
  887. unsigned long stack;
  888. show_trace(&stack);
  889. }
  890. EXPORT_SYMBOL(dump_stack);
  891. void bad_super_trap (struct frame *fp)
  892. {
  893. console_verbose();
  894. if (fp->ptregs.vector < 4 * ARRAY_SIZE(vec_names))
  895. printk ("*** %s *** FORMAT=%X\n",
  896. vec_names[(fp->ptregs.vector) >> 2],
  897. fp->ptregs.format);
  898. else
  899. printk ("*** Exception %d *** FORMAT=%X\n",
  900. (fp->ptregs.vector) >> 2,
  901. fp->ptregs.format);
  902. if (fp->ptregs.vector >> 2 == VEC_ADDRERR && CPU_IS_020_OR_030) {
  903. unsigned short ssw = fp->un.fmtb.ssw;
  904. printk ("SSW=%#06x ", ssw);
  905. if (ssw & RC)
  906. printk ("Pipe stage C instruction fault at %#010lx\n",
  907. (fp->ptregs.format) == 0xA ?
  908. fp->ptregs.pc + 2 : fp->un.fmtb.baddr - 2);
  909. if (ssw & RB)
  910. printk ("Pipe stage B instruction fault at %#010lx\n",
  911. (fp->ptregs.format) == 0xA ?
  912. fp->ptregs.pc + 4 : fp->un.fmtb.baddr);
  913. if (ssw & DF)
  914. printk ("Data %s fault at %#010lx in %s (pc=%#lx)\n",
  915. ssw & RW ? "read" : "write",
  916. fp->un.fmtb.daddr, space_names[ssw & DFC],
  917. fp->ptregs.pc);
  918. }
  919. printk ("Current process id is %d\n", current->pid);
  920. die_if_kernel("BAD KERNEL TRAP", &fp->ptregs, 0);
  921. }
  922. asmlinkage void trap_c(struct frame *fp)
  923. {
  924. int sig;
  925. siginfo_t info;
  926. if (fp->ptregs.sr & PS_S) {
  927. if ((fp->ptregs.vector >> 2) == VEC_TRACE) {
  928. /* traced a trapping instruction */
  929. current->ptrace |= PT_DTRACE;
  930. } else
  931. bad_super_trap(fp);
  932. return;
  933. }
  934. /* send the appropriate signal to the user program */
  935. switch ((fp->ptregs.vector) >> 2) {
  936. case VEC_ADDRERR:
  937. info.si_code = BUS_ADRALN;
  938. sig = SIGBUS;
  939. break;
  940. case VEC_ILLEGAL:
  941. case VEC_LINE10:
  942. case VEC_LINE11:
  943. info.si_code = ILL_ILLOPC;
  944. sig = SIGILL;
  945. break;
  946. case VEC_PRIV:
  947. info.si_code = ILL_PRVOPC;
  948. sig = SIGILL;
  949. break;
  950. case VEC_COPROC:
  951. info.si_code = ILL_COPROC;
  952. sig = SIGILL;
  953. break;
  954. case VEC_TRAP1:
  955. case VEC_TRAP2:
  956. case VEC_TRAP3:
  957. case VEC_TRAP4:
  958. case VEC_TRAP5:
  959. case VEC_TRAP6:
  960. case VEC_TRAP7:
  961. case VEC_TRAP8:
  962. case VEC_TRAP9:
  963. case VEC_TRAP10:
  964. case VEC_TRAP11:
  965. case VEC_TRAP12:
  966. case VEC_TRAP13:
  967. case VEC_TRAP14:
  968. info.si_code = ILL_ILLTRP;
  969. sig = SIGILL;
  970. break;
  971. case VEC_FPBRUC:
  972. case VEC_FPOE:
  973. case VEC_FPNAN:
  974. info.si_code = FPE_FLTINV;
  975. sig = SIGFPE;
  976. break;
  977. case VEC_FPIR:
  978. info.si_code = FPE_FLTRES;
  979. sig = SIGFPE;
  980. break;
  981. case VEC_FPDIVZ:
  982. info.si_code = FPE_FLTDIV;
  983. sig = SIGFPE;
  984. break;
  985. case VEC_FPUNDER:
  986. info.si_code = FPE_FLTUND;
  987. sig = SIGFPE;
  988. break;
  989. case VEC_FPOVER:
  990. info.si_code = FPE_FLTOVF;
  991. sig = SIGFPE;
  992. break;
  993. case VEC_ZERODIV:
  994. info.si_code = FPE_INTDIV;
  995. sig = SIGFPE;
  996. break;
  997. case VEC_CHK:
  998. case VEC_TRAP:
  999. info.si_code = FPE_INTOVF;
  1000. sig = SIGFPE;
  1001. break;
  1002. case VEC_TRACE: /* ptrace single step */
  1003. info.si_code = TRAP_TRACE;
  1004. sig = SIGTRAP;
  1005. break;
  1006. case VEC_TRAP15: /* breakpoint */
  1007. info.si_code = TRAP_BRKPT;
  1008. sig = SIGTRAP;
  1009. break;
  1010. default:
  1011. info.si_code = ILL_ILLOPC;
  1012. sig = SIGILL;
  1013. break;
  1014. }
  1015. info.si_signo = sig;
  1016. info.si_errno = 0;
  1017. switch (fp->ptregs.format) {
  1018. default:
  1019. info.si_addr = (void *) fp->ptregs.pc;
  1020. break;
  1021. case 2:
  1022. info.si_addr = (void *) fp->un.fmt2.iaddr;
  1023. break;
  1024. case 7:
  1025. info.si_addr = (void *) fp->un.fmt7.effaddr;
  1026. break;
  1027. case 9:
  1028. info.si_addr = (void *) fp->un.fmt9.iaddr;
  1029. break;
  1030. case 10:
  1031. info.si_addr = (void *) fp->un.fmta.daddr;
  1032. break;
  1033. case 11:
  1034. info.si_addr = (void *) fp->un.fmtb.daddr;
  1035. break;
  1036. }
  1037. force_sig_info (sig, &info, current);
  1038. }
  1039. void die_if_kernel (char *str, struct pt_regs *fp, int nr)
  1040. {
  1041. if (!(fp->sr & PS_S))
  1042. return;
  1043. console_verbose();
  1044. printk("%s: %08x\n",str,nr);
  1045. show_registers(fp);
  1046. add_taint(TAINT_DIE);
  1047. do_exit(SIGSEGV);
  1048. }
  1049. /*
  1050. * This function is called if an error occur while accessing
  1051. * user-space from the fpsp040 code.
  1052. */
  1053. asmlinkage void fpsp040_die(void)
  1054. {
  1055. do_exit(SIGSEGV);
  1056. }
  1057. #ifdef CONFIG_M68KFPU_EMU
  1058. asmlinkage void fpemu_signal(int signal, int code, void *addr)
  1059. {
  1060. siginfo_t info;
  1061. info.si_signo = signal;
  1062. info.si_errno = 0;
  1063. info.si_code = code;
  1064. info.si_addr = addr;
  1065. force_sig_info(signal, &info, current);
  1066. }
  1067. #endif