setup.c 18 KB

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  1. /*
  2. * File: arch/blackfin/kernel/setup.c
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/console.h>
  31. #include <linux/bootmem.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/cpu.h>
  34. #include <linux/module.h>
  35. #include <linux/tty.h>
  36. #include <linux/ext2_fs.h>
  37. #include <linux/cramfs_fs.h>
  38. #include <linux/romfs_fs.h>
  39. #include <asm/cplb.h>
  40. #include <asm/cacheflush.h>
  41. #include <asm/blackfin.h>
  42. #include <asm/cplbinit.h>
  43. #include <asm/fixed_code.h>
  44. #include <asm/early_printk.h>
  45. u16 _bfin_swrst;
  46. unsigned long memory_start, memory_end, physical_mem_end;
  47. unsigned long reserved_mem_dcache_on;
  48. unsigned long reserved_mem_icache_on;
  49. EXPORT_SYMBOL(memory_start);
  50. EXPORT_SYMBOL(memory_end);
  51. EXPORT_SYMBOL(physical_mem_end);
  52. EXPORT_SYMBOL(_ramend);
  53. #ifdef CONFIG_MTD_UCLINUX
  54. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  55. unsigned long _ebss;
  56. EXPORT_SYMBOL(memory_mtd_end);
  57. EXPORT_SYMBOL(memory_mtd_start);
  58. EXPORT_SYMBOL(mtd_size);
  59. #endif
  60. char __initdata command_line[COMMAND_LINE_SIZE];
  61. void __init bf53x_cache_init(void)
  62. {
  63. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  64. generate_cpl_tables();
  65. #endif
  66. #ifdef CONFIG_BFIN_ICACHE
  67. bfin_icache_init();
  68. printk(KERN_INFO "Instruction Cache Enabled\n");
  69. #endif
  70. #ifdef CONFIG_BFIN_DCACHE
  71. bfin_dcache_init();
  72. printk(KERN_INFO "Data Cache Enabled"
  73. # if defined CONFIG_BFIN_WB
  74. " (write-back)"
  75. # elif defined CONFIG_BFIN_WT
  76. " (write-through)"
  77. # endif
  78. "\n");
  79. #endif
  80. }
  81. void __init bf53x_relocate_l1_mem(void)
  82. {
  83. unsigned long l1_code_length;
  84. unsigned long l1_data_a_length;
  85. unsigned long l1_data_b_length;
  86. l1_code_length = _etext_l1 - _stext_l1;
  87. if (l1_code_length > L1_CODE_LENGTH)
  88. l1_code_length = L1_CODE_LENGTH;
  89. /* cannot complain as printk is not available as yet.
  90. * But we can continue booting and complain later!
  91. */
  92. /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  93. dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  94. l1_data_a_length = _ebss_l1 - _sdata_l1;
  95. if (l1_data_a_length > L1_DATA_A_LENGTH)
  96. l1_data_a_length = L1_DATA_A_LENGTH;
  97. /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
  98. dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  99. l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
  100. if (l1_data_b_length > L1_DATA_B_LENGTH)
  101. l1_data_b_length = L1_DATA_B_LENGTH;
  102. /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
  103. dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  104. l1_data_a_length, l1_data_b_length);
  105. }
  106. /*
  107. * Initial parsing of the command line. Currently, we support:
  108. * - Controlling the linux memory size: mem=xxx[KMG]
  109. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  110. * $ -> reserved memory is dcacheable
  111. * # -> reserved memory is icacheable
  112. */
  113. static __init void parse_cmdline_early(char *cmdline_p)
  114. {
  115. char c = ' ', *to = cmdline_p;
  116. unsigned int memsize;
  117. for (;;) {
  118. if (c == ' ') {
  119. if (!memcmp(to, "mem=", 4)) {
  120. to += 4;
  121. memsize = memparse(to, &to);
  122. if (memsize)
  123. _ramend = memsize;
  124. } else if (!memcmp(to, "max_mem=", 8)) {
  125. to += 8;
  126. memsize = memparse(to, &to);
  127. if (memsize) {
  128. physical_mem_end = memsize;
  129. if (*to != ' ') {
  130. if (*to == '$'
  131. || *(to + 1) == '$')
  132. reserved_mem_dcache_on =
  133. 1;
  134. if (*to == '#'
  135. || *(to + 1) == '#')
  136. reserved_mem_icache_on =
  137. 1;
  138. }
  139. }
  140. } else if (!memcmp(to, "earlyprintk=", 12)) {
  141. to += 12;
  142. setup_early_printk(to);
  143. }
  144. }
  145. c = *(to++);
  146. if (!c)
  147. break;
  148. }
  149. }
  150. void __init setup_arch(char **cmdline_p)
  151. {
  152. int bootmap_size;
  153. unsigned long l1_length, sclk, cclk;
  154. #ifdef CONFIG_MTD_UCLINUX
  155. unsigned long mtd_phys = 0;
  156. #endif
  157. #ifdef CONFIG_DUMMY_CONSOLE
  158. conswitchp = &dummy_con;
  159. #endif
  160. #if defined(CONFIG_CMDLINE_BOOL)
  161. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  162. command_line[sizeof(command_line) - 1] = 0;
  163. #endif
  164. /* Keep a copy of command line */
  165. *cmdline_p = &command_line[0];
  166. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  167. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  168. /* setup memory defaults from the user config */
  169. physical_mem_end = 0;
  170. _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
  171. parse_cmdline_early(&command_line[0]);
  172. cclk = get_cclk();
  173. sclk = get_sclk();
  174. #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
  175. if (ANOMALY_05000273 && cclk == sclk)
  176. panic("ANOMALY 05000273, SCLK can not be same as CCLK");
  177. #endif
  178. #ifdef BF561_FAMILY
  179. if (ANOMALY_05000266) {
  180. bfin_read_IMDMA_D0_IRQ_STATUS();
  181. bfin_read_IMDMA_D1_IRQ_STATUS();
  182. }
  183. #endif
  184. printk(KERN_INFO "Hardware Trace ");
  185. if (bfin_read_TBUFCTL() & 0x1 )
  186. printk("Active ");
  187. else
  188. printk("Off ");
  189. if (bfin_read_TBUFCTL() & 0x2)
  190. printk("and Enabled\n");
  191. else
  192. printk("and Disabled\n");
  193. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  194. /* we need to initialize the Flashrom device here since we might
  195. * do things with flash early on in the boot
  196. */
  197. flash_probe();
  198. #endif
  199. if (physical_mem_end == 0)
  200. physical_mem_end = _ramend;
  201. /* by now the stack is part of the init task */
  202. memory_end = _ramend - DMA_UNCACHED_REGION;
  203. _ramstart = (unsigned long)__bss_stop;
  204. memory_start = PAGE_ALIGN(_ramstart);
  205. #if defined(CONFIG_MTD_UCLINUX)
  206. /* generic memory mapped MTD driver */
  207. memory_mtd_end = memory_end;
  208. mtd_phys = _ramstart;
  209. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  210. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  211. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  212. mtd_size =
  213. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  214. # endif
  215. # if defined(CONFIG_CRAMFS)
  216. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  217. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  218. # endif
  219. # if defined(CONFIG_ROMFS_FS)
  220. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  221. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  222. mtd_size =
  223. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  224. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  225. /* Due to a Hardware Anomaly we need to limit the size of usable
  226. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  227. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  228. */
  229. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  230. if (memory_end >= 56 * 1024 * 1024)
  231. memory_end = 56 * 1024 * 1024;
  232. # else
  233. if (memory_end >= 60 * 1024 * 1024)
  234. memory_end = 60 * 1024 * 1024;
  235. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  236. # endif /* ANOMALY_05000263 */
  237. # endif /* CONFIG_ROMFS_FS */
  238. memory_end -= mtd_size;
  239. if (mtd_size == 0) {
  240. console_init();
  241. panic("Don't boot kernel without rootfs attached.\n");
  242. }
  243. /* Relocate MTD image to the top of memory after the uncached memory area */
  244. dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
  245. memory_mtd_start = memory_end;
  246. _ebss = memory_mtd_start; /* define _ebss for compatible */
  247. #endif /* CONFIG_MTD_UCLINUX */
  248. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  249. /* Due to a Hardware Anomaly we need to limit the size of usable
  250. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  251. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  252. */
  253. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  254. if (memory_end >= 56 * 1024 * 1024)
  255. memory_end = 56 * 1024 * 1024;
  256. #else
  257. if (memory_end >= 60 * 1024 * 1024)
  258. memory_end = 60 * 1024 * 1024;
  259. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  260. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  261. #endif /* ANOMALY_05000263 */
  262. #if !defined(CONFIG_MTD_UCLINUX)
  263. memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  264. #endif
  265. init_mm.start_code = (unsigned long)_stext;
  266. init_mm.end_code = (unsigned long)_etext;
  267. init_mm.end_data = (unsigned long)_edata;
  268. init_mm.brk = (unsigned long)0;
  269. init_leds();
  270. printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
  271. if (bfin_compiled_revid() == 0xffff)
  272. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  273. else if (bfin_compiled_revid() == -1)
  274. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  275. else
  276. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  277. if (bfin_revid() != bfin_compiled_revid()) {
  278. if (bfin_compiled_revid() == -1)
  279. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  280. bfin_revid());
  281. else if (bfin_compiled_revid() != 0xffff)
  282. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  283. bfin_compiled_revid(), bfin_revid());
  284. }
  285. if (bfin_revid() < SUPPORTED_REVID)
  286. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  287. CPU, bfin_revid());
  288. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  289. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  290. cclk / 1000000, sclk / 1000000);
  291. if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
  292. printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
  293. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  294. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  295. printk(KERN_INFO "Memory map:\n"
  296. KERN_INFO " text = 0x%p-0x%p\n"
  297. KERN_INFO " rodata = 0x%p-0x%p\n"
  298. KERN_INFO " data = 0x%p-0x%p\n"
  299. KERN_INFO " stack = 0x%p-0x%p\n"
  300. KERN_INFO " init = 0x%p-0x%p\n"
  301. KERN_INFO " bss = 0x%p-0x%p\n"
  302. KERN_INFO " available = 0x%p-0x%p\n"
  303. #ifdef CONFIG_MTD_UCLINUX
  304. KERN_INFO " rootfs = 0x%p-0x%p\n"
  305. #endif
  306. #if DMA_UNCACHED_REGION > 0
  307. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  308. #endif
  309. , _stext, _etext,
  310. __start_rodata, __end_rodata,
  311. _sdata, _edata,
  312. (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
  313. __init_begin, __init_end,
  314. __bss_start, __bss_stop,
  315. (void *)_ramstart, (void *)memory_end
  316. #ifdef CONFIG_MTD_UCLINUX
  317. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  318. #endif
  319. #if DMA_UNCACHED_REGION > 0
  320. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  321. #endif
  322. );
  323. /*
  324. * give all the memory to the bootmap allocator, tell it to put the
  325. * boot mem_map at the start of memory
  326. */
  327. bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT, /* map goes here */
  328. PAGE_OFFSET >> PAGE_SHIFT,
  329. memory_end >> PAGE_SHIFT);
  330. /*
  331. * free the usable memory, we have to make sure we do not free
  332. * the bootmem bitmap so we then reserve it after freeing it :-)
  333. */
  334. free_bootmem(memory_start, memory_end - memory_start);
  335. reserve_bootmem(memory_start, bootmap_size);
  336. /*
  337. * get kmalloc into gear
  338. */
  339. paging_init();
  340. /* check the size of the l1 area */
  341. l1_length = _etext_l1 - _stext_l1;
  342. if (l1_length > L1_CODE_LENGTH)
  343. panic("L1 code memory overflow\n");
  344. l1_length = _ebss_l1 - _sdata_l1;
  345. if (l1_length > L1_DATA_A_LENGTH)
  346. panic("L1 data memory overflow\n");
  347. _bfin_swrst = bfin_read_SWRST();
  348. /* Copy atomic sequences to their fixed location, and sanity check that
  349. these locations are the ones that we advertise to userspace. */
  350. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  351. FIXED_CODE_END - FIXED_CODE_START);
  352. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  353. != SIGRETURN_STUB - FIXED_CODE_START);
  354. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  355. != ATOMIC_XCHG32 - FIXED_CODE_START);
  356. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  357. != ATOMIC_CAS32 - FIXED_CODE_START);
  358. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  359. != ATOMIC_ADD32 - FIXED_CODE_START);
  360. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  361. != ATOMIC_SUB32 - FIXED_CODE_START);
  362. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  363. != ATOMIC_IOR32 - FIXED_CODE_START);
  364. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  365. != ATOMIC_AND32 - FIXED_CODE_START);
  366. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  367. != ATOMIC_XOR32 - FIXED_CODE_START);
  368. init_exception_vectors();
  369. bf53x_cache_init();
  370. }
  371. static int __init topology_init(void)
  372. {
  373. #if defined (CONFIG_BF561)
  374. static struct cpu cpu[2];
  375. register_cpu(&cpu[0], 0);
  376. register_cpu(&cpu[1], 1);
  377. return 0;
  378. #else
  379. static struct cpu cpu[1];
  380. return register_cpu(cpu, 0);
  381. #endif
  382. }
  383. subsys_initcall(topology_init);
  384. static u_long get_vco(void)
  385. {
  386. u_long msel;
  387. u_long vco;
  388. msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
  389. if (0 == msel)
  390. msel = 64;
  391. vco = CONFIG_CLKIN_HZ;
  392. vco >>= (1 & bfin_read_PLL_CTL()); /* DF bit */
  393. vco = msel * vco;
  394. return vco;
  395. }
  396. /*Get the Core clock*/
  397. u_long get_cclk(void)
  398. {
  399. u_long csel, ssel;
  400. if (bfin_read_PLL_STAT() & 0x1)
  401. return CONFIG_CLKIN_HZ;
  402. ssel = bfin_read_PLL_DIV();
  403. csel = ((ssel >> 4) & 0x03);
  404. ssel &= 0xf;
  405. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  406. return get_vco() / ssel;
  407. return get_vco() >> csel;
  408. }
  409. EXPORT_SYMBOL(get_cclk);
  410. /* Get the System clock */
  411. u_long get_sclk(void)
  412. {
  413. u_long ssel;
  414. if (bfin_read_PLL_STAT() & 0x1)
  415. return CONFIG_CLKIN_HZ;
  416. ssel = (bfin_read_PLL_DIV() & 0xf);
  417. if (0 == ssel) {
  418. printk(KERN_WARNING "Invalid System Clock\n");
  419. ssel = 1;
  420. }
  421. return get_vco() / ssel;
  422. }
  423. EXPORT_SYMBOL(get_sclk);
  424. /*
  425. * Get CPU information for use by the procfs.
  426. */
  427. static int show_cpuinfo(struct seq_file *m, void *v)
  428. {
  429. char *cpu, *mmu, *fpu, *name;
  430. uint32_t revid;
  431. u_long cclk = 0, sclk = 0;
  432. u_int dcache_size = 0, dsup_banks = 0;
  433. cpu = CPU;
  434. mmu = "none";
  435. fpu = "none";
  436. revid = bfin_revid();
  437. name = bfin_board_name;
  438. cclk = get_cclk();
  439. sclk = get_sclk();
  440. seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
  441. "MMU:\t\t%s\n"
  442. "FPU:\t\t%s\n"
  443. "Core Clock:\t%9lu Hz\n"
  444. "System Clock:\t%9lu Hz\n"
  445. "BogoMips:\t%lu.%02lu\n"
  446. "Calibration:\t%lu loops\n",
  447. cpu, revid, mmu, fpu,
  448. cclk,
  449. sclk,
  450. (loops_per_jiffy * HZ) / 500000,
  451. ((loops_per_jiffy * HZ) / 5000) % 100,
  452. (loops_per_jiffy * HZ));
  453. seq_printf(m, "Board Name:\t%s\n", name);
  454. seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
  455. seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
  456. if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
  457. seq_printf(m, "I-CACHE:\tON\n");
  458. else
  459. seq_printf(m, "I-CACHE:\tOFF\n");
  460. if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
  461. seq_printf(m, "D-CACHE:\tON"
  462. #if defined CONFIG_BFIN_WB
  463. " (write-back)"
  464. #elif defined CONFIG_BFIN_WT
  465. " (write-through)"
  466. #endif
  467. "\n");
  468. else
  469. seq_printf(m, "D-CACHE:\tOFF\n");
  470. switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
  471. case ACACHE_BSRAM:
  472. seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
  473. dcache_size = 16;
  474. dsup_banks = 1;
  475. break;
  476. case ACACHE_BCACHE:
  477. seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
  478. dcache_size = 32;
  479. dsup_banks = 2;
  480. break;
  481. case ASRAM_BSRAM:
  482. seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
  483. dcache_size = 0;
  484. dsup_banks = 0;
  485. break;
  486. default:
  487. break;
  488. }
  489. seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
  490. seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
  491. seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
  492. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  493. seq_printf(m,
  494. "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  495. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  496. BFIN_DLINES);
  497. #ifdef CONFIG_BFIN_ICACHE_LOCK
  498. switch (read_iloc()) {
  499. case WAY0_L:
  500. seq_printf(m, "Way0 Locked-Down\n");
  501. break;
  502. case WAY1_L:
  503. seq_printf(m, "Way1 Locked-Down\n");
  504. break;
  505. case WAY01_L:
  506. seq_printf(m, "Way0,Way1 Locked-Down\n");
  507. break;
  508. case WAY2_L:
  509. seq_printf(m, "Way2 Locked-Down\n");
  510. break;
  511. case WAY02_L:
  512. seq_printf(m, "Way0,Way2 Locked-Down\n");
  513. break;
  514. case WAY12_L:
  515. seq_printf(m, "Way1,Way2 Locked-Down\n");
  516. break;
  517. case WAY012_L:
  518. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  519. break;
  520. case WAY3_L:
  521. seq_printf(m, "Way3 Locked-Down\n");
  522. break;
  523. case WAY03_L:
  524. seq_printf(m, "Way0,Way3 Locked-Down\n");
  525. break;
  526. case WAY13_L:
  527. seq_printf(m, "Way1,Way3 Locked-Down\n");
  528. break;
  529. case WAY013_L:
  530. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  531. break;
  532. case WAY32_L:
  533. seq_printf(m, "Way3,Way2 Locked-Down\n");
  534. break;
  535. case WAY320_L:
  536. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  537. break;
  538. case WAY321_L:
  539. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  540. break;
  541. case WAYALL_L:
  542. seq_printf(m, "All Ways are locked\n");
  543. break;
  544. default:
  545. seq_printf(m, "No Ways are locked\n");
  546. }
  547. #endif
  548. return 0;
  549. }
  550. static void *c_start(struct seq_file *m, loff_t *pos)
  551. {
  552. return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
  553. }
  554. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  555. {
  556. ++*pos;
  557. return c_start(m, pos);
  558. }
  559. static void c_stop(struct seq_file *m, void *v)
  560. {
  561. }
  562. struct seq_operations cpuinfo_op = {
  563. .start = c_start,
  564. .next = c_next,
  565. .stop = c_stop,
  566. .show = show_cpuinfo,
  567. };
  568. void __init cmdline_init(const char *r0)
  569. {
  570. if (r0)
  571. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  572. }