kgdb.c 12 KB

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  1. /*
  2. * File: arch/blackfin/kernel/kgdb.c
  3. * Based on:
  4. * Author: Sonic Zhang
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
  10. *
  11. * Modified:
  12. * Copyright 2005-2006 Analog Devices Inc.
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, see the file COPYING, or write
  28. * to the Free Software Foundation, Inc.,
  29. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  30. */
  31. #include <linux/string.h>
  32. #include <linux/kernel.h>
  33. #include <linux/sched.h>
  34. #include <linux/smp.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/delay.h>
  37. #include <linux/ptrace.h> /* for linux pt_regs struct */
  38. #include <linux/kgdb.h>
  39. #include <linux/console.h>
  40. #include <linux/init.h>
  41. #include <linux/debugger.h>
  42. #include <linux/errno.h>
  43. #include <linux/irq.h>
  44. #include <asm/system.h>
  45. #include <asm/traps.h>
  46. #include <asm/blackfin.h>
  47. /* Put the error code here just in case the user cares. */
  48. int gdb_bf533errcode;
  49. /* Likewise, the vector number here (since GDB only gets the signal
  50. number through the usual means, and that's not very specific). */
  51. int gdb_bf533vector = -1;
  52. #if KGDB_MAX_NO_CPUS != 8
  53. #error change the definition of slavecpulocks
  54. #endif
  55. void regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
  56. {
  57. gdb_regs[BFIN_R0] = regs->r0;
  58. gdb_regs[BFIN_R1] = regs->r1;
  59. gdb_regs[BFIN_R2] = regs->r2;
  60. gdb_regs[BFIN_R3] = regs->r3;
  61. gdb_regs[BFIN_R4] = regs->r4;
  62. gdb_regs[BFIN_R5] = regs->r5;
  63. gdb_regs[BFIN_R6] = regs->r6;
  64. gdb_regs[BFIN_R7] = regs->r7;
  65. gdb_regs[BFIN_P0] = regs->p0;
  66. gdb_regs[BFIN_P1] = regs->p1;
  67. gdb_regs[BFIN_P2] = regs->p2;
  68. gdb_regs[BFIN_P3] = regs->p3;
  69. gdb_regs[BFIN_P4] = regs->p4;
  70. gdb_regs[BFIN_P5] = regs->p5;
  71. gdb_regs[BFIN_SP] = regs->reserved;
  72. gdb_regs[BFIN_FP] = regs->fp;
  73. gdb_regs[BFIN_I0] = regs->i0;
  74. gdb_regs[BFIN_I1] = regs->i1;
  75. gdb_regs[BFIN_I2] = regs->i2;
  76. gdb_regs[BFIN_I3] = regs->i3;
  77. gdb_regs[BFIN_M0] = regs->m0;
  78. gdb_regs[BFIN_M1] = regs->m1;
  79. gdb_regs[BFIN_M2] = regs->m2;
  80. gdb_regs[BFIN_M3] = regs->m3;
  81. gdb_regs[BFIN_B0] = regs->b0;
  82. gdb_regs[BFIN_B1] = regs->b1;
  83. gdb_regs[BFIN_B2] = regs->b2;
  84. gdb_regs[BFIN_B3] = regs->b3;
  85. gdb_regs[BFIN_L0] = regs->l0;
  86. gdb_regs[BFIN_L1] = regs->l1;
  87. gdb_regs[BFIN_L2] = regs->l2;
  88. gdb_regs[BFIN_L3] = regs->l3;
  89. gdb_regs[BFIN_A0_DOT_X] = regs->a0x;
  90. gdb_regs[BFIN_A0_DOT_W] = regs->a0w;
  91. gdb_regs[BFIN_A1_DOT_X] = regs->a1x;
  92. gdb_regs[BFIN_A1_DOT_W] = regs->a1w;
  93. gdb_regs[BFIN_ASTAT] = regs->astat;
  94. gdb_regs[BFIN_RETS] = regs->rets;
  95. gdb_regs[BFIN_LC0] = regs->lc0;
  96. gdb_regs[BFIN_LT0] = regs->lt0;
  97. gdb_regs[BFIN_LB0] = regs->lb0;
  98. gdb_regs[BFIN_LC1] = regs->lc1;
  99. gdb_regs[BFIN_LT1] = regs->lt1;
  100. gdb_regs[BFIN_LB1] = regs->lb1;
  101. gdb_regs[BFIN_CYCLES] = 0;
  102. gdb_regs[BFIN_CYCLES2] = 0;
  103. gdb_regs[BFIN_USP] = regs->usp;
  104. gdb_regs[BFIN_SEQSTAT] = regs->seqstat;
  105. gdb_regs[BFIN_SYSCFG] = regs->syscfg;
  106. gdb_regs[BFIN_RETI] = regs->pc;
  107. gdb_regs[BFIN_RETX] = regs->retx;
  108. gdb_regs[BFIN_RETN] = regs->retn;
  109. gdb_regs[BFIN_RETE] = regs->rete;
  110. gdb_regs[BFIN_PC] = regs->pc;
  111. gdb_regs[BFIN_CC] = 0;
  112. gdb_regs[BFIN_EXTRA1] = 0;
  113. gdb_regs[BFIN_EXTRA2] = 0;
  114. gdb_regs[BFIN_EXTRA3] = 0;
  115. gdb_regs[BFIN_IPEND] = regs->ipend;
  116. }
  117. /*
  118. * Extracts ebp, esp and eip values understandable by gdb from the values
  119. * saved by switch_to.
  120. * thread.esp points to ebp. flags and ebp are pushed in switch_to hence esp
  121. * prior to entering switch_to is 8 greater then the value that is saved.
  122. * If switch_to changes, change following code appropriately.
  123. */
  124. void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
  125. {
  126. gdb_regs[BFIN_SP] = p->thread.ksp;
  127. gdb_regs[BFIN_PC] = p->thread.pc;
  128. gdb_regs[BFIN_SEQSTAT] = p->thread.seqstat;
  129. }
  130. void gdb_regs_to_regs(unsigned long *gdb_regs, struct pt_regs *regs)
  131. {
  132. regs->r0 = gdb_regs[BFIN_R0];
  133. regs->r1 = gdb_regs[BFIN_R1];
  134. regs->r2 = gdb_regs[BFIN_R2];
  135. regs->r3 = gdb_regs[BFIN_R3];
  136. regs->r4 = gdb_regs[BFIN_R4];
  137. regs->r5 = gdb_regs[BFIN_R5];
  138. regs->r6 = gdb_regs[BFIN_R6];
  139. regs->r7 = gdb_regs[BFIN_R7];
  140. regs->p0 = gdb_regs[BFIN_P0];
  141. regs->p1 = gdb_regs[BFIN_P1];
  142. regs->p2 = gdb_regs[BFIN_P2];
  143. regs->p3 = gdb_regs[BFIN_P3];
  144. regs->p4 = gdb_regs[BFIN_P4];
  145. regs->p5 = gdb_regs[BFIN_P5];
  146. regs->fp = gdb_regs[BFIN_FP];
  147. regs->i0 = gdb_regs[BFIN_I0];
  148. regs->i1 = gdb_regs[BFIN_I1];
  149. regs->i2 = gdb_regs[BFIN_I2];
  150. regs->i3 = gdb_regs[BFIN_I3];
  151. regs->m0 = gdb_regs[BFIN_M0];
  152. regs->m1 = gdb_regs[BFIN_M1];
  153. regs->m2 = gdb_regs[BFIN_M2];
  154. regs->m3 = gdb_regs[BFIN_M3];
  155. regs->b0 = gdb_regs[BFIN_B0];
  156. regs->b1 = gdb_regs[BFIN_B1];
  157. regs->b2 = gdb_regs[BFIN_B2];
  158. regs->b3 = gdb_regs[BFIN_B3];
  159. regs->l0 = gdb_regs[BFIN_L0];
  160. regs->l1 = gdb_regs[BFIN_L1];
  161. regs->l2 = gdb_regs[BFIN_L2];
  162. regs->l3 = gdb_regs[BFIN_L3];
  163. regs->a0x = gdb_regs[BFIN_A0_DOT_X];
  164. regs->a0w = gdb_regs[BFIN_A0_DOT_W];
  165. regs->a1x = gdb_regs[BFIN_A1_DOT_X];
  166. regs->a1w = gdb_regs[BFIN_A1_DOT_W];
  167. regs->rets = gdb_regs[BFIN_RETS];
  168. regs->lc0 = gdb_regs[BFIN_LC0];
  169. regs->lt0 = gdb_regs[BFIN_LT0];
  170. regs->lb0 = gdb_regs[BFIN_LB0];
  171. regs->lc1 = gdb_regs[BFIN_LC1];
  172. regs->lt1 = gdb_regs[BFIN_LT1];
  173. regs->lb1 = gdb_regs[BFIN_LB1];
  174. regs->usp = gdb_regs[BFIN_USP];
  175. regs->syscfg = gdb_regs[BFIN_SYSCFG];
  176. regs->retx = gdb_regs[BFIN_PC];
  177. regs->retn = gdb_regs[BFIN_RETN];
  178. regs->rete = gdb_regs[BFIN_RETE];
  179. regs->pc = gdb_regs[BFIN_PC];
  180. #if 0 /* can't change these */
  181. regs->astat = gdb_regs[BFIN_ASTAT];
  182. regs->seqstat = gdb_regs[BFIN_SEQSTAT];
  183. regs->ipend = gdb_regs[BFIN_IPEND];
  184. #endif
  185. }
  186. struct hw_breakpoint {
  187. unsigned int occupied:1;
  188. unsigned int skip:1;
  189. unsigned int enabled:1;
  190. unsigned int type:1;
  191. unsigned int dataacc:2;
  192. unsigned short count;
  193. unsigned int addr;
  194. } breakinfo[HW_BREAKPOINT_NUM];
  195. int kgdb_arch_init(void)
  196. {
  197. kgdb_remove_all_hw_break();
  198. return 0;
  199. }
  200. int kgdb_set_hw_break(unsigned long addr)
  201. {
  202. int breakno;
  203. for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
  204. if (!breakinfo[breakno].occupied) {
  205. breakinfo[breakno].occupied = 1;
  206. breakinfo[breakno].enabled = 1;
  207. breakinfo[breakno].type = 1;
  208. breakinfo[breakno].addr = addr;
  209. return 0;
  210. }
  211. return -ENOSPC;
  212. }
  213. int kgdb_remove_hw_break(unsigned long addr)
  214. {
  215. int breakno;
  216. for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++)
  217. if (breakinfo[breakno].addr == addr)
  218. memset(&(breakinfo[breakno]), 0, sizeof(struct hw_breakpoint));
  219. return 0;
  220. }
  221. void kgdb_remove_all_hw_break(void)
  222. {
  223. memset(breakinfo, 0, sizeof(struct hw_breakpoint)*8);
  224. }
  225. /*
  226. void kgdb_show_info(void)
  227. {
  228. printk(KERN_DEBUG "hwd: wpia0=0x%x, wpiacnt0=%d, wpiactl=0x%x, wpstat=0x%x\n",
  229. bfin_read_WPIA0(), bfin_read_WPIACNT0(),
  230. bfin_read_WPIACTL(), bfin_read_WPSTAT());
  231. }
  232. */
  233. void kgdb_correct_hw_break(void)
  234. {
  235. int breakno;
  236. int correctit;
  237. uint32_t wpdactl = bfin_read_WPDACTL();
  238. correctit = 0;
  239. for (breakno = 0; breakno < HW_BREAKPOINT_NUM; breakno++) {
  240. if (breakinfo[breakno].type == 1) {
  241. switch (breakno) {
  242. case 0:
  243. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN0)) {
  244. correctit = 1;
  245. wpdactl &= ~(WPIREN01|EMUSW0);
  246. wpdactl |= WPIAEN0|WPICNTEN0;
  247. bfin_write_WPIA0(breakinfo[breakno].addr);
  248. bfin_write_WPIACNT0(breakinfo[breakno].skip);
  249. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN0)) {
  250. correctit = 1;
  251. wpdactl &= ~WPIAEN0;
  252. }
  253. break;
  254. case 1:
  255. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN1)) {
  256. correctit = 1;
  257. wpdactl &= ~(WPIREN01|EMUSW1);
  258. wpdactl |= WPIAEN1|WPICNTEN1;
  259. bfin_write_WPIA1(breakinfo[breakno].addr);
  260. bfin_write_WPIACNT1(breakinfo[breakno].skip);
  261. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN1)) {
  262. correctit = 1;
  263. wpdactl &= ~WPIAEN1;
  264. }
  265. break;
  266. case 2:
  267. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN2)) {
  268. correctit = 1;
  269. wpdactl &= ~(WPIREN23|EMUSW2);
  270. wpdactl |= WPIAEN2|WPICNTEN2;
  271. bfin_write_WPIA2(breakinfo[breakno].addr);
  272. bfin_write_WPIACNT2(breakinfo[breakno].skip);
  273. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN2)) {
  274. correctit = 1;
  275. wpdactl &= ~WPIAEN2;
  276. }
  277. break;
  278. case 3:
  279. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN3)) {
  280. correctit = 1;
  281. wpdactl &= ~(WPIREN23|EMUSW3);
  282. wpdactl |= WPIAEN3|WPICNTEN3;
  283. bfin_write_WPIA3(breakinfo[breakno].addr);
  284. bfin_write_WPIACNT3(breakinfo[breakno].skip);
  285. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN3)) {
  286. correctit = 1;
  287. wpdactl &= ~WPIAEN3;
  288. }
  289. break;
  290. case 4:
  291. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN4)) {
  292. correctit = 1;
  293. wpdactl &= ~(WPIREN45|EMUSW4);
  294. wpdactl |= WPIAEN4|WPICNTEN4;
  295. bfin_write_WPIA4(breakinfo[breakno].addr);
  296. bfin_write_WPIACNT4(breakinfo[breakno].skip);
  297. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN4)) {
  298. correctit = 1;
  299. wpdactl &= ~WPIAEN4;
  300. }
  301. break;
  302. case 5:
  303. if (breakinfo[breakno].enabled && !(wpdactl & WPIAEN5)) {
  304. correctit = 1;
  305. wpdactl &= ~(WPIREN45|EMUSW5);
  306. wpdactl |= WPIAEN5|WPICNTEN5;
  307. bfin_write_WPIA5(breakinfo[breakno].addr);
  308. bfin_write_WPIACNT5(breakinfo[breakno].skip);
  309. } else if (!breakinfo[breakno].enabled && (wpdactl & WPIAEN5)) {
  310. correctit = 1;
  311. wpdactl &= ~WPIAEN5;
  312. }
  313. break;
  314. }
  315. }
  316. }
  317. if (correctit) {
  318. wpdactl &= ~WPAND;
  319. wpdactl |= WPPWR;
  320. /*printk("correct_hw_break: wpdactl=0x%x\n", wpdactl);*/
  321. bfin_write_WPDACTL(wpdactl);
  322. CSYNC();
  323. /*kgdb_show_info();*/
  324. }
  325. }
  326. void kgdb_disable_hw_debug(struct pt_regs *regs)
  327. {
  328. /* Disable hardware debugging while we are in kgdb */
  329. bfin_write_WPIACTL(bfin_read_WPIACTL() & ~0x1);
  330. CSYNC();
  331. }
  332. void kgdb_post_master_code(struct pt_regs *regs, int eVector, int err_code)
  333. {
  334. /* Master processor is completely in the debugger */
  335. gdb_bf533vector = eVector;
  336. gdb_bf533errcode = err_code;
  337. }
  338. int kgdb_arch_handle_exception(int exceptionVector, int signo,
  339. int err_code, char *remcom_in_buffer,
  340. char *remcom_out_buffer,
  341. struct pt_regs *linux_regs)
  342. {
  343. long addr;
  344. long breakno;
  345. char *ptr;
  346. int newPC;
  347. int wp_status;
  348. switch (remcom_in_buffer[0]) {
  349. case 'c':
  350. case 's':
  351. if (kgdb_contthread && kgdb_contthread != current) {
  352. strcpy(remcom_out_buffer, "E00");
  353. break;
  354. }
  355. kgdb_contthread = NULL;
  356. /* try to read optional parameter, pc unchanged if no parm */
  357. ptr = &remcom_in_buffer[1];
  358. if (kgdb_hex2long(&ptr, &addr)) {
  359. linux_regs->retx = addr;
  360. }
  361. newPC = linux_regs->retx;
  362. /* clear the trace bit */
  363. linux_regs->syscfg &= 0xfffffffe;
  364. /* set the trace bit if we're stepping */
  365. if (remcom_in_buffer[0] == 's') {
  366. linux_regs->syscfg |= 0x1;
  367. debugger_step = 1;
  368. }
  369. wp_status = bfin_read_WPSTAT();
  370. CSYNC();
  371. if (exceptionVector == VEC_WATCH) {
  372. for (breakno = 0; breakno < 6; ++breakno) {
  373. if (wp_status & (1 << breakno)) {
  374. breakinfo->skip = 1;
  375. break;
  376. }
  377. }
  378. }
  379. kgdb_correct_hw_break();
  380. bfin_write_WPSTAT(0);
  381. return 0;
  382. } /* switch */
  383. return -1; /* this means that we do not want to exit from the handler */
  384. }
  385. struct kgdb_arch arch_kgdb_ops = {
  386. .gdb_bpt_instr = {0xa1},
  387. .flags = KGDB_HW_BREAKPOINT,
  388. };