Kconfig 27 KB

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  1. #
  2. # For a description of the syntax of this configuration file,
  3. # see Documentation/kbuild/kconfig-language.txt.
  4. #
  5. mainmenu "uClinux/Blackfin (w/o MMU) Kernel Configuration"
  6. config MMU
  7. bool
  8. default n
  9. config FPU
  10. bool
  11. default n
  12. config RWSEM_GENERIC_SPINLOCK
  13. bool
  14. default y
  15. config RWSEM_XCHGADD_ALGORITHM
  16. bool
  17. default n
  18. config BLACKFIN
  19. bool
  20. default y
  21. config ZONE_DMA
  22. bool
  23. default y
  24. config BFIN
  25. bool
  26. default y
  27. config SEMAPHORE_SLEEPERS
  28. bool
  29. default y
  30. config GENERIC_FIND_NEXT_BIT
  31. bool
  32. default y
  33. config GENERIC_HWEIGHT
  34. bool
  35. default y
  36. config GENERIC_HARDIRQS
  37. bool
  38. default y
  39. config GENERIC_IRQ_PROBE
  40. bool
  41. default y
  42. config GENERIC_TIME
  43. bool
  44. default n
  45. config GENERIC_GPIO
  46. bool
  47. default y
  48. config FORCE_MAX_ZONEORDER
  49. int
  50. default "14"
  51. config GENERIC_CALIBRATE_DELAY
  52. bool
  53. default y
  54. config IRQCHIP_DEMUX_GPIO
  55. bool
  56. depends on (BF53x || BF561 || BF54x)
  57. default y
  58. source "init/Kconfig"
  59. source "kernel/Kconfig.preempt"
  60. menu "Blackfin Processor Options"
  61. comment "Processor and Board Settings"
  62. choice
  63. prompt "CPU"
  64. default BF533
  65. config BF531
  66. bool "BF531"
  67. help
  68. BF531 Processor Support.
  69. config BF532
  70. bool "BF532"
  71. help
  72. BF532 Processor Support.
  73. config BF533
  74. bool "BF533"
  75. help
  76. BF533 Processor Support.
  77. config BF534
  78. bool "BF534"
  79. help
  80. BF534 Processor Support.
  81. config BF536
  82. bool "BF536"
  83. help
  84. BF536 Processor Support.
  85. config BF537
  86. bool "BF537"
  87. help
  88. BF537 Processor Support.
  89. config BF542
  90. bool "BF542"
  91. help
  92. BF542 Processor Support.
  93. config BF544
  94. bool "BF544"
  95. help
  96. BF544 Processor Support.
  97. config BF548
  98. bool "BF548"
  99. help
  100. BF548 Processor Support.
  101. config BF549
  102. bool "BF549"
  103. help
  104. BF549 Processor Support.
  105. config BF561
  106. bool "BF561"
  107. help
  108. Not Supported Yet - Work in progress - BF561 Processor Support.
  109. endchoice
  110. choice
  111. prompt "Silicon Rev"
  112. default BF_REV_0_2 if BF537
  113. default BF_REV_0_3 if BF533
  114. default BF_REV_0_0 if BF549
  115. config BF_REV_0_0
  116. bool "0.0"
  117. depends on (BF549)
  118. config BF_REV_0_2
  119. bool "0.2"
  120. depends on (BF537 || BF536 || BF534)
  121. config BF_REV_0_3
  122. bool "0.3"
  123. depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531)
  124. config BF_REV_0_4
  125. bool "0.4"
  126. depends on (BF561 || BF533 || BF532 || BF531)
  127. config BF_REV_0_5
  128. bool "0.5"
  129. depends on (BF561 || BF533 || BF532 || BF531)
  130. config BF_REV_ANY
  131. bool "any"
  132. config BF_REV_NONE
  133. bool "none"
  134. endchoice
  135. config BF53x
  136. bool
  137. depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
  138. default y
  139. config BF54x
  140. bool
  141. depends on (BF542 || BF544 || BF548 || BF549)
  142. default y
  143. config BFIN_DUAL_CORE
  144. bool
  145. depends on (BF561)
  146. default y
  147. config BFIN_SINGLE_CORE
  148. bool
  149. depends on !BFIN_DUAL_CORE
  150. default y
  151. choice
  152. prompt "System type"
  153. default BFIN533_STAMP
  154. help
  155. Do NOT change the board here. Please use the top level
  156. configuration to ensure that all the other settings are
  157. correct.
  158. config BFIN533_EZKIT
  159. bool "BF533-EZKIT"
  160. depends on (BF533 || BF532 || BF531)
  161. help
  162. BF533-EZKIT-LITE board Support.
  163. config BFIN533_STAMP
  164. bool "BF533-STAMP"
  165. depends on (BF533 || BF532 || BF531)
  166. help
  167. BF533-STAMP board Support.
  168. config BFIN537_STAMP
  169. bool "BF537-STAMP"
  170. depends on (BF537 || BF536 || BF534)
  171. help
  172. BF537-STAMP board Support.
  173. config BFIN533_BLUETECHNIX_CM
  174. bool "Bluetechnix CM-BF533"
  175. depends on (BF533)
  176. help
  177. CM-BF533 support for EVAL- and DEV-Board.
  178. config BFIN537_BLUETECHNIX_CM
  179. bool "Bluetechnix CM-BF537"
  180. depends on (BF537)
  181. help
  182. CM-BF537 support for EVAL- and DEV-Board.
  183. config BFIN548_EZKIT
  184. bool "BF548-EZKIT"
  185. depends on (BF548 || BF549)
  186. help
  187. BFIN548-EZKIT board Support.
  188. config BFIN561_BLUETECHNIX_CM
  189. bool "Bluetechnix CM-BF561"
  190. depends on (BF561)
  191. help
  192. CM-BF561 support for EVAL- and DEV-Board.
  193. config BFIN561_EZKIT
  194. bool "BF561-EZKIT"
  195. depends on (BF561)
  196. help
  197. BF561-EZKIT-LITE board Support.
  198. config BFIN561_TEPLA
  199. bool "BF561-TEPLA"
  200. depends on (BF561)
  201. help
  202. BF561-TEPLA board Support.
  203. config PNAV10
  204. bool "PNAV 1.0 board"
  205. depends on (BF537)
  206. help
  207. PNAV 1.0 board Support.
  208. config GENERIC_BOARD
  209. bool "Custom"
  210. depends on (BF537 || BF536 \
  211. || BF534 || BF561 || BF535 || BF533 || BF532 || BF531)
  212. help
  213. GENERIC or Custom board Support.
  214. endchoice
  215. config MEM_GENERIC_BOARD
  216. bool
  217. depends on GENERIC_BOARD
  218. default y
  219. config MEM_MT48LC64M4A2FB_7E
  220. bool
  221. depends on (BFIN533_STAMP)
  222. default y
  223. config MEM_MT48LC16M16A2TG_75
  224. bool
  225. depends on (BFIN533_EZKIT || BFIN561_EZKIT \
  226. || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM)
  227. default y
  228. config MEM_MT48LC32M8A2_75
  229. bool
  230. depends on (BFIN537_STAMP || PNAV10)
  231. default y
  232. config MEM_MT48LC8M32B2B5_7
  233. bool
  234. depends on (BFIN561_BLUETECHNIX_CM)
  235. default y
  236. config BFIN_SHARED_FLASH_ENET
  237. bool
  238. depends on (BFIN533_STAMP)
  239. default y
  240. source "arch/blackfin/mach-bf533/Kconfig"
  241. source "arch/blackfin/mach-bf561/Kconfig"
  242. source "arch/blackfin/mach-bf537/Kconfig"
  243. source "arch/blackfin/mach-bf548/Kconfig"
  244. menu "Board customizations"
  245. config CMDLINE_BOOL
  246. bool "Default bootloader kernel arguments"
  247. config CMDLINE
  248. string "Initial kernel command string"
  249. depends on CMDLINE_BOOL
  250. default "console=ttyBF0,57600"
  251. help
  252. If you don't have a boot loader capable of passing a command line string
  253. to the kernel, you may specify one here. As a minimum, you should specify
  254. the memory size and the root device (e.g., mem=8M, root=/dev/nfs).
  255. comment "Clock/PLL Setup"
  256. config CLKIN_HZ
  257. int "Crystal Frequency in Hz"
  258. default "11059200" if BFIN533_STAMP
  259. default "27000000" if BFIN533_EZKIT
  260. default "25000000" if BFIN537_STAMP
  261. default "30000000" if BFIN561_EZKIT
  262. default "24576000" if PNAV10
  263. help
  264. The frequency of CLKIN crystal oscillator on the board in Hz.
  265. config BFIN_KERNEL_CLOCK
  266. bool "Re-program Clocks while Kernel boots?"
  267. default n
  268. help
  269. This option decides if kernel clocks are re-programed from the
  270. bootloader settings. If the clocks are not set, the SDRAM settings
  271. are also not changed, and the Bootloader does 100% of the hardware
  272. configuration.
  273. config PLL_BYPASS
  274. bool "Bypass PLL"
  275. depends on BFIN_KERNEL_CLOCK
  276. default n
  277. config CLKIN_HALF
  278. bool "Half Clock In"
  279. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  280. default n
  281. help
  282. If this is set the clock will be divided by 2, before it goes to the PLL.
  283. config VCO_MULT
  284. int "VCO Multiplier"
  285. depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS)
  286. range 1 64
  287. default "22" if BFIN533_EZKIT
  288. default "45" if BFIN533_STAMP
  289. default "20" if BFIN537_STAMP
  290. default "22" if BFIN533_BLUETECHNIX_CM
  291. default "20" if BFIN537_BLUETECHNIX_CM
  292. default "20" if BFIN561_BLUETECHNIX_CM
  293. default "20" if BFIN561_EZKIT
  294. help
  295. This controls the frequency of the on-chip PLL. This can be between 1 and 64.
  296. PLL Frequency = (Crystal Frequency) * (this setting)
  297. choice
  298. prompt "Core Clock Divider"
  299. depends on BFIN_KERNEL_CLOCK
  300. default CCLK_DIV_1
  301. help
  302. This sets the frequency of the core. It can be 1, 2, 4 or 8
  303. Core Frequency = (PLL frequency) / (this setting)
  304. config CCLK_DIV_1
  305. bool "1"
  306. config CCLK_DIV_2
  307. bool "2"
  308. config CCLK_DIV_4
  309. bool "4"
  310. config CCLK_DIV_8
  311. bool "8"
  312. endchoice
  313. config SCLK_DIV
  314. int "System Clock Divider"
  315. depends on BFIN_KERNEL_CLOCK
  316. range 1 15
  317. default 5 if BFIN533_EZKIT
  318. default 5 if BFIN533_STAMP
  319. default 4 if BFIN537_STAMP
  320. default 5 if BFIN533_BLUETECHNIX_CM
  321. default 4 if BFIN537_BLUETECHNIX_CM
  322. default 4 if BFIN561_BLUETECHNIX_CM
  323. default 5 if BFIN561_EZKIT
  324. help
  325. This sets the frequency of the system clock (including SDRAM or DDR).
  326. This can be between 1 and 15
  327. System Clock = (PLL frequency) / (this setting)
  328. #
  329. # Max & Min Speeds for various Chips
  330. #
  331. config MAX_VCO_HZ
  332. int
  333. default 600000000 if BF522
  334. default 600000000 if BF525
  335. default 600000000 if BF527
  336. default 400000000 if BF531
  337. default 400000000 if BF532
  338. default 750000000 if BF533
  339. default 500000000 if BF534
  340. default 400000000 if BF536
  341. default 600000000 if BF537
  342. default 533000000 if BF538
  343. default 533000000 if BF539
  344. default 600000000 if BF542
  345. default 533000000 if BF544
  346. default 533000000 if BF549
  347. default 600000000 if BF561
  348. config MIN_VCO_HZ
  349. int
  350. default 50000000
  351. config MAX_SCLK_HZ
  352. int
  353. default 133000000
  354. config MIN_SCLK_HZ
  355. int
  356. default 27000000
  357. comment "Kernel Timer/Scheduler"
  358. source kernel/Kconfig.hz
  359. comment "Memory Setup"
  360. config MEM_SIZE
  361. int "SDRAM Memory Size in MBytes"
  362. default 32 if BFIN533_EZKIT
  363. default 64 if BFIN537_STAMP
  364. default 64 if BFIN561_EZKIT
  365. default 128 if BFIN533_STAMP
  366. default 64 if PNAV10
  367. config MEM_ADD_WIDTH
  368. int "SDRAM Memory Address Width"
  369. default 9 if BFIN533_EZKIT
  370. default 9 if BFIN561_EZKIT
  371. default 10 if BFIN537_STAMP
  372. default 11 if BFIN533_STAMP
  373. default 10 if PNAV10
  374. config ENET_FLASH_PIN
  375. int "PF port/pin used for flash and ethernet sharing"
  376. depends on (BFIN533_STAMP)
  377. default 0
  378. help
  379. PF port/pin used for flash and ethernet sharing to allow other PF
  380. pins to be used on other platforms without having to touch common
  381. code.
  382. For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
  383. config BOOT_LOAD
  384. hex "Kernel load address for booting"
  385. default "0x1000"
  386. range 0x1000 0x20000000
  387. help
  388. This option allows you to set the load address of the kernel.
  389. This can be useful if you are on a board which has a small amount
  390. of memory or you wish to reserve some memory at the beginning of
  391. the address space.
  392. Note that you need to keep this value above 4k (0x1000) as this
  393. memory region is used to capture NULL pointer references as well
  394. as some core kernel functions.
  395. comment "LED Status Indicators"
  396. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  397. config BFIN_ALIVE_LED
  398. bool "Enable Board Alive"
  399. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  400. default n
  401. help
  402. Blink the LEDs you select when the kernel is running. Helps detect
  403. a hung kernel.
  404. config BFIN_ALIVE_LED_NUM
  405. int "LED"
  406. depends on BFIN_ALIVE_LED
  407. range 1 3 if BFIN533_STAMP
  408. default "3" if BFIN533_STAMP
  409. help
  410. Select the LED (marked on the board) for you to blink.
  411. config BFIN_IDLE_LED
  412. bool "Enable System Load/Idle LED"
  413. depends on (BFIN533_STAMP || BFIN533_BLUETECHNIX_CM)
  414. default n
  415. help
  416. Blinks the LED you select when to determine kernel load.
  417. config BFIN_IDLE_LED_NUM
  418. int "LED"
  419. depends on BFIN_IDLE_LED
  420. range 1 3 if BFIN533_STAMP
  421. default "2" if BFIN533_STAMP
  422. help
  423. Select the LED (marked on the board) for you to blink.
  424. choice
  425. prompt "Blackfin Exception Scratch Register"
  426. default BFIN_SCRATCH_REG_RETN
  427. help
  428. Select the resource to reserve for the Exception handler:
  429. - RETN: Non-Maskable Interrupt (NMI)
  430. - RETE: Exception Return (JTAG/ICE)
  431. - CYCLES: Performance counter
  432. If you are unsure, please select "RETN".
  433. config BFIN_SCRATCH_REG_RETN
  434. bool "RETN"
  435. help
  436. Use the RETN register in the Blackfin exception handler
  437. as a stack scratch register. This means you cannot
  438. safely use NMI on the Blackfin while running Linux, but
  439. you can debug the system with a JTAG ICE and use the
  440. CYCLES performance registers.
  441. If you are unsure, please select "RETN".
  442. config BFIN_SCRATCH_REG_RETE
  443. bool "RETE"
  444. help
  445. Use the RETE register in the Blackfin exception handler
  446. as a stack scratch register. This means you cannot
  447. safely use a JTAG ICE while debugging a Blackfin board,
  448. but you can safely use the CYCLES performance registers
  449. and the NMI.
  450. If you are unsure, please select "RETN".
  451. config BFIN_SCRATCH_REG_CYCLES
  452. bool "CYCLES"
  453. help
  454. Use the CYCLES register in the Blackfin exception handler
  455. as a stack scratch register. This means you cannot
  456. safely use the CYCLES performance registers on a Blackfin
  457. board at anytime, but you can debug the system with a JTAG
  458. ICE and use the NMI.
  459. If you are unsure, please select "RETN".
  460. endchoice
  461. #
  462. # Sorry - but you need to put the hex address here -
  463. #
  464. # Flag Data register
  465. config BFIN_ALIVE_LED_PORT
  466. hex
  467. default 0xFFC00700 if (BFIN533_STAMP)
  468. # Peripheral Flag Direction Register
  469. config BFIN_ALIVE_LED_DPORT
  470. hex
  471. default 0xFFC00730 if (BFIN533_STAMP)
  472. config BFIN_ALIVE_LED_PIN
  473. hex
  474. default 0x04 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 1)
  475. default 0x08 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 2)
  476. default 0x10 if (BFIN533_STAMP && BFIN_ALIVE_LED_NUM = 3)
  477. config BFIN_IDLE_LED_PORT
  478. hex
  479. default 0xFFC00700 if (BFIN533_STAMP)
  480. # Peripheral Flag Direction Register
  481. config BFIN_IDLE_LED_DPORT
  482. hex
  483. default 0xFFC00730 if (BFIN533_STAMP)
  484. config BFIN_IDLE_LED_PIN
  485. hex
  486. default 0x04 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 1)
  487. default 0x08 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 2)
  488. default 0x10 if (BFIN533_STAMP && BFIN_IDLE_LED_NUM = 3)
  489. endmenu
  490. menu "Blackfin Kernel Optimizations"
  491. comment "Memory Optimizations"
  492. config I_ENTRY_L1
  493. bool "Locate interrupt entry code in L1 Memory"
  494. default y
  495. help
  496. If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked
  497. into L1 instruction memory.(less latency)
  498. config EXCPT_IRQ_SYSC_L1
  499. bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory"
  500. default y
  501. help
  502. If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked
  503. into L1 instruction memory.(less latency)
  504. config DO_IRQ_L1
  505. bool "Locate frequently called do_irq dispatcher function in L1 Memory"
  506. default y
  507. help
  508. If enabled frequently called do_irq dispatcher function is linked
  509. into L1 instruction memory.(less latency)
  510. config CORE_TIMER_IRQ_L1
  511. bool "Locate frequently called timer_interrupt() function in L1 Memory"
  512. default y
  513. help
  514. If enabled frequently called timer_interrupt() function is linked
  515. into L1 instruction memory.(less latency)
  516. config IDLE_L1
  517. bool "Locate frequently idle function in L1 Memory"
  518. default y
  519. help
  520. If enabled frequently called idle function is linked
  521. into L1 instruction memory.(less latency)
  522. config SCHEDULE_L1
  523. bool "Locate kernel schedule function in L1 Memory"
  524. default y
  525. help
  526. If enabled frequently called kernel schedule is linked
  527. into L1 instruction memory.(less latency)
  528. config ARITHMETIC_OPS_L1
  529. bool "Locate kernel owned arithmetic functions in L1 Memory"
  530. default y
  531. help
  532. If enabled arithmetic functions are linked
  533. into L1 instruction memory.(less latency)
  534. config ACCESS_OK_L1
  535. bool "Locate access_ok function in L1 Memory"
  536. default y
  537. help
  538. If enabled access_ok function is linked
  539. into L1 instruction memory.(less latency)
  540. config MEMSET_L1
  541. bool "Locate memset function in L1 Memory"
  542. default y
  543. help
  544. If enabled memset function is linked
  545. into L1 instruction memory.(less latency)
  546. config MEMCPY_L1
  547. bool "Locate memcpy function in L1 Memory"
  548. default y
  549. help
  550. If enabled memcpy function is linked
  551. into L1 instruction memory.(less latency)
  552. config SYS_BFIN_SPINLOCK_L1
  553. bool "Locate sys_bfin_spinlock function in L1 Memory"
  554. default y
  555. help
  556. If enabled sys_bfin_spinlock function is linked
  557. into L1 instruction memory.(less latency)
  558. config IP_CHECKSUM_L1
  559. bool "Locate IP Checksum function in L1 Memory"
  560. default n
  561. help
  562. If enabled IP Checksum function is linked
  563. into L1 instruction memory.(less latency)
  564. config CACHELINE_ALIGNED_L1
  565. bool "Locate cacheline_aligned data to L1 Data Memory"
  566. default y if !BF54x
  567. default n if BF54x
  568. depends on !BF531
  569. help
  570. If enabled cacheline_anligned data is linked
  571. into L1 data memory.(less latency)
  572. config SYSCALL_TAB_L1
  573. bool "Locate Syscall Table L1 Data Memory"
  574. default n
  575. depends on !BF531
  576. help
  577. If enabled the Syscall LUT is linked
  578. into L1 data memory.(less latency)
  579. config CPLB_SWITCH_TAB_L1
  580. bool "Locate CPLB Switch Tables L1 Data Memory"
  581. default n
  582. depends on !BF531
  583. help
  584. If enabled the CPLB Switch Tables are linked
  585. into L1 data memory.(less latency)
  586. endmenu
  587. choice
  588. prompt "Kernel executes from"
  589. help
  590. Choose the memory type that the kernel will be running in.
  591. config RAMKERNEL
  592. bool "RAM"
  593. help
  594. The kernel will be resident in RAM when running.
  595. config ROMKERNEL
  596. bool "ROM"
  597. help
  598. The kernel will be resident in FLASH/ROM when running.
  599. endchoice
  600. source "mm/Kconfig"
  601. config LARGE_ALLOCS
  602. bool "Allow allocating large blocks (> 1MB) of memory"
  603. help
  604. Allow the slab memory allocator to keep chains for very large
  605. memory sizes - upto 32MB. You may need this if your system has
  606. a lot of RAM, and you need to able to allocate very large
  607. contiguous chunks. If unsure, say N.
  608. config BFIN_DMA_5XX
  609. bool "Enable DMA Support"
  610. depends on (BF533 || BF532 || BF531 || BF537 || BF536 || BF534 || BF561 || BF54x)
  611. default y
  612. help
  613. DMA driver for BF5xx.
  614. choice
  615. prompt "Uncached SDRAM region"
  616. default DMA_UNCACHED_1M
  617. depends BFIN_DMA_5XX
  618. config DMA_UNCACHED_2M
  619. bool "Enable 2M DMA region"
  620. config DMA_UNCACHED_1M
  621. bool "Enable 1M DMA region"
  622. config DMA_UNCACHED_NONE
  623. bool "Disable DMA region"
  624. endchoice
  625. comment "Cache Support"
  626. config BFIN_ICACHE
  627. bool "Enable ICACHE"
  628. config BFIN_DCACHE
  629. bool "Enable DCACHE"
  630. config BFIN_DCACHE_BANKA
  631. bool "Enable only 16k BankA DCACHE - BankB is SRAM"
  632. depends on BFIN_DCACHE && !BF531
  633. default n
  634. config BFIN_ICACHE_LOCK
  635. bool "Enable Instruction Cache Locking"
  636. choice
  637. prompt "Policy"
  638. depends on BFIN_DCACHE
  639. default BFIN_WB
  640. config BFIN_WB
  641. bool "Write back"
  642. help
  643. Write Back Policy:
  644. Cached data will be written back to SDRAM only when needed.
  645. This can give a nice increase in performance, but beware of
  646. broken drivers that do not properly invalidate/flush their
  647. cache.
  648. Write Through Policy:
  649. Cached data will always be written back to SDRAM when the
  650. cache is updated. This is a completely safe setting, but
  651. performance is worse than Write Back.
  652. If you are unsure of the options and you want to be safe,
  653. then go with Write Through.
  654. config BFIN_WT
  655. bool "Write through"
  656. help
  657. Write Back Policy:
  658. Cached data will be written back to SDRAM only when needed.
  659. This can give a nice increase in performance, but beware of
  660. broken drivers that do not properly invalidate/flush their
  661. cache.
  662. Write Through Policy:
  663. Cached data will always be written back to SDRAM when the
  664. cache is updated. This is a completely safe setting, but
  665. performance is worse than Write Back.
  666. If you are unsure of the options and you want to be safe,
  667. then go with Write Through.
  668. endchoice
  669. config L1_MAX_PIECE
  670. int "Set the max L1 SRAM pieces"
  671. default 16
  672. help
  673. Set the max memory pieces for the L1 SRAM allocation algorithm.
  674. Min value is 16. Max value is 1024.
  675. comment "Asynchonous Memory Configuration"
  676. menu "EBIU_AMGCTL Global Control"
  677. config C_AMCKEN
  678. bool "Enable CLKOUT"
  679. default y
  680. config C_CDPRIO
  681. bool "DMA has priority over core for ext. accesses"
  682. depends on !BF54x
  683. default n
  684. config C_B0PEN
  685. depends on BF561
  686. bool "Bank 0 16 bit packing enable"
  687. default y
  688. config C_B1PEN
  689. depends on BF561
  690. bool "Bank 1 16 bit packing enable"
  691. default y
  692. config C_B2PEN
  693. depends on BF561
  694. bool "Bank 2 16 bit packing enable"
  695. default y
  696. config C_B3PEN
  697. depends on BF561
  698. bool "Bank 3 16 bit packing enable"
  699. default n
  700. choice
  701. prompt"Enable Asynchonous Memory Banks"
  702. default C_AMBEN_ALL
  703. config C_AMBEN
  704. bool "Disable All Banks"
  705. config C_AMBEN_B0
  706. bool "Enable Bank 0"
  707. config C_AMBEN_B0_B1
  708. bool "Enable Bank 0 & 1"
  709. config C_AMBEN_B0_B1_B2
  710. bool "Enable Bank 0 & 1 & 2"
  711. config C_AMBEN_ALL
  712. bool "Enable All Banks"
  713. endchoice
  714. endmenu
  715. menu "EBIU_AMBCTL Control"
  716. config BANK_0
  717. hex "Bank 0"
  718. default 0x7BB0
  719. config BANK_1
  720. hex "Bank 1"
  721. default 0x7BB0
  722. config BANK_2
  723. hex "Bank 2"
  724. default 0x7BB0
  725. config BANK_3
  726. hex "Bank 3"
  727. default 0x99B3
  728. endmenu
  729. endmenu
  730. #############################################################################
  731. menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
  732. config PCI
  733. bool "PCI support"
  734. help
  735. Support for PCI bus.
  736. source "drivers/pci/Kconfig"
  737. config HOTPLUG
  738. bool "Support for hot-pluggable device"
  739. help
  740. Say Y here if you want to plug devices into your computer while
  741. the system is running, and be able to use them quickly. In many
  742. cases, the devices can likewise be unplugged at any time too.
  743. One well known example of this is PCMCIA- or PC-cards, credit-card
  744. size devices such as network cards, modems or hard drives which are
  745. plugged into slots found on all modern laptop computers. Another
  746. example, used on modern desktops as well as laptops, is USB.
  747. Enable HOTPLUG and KMOD, and build a modular kernel. Get agent
  748. software (at <http://linux-hotplug.sourceforge.net/>) and install it.
  749. Then your kernel will automatically call out to a user mode "policy
  750. agent" (/sbin/hotplug) to load modules and set up software needed
  751. to use devices as you hotplug them.
  752. source "drivers/pcmcia/Kconfig"
  753. source "drivers/pci/hotplug/Kconfig"
  754. endmenu
  755. menu "Executable file formats"
  756. source "fs/Kconfig.binfmt"
  757. endmenu
  758. menu "Power management options"
  759. source "kernel/power/Kconfig"
  760. choice
  761. prompt "Select PM Wakeup Event Source"
  762. default PM_WAKEUP_GPIO_BY_SIC_IWR
  763. depends on PM
  764. help
  765. If you have a GPIO already configured as input with the corresponding PORTx_MASK
  766. bit set - "Specify Wakeup Event by SIC_IWR value"
  767. config PM_WAKEUP_GPIO_BY_SIC_IWR
  768. bool "Specify Wakeup Event by SIC_IWR value"
  769. config PM_WAKEUP_BY_GPIO
  770. bool "Cause Wakeup Event by GPIO"
  771. config PM_WAKEUP_GPIO_API
  772. bool "Configure Wakeup Event by PM GPIO API"
  773. endchoice
  774. config PM_WAKEUP_SIC_IWR
  775. hex "Wakeup Events (SIC_IWR)"
  776. depends on PM_WAKEUP_GPIO_BY_SIC_IWR
  777. default 0x80000000 if (BF537 || BF536 || BF534)
  778. default 0x100000 if (BF533 || BF532 || BF531)
  779. config PM_WAKEUP_GPIO_NUMBER
  780. int "Wakeup GPIO number"
  781. range 0 47
  782. depends on PM_WAKEUP_BY_GPIO
  783. default 2 if BFIN537_STAMP
  784. choice
  785. prompt "GPIO Polarity"
  786. depends on PM_WAKEUP_BY_GPIO
  787. default PM_WAKEUP_GPIO_POLAR_H
  788. config PM_WAKEUP_GPIO_POLAR_H
  789. bool "Active High"
  790. config PM_WAKEUP_GPIO_POLAR_L
  791. bool "Active Low"
  792. config PM_WAKEUP_GPIO_POLAR_EDGE_F
  793. bool "Falling EDGE"
  794. config PM_WAKEUP_GPIO_POLAR_EDGE_R
  795. bool "Rising EDGE"
  796. config PM_WAKEUP_GPIO_POLAR_EDGE_B
  797. bool "Both EDGE"
  798. endchoice
  799. endmenu
  800. if (BF537 || BF533 || BF54x)
  801. menu "CPU Frequency scaling"
  802. source "drivers/cpufreq/Kconfig"
  803. config CPU_FREQ
  804. bool
  805. default n
  806. help
  807. If you want to enable this option, you should select the
  808. DPMC driver from Character Devices.
  809. endmenu
  810. endif
  811. source "net/Kconfig"
  812. source "drivers/Kconfig"
  813. source "fs/Kconfig"
  814. source "arch/blackfin/oprofile/Kconfig"
  815. menu "Kernel hacking"
  816. source "lib/Kconfig.debug"
  817. config DEBUG_HWERR
  818. bool "Hardware error interrupt debugging"
  819. depends on DEBUG_KERNEL
  820. help
  821. When enabled, the hardware error interrupt is never disabled, and
  822. will happen immediately when an error condition occurs. This comes
  823. at a slight cost in code size, but is necessary if you are getting
  824. hardware error interrupts and need to know where they are coming
  825. from.
  826. config DEBUG_ICACHE_CHECK
  827. bool "Check Instruction cache coherancy"
  828. depends on DEBUG_KERNEL
  829. depends on DEBUG_HWERR
  830. help
  831. Say Y here if you are getting wierd unexplained errors. This will
  832. ensure that icache is what SDRAM says it should be, by doing a
  833. byte wise comparision between SDRAM and instruction cache. This
  834. also relocates the irq_panic() function to L1 memory, (which is
  835. un-cached).
  836. config DEBUG_HUNT_FOR_ZERO
  837. bool "Catch NULL pointer reads/writes"
  838. default y
  839. help
  840. Say Y here to catch reads/writes to anywhere in the memory range
  841. from 0x0000 - 0x0FFF (the first 4k) of memory. This is useful in
  842. catching common programming errors such as NULL pointer dereferences.
  843. Misbehaving applications will be killed (generate a SEGV) while the
  844. kernel will trigger a panic.
  845. Enabling this option will take up an extra entry in CPLB table.
  846. Otherwise, there is no extra overhead.
  847. config DEBUG_BFIN_HWTRACE_ON
  848. bool "Turn on Blackfin's Hardware Trace"
  849. default y
  850. help
  851. All Blackfins include a Trace Unit which stores a history of the last
  852. 16 changes in program flow taken by the program sequencer. The history
  853. allows the user to recreate the program sequencer’s recent path. This
  854. can be handy when an application dies - we print out the execution
  855. path of how it got to the offending instruction.
  856. By turning this off, you may save a tiny amount of power.
  857. choice
  858. prompt "Omit loop Tracing"
  859. default DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  860. depends on DEBUG_BFIN_HWTRACE_ON
  861. help
  862. The trace buffer can be configured to omit recording of changes in
  863. program flow that match either the last entry or one of the last
  864. two entries. Omitting one of these entries from the record prevents
  865. the trace buffer from overflowing because of any sort of loop (for, do
  866. while, etc) in the program.
  867. Because zero-overhead Hardware loops are not recorded in the trace buffer,
  868. this feature can be used to prevent trace overflow from loops that
  869. are nested four deep.
  870. config DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  871. bool "Trace all Loops"
  872. help
  873. The trace buffer records all changes of flow
  874. config DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
  875. bool "Compress single-level loops"
  876. help
  877. The trace buffer does not record single loops - helpful if trace
  878. is spinning on a while or do loop.
  879. config DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
  880. bool "Compress two-level loops"
  881. help
  882. The trace buffer does not record loops two levels deep. Helpful if
  883. the trace is spinning in a nested loop
  884. endchoice
  885. config DEBUG_BFIN_HWTRACE_COMPRESSION
  886. int
  887. depends on DEBUG_BFIN_HWTRACE_ON
  888. default 0 if DEBUG_BFIN_HWTRACE_COMPRESSION_OFF
  889. default 1 if DEBUG_BFIN_HWTRACE_COMPRESSION_ONE
  890. default 2 if DEBUG_BFIN_HWTRACE_COMPRESSION_TWO
  891. config DEBUG_BFIN_HWTRACE_EXPAND
  892. bool "Expand Trace Buffer greater than 16 entries"
  893. depends on DEBUG_BFIN_HWTRACE_ON
  894. default n
  895. help
  896. By selecting this option, every time the 16 hardware entries in
  897. the Blackfin's HW Trace buffer are full, the kernel will move them
  898. into a software buffer, for dumping when there is an issue. This
  899. has a great impact on performance, (an interrupt every 16 change of
  900. flows) and should normally be turned off, except in those nasty
  901. debugging sessions
  902. config DEBUG_BFIN_HWTRACE_EXPAND_LEN
  903. int "Size of Trace buffer (in power of 2k)"
  904. range 0 4
  905. depends on DEBUG_BFIN_HWTRACE_EXPAND
  906. default 1
  907. help
  908. This sets the size of the software buffer that the trace information
  909. is kept in.
  910. 0 for (2^0) 1k, or 256 entries,
  911. 1 for (2^1) 2k, or 512 entries,
  912. 2 for (2^2) 4k, or 1024 entries,
  913. 3 for (2^3) 8k, or 2048 entries,
  914. 4 for (2^4) 16k, or 4096 entries
  915. config DEBUG_BFIN_NO_KERN_HWTRACE
  916. bool "Trace user apps (turn off hwtrace in kernel)"
  917. depends on DEBUG_BFIN_HWTRACE_ON
  918. default n
  919. help
  920. Some pieces of the kernel contain a lot of flow changes which can
  921. quickly fill up the hardware trace buffer. When debugging crashes,
  922. the hardware trace may indicate that the problem lies in kernel
  923. space when in reality an application is buggy.
  924. Say Y here to disable hardware tracing in some known "jumpy" pieces
  925. of code so that the trace buffer will extend further back.
  926. config EARLY_PRINTK
  927. bool "Early printk"
  928. default n
  929. help
  930. This option enables special console drivers which allow the kernel
  931. to print messages very early in the bootup process.
  932. This is useful for kernel debugging when your machine crashes very
  933. early before the console code is initialized. After enabling this
  934. feature, you must add "earlyprintk=serial,uart0,57600" to the
  935. command line (bootargs). It is safe to say Y here in all cases, as
  936. all of this lives in the init section and is thrown away after the
  937. kernel boots completely.
  938. config DUAL_CORE_TEST_MODULE
  939. tristate "Dual Core Test Module"
  940. depends on (BF561)
  941. default n
  942. help
  943. Say Y here to build-in dual core test module for dual core test.
  944. config CPLB_INFO
  945. bool "Display the CPLB information"
  946. help
  947. Display the CPLB information.
  948. config ACCESS_CHECK
  949. bool "Check the user pointer address"
  950. default y
  951. help
  952. Usually the pointer transfer from user space is checked to see if its
  953. address is in the kernel space.
  954. Say N here to disable that check to improve the performance.
  955. endmenu
  956. source "security/Kconfig"
  957. source "crypto/Kconfig"
  958. source "lib/Kconfig"