irq.c 4.2 KB

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  1. /*
  2. * linux/arch/arm/mach-at91/irq.c
  3. *
  4. * Copyright (C) 2004 SAN People
  5. * Copyright (C) 2004 ATMEL
  6. * Copyright (C) Rick Bronson
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/mm.h>
  25. #include <linux/types.h>
  26. #include <asm/hardware.h>
  27. #include <asm/irq.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/setup.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/irq.h>
  32. #include <asm/mach/map.h>
  33. static void at91_aic_mask_irq(unsigned int irq)
  34. {
  35. /* Disable interrupt on AIC */
  36. at91_sys_write(AT91_AIC_IDCR, 1 << irq);
  37. }
  38. static void at91_aic_unmask_irq(unsigned int irq)
  39. {
  40. /* Enable interrupt on AIC */
  41. at91_sys_write(AT91_AIC_IECR, 1 << irq);
  42. }
  43. unsigned int at91_extern_irq;
  44. #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
  45. static int at91_aic_set_type(unsigned irq, unsigned type)
  46. {
  47. unsigned int smr, srctype;
  48. switch (type) {
  49. case IRQT_HIGH:
  50. srctype = AT91_AIC_SRCTYPE_HIGH;
  51. break;
  52. case IRQT_RISING:
  53. srctype = AT91_AIC_SRCTYPE_RISING;
  54. break;
  55. case IRQT_LOW:
  56. if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
  57. srctype = AT91_AIC_SRCTYPE_LOW;
  58. else
  59. return -EINVAL;
  60. break;
  61. case IRQT_FALLING:
  62. if ((irq == AT91_ID_FIQ) || is_extern_irq(irq)) /* only supported on external interrupts */
  63. srctype = AT91_AIC_SRCTYPE_FALLING;
  64. else
  65. return -EINVAL;
  66. break;
  67. default:
  68. return -EINVAL;
  69. }
  70. smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
  71. at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
  72. return 0;
  73. }
  74. #ifdef CONFIG_PM
  75. static u32 wakeups;
  76. static u32 backups;
  77. static int at91_aic_set_wake(unsigned irq, unsigned value)
  78. {
  79. if (unlikely(irq >= 32))
  80. return -EINVAL;
  81. if (value)
  82. wakeups |= (1 << irq);
  83. else
  84. wakeups &= ~(1 << irq);
  85. return 0;
  86. }
  87. void at91_irq_suspend(void)
  88. {
  89. backups = at91_sys_read(AT91_AIC_IMR);
  90. at91_sys_write(AT91_AIC_IDCR, backups);
  91. at91_sys_write(AT91_AIC_IECR, wakeups);
  92. }
  93. void at91_irq_resume(void)
  94. {
  95. at91_sys_write(AT91_AIC_IDCR, wakeups);
  96. at91_sys_write(AT91_AIC_IECR, backups);
  97. }
  98. #else
  99. #define at91_aic_set_wake NULL
  100. #endif
  101. static struct irq_chip at91_aic_chip = {
  102. .name = "AIC",
  103. .ack = at91_aic_mask_irq,
  104. .mask = at91_aic_mask_irq,
  105. .unmask = at91_aic_unmask_irq,
  106. .set_type = at91_aic_set_type,
  107. .set_wake = at91_aic_set_wake,
  108. };
  109. /*
  110. * Initialize the AIC interrupt controller.
  111. */
  112. void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
  113. {
  114. unsigned int i;
  115. /*
  116. * The IVR is used by macro get_irqnr_and_base to read and verify.
  117. * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
  118. */
  119. for (i = 0; i < NR_AIC_IRQS; i++) {
  120. /* Put irq number in Source Vector Register: */
  121. at91_sys_write(AT91_AIC_SVR(i), i);
  122. /* Active Low interrupt, with the specified priority */
  123. at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
  124. set_irq_chip(i, &at91_aic_chip);
  125. set_irq_handler(i, handle_level_irq);
  126. set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
  127. /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
  128. if (i < 8)
  129. at91_sys_write(AT91_AIC_EOICR, 0);
  130. }
  131. /*
  132. * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
  133. * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
  134. */
  135. at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
  136. /* No debugging in AIC: Debug (Protect) Control Register */
  137. at91_sys_write(AT91_AIC_DCR, 0);
  138. /* Disable and clear all interrupts initially */
  139. at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
  140. at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
  141. }