at91sam9261_devices.c 19 KB

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  1. /*
  2. * arch/arm/mach-at91/at91sam9261_devices.c
  3. *
  4. * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
  5. * Copyright (C) 2005 David Brownell
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #include <asm/mach/arch.h>
  14. #include <asm/mach/map.h>
  15. #include <linux/platform_device.h>
  16. #include <video/atmel_lcdc.h>
  17. #include <asm/arch/board.h>
  18. #include <asm/arch/gpio.h>
  19. #include <asm/arch/at91sam9261.h>
  20. #include <asm/arch/at91sam9261_matrix.h>
  21. #include <asm/arch/at91sam926x_mc.h>
  22. #include "generic.h"
  23. /* --------------------------------------------------------------------
  24. * USB Host
  25. * -------------------------------------------------------------------- */
  26. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  27. static u64 ohci_dmamask = 0xffffffffUL;
  28. static struct at91_usbh_data usbh_data;
  29. static struct resource usbh_resources[] = {
  30. [0] = {
  31. .start = AT91SAM9261_UHP_BASE,
  32. .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
  33. .flags = IORESOURCE_MEM,
  34. },
  35. [1] = {
  36. .start = AT91SAM9261_ID_UHP,
  37. .end = AT91SAM9261_ID_UHP,
  38. .flags = IORESOURCE_IRQ,
  39. },
  40. };
  41. static struct platform_device at91sam9261_usbh_device = {
  42. .name = "at91_ohci",
  43. .id = -1,
  44. .dev = {
  45. .dma_mask = &ohci_dmamask,
  46. .coherent_dma_mask = 0xffffffff,
  47. .platform_data = &usbh_data,
  48. },
  49. .resource = usbh_resources,
  50. .num_resources = ARRAY_SIZE(usbh_resources),
  51. };
  52. void __init at91_add_device_usbh(struct at91_usbh_data *data)
  53. {
  54. if (!data)
  55. return;
  56. usbh_data = *data;
  57. platform_device_register(&at91sam9261_usbh_device);
  58. }
  59. #else
  60. void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  61. #endif
  62. /* --------------------------------------------------------------------
  63. * USB Device (Gadget)
  64. * -------------------------------------------------------------------- */
  65. #ifdef CONFIG_USB_GADGET_AT91
  66. static struct at91_udc_data udc_data;
  67. static struct resource udc_resources[] = {
  68. [0] = {
  69. .start = AT91SAM9261_BASE_UDP,
  70. .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. [1] = {
  74. .start = AT91SAM9261_ID_UDP,
  75. .end = AT91SAM9261_ID_UDP,
  76. .flags = IORESOURCE_IRQ,
  77. },
  78. };
  79. static struct platform_device at91sam9261_udc_device = {
  80. .name = "at91_udc",
  81. .id = -1,
  82. .dev = {
  83. .platform_data = &udc_data,
  84. },
  85. .resource = udc_resources,
  86. .num_resources = ARRAY_SIZE(udc_resources),
  87. };
  88. void __init at91_add_device_udc(struct at91_udc_data *data)
  89. {
  90. unsigned long x;
  91. if (!data)
  92. return;
  93. if (data->vbus_pin) {
  94. at91_set_gpio_input(data->vbus_pin, 0);
  95. at91_set_deglitch(data->vbus_pin, 1);
  96. }
  97. /* Pullup pin is handled internally */
  98. x = at91_sys_read(AT91_MATRIX_USBPUCR);
  99. at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
  100. udc_data = *data;
  101. platform_device_register(&at91sam9261_udc_device);
  102. }
  103. #else
  104. void __init at91_add_device_udc(struct at91_udc_data *data) {}
  105. #endif
  106. /* --------------------------------------------------------------------
  107. * MMC / SD
  108. * -------------------------------------------------------------------- */
  109. #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
  110. static u64 mmc_dmamask = 0xffffffffUL;
  111. static struct at91_mmc_data mmc_data;
  112. static struct resource mmc_resources[] = {
  113. [0] = {
  114. .start = AT91SAM9261_BASE_MCI,
  115. .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. [1] = {
  119. .start = AT91SAM9261_ID_MCI,
  120. .end = AT91SAM9261_ID_MCI,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. static struct platform_device at91sam9261_mmc_device = {
  125. .name = "at91_mci",
  126. .id = -1,
  127. .dev = {
  128. .dma_mask = &mmc_dmamask,
  129. .coherent_dma_mask = 0xffffffff,
  130. .platform_data = &mmc_data,
  131. },
  132. .resource = mmc_resources,
  133. .num_resources = ARRAY_SIZE(mmc_resources),
  134. };
  135. void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
  136. {
  137. if (!data)
  138. return;
  139. /* input/irq */
  140. if (data->det_pin) {
  141. at91_set_gpio_input(data->det_pin, 1);
  142. at91_set_deglitch(data->det_pin, 1);
  143. }
  144. if (data->wp_pin)
  145. at91_set_gpio_input(data->wp_pin, 1);
  146. if (data->vcc_pin)
  147. at91_set_gpio_output(data->vcc_pin, 0);
  148. /* CLK */
  149. at91_set_B_periph(AT91_PIN_PA2, 0);
  150. /* CMD */
  151. at91_set_B_periph(AT91_PIN_PA1, 1);
  152. /* DAT0, maybe DAT1..DAT3 */
  153. at91_set_B_periph(AT91_PIN_PA0, 1);
  154. if (data->wire4) {
  155. at91_set_B_periph(AT91_PIN_PA4, 1);
  156. at91_set_B_periph(AT91_PIN_PA5, 1);
  157. at91_set_B_periph(AT91_PIN_PA6, 1);
  158. }
  159. mmc_data = *data;
  160. platform_device_register(&at91sam9261_mmc_device);
  161. }
  162. #else
  163. void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
  164. #endif
  165. /* --------------------------------------------------------------------
  166. * NAND / SmartMedia
  167. * -------------------------------------------------------------------- */
  168. #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
  169. static struct at91_nand_data nand_data;
  170. #define NAND_BASE AT91_CHIPSELECT_3
  171. static struct resource nand_resources[] = {
  172. {
  173. .start = NAND_BASE,
  174. .end = NAND_BASE + SZ_256M - 1,
  175. .flags = IORESOURCE_MEM,
  176. }
  177. };
  178. static struct platform_device at91_nand_device = {
  179. .name = "at91_nand",
  180. .id = -1,
  181. .dev = {
  182. .platform_data = &nand_data,
  183. },
  184. .resource = nand_resources,
  185. .num_resources = ARRAY_SIZE(nand_resources),
  186. };
  187. void __init at91_add_device_nand(struct at91_nand_data *data)
  188. {
  189. unsigned long csa, mode;
  190. if (!data)
  191. return;
  192. csa = at91_sys_read(AT91_MATRIX_EBICSA);
  193. at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
  194. /* set the bus interface characteristics */
  195. at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
  196. | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
  197. at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
  198. | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
  199. at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
  200. if (data->bus_width_16)
  201. mode = AT91_SMC_DBW_16;
  202. else
  203. mode = AT91_SMC_DBW_8;
  204. at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
  205. /* enable pin */
  206. if (data->enable_pin)
  207. at91_set_gpio_output(data->enable_pin, 1);
  208. /* ready/busy pin */
  209. if (data->rdy_pin)
  210. at91_set_gpio_input(data->rdy_pin, 1);
  211. /* card detect pin */
  212. if (data->det_pin)
  213. at91_set_gpio_input(data->det_pin, 1);
  214. at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
  215. at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
  216. nand_data = *data;
  217. platform_device_register(&at91_nand_device);
  218. }
  219. #else
  220. void __init at91_add_device_nand(struct at91_nand_data *data) {}
  221. #endif
  222. /* --------------------------------------------------------------------
  223. * TWI (i2c)
  224. * -------------------------------------------------------------------- */
  225. #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
  226. static struct resource twi_resources[] = {
  227. [0] = {
  228. .start = AT91SAM9261_BASE_TWI,
  229. .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
  230. .flags = IORESOURCE_MEM,
  231. },
  232. [1] = {
  233. .start = AT91SAM9261_ID_TWI,
  234. .end = AT91SAM9261_ID_TWI,
  235. .flags = IORESOURCE_IRQ,
  236. },
  237. };
  238. static struct platform_device at91sam9261_twi_device = {
  239. .name = "at91_i2c",
  240. .id = -1,
  241. .resource = twi_resources,
  242. .num_resources = ARRAY_SIZE(twi_resources),
  243. };
  244. void __init at91_add_device_i2c(void)
  245. {
  246. /* pins used for TWI interface */
  247. at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
  248. at91_set_multi_drive(AT91_PIN_PA7, 1);
  249. at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
  250. at91_set_multi_drive(AT91_PIN_PA8, 1);
  251. platform_device_register(&at91sam9261_twi_device);
  252. }
  253. #else
  254. void __init at91_add_device_i2c(void) {}
  255. #endif
  256. /* --------------------------------------------------------------------
  257. * SPI
  258. * -------------------------------------------------------------------- */
  259. #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
  260. static u64 spi_dmamask = 0xffffffffUL;
  261. static struct resource spi0_resources[] = {
  262. [0] = {
  263. .start = AT91SAM9261_BASE_SPI0,
  264. .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
  265. .flags = IORESOURCE_MEM,
  266. },
  267. [1] = {
  268. .start = AT91SAM9261_ID_SPI0,
  269. .end = AT91SAM9261_ID_SPI0,
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. };
  273. static struct platform_device at91sam9261_spi0_device = {
  274. .name = "atmel_spi",
  275. .id = 0,
  276. .dev = {
  277. .dma_mask = &spi_dmamask,
  278. .coherent_dma_mask = 0xffffffff,
  279. },
  280. .resource = spi0_resources,
  281. .num_resources = ARRAY_SIZE(spi0_resources),
  282. };
  283. static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
  284. static struct resource spi1_resources[] = {
  285. [0] = {
  286. .start = AT91SAM9261_BASE_SPI1,
  287. .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
  288. .flags = IORESOURCE_MEM,
  289. },
  290. [1] = {
  291. .start = AT91SAM9261_ID_SPI1,
  292. .end = AT91SAM9261_ID_SPI1,
  293. .flags = IORESOURCE_IRQ,
  294. },
  295. };
  296. static struct platform_device at91sam9261_spi1_device = {
  297. .name = "atmel_spi",
  298. .id = 1,
  299. .dev = {
  300. .dma_mask = &spi_dmamask,
  301. .coherent_dma_mask = 0xffffffff,
  302. },
  303. .resource = spi1_resources,
  304. .num_resources = ARRAY_SIZE(spi1_resources),
  305. };
  306. static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
  307. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  308. {
  309. int i;
  310. unsigned long cs_pin;
  311. short enable_spi0 = 0;
  312. short enable_spi1 = 0;
  313. /* Choose SPI chip-selects */
  314. for (i = 0; i < nr_devices; i++) {
  315. if (devices[i].controller_data)
  316. cs_pin = (unsigned long) devices[i].controller_data;
  317. else if (devices[i].bus_num == 0)
  318. cs_pin = spi0_standard_cs[devices[i].chip_select];
  319. else
  320. cs_pin = spi1_standard_cs[devices[i].chip_select];
  321. if (devices[i].bus_num == 0)
  322. enable_spi0 = 1;
  323. else
  324. enable_spi1 = 1;
  325. /* enable chip-select pin */
  326. at91_set_gpio_output(cs_pin, 1);
  327. /* pass chip-select pin to driver */
  328. devices[i].controller_data = (void *) cs_pin;
  329. }
  330. spi_register_board_info(devices, nr_devices);
  331. /* Configure SPI bus(es) */
  332. if (enable_spi0) {
  333. at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  334. at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  335. at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  336. at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
  337. platform_device_register(&at91sam9261_spi0_device);
  338. }
  339. if (enable_spi1) {
  340. at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
  341. at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
  342. at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
  343. at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
  344. platform_device_register(&at91sam9261_spi1_device);
  345. }
  346. }
  347. #else
  348. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
  349. #endif
  350. /* --------------------------------------------------------------------
  351. * LCD Controller
  352. * -------------------------------------------------------------------- */
  353. #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
  354. static u64 lcdc_dmamask = 0xffffffffUL;
  355. static struct atmel_lcdfb_info lcdc_data;
  356. static struct resource lcdc_resources[] = {
  357. [0] = {
  358. .start = AT91SAM9261_LCDC_BASE,
  359. .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. [1] = {
  363. .start = AT91SAM9261_ID_LCDC,
  364. .end = AT91SAM9261_ID_LCDC,
  365. .flags = IORESOURCE_IRQ,
  366. },
  367. #if defined(CONFIG_FB_INTSRAM)
  368. [2] = {
  369. .start = AT91SAM9261_SRAM_BASE,
  370. .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
  371. .flags = IORESOURCE_MEM,
  372. },
  373. #endif
  374. };
  375. static struct platform_device at91_lcdc_device = {
  376. .name = "atmel_lcdfb",
  377. .id = 0,
  378. .dev = {
  379. .dma_mask = &lcdc_dmamask,
  380. .coherent_dma_mask = 0xffffffff,
  381. .platform_data = &lcdc_data,
  382. },
  383. .resource = lcdc_resources,
  384. .num_resources = ARRAY_SIZE(lcdc_resources),
  385. };
  386. void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
  387. {
  388. if (!data) {
  389. return;
  390. }
  391. at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
  392. at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
  393. at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
  394. at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
  395. at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
  396. at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
  397. at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
  398. at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
  399. at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
  400. at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
  401. at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
  402. at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
  403. at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
  404. at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
  405. at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
  406. at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
  407. at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
  408. at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
  409. at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
  410. at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
  411. at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
  412. at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
  413. lcdc_data = *data;
  414. platform_device_register(&at91_lcdc_device);
  415. }
  416. #else
  417. void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
  418. #endif
  419. /* --------------------------------------------------------------------
  420. * LEDs
  421. * -------------------------------------------------------------------- */
  422. #if defined(CONFIG_LEDS)
  423. u8 at91_leds_cpu;
  424. u8 at91_leds_timer;
  425. void __init at91_init_leds(u8 cpu_led, u8 timer_led)
  426. {
  427. /* Enable GPIO to access the LEDs */
  428. at91_set_gpio_output(cpu_led, 1);
  429. at91_set_gpio_output(timer_led, 1);
  430. at91_leds_cpu = cpu_led;
  431. at91_leds_timer = timer_led;
  432. }
  433. #else
  434. void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
  435. #endif
  436. /* --------------------------------------------------------------------
  437. * UART
  438. * -------------------------------------------------------------------- */
  439. #if defined(CONFIG_SERIAL_ATMEL)
  440. static struct resource dbgu_resources[] = {
  441. [0] = {
  442. .start = AT91_VA_BASE_SYS + AT91_DBGU,
  443. .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
  444. .flags = IORESOURCE_MEM,
  445. },
  446. [1] = {
  447. .start = AT91_ID_SYS,
  448. .end = AT91_ID_SYS,
  449. .flags = IORESOURCE_IRQ,
  450. },
  451. };
  452. static struct atmel_uart_data dbgu_data = {
  453. .use_dma_tx = 0,
  454. .use_dma_rx = 0, /* DBGU not capable of receive DMA */
  455. .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
  456. };
  457. static struct platform_device at91sam9261_dbgu_device = {
  458. .name = "atmel_usart",
  459. .id = 0,
  460. .dev = {
  461. .platform_data = &dbgu_data,
  462. .coherent_dma_mask = 0xffffffff,
  463. },
  464. .resource = dbgu_resources,
  465. .num_resources = ARRAY_SIZE(dbgu_resources),
  466. };
  467. static inline void configure_dbgu_pins(void)
  468. {
  469. at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
  470. at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
  471. }
  472. static struct resource uart0_resources[] = {
  473. [0] = {
  474. .start = AT91SAM9261_BASE_US0,
  475. .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
  476. .flags = IORESOURCE_MEM,
  477. },
  478. [1] = {
  479. .start = AT91SAM9261_ID_US0,
  480. .end = AT91SAM9261_ID_US0,
  481. .flags = IORESOURCE_IRQ,
  482. },
  483. };
  484. static struct atmel_uart_data uart0_data = {
  485. .use_dma_tx = 1,
  486. .use_dma_rx = 1,
  487. };
  488. static struct platform_device at91sam9261_uart0_device = {
  489. .name = "atmel_usart",
  490. .id = 1,
  491. .dev = {
  492. .platform_data = &uart0_data,
  493. .coherent_dma_mask = 0xffffffff,
  494. },
  495. .resource = uart0_resources,
  496. .num_resources = ARRAY_SIZE(uart0_resources),
  497. };
  498. static inline void configure_usart0_pins(void)
  499. {
  500. at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
  501. at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
  502. at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
  503. at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
  504. }
  505. static struct resource uart1_resources[] = {
  506. [0] = {
  507. .start = AT91SAM9261_BASE_US1,
  508. .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
  509. .flags = IORESOURCE_MEM,
  510. },
  511. [1] = {
  512. .start = AT91SAM9261_ID_US1,
  513. .end = AT91SAM9261_ID_US1,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. };
  517. static struct atmel_uart_data uart1_data = {
  518. .use_dma_tx = 1,
  519. .use_dma_rx = 1,
  520. };
  521. static struct platform_device at91sam9261_uart1_device = {
  522. .name = "atmel_usart",
  523. .id = 2,
  524. .dev = {
  525. .platform_data = &uart1_data,
  526. .coherent_dma_mask = 0xffffffff,
  527. },
  528. .resource = uart1_resources,
  529. .num_resources = ARRAY_SIZE(uart1_resources),
  530. };
  531. static inline void configure_usart1_pins(void)
  532. {
  533. at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
  534. at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
  535. }
  536. static struct resource uart2_resources[] = {
  537. [0] = {
  538. .start = AT91SAM9261_BASE_US2,
  539. .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
  540. .flags = IORESOURCE_MEM,
  541. },
  542. [1] = {
  543. .start = AT91SAM9261_ID_US2,
  544. .end = AT91SAM9261_ID_US2,
  545. .flags = IORESOURCE_IRQ,
  546. },
  547. };
  548. static struct atmel_uart_data uart2_data = {
  549. .use_dma_tx = 1,
  550. .use_dma_rx = 1,
  551. };
  552. static struct platform_device at91sam9261_uart2_device = {
  553. .name = "atmel_usart",
  554. .id = 3,
  555. .dev = {
  556. .platform_data = &uart2_data,
  557. .coherent_dma_mask = 0xffffffff,
  558. },
  559. .resource = uart2_resources,
  560. .num_resources = ARRAY_SIZE(uart2_resources),
  561. };
  562. static inline void configure_usart2_pins(void)
  563. {
  564. at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
  565. at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
  566. }
  567. struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
  568. struct platform_device *atmel_default_console_device; /* the serial console device */
  569. void __init at91_init_serial(struct at91_uart_config *config)
  570. {
  571. int i;
  572. /* Fill in list of supported UARTs */
  573. for (i = 0; i < config->nr_tty; i++) {
  574. switch (config->tty_map[i]) {
  575. case 0:
  576. configure_usart0_pins();
  577. at91_uarts[i] = &at91sam9261_uart0_device;
  578. at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
  579. break;
  580. case 1:
  581. configure_usart1_pins();
  582. at91_uarts[i] = &at91sam9261_uart1_device;
  583. at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
  584. break;
  585. case 2:
  586. configure_usart2_pins();
  587. at91_uarts[i] = &at91sam9261_uart2_device;
  588. at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
  589. break;
  590. case 3:
  591. configure_dbgu_pins();
  592. at91_uarts[i] = &at91sam9261_dbgu_device;
  593. at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
  594. break;
  595. default:
  596. continue;
  597. }
  598. at91_uarts[i]->id = i; /* update ID number to mapped ID */
  599. }
  600. /* Set serial console device */
  601. if (config->console_tty < ATMEL_MAX_UART)
  602. atmel_default_console_device = at91_uarts[config->console_tty];
  603. if (!atmel_default_console_device)
  604. printk(KERN_INFO "AT91: No default serial console defined.\n");
  605. }
  606. void __init at91_add_device_serial(void)
  607. {
  608. int i;
  609. for (i = 0; i < ATMEL_MAX_UART; i++) {
  610. if (at91_uarts[i])
  611. platform_device_register(at91_uarts[i]);
  612. }
  613. }
  614. #else
  615. void __init at91_init_serial(struct at91_uart_config *config) {}
  616. void __init at91_add_device_serial(void) {}
  617. #endif
  618. /* -------------------------------------------------------------------- */
  619. /*
  620. * These devices are always present and don't need any board-specific
  621. * setup.
  622. */
  623. static int __init at91_add_standard_devices(void)
  624. {
  625. return 0;
  626. }
  627. arch_initcall(at91_add_standard_devices);