ptrace.c 18 KB

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  1. /*
  2. * linux/arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/mm.h>
  15. #include <linux/smp.h>
  16. #include <linux/ptrace.h>
  17. #include <linux/user.h>
  18. #include <linux/security.h>
  19. #include <linux/init.h>
  20. #include <linux/signal.h>
  21. #include <asm/uaccess.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/system.h>
  24. #include <asm/traps.h>
  25. #include "ptrace.h"
  26. #define REG_PC 15
  27. #define REG_PSR 16
  28. /*
  29. * does not yet catch signals sent when the child dies.
  30. * in exit.c or in signal.c.
  31. */
  32. #if 0
  33. /*
  34. * Breakpoint SWI instruction: SWI &9F0001
  35. */
  36. #define BREAKINST_ARM 0xef9f0001
  37. #define BREAKINST_THUMB 0xdf00 /* fill this in later */
  38. #else
  39. /*
  40. * New breakpoints - use an undefined instruction. The ARM architecture
  41. * reference manual guarantees that the following instruction space
  42. * will produce an undefined instruction exception on all CPUs:
  43. *
  44. * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
  45. * Thumb: 1101 1110 xxxx xxxx
  46. */
  47. #define BREAKINST_ARM 0xe7f001f0
  48. #define BREAKINST_THUMB 0xde01
  49. #endif
  50. /*
  51. * this routine will get a word off of the processes privileged stack.
  52. * the offset is how far from the base addr as stored in the THREAD.
  53. * this routine assumes that all the privileged stacks are in our
  54. * data space.
  55. */
  56. static inline long get_user_reg(struct task_struct *task, int offset)
  57. {
  58. return task_pt_regs(task)->uregs[offset];
  59. }
  60. /*
  61. * this routine will put a word on the processes privileged stack.
  62. * the offset is how far from the base addr as stored in the THREAD.
  63. * this routine assumes that all the privileged stacks are in our
  64. * data space.
  65. */
  66. static inline int
  67. put_user_reg(struct task_struct *task, int offset, long data)
  68. {
  69. struct pt_regs newregs, *regs = task_pt_regs(task);
  70. int ret = -EINVAL;
  71. newregs = *regs;
  72. newregs.uregs[offset] = data;
  73. if (valid_user_regs(&newregs)) {
  74. regs->uregs[offset] = data;
  75. ret = 0;
  76. }
  77. return ret;
  78. }
  79. static inline int
  80. read_u32(struct task_struct *task, unsigned long addr, u32 *res)
  81. {
  82. int ret;
  83. ret = access_process_vm(task, addr, res, sizeof(*res), 0);
  84. return ret == sizeof(*res) ? 0 : -EIO;
  85. }
  86. static inline int
  87. read_instr(struct task_struct *task, unsigned long addr, u32 *res)
  88. {
  89. int ret;
  90. if (addr & 1) {
  91. u16 val;
  92. ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
  93. ret = ret == sizeof(val) ? 0 : -EIO;
  94. *res = val;
  95. } else {
  96. u32 val;
  97. ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
  98. ret = ret == sizeof(val) ? 0 : -EIO;
  99. *res = val;
  100. }
  101. return ret;
  102. }
  103. /*
  104. * Get value of register `rn' (in the instruction)
  105. */
  106. static unsigned long
  107. ptrace_getrn(struct task_struct *child, unsigned long insn)
  108. {
  109. unsigned int reg = (insn >> 16) & 15;
  110. unsigned long val;
  111. val = get_user_reg(child, reg);
  112. if (reg == 15)
  113. val = pc_pointer(val + 8);
  114. return val;
  115. }
  116. /*
  117. * Get value of operand 2 (in an ALU instruction)
  118. */
  119. static unsigned long
  120. ptrace_getaluop2(struct task_struct *child, unsigned long insn)
  121. {
  122. unsigned long val;
  123. int shift;
  124. int type;
  125. if (insn & 1 << 25) {
  126. val = insn & 255;
  127. shift = (insn >> 8) & 15;
  128. type = 3;
  129. } else {
  130. val = get_user_reg (child, insn & 15);
  131. if (insn & (1 << 4))
  132. shift = (int)get_user_reg (child, (insn >> 8) & 15);
  133. else
  134. shift = (insn >> 7) & 31;
  135. type = (insn >> 5) & 3;
  136. }
  137. switch (type) {
  138. case 0: val <<= shift; break;
  139. case 1: val >>= shift; break;
  140. case 2:
  141. val = (((signed long)val) >> shift);
  142. break;
  143. case 3:
  144. val = (val >> shift) | (val << (32 - shift));
  145. break;
  146. }
  147. return val;
  148. }
  149. /*
  150. * Get value of operand 2 (in a LDR instruction)
  151. */
  152. static unsigned long
  153. ptrace_getldrop2(struct task_struct *child, unsigned long insn)
  154. {
  155. unsigned long val;
  156. int shift;
  157. int type;
  158. val = get_user_reg(child, insn & 15);
  159. shift = (insn >> 7) & 31;
  160. type = (insn >> 5) & 3;
  161. switch (type) {
  162. case 0: val <<= shift; break;
  163. case 1: val >>= shift; break;
  164. case 2:
  165. val = (((signed long)val) >> shift);
  166. break;
  167. case 3:
  168. val = (val >> shift) | (val << (32 - shift));
  169. break;
  170. }
  171. return val;
  172. }
  173. #define OP_MASK 0x01e00000
  174. #define OP_AND 0x00000000
  175. #define OP_EOR 0x00200000
  176. #define OP_SUB 0x00400000
  177. #define OP_RSB 0x00600000
  178. #define OP_ADD 0x00800000
  179. #define OP_ADC 0x00a00000
  180. #define OP_SBC 0x00c00000
  181. #define OP_RSC 0x00e00000
  182. #define OP_ORR 0x01800000
  183. #define OP_MOV 0x01a00000
  184. #define OP_BIC 0x01c00000
  185. #define OP_MVN 0x01e00000
  186. static unsigned long
  187. get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
  188. {
  189. u32 alt = 0;
  190. switch (insn & 0x0e000000) {
  191. case 0x00000000:
  192. case 0x02000000: {
  193. /*
  194. * data processing
  195. */
  196. long aluop1, aluop2, ccbit;
  197. if ((insn & 0x0fffffd0) == 0x012fff10) {
  198. /*
  199. * bx or blx
  200. */
  201. alt = get_user_reg(child, insn & 15);
  202. break;
  203. }
  204. if ((insn & 0xf000) != 0xf000)
  205. break;
  206. aluop1 = ptrace_getrn(child, insn);
  207. aluop2 = ptrace_getaluop2(child, insn);
  208. ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
  209. switch (insn & OP_MASK) {
  210. case OP_AND: alt = aluop1 & aluop2; break;
  211. case OP_EOR: alt = aluop1 ^ aluop2; break;
  212. case OP_SUB: alt = aluop1 - aluop2; break;
  213. case OP_RSB: alt = aluop2 - aluop1; break;
  214. case OP_ADD: alt = aluop1 + aluop2; break;
  215. case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
  216. case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
  217. case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
  218. case OP_ORR: alt = aluop1 | aluop2; break;
  219. case OP_MOV: alt = aluop2; break;
  220. case OP_BIC: alt = aluop1 & ~aluop2; break;
  221. case OP_MVN: alt = ~aluop2; break;
  222. }
  223. break;
  224. }
  225. case 0x04000000:
  226. case 0x06000000:
  227. /*
  228. * ldr
  229. */
  230. if ((insn & 0x0010f000) == 0x0010f000) {
  231. unsigned long base;
  232. base = ptrace_getrn(child, insn);
  233. if (insn & 1 << 24) {
  234. long aluop2;
  235. if (insn & 0x02000000)
  236. aluop2 = ptrace_getldrop2(child, insn);
  237. else
  238. aluop2 = insn & 0xfff;
  239. if (insn & 1 << 23)
  240. base += aluop2;
  241. else
  242. base -= aluop2;
  243. }
  244. if (read_u32(child, base, &alt) == 0)
  245. alt = pc_pointer(alt);
  246. }
  247. break;
  248. case 0x08000000:
  249. /*
  250. * ldm
  251. */
  252. if ((insn & 0x00108000) == 0x00108000) {
  253. unsigned long base;
  254. unsigned int nr_regs;
  255. if (insn & (1 << 23)) {
  256. nr_regs = hweight16(insn & 65535) << 2;
  257. if (!(insn & (1 << 24)))
  258. nr_regs -= 4;
  259. } else {
  260. if (insn & (1 << 24))
  261. nr_regs = -4;
  262. else
  263. nr_regs = 0;
  264. }
  265. base = ptrace_getrn(child, insn);
  266. if (read_u32(child, base + nr_regs, &alt) == 0)
  267. alt = pc_pointer(alt);
  268. break;
  269. }
  270. break;
  271. case 0x0a000000: {
  272. /*
  273. * bl or b
  274. */
  275. signed long displ;
  276. /* It's a branch/branch link: instead of trying to
  277. * figure out whether the branch will be taken or not,
  278. * we'll put a breakpoint at both locations. This is
  279. * simpler, more reliable, and probably not a whole lot
  280. * slower than the alternative approach of emulating the
  281. * branch.
  282. */
  283. displ = (insn & 0x00ffffff) << 8;
  284. displ = (displ >> 6) + 8;
  285. if (displ != 0 && displ != 4)
  286. alt = pc + displ;
  287. }
  288. break;
  289. }
  290. return alt;
  291. }
  292. static int
  293. swap_insn(struct task_struct *task, unsigned long addr,
  294. void *old_insn, void *new_insn, int size)
  295. {
  296. int ret;
  297. ret = access_process_vm(task, addr, old_insn, size, 0);
  298. if (ret == size)
  299. ret = access_process_vm(task, addr, new_insn, size, 1);
  300. return ret;
  301. }
  302. static void
  303. add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
  304. {
  305. int nr = dbg->nsaved;
  306. if (nr < 2) {
  307. u32 new_insn = BREAKINST_ARM;
  308. int res;
  309. res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
  310. if (res == 4) {
  311. dbg->bp[nr].address = addr;
  312. dbg->nsaved += 1;
  313. }
  314. } else
  315. printk(KERN_ERR "ptrace: too many breakpoints\n");
  316. }
  317. /*
  318. * Clear one breakpoint in the user program. We copy what the hardware
  319. * does and use bit 0 of the address to indicate whether this is a Thumb
  320. * breakpoint or an ARM breakpoint.
  321. */
  322. static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
  323. {
  324. unsigned long addr = bp->address;
  325. union debug_insn old_insn;
  326. int ret;
  327. if (addr & 1) {
  328. ret = swap_insn(task, addr & ~1, &old_insn.thumb,
  329. &bp->insn.thumb, 2);
  330. if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
  331. printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
  332. "0x%08lx (0x%04x)\n", task->comm, task->pid,
  333. addr, old_insn.thumb);
  334. } else {
  335. ret = swap_insn(task, addr & ~3, &old_insn.arm,
  336. &bp->insn.arm, 4);
  337. if (ret != 4 || old_insn.arm != BREAKINST_ARM)
  338. printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
  339. "0x%08lx (0x%08x)\n", task->comm, task->pid,
  340. addr, old_insn.arm);
  341. }
  342. }
  343. void ptrace_set_bpt(struct task_struct *child)
  344. {
  345. struct pt_regs *regs;
  346. unsigned long pc;
  347. u32 insn;
  348. int res;
  349. regs = task_pt_regs(child);
  350. pc = instruction_pointer(regs);
  351. if (thumb_mode(regs)) {
  352. printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
  353. return;
  354. }
  355. res = read_instr(child, pc, &insn);
  356. if (!res) {
  357. struct debug_info *dbg = &child->thread.debug;
  358. unsigned long alt;
  359. dbg->nsaved = 0;
  360. alt = get_branch_address(child, pc, insn);
  361. if (alt)
  362. add_breakpoint(child, dbg, alt);
  363. /*
  364. * Note that we ignore the result of setting the above
  365. * breakpoint since it may fail. When it does, this is
  366. * not so much an error, but a forewarning that we may
  367. * be receiving a prefetch abort shortly.
  368. *
  369. * If we don't set this breakpoint here, then we can
  370. * lose control of the thread during single stepping.
  371. */
  372. if (!alt || predicate(insn) != PREDICATE_ALWAYS)
  373. add_breakpoint(child, dbg, pc + 4);
  374. }
  375. }
  376. /*
  377. * Ensure no single-step breakpoint is pending. Returns non-zero
  378. * value if child was being single-stepped.
  379. */
  380. void ptrace_cancel_bpt(struct task_struct *child)
  381. {
  382. int i, nsaved = child->thread.debug.nsaved;
  383. child->thread.debug.nsaved = 0;
  384. if (nsaved > 2) {
  385. printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
  386. nsaved = 2;
  387. }
  388. for (i = 0; i < nsaved; i++)
  389. clear_breakpoint(child, &child->thread.debug.bp[i]);
  390. }
  391. /*
  392. * Called by kernel/ptrace.c when detaching..
  393. */
  394. void ptrace_disable(struct task_struct *child)
  395. {
  396. single_step_disable(child);
  397. }
  398. /*
  399. * Handle hitting a breakpoint.
  400. */
  401. void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
  402. {
  403. siginfo_t info;
  404. ptrace_cancel_bpt(tsk);
  405. info.si_signo = SIGTRAP;
  406. info.si_errno = 0;
  407. info.si_code = TRAP_BRKPT;
  408. info.si_addr = (void __user *)instruction_pointer(regs);
  409. force_sig_info(SIGTRAP, &info, tsk);
  410. }
  411. static int break_trap(struct pt_regs *regs, unsigned int instr)
  412. {
  413. ptrace_break(current, regs);
  414. return 0;
  415. }
  416. static struct undef_hook arm_break_hook = {
  417. .instr_mask = 0x0fffffff,
  418. .instr_val = 0x07f001f0,
  419. .cpsr_mask = PSR_T_BIT,
  420. .cpsr_val = 0,
  421. .fn = break_trap,
  422. };
  423. static struct undef_hook thumb_break_hook = {
  424. .instr_mask = 0xffff,
  425. .instr_val = 0xde01,
  426. .cpsr_mask = PSR_T_BIT,
  427. .cpsr_val = PSR_T_BIT,
  428. .fn = break_trap,
  429. };
  430. static int __init ptrace_break_init(void)
  431. {
  432. register_undef_hook(&arm_break_hook);
  433. register_undef_hook(&thumb_break_hook);
  434. return 0;
  435. }
  436. core_initcall(ptrace_break_init);
  437. /*
  438. * Read the word at offset "off" into the "struct user". We
  439. * actually access the pt_regs stored on the kernel stack.
  440. */
  441. static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
  442. unsigned long __user *ret)
  443. {
  444. unsigned long tmp;
  445. if (off & 3 || off >= sizeof(struct user))
  446. return -EIO;
  447. tmp = 0;
  448. if (off < sizeof(struct pt_regs))
  449. tmp = get_user_reg(tsk, off >> 2);
  450. return put_user(tmp, ret);
  451. }
  452. /*
  453. * Write the word at offset "off" into "struct user". We
  454. * actually access the pt_regs stored on the kernel stack.
  455. */
  456. static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
  457. unsigned long val)
  458. {
  459. if (off & 3 || off >= sizeof(struct user))
  460. return -EIO;
  461. if (off >= sizeof(struct pt_regs))
  462. return 0;
  463. return put_user_reg(tsk, off >> 2, val);
  464. }
  465. /*
  466. * Get all user integer registers.
  467. */
  468. static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
  469. {
  470. struct pt_regs *regs = task_pt_regs(tsk);
  471. return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
  472. }
  473. /*
  474. * Set all user integer registers.
  475. */
  476. static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
  477. {
  478. struct pt_regs newregs;
  479. int ret;
  480. ret = -EFAULT;
  481. if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
  482. struct pt_regs *regs = task_pt_regs(tsk);
  483. ret = -EINVAL;
  484. if (valid_user_regs(&newregs)) {
  485. *regs = newregs;
  486. ret = 0;
  487. }
  488. }
  489. return ret;
  490. }
  491. /*
  492. * Get the child FPU state.
  493. */
  494. static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
  495. {
  496. return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
  497. sizeof(struct user_fp)) ? -EFAULT : 0;
  498. }
  499. /*
  500. * Set the child FPU state.
  501. */
  502. static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
  503. {
  504. struct thread_info *thread = task_thread_info(tsk);
  505. thread->used_cp[1] = thread->used_cp[2] = 1;
  506. return copy_from_user(&thread->fpstate, ufp,
  507. sizeof(struct user_fp)) ? -EFAULT : 0;
  508. }
  509. #ifdef CONFIG_IWMMXT
  510. /*
  511. * Get the child iWMMXt state.
  512. */
  513. static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
  514. {
  515. struct thread_info *thread = task_thread_info(tsk);
  516. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  517. return -ENODATA;
  518. iwmmxt_task_disable(thread); /* force it to ram */
  519. return copy_to_user(ufp, &thread->fpstate.iwmmxt, IWMMXT_SIZE)
  520. ? -EFAULT : 0;
  521. }
  522. /*
  523. * Set the child iWMMXt state.
  524. */
  525. static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
  526. {
  527. struct thread_info *thread = task_thread_info(tsk);
  528. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  529. return -EACCES;
  530. iwmmxt_task_release(thread); /* force a reload */
  531. return copy_from_user(&thread->fpstate.iwmmxt, ufp, IWMMXT_SIZE)
  532. ? -EFAULT : 0;
  533. }
  534. #endif
  535. #ifdef CONFIG_CRUNCH
  536. /*
  537. * Get the child Crunch state.
  538. */
  539. static int ptrace_getcrunchregs(struct task_struct *tsk, void __user *ufp)
  540. {
  541. struct thread_info *thread = task_thread_info(tsk);
  542. crunch_task_disable(thread); /* force it to ram */
  543. return copy_to_user(ufp, &thread->crunchstate, CRUNCH_SIZE)
  544. ? -EFAULT : 0;
  545. }
  546. /*
  547. * Set the child Crunch state.
  548. */
  549. static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp)
  550. {
  551. struct thread_info *thread = task_thread_info(tsk);
  552. crunch_task_release(thread); /* force a reload */
  553. return copy_from_user(&thread->crunchstate, ufp, CRUNCH_SIZE)
  554. ? -EFAULT : 0;
  555. }
  556. #endif
  557. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  558. {
  559. int ret;
  560. switch (request) {
  561. /*
  562. * read word at location "addr" in the child process.
  563. */
  564. case PTRACE_PEEKTEXT:
  565. case PTRACE_PEEKDATA:
  566. ret = generic_ptrace_peekdata(child, addr, data);
  567. break;
  568. case PTRACE_PEEKUSR:
  569. ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
  570. break;
  571. /*
  572. * write the word at location addr.
  573. */
  574. case PTRACE_POKETEXT:
  575. case PTRACE_POKEDATA:
  576. ret = generic_ptrace_pokedata(child, addr, data);
  577. break;
  578. case PTRACE_POKEUSR:
  579. ret = ptrace_write_user(child, addr, data);
  580. break;
  581. /*
  582. * continue/restart and stop at next (return from) syscall
  583. */
  584. case PTRACE_SYSCALL:
  585. case PTRACE_CONT:
  586. ret = -EIO;
  587. if (!valid_signal(data))
  588. break;
  589. if (request == PTRACE_SYSCALL)
  590. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  591. else
  592. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  593. child->exit_code = data;
  594. single_step_disable(child);
  595. wake_up_process(child);
  596. ret = 0;
  597. break;
  598. /*
  599. * make the child exit. Best I can do is send it a sigkill.
  600. * perhaps it should be put in the status that it wants to
  601. * exit.
  602. */
  603. case PTRACE_KILL:
  604. single_step_disable(child);
  605. if (child->exit_state != EXIT_ZOMBIE) {
  606. child->exit_code = SIGKILL;
  607. wake_up_process(child);
  608. }
  609. ret = 0;
  610. break;
  611. /*
  612. * execute single instruction.
  613. */
  614. case PTRACE_SINGLESTEP:
  615. ret = -EIO;
  616. if (!valid_signal(data))
  617. break;
  618. single_step_enable(child);
  619. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  620. child->exit_code = data;
  621. /* give it a chance to run. */
  622. wake_up_process(child);
  623. ret = 0;
  624. break;
  625. case PTRACE_DETACH:
  626. ret = ptrace_detach(child, data);
  627. break;
  628. case PTRACE_GETREGS:
  629. ret = ptrace_getregs(child, (void __user *)data);
  630. break;
  631. case PTRACE_SETREGS:
  632. ret = ptrace_setregs(child, (void __user *)data);
  633. break;
  634. case PTRACE_GETFPREGS:
  635. ret = ptrace_getfpregs(child, (void __user *)data);
  636. break;
  637. case PTRACE_SETFPREGS:
  638. ret = ptrace_setfpregs(child, (void __user *)data);
  639. break;
  640. #ifdef CONFIG_IWMMXT
  641. case PTRACE_GETWMMXREGS:
  642. ret = ptrace_getwmmxregs(child, (void __user *)data);
  643. break;
  644. case PTRACE_SETWMMXREGS:
  645. ret = ptrace_setwmmxregs(child, (void __user *)data);
  646. break;
  647. #endif
  648. case PTRACE_GET_THREAD_AREA:
  649. ret = put_user(task_thread_info(child)->tp_value,
  650. (unsigned long __user *) data);
  651. break;
  652. case PTRACE_SET_SYSCALL:
  653. task_thread_info(child)->syscall = data;
  654. ret = 0;
  655. break;
  656. #ifdef CONFIG_CRUNCH
  657. case PTRACE_GETCRUNCHREGS:
  658. ret = ptrace_getcrunchregs(child, (void __user *)data);
  659. break;
  660. case PTRACE_SETCRUNCHREGS:
  661. ret = ptrace_setcrunchregs(child, (void __user *)data);
  662. break;
  663. #endif
  664. default:
  665. ret = ptrace_request(child, request, addr, data);
  666. break;
  667. }
  668. return ret;
  669. }
  670. asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
  671. {
  672. unsigned long ip;
  673. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  674. return scno;
  675. if (!(current->ptrace & PT_PTRACED))
  676. return scno;
  677. /*
  678. * Save IP. IP is used to denote syscall entry/exit:
  679. * IP = 0 -> entry, = 1 -> exit
  680. */
  681. ip = regs->ARM_ip;
  682. regs->ARM_ip = why;
  683. current_thread_info()->syscall = scno;
  684. /* the 0x80 provides a way for the tracing parent to distinguish
  685. between a syscall stop and SIGTRAP delivery */
  686. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  687. ? 0x80 : 0));
  688. /*
  689. * this isn't the same as continuing with a signal, but it will do
  690. * for normal use. strace only continues with a signal if the
  691. * stopping signal is not SIGTRAP. -brl
  692. */
  693. if (current->exit_code) {
  694. send_sig(current->exit_code, current, 1);
  695. current->exit_code = 0;
  696. }
  697. regs->ARM_ip = ip;
  698. return current_thread_info()->syscall;
  699. }