spi-summary 22 KB

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  1. Overview of Linux kernel SPI support
  2. ====================================
  3. 21-May-2007
  4. What is SPI?
  5. ------------
  6. The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
  7. link used to connect microcontrollers to sensors, memory, and peripherals.
  8. It's a simple "de facto" standard, not complicated enough to acquire a
  9. standardization body. SPI uses a master/slave configuration.
  10. The three signal wires hold a clock (SCK, often on the order of 10 MHz),
  11. and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
  12. Slave Out" (MISO) signals. (Other names are also used.) There are four
  13. clocking modes through which data is exchanged; mode-0 and mode-3 are most
  14. commonly used. Each clock cycle shifts data out and data in; the clock
  15. doesn't cycle except when there is a data bit to shift. Not all data bits
  16. are used though; not every protocol uses those full duplex capabilities.
  17. SPI masters use a fourth "chip select" line to activate a given SPI slave
  18. device, so those three signal wires may be connected to several chips
  19. in parallel. All SPI slaves support chipselects; they are usually active
  20. low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have
  21. other signals, often including an interrupt to the master.
  22. Unlike serial busses like USB or SMBus, even low level protocols for
  23. SPI slave functions are usually not interoperable between vendors
  24. (except for commodities like SPI memory chips).
  25. - SPI may be used for request/response style device protocols, as with
  26. touchscreen sensors and memory chips.
  27. - It may also be used to stream data in either direction (half duplex),
  28. or both of them at the same time (full duplex).
  29. - Some devices may use eight bit words. Others may different word
  30. lengths, such as streams of 12-bit or 20-bit digital samples.
  31. - Words are usually sent with their most significant bit (MSB) first,
  32. but sometimes the least significant bit (LSB) goes first instead.
  33. - Sometimes SPI is used to daisy-chain devices, like shift registers.
  34. In the same way, SPI slaves will only rarely support any kind of automatic
  35. discovery/enumeration protocol. The tree of slave devices accessible from
  36. a given SPI master will normally be set up manually, with configuration
  37. tables.
  38. SPI is only one of the names used by such four-wire protocols, and
  39. most controllers have no problem handling "MicroWire" (think of it as
  40. half-duplex SPI, for request/response protocols), SSP ("Synchronous
  41. Serial Protocol"), PSP ("Programmable Serial Protocol"), and other
  42. related protocols.
  43. Some chips eliminate a signal line by combining MOSI and MISO, and
  44. limiting themselves to half-duplex at the hardware level. In fact
  45. some SPI chips have this signal mode as a strapping option. These
  46. can be accessed using the same programming interface as SPI, but of
  47. course they won't handle full duplex transfers. You may find such
  48. chips described as using "three wire" signaling: SCK, data, nCSx.
  49. (That data line is sometimes called MOMI or SISO.)
  50. Microcontrollers often support both master and slave sides of the SPI
  51. protocol. This document (and Linux) currently only supports the master
  52. side of SPI interactions.
  53. Who uses it? On what kinds of systems?
  54. ---------------------------------------
  55. Linux developers using SPI are probably writing device drivers for embedded
  56. systems boards. SPI is used to control external chips, and it is also a
  57. protocol supported by every MMC or SD memory card. (The older "DataFlash"
  58. cards, predating MMC cards but using the same connectors and card shape,
  59. support only SPI.) Some PC hardware uses SPI flash for BIOS code.
  60. SPI slave chips range from digital/analog converters used for analog
  61. sensors and codecs, to memory, to peripherals like USB controllers
  62. or Ethernet adapters; and more.
  63. Most systems using SPI will integrate a few devices on a mainboard.
  64. Some provide SPI links on expansion connectors; in cases where no
  65. dedicated SPI controller exists, GPIO pins can be used to create a
  66. low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI
  67. controller; the reasons to use SPI focus on low cost and simple operation,
  68. and if dynamic reconfiguration is important, USB will often be a more
  69. appropriate low-pincount peripheral bus.
  70. Many microcontrollers that can run Linux integrate one or more I/O
  71. interfaces with SPI modes. Given SPI support, they could use MMC or SD
  72. cards without needing a special purpose MMC/SD/SDIO controller.
  73. I'm confused. What are these four SPI "clock modes"?
  74. -----------------------------------------------------
  75. It's easy to be confused here, and the vendor documentation you'll
  76. find isn't necessarily helpful. The four modes combine two mode bits:
  77. - CPOL indicates the initial clock polarity. CPOL=0 means the
  78. clock starts low, so the first (leading) edge is rising, and
  79. the second (trailing) edge is falling. CPOL=1 means the clock
  80. starts high, so the first (leading) edge is falling.
  81. - CPHA indicates the clock phase used to sample data; CPHA=0 says
  82. sample on the leading edge, CPHA=1 means the trailing edge.
  83. Since the signal needs to stablize before it's sampled, CPHA=0
  84. implies that its data is written half a clock before the first
  85. clock edge. The chipselect may have made it become available.
  86. Chip specs won't always say "uses SPI mode X" in as many words,
  87. but their timing diagrams will make the CPOL and CPHA modes clear.
  88. In the SPI mode number, CPOL is the high order bit and CPHA is the
  89. low order bit. So when a chip's timing diagram shows the clock
  90. starting low (CPOL=0) and data stabilized for sampling during the
  91. trailing clock edge (CPHA=1), that's SPI mode 1.
  92. How do these driver programming interfaces work?
  93. ------------------------------------------------
  94. The <linux/spi/spi.h> header file includes kerneldoc, as does the
  95. main source code, and you should certainly read that chapter of the
  96. kernel API document. This is just an overview, so you get the big
  97. picture before those details.
  98. SPI requests always go into I/O queues. Requests for a given SPI device
  99. are always executed in FIFO order, and complete asynchronously through
  100. completion callbacks. There are also some simple synchronous wrappers
  101. for those calls, including ones for common transaction types like writing
  102. a command and then reading its response.
  103. There are two types of SPI driver, here called:
  104. Controller drivers ... controllers may be built in to System-On-Chip
  105. processors, and often support both Master and Slave roles.
  106. These drivers touch hardware registers and may use DMA.
  107. Or they can be PIO bitbangers, needing just GPIO pins.
  108. Protocol drivers ... these pass messages through the controller
  109. driver to communicate with a Slave or Master device on the
  110. other side of an SPI link.
  111. So for example one protocol driver might talk to the MTD layer to export
  112. data to filesystems stored on SPI flash like DataFlash; and others might
  113. control audio interfaces, present touchscreen sensors as input interfaces,
  114. or monitor temperature and voltage levels during industrial processing.
  115. And those might all be sharing the same controller driver.
  116. A "struct spi_device" encapsulates the master-side interface between
  117. those two types of driver. At this writing, Linux has no slave side
  118. programming interface.
  119. There is a minimal core of SPI programming interfaces, focussing on
  120. using the driver model to connect controller and protocol drivers using
  121. device tables provided by board specific initialization code. SPI
  122. shows up in sysfs in several locations:
  123. /sys/devices/.../CTLR/spiB.C ... spi_device on bus "B",
  124. chipselect C, accessed through CTLR.
  125. /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver
  126. that should be used with this device (for hotplug/coldplug)
  127. /sys/bus/spi/devices/spiB.C ... symlink to the physical
  128. spiB.C device
  129. /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices
  130. /sys/class/spi_master/spiB ... class device for the controller
  131. managing bus "B". All the spiB.* devices share the same
  132. physical SPI bus segment, with SCLK, MOSI, and MISO.
  133. How does board-specific init code declare SPI devices?
  134. ------------------------------------------------------
  135. Linux needs several kinds of information to properly configure SPI devices.
  136. That information is normally provided by board-specific code, even for
  137. chips that do support some of automated discovery/enumeration.
  138. DECLARE CONTROLLERS
  139. The first kind of information is a list of what SPI controllers exist.
  140. For System-on-Chip (SOC) based boards, these will usually be platform
  141. devices, and the controller may need some platform_data in order to
  142. operate properly. The "struct platform_device" will include resources
  143. like the physical address of the controller's first register and its IRQ.
  144. Platforms will often abstract the "register SPI controller" operation,
  145. maybe coupling it with code to initialize pin configurations, so that
  146. the arch/.../mach-*/board-*.c files for several boards can all share the
  147. same basic controller setup code. This is because most SOCs have several
  148. SPI-capable controllers, and only the ones actually usable on a given
  149. board should normally be set up and registered.
  150. So for example arch/.../mach-*/board-*.c files might have code like:
  151. #include <asm/arch/spi.h> /* for mysoc_spi_data */
  152. /* if your mach-* infrastructure doesn't support kernels that can
  153. * run on multiple boards, pdata wouldn't benefit from "__init".
  154. */
  155. static struct mysoc_spi_data __init pdata = { ... };
  156. static __init board_init(void)
  157. {
  158. ...
  159. /* this board only uses SPI controller #2 */
  160. mysoc_register_spi(2, &pdata);
  161. ...
  162. }
  163. And SOC-specific utility code might look something like:
  164. #include <asm/arch/spi.h>
  165. static struct platform_device spi2 = { ... };
  166. void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata)
  167. {
  168. struct mysoc_spi_data *pdata2;
  169. pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL);
  170. *pdata2 = pdata;
  171. ...
  172. if (n == 2) {
  173. spi2->dev.platform_data = pdata2;
  174. register_platform_device(&spi2);
  175. /* also: set up pin modes so the spi2 signals are
  176. * visible on the relevant pins ... bootloaders on
  177. * production boards may already have done this, but
  178. * developer boards will often need Linux to do it.
  179. */
  180. }
  181. ...
  182. }
  183. Notice how the platform_data for boards may be different, even if the
  184. same SOC controller is used. For example, on one board SPI might use
  185. an external clock, where another derives the SPI clock from current
  186. settings of some master clock.
  187. DECLARE SLAVE DEVICES
  188. The second kind of information is a list of what SPI slave devices exist
  189. on the target board, often with some board-specific data needed for the
  190. driver to work correctly.
  191. Normally your arch/.../mach-*/board-*.c files would provide a small table
  192. listing the SPI devices on each board. (This would typically be only a
  193. small handful.) That might look like:
  194. static struct ads7846_platform_data ads_info = {
  195. .vref_delay_usecs = 100,
  196. .x_plate_ohms = 580,
  197. .y_plate_ohms = 410,
  198. };
  199. static struct spi_board_info spi_board_info[] __initdata = {
  200. {
  201. .modalias = "ads7846",
  202. .platform_data = &ads_info,
  203. .mode = SPI_MODE_0,
  204. .irq = GPIO_IRQ(31),
  205. .max_speed_hz = 120000 /* max sample rate at 3V */ * 16,
  206. .bus_num = 1,
  207. .chip_select = 0,
  208. },
  209. };
  210. Again, notice how board-specific information is provided; each chip may need
  211. several types. This example shows generic constraints like the fastest SPI
  212. clock to allow (a function of board voltage in this case) or how an IRQ pin
  213. is wired, plus chip-specific constraints like an important delay that's
  214. changed by the capacitance at one pin.
  215. (There's also "controller_data", information that may be useful to the
  216. controller driver. An example would be peripheral-specific DMA tuning
  217. data or chipselect callbacks. This is stored in spi_device later.)
  218. The board_info should provide enough information to let the system work
  219. without the chip's driver being loaded. The most troublesome aspect of
  220. that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since
  221. sharing a bus with a device that interprets chipselect "backwards" is
  222. not possible until the infrastructure knows how to deselect it.
  223. Then your board initialization code would register that table with the SPI
  224. infrastructure, so that it's available later when the SPI master controller
  225. driver is registered:
  226. spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
  227. Like with other static board-specific setup, you won't unregister those.
  228. The widely used "card" style computers bundle memory, cpu, and little else
  229. onto a card that's maybe just thirty square centimeters. On such systems,
  230. your arch/.../mach-.../board-*.c file would primarily provide information
  231. about the devices on the mainboard into which such a card is plugged. That
  232. certainly includes SPI devices hooked up through the card connectors!
  233. NON-STATIC CONFIGURATIONS
  234. Developer boards often play by different rules than product boards, and one
  235. example is the potential need to hotplug SPI devices and/or controllers.
  236. For those cases you might need to use spi_busnum_to_master() to look
  237. up the spi bus master, and will likely need spi_new_device() to provide the
  238. board info based on the board that was hotplugged. Of course, you'd later
  239. call at least spi_unregister_device() when that board is removed.
  240. When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those
  241. configurations will also be dynamic. Fortunately, such devices all support
  242. basic device identification probes, so they should hotplug normally.
  243. How do I write an "SPI Protocol Driver"?
  244. ----------------------------------------
  245. Most SPI drivers are currently kernel drivers, but there's also support
  246. for userspace drivers. Here we talk only about kernel drivers.
  247. SPI protocol drivers somewhat resemble platform device drivers:
  248. static struct spi_driver CHIP_driver = {
  249. .driver = {
  250. .name = "CHIP",
  251. .owner = THIS_MODULE,
  252. },
  253. .probe = CHIP_probe,
  254. .remove = __devexit_p(CHIP_remove),
  255. .suspend = CHIP_suspend,
  256. .resume = CHIP_resume,
  257. };
  258. The driver core will autmatically attempt to bind this driver to any SPI
  259. device whose board_info gave a modalias of "CHIP". Your probe() code
  260. might look like this unless you're creating a class_device:
  261. static int __devinit CHIP_probe(struct spi_device *spi)
  262. {
  263. struct CHIP *chip;
  264. struct CHIP_platform_data *pdata;
  265. /* assuming the driver requires board-specific data: */
  266. pdata = &spi->dev.platform_data;
  267. if (!pdata)
  268. return -ENODEV;
  269. /* get memory for driver's per-chip state */
  270. chip = kzalloc(sizeof *chip, GFP_KERNEL);
  271. if (!chip)
  272. return -ENOMEM;
  273. spi_set_drvdata(spi, chip);
  274. ... etc
  275. return 0;
  276. }
  277. As soon as it enters probe(), the driver may issue I/O requests to
  278. the SPI device using "struct spi_message". When remove() returns,
  279. or after probe() fails, the driver guarantees that it won't submit
  280. any more such messages.
  281. - An spi_message is a sequence of protocol operations, executed
  282. as one atomic sequence. SPI driver controls include:
  283. + when bidirectional reads and writes start ... by how its
  284. sequence of spi_transfer requests is arranged;
  285. + optionally defining short delays after transfers ... using
  286. the spi_transfer.delay_usecs setting;
  287. + whether the chipselect becomes inactive after a transfer and
  288. any delay ... by using the spi_transfer.cs_change flag;
  289. + hinting whether the next message is likely to go to this same
  290. device ... using the spi_transfer.cs_change flag on the last
  291. transfer in that atomic group, and potentially saving costs
  292. for chip deselect and select operations.
  293. - Follow standard kernel rules, and provide DMA-safe buffers in
  294. your messages. That way controller drivers using DMA aren't forced
  295. to make extra copies unless the hardware requires it (e.g. working
  296. around hardware errata that force the use of bounce buffering).
  297. If standard dma_map_single() handling of these buffers is inappropriate,
  298. you can use spi_message.is_dma_mapped to tell the controller driver
  299. that you've already provided the relevant DMA addresses.
  300. - The basic I/O primitive is spi_async(). Async requests may be
  301. issued in any context (irq handler, task, etc) and completion
  302. is reported using a callback provided with the message.
  303. After any detected error, the chip is deselected and processing
  304. of that spi_message is aborted.
  305. - There are also synchronous wrappers like spi_sync(), and wrappers
  306. like spi_read(), spi_write(), and spi_write_then_read(). These
  307. may be issued only in contexts that may sleep, and they're all
  308. clean (and small, and "optional") layers over spi_async().
  309. - The spi_write_then_read() call, and convenience wrappers around
  310. it, should only be used with small amounts of data where the
  311. cost of an extra copy may be ignored. It's designed to support
  312. common RPC-style requests, such as writing an eight bit command
  313. and reading a sixteen bit response -- spi_w8r16() being one its
  314. wrappers, doing exactly that.
  315. Some drivers may need to modify spi_device characteristics like the
  316. transfer mode, wordsize, or clock rate. This is done with spi_setup(),
  317. which would normally be called from probe() before the first I/O is
  318. done to the device. However, that can also be called at any time
  319. that no message is pending for that device.
  320. While "spi_device" would be the bottom boundary of the driver, the
  321. upper boundaries might include sysfs (especially for sensor readings),
  322. the input layer, ALSA, networking, MTD, the character device framework,
  323. or other Linux subsystems.
  324. Note that there are two types of memory your driver must manage as part
  325. of interacting with SPI devices.
  326. - I/O buffers use the usual Linux rules, and must be DMA-safe.
  327. You'd normally allocate them from the heap or free page pool.
  328. Don't use the stack, or anything that's declared "static".
  329. - The spi_message and spi_transfer metadata used to glue those
  330. I/O buffers into a group of protocol transactions. These can
  331. be allocated anywhere it's convenient, including as part of
  332. other allocate-once driver data structures. Zero-init these.
  333. If you like, spi_message_alloc() and spi_message_free() convenience
  334. routines are available to allocate and zero-initialize an spi_message
  335. with several transfers.
  336. How do I write an "SPI Master Controller Driver"?
  337. -------------------------------------------------
  338. An SPI controller will probably be registered on the platform_bus; write
  339. a driver to bind to the device, whichever bus is involved.
  340. The main task of this type of driver is to provide an "spi_master".
  341. Use spi_alloc_master() to allocate the master, and class_get_devdata()
  342. to get the driver-private data allocated for that device.
  343. struct spi_master *master;
  344. struct CONTROLLER *c;
  345. master = spi_alloc_master(dev, sizeof *c);
  346. if (!master)
  347. return -ENODEV;
  348. c = class_get_devdata(&master->cdev);
  349. The driver will initialize the fields of that spi_master, including the
  350. bus number (maybe the same as the platform device ID) and three methods
  351. used to interact with the SPI core and SPI protocol drivers. It will
  352. also initialize its own internal state. (See below about bus numbering
  353. and those methods.)
  354. After you initialize the spi_master, then use spi_register_master() to
  355. publish it to the rest of the system. At that time, device nodes for
  356. the controller and any predeclared spi devices will be made available,
  357. and the driver model core will take care of binding them to drivers.
  358. If you need to remove your SPI controller driver, spi_unregister_master()
  359. will reverse the effect of spi_register_master().
  360. BUS NUMBERING
  361. Bus numbering is important, since that's how Linux identifies a given
  362. SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On
  363. SOC systems, the bus numbers should match the numbers defined by the chip
  364. manufacturer. For example, hardware controller SPI2 would be bus number 2,
  365. and spi_board_info for devices connected to it would use that number.
  366. If you don't have such hardware-assigned bus number, and for some reason
  367. you can't just assign them, then provide a negative bus number. That will
  368. then be replaced by a dynamically assigned number. You'd then need to treat
  369. this as a non-static configuration (see above).
  370. SPI MASTER METHODS
  371. master->setup(struct spi_device *spi)
  372. This sets up the device clock rate, SPI mode, and word sizes.
  373. Drivers may change the defaults provided by board_info, and then
  374. call spi_setup(spi) to invoke this routine. It may sleep.
  375. Unless each SPI slave has its own configuration registers, don't
  376. change them right away ... otherwise drivers could corrupt I/O
  377. that's in progress for other SPI devices.
  378. master->transfer(struct spi_device *spi, struct spi_message *message)
  379. This must not sleep. Its responsibility is arrange that the
  380. transfer happens and its complete() callback is issued. The two
  381. will normally happen later, after other transfers complete, and
  382. if the controller is idle it will need to be kickstarted.
  383. master->cleanup(struct spi_device *spi)
  384. Your controller driver may use spi_device.controller_state to hold
  385. state it dynamically associates with that device. If you do that,
  386. be sure to provide the cleanup() method to free that state.
  387. SPI MESSAGE QUEUE
  388. The bulk of the driver will be managing the I/O queue fed by transfer().
  389. That queue could be purely conceptual. For example, a driver used only
  390. for low-frequency sensor acess might be fine using synchronous PIO.
  391. But the queue will probably be very real, using message->queue, PIO,
  392. often DMA (especially if the root filesystem is in SPI flash), and
  393. execution contexts like IRQ handlers, tasklets, or workqueues (such
  394. as keventd). Your driver can be as fancy, or as simple, as you need.
  395. Such a transfer() method would normally just add the message to a
  396. queue, and then start some asynchronous transfer engine (unless it's
  397. already running).
  398. THANKS TO
  399. ---------
  400. Contributors to Linux-SPI discussions include (in alphabetical order,
  401. by last name):
  402. David Brownell
  403. Russell King
  404. Dmitry Pervushin
  405. Stephen Street
  406. Mark Underwood
  407. Andrew Victor
  408. Vitaly Wool