musb_core.h 18 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/clk.h>
  42. #include <linux/device.h>
  43. #include <linux/usb/ch9.h>
  44. #include <linux/usb/gadget.h>
  45. #include <linux/usb.h>
  46. #include <linux/usb/otg.h>
  47. #include <linux/usb/musb.h>
  48. struct musb;
  49. struct musb_hw_ep;
  50. struct musb_ep;
  51. /* Helper defines for struct musb->hwvers */
  52. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  53. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  54. #define MUSB_HWVERS_RC 0x8000
  55. #define MUSB_HWVERS_1300 0x52C
  56. #define MUSB_HWVERS_1400 0x590
  57. #define MUSB_HWVERS_1800 0x720
  58. #define MUSB_HWVERS_1900 0x784
  59. #define MUSB_HWVERS_2000 0x800
  60. #include "musb_debug.h"
  61. #include "musb_dma.h"
  62. #include "musb_io.h"
  63. #include "musb_regs.h"
  64. #include "musb_gadget.h"
  65. #include <linux/usb/hcd.h>
  66. #include "musb_host.h"
  67. #ifdef CONFIG_USB_MUSB_OTG
  68. #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
  69. #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
  70. #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
  71. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  72. * OTG or host-only go to A_IDLE when ID is sensed.
  73. */
  74. #define is_peripheral_active(m) (!(m)->is_host)
  75. #define is_host_active(m) ((m)->is_host)
  76. #else
  77. #define is_peripheral_enabled(musb) is_peripheral_capable()
  78. #define is_host_enabled(musb) is_host_capable()
  79. #define is_otg_enabled(musb) 0
  80. #define is_peripheral_active(musb) is_peripheral_capable()
  81. #define is_host_active(musb) is_host_capable()
  82. #endif
  83. #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
  84. /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
  85. * override that choice selection (often USB_GADGET_DUMMY_HCD).
  86. */
  87. #ifndef CONFIG_USB_GADGET_MUSB_HDRC
  88. #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
  89. #endif
  90. #endif /* need MUSB gadget selection */
  91. #ifndef CONFIG_HAVE_CLK
  92. /* Dummy stub for clk framework */
  93. #define clk_get(dev, id) NULL
  94. #define clk_put(clock) do {} while (0)
  95. #define clk_enable(clock) do {} while (0)
  96. #define clk_disable(clock) do {} while (0)
  97. #endif
  98. #ifdef CONFIG_PROC_FS
  99. #include <linux/fs.h>
  100. #define MUSB_CONFIG_PROC_FS
  101. #endif
  102. /****************************** PERIPHERAL ROLE *****************************/
  103. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  104. #define is_peripheral_capable() (1)
  105. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  106. extern void musb_g_tx(struct musb *, u8);
  107. extern void musb_g_rx(struct musb *, u8);
  108. extern void musb_g_reset(struct musb *);
  109. extern void musb_g_suspend(struct musb *);
  110. extern void musb_g_resume(struct musb *);
  111. extern void musb_g_wakeup(struct musb *);
  112. extern void musb_g_disconnect(struct musb *);
  113. #else
  114. #define is_peripheral_capable() (0)
  115. static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
  116. static inline void musb_g_reset(struct musb *m) {}
  117. static inline void musb_g_suspend(struct musb *m) {}
  118. static inline void musb_g_resume(struct musb *m) {}
  119. static inline void musb_g_wakeup(struct musb *m) {}
  120. static inline void musb_g_disconnect(struct musb *m) {}
  121. #endif
  122. /****************************** HOST ROLE ***********************************/
  123. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  124. #define is_host_capable() (1)
  125. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  126. extern void musb_host_tx(struct musb *, u8);
  127. extern void musb_host_rx(struct musb *, u8);
  128. #else
  129. #define is_host_capable() (0)
  130. static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
  131. static inline void musb_host_tx(struct musb *m, u8 e) {}
  132. static inline void musb_host_rx(struct musb *m, u8 e) {}
  133. #endif
  134. /****************************** CONSTANTS ********************************/
  135. #ifndef MUSB_C_NUM_EPS
  136. #define MUSB_C_NUM_EPS ((u8)16)
  137. #endif
  138. #ifndef MUSB_MAX_END0_PACKET
  139. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  140. #endif
  141. /* host side ep0 states */
  142. enum musb_h_ep0_state {
  143. MUSB_EP0_IDLE,
  144. MUSB_EP0_START, /* expect ack of setup */
  145. MUSB_EP0_IN, /* expect IN DATA */
  146. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  147. MUSB_EP0_STATUS, /* expect ack of STATUS */
  148. } __attribute__ ((packed));
  149. /* peripheral side ep0 states */
  150. enum musb_g_ep0_state {
  151. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  152. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  153. MUSB_EP0_STAGE_TX, /* IN data */
  154. MUSB_EP0_STAGE_RX, /* OUT data */
  155. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  156. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  157. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  158. } __attribute__ ((packed));
  159. /*
  160. * OTG protocol constants. See USB OTG 1.3 spec,
  161. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  162. */
  163. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  164. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  165. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  166. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  167. /*************************** REGISTER ACCESS ********************************/
  168. /* Endpoint registers (other than dynfifo setup) can be accessed either
  169. * directly with the "flat" model, or after setting up an index register.
  170. */
  171. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
  172. || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
  173. || defined(CONFIG_ARCH_OMAP4)
  174. /* REVISIT indexed access seemed to
  175. * misbehave (on DaVinci) for at least peripheral IN ...
  176. */
  177. #define MUSB_FLAT_REG
  178. #endif
  179. /* TUSB mapping: "flat" plus ep0 special cases */
  180. #if defined(CONFIG_USB_TUSB6010)
  181. #define musb_ep_select(_mbase, _epnum) \
  182. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  183. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  184. /* "flat" mapping: each endpoint has its own i/o address */
  185. #elif defined(MUSB_FLAT_REG)
  186. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  187. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  188. /* "indexed" mapping: INDEX register controls register bank select */
  189. #else
  190. #define musb_ep_select(_mbase, _epnum) \
  191. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  192. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  193. #endif
  194. /****************************** FUNCTIONS ********************************/
  195. #define MUSB_HST_MODE(_musb)\
  196. { (_musb)->is_host = true; }
  197. #define MUSB_DEV_MODE(_musb) \
  198. { (_musb)->is_host = false; }
  199. #define test_devctl_hst_mode(_x) \
  200. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  201. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  202. /******************************** TYPES *************************************/
  203. /**
  204. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  205. * @init: turns on clocks, sets up platform-specific registers, etc
  206. * @exit: undoes @init
  207. * @suspend: platform-specific suspend, e.g. context save
  208. * @resume: platform-specific resume, e.g. context restore
  209. * @set_mode: forcefully changes operating mode
  210. * @try_ilde: tries to idle the IP
  211. * @vbus_status: returns vbus status if possible
  212. * @set_vbus: forces vbus status
  213. */
  214. struct musb_platform_ops {
  215. int (*init)(struct musb *musb);
  216. int (*exit)(struct musb *musb);
  217. int (*suspend)(struct musb *musb);
  218. int (*resume)(struct musb *musb);
  219. void (*enable)(struct musb *musb);
  220. void (*disable)(struct musb *musb);
  221. int (*set_mode)(struct musb *musb, u8 mode);
  222. void (*try_idle)(struct musb *musb, unsigned long timeout);
  223. int (*vbus_status)(struct musb *musb);
  224. void (*set_vbus)(struct musb *musb, int on);
  225. };
  226. extern const struct musb_platform_ops musb_ops;
  227. /*
  228. * struct musb_hw_ep - endpoint hardware (bidirectional)
  229. *
  230. * Ordered slightly for better cacheline locality.
  231. */
  232. struct musb_hw_ep {
  233. struct musb *musb;
  234. void __iomem *fifo;
  235. void __iomem *regs;
  236. #ifdef CONFIG_USB_TUSB6010
  237. void __iomem *conf;
  238. #endif
  239. /* index in musb->endpoints[] */
  240. u8 epnum;
  241. /* hardware configuration, possibly dynamic */
  242. bool is_shared_fifo;
  243. bool tx_double_buffered;
  244. bool rx_double_buffered;
  245. u16 max_packet_sz_tx;
  246. u16 max_packet_sz_rx;
  247. struct dma_channel *tx_channel;
  248. struct dma_channel *rx_channel;
  249. #ifdef CONFIG_USB_TUSB6010
  250. /* TUSB has "asynchronous" and "synchronous" dma modes */
  251. dma_addr_t fifo_async;
  252. dma_addr_t fifo_sync;
  253. void __iomem *fifo_sync_va;
  254. #endif
  255. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  256. void __iomem *target_regs;
  257. /* currently scheduled peripheral endpoint */
  258. struct musb_qh *in_qh;
  259. struct musb_qh *out_qh;
  260. u8 rx_reinit;
  261. u8 tx_reinit;
  262. #endif
  263. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  264. /* peripheral side */
  265. struct musb_ep ep_in; /* TX */
  266. struct musb_ep ep_out; /* RX */
  267. #endif
  268. };
  269. static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
  270. {
  271. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  272. return next_request(&hw_ep->ep_in);
  273. #else
  274. return NULL;
  275. #endif
  276. }
  277. static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
  278. {
  279. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  280. return next_request(&hw_ep->ep_out);
  281. #else
  282. return NULL;
  283. #endif
  284. }
  285. struct musb_csr_regs {
  286. /* FIFO registers */
  287. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  288. u16 rxfifoadd, txfifoadd;
  289. u8 txtype, txinterval, rxtype, rxinterval;
  290. u8 rxfifosz, txfifosz;
  291. u8 txfunaddr, txhubaddr, txhubport;
  292. u8 rxfunaddr, rxhubaddr, rxhubport;
  293. };
  294. struct musb_context_registers {
  295. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
  296. defined(CONFIG_ARCH_OMAP4)
  297. u32 otg_sysconfig, otg_forcestandby;
  298. #endif
  299. u8 power;
  300. u16 intrtxe, intrrxe;
  301. u8 intrusbe;
  302. u16 frame;
  303. u8 index, testmode;
  304. u8 devctl, busctl, misc;
  305. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  306. };
  307. /*
  308. * struct musb - Driver instance data.
  309. */
  310. struct musb {
  311. /* device lock */
  312. spinlock_t lock;
  313. struct clk *clock;
  314. struct clk *phy_clock;
  315. const struct musb_platform_ops *ops;
  316. struct musb_context_registers context;
  317. irqreturn_t (*isr)(int, void *);
  318. struct work_struct irq_work;
  319. u16 hwvers;
  320. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  321. #define MUSB_PORT_STAT_RESUME (1 << 31)
  322. u32 port1_status;
  323. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  324. unsigned long rh_timer;
  325. enum musb_h_ep0_state ep0_stage;
  326. /* bulk traffic normally dedicates endpoint hardware, and each
  327. * direction has its own ring of host side endpoints.
  328. * we try to progress the transfer at the head of each endpoint's
  329. * queue until it completes or NAKs too much; then we try the next
  330. * endpoint.
  331. */
  332. struct musb_hw_ep *bulk_ep;
  333. struct list_head control; /* of musb_qh */
  334. struct list_head in_bulk; /* of musb_qh */
  335. struct list_head out_bulk; /* of musb_qh */
  336. struct timer_list otg_timer;
  337. #endif
  338. /* called with IRQs blocked; ON/nonzero implies starting a session,
  339. * and waiting at least a_wait_vrise_tmout.
  340. */
  341. void (*board_set_vbus)(struct musb *, int is_on);
  342. struct dma_controller *dma_controller;
  343. struct device *controller;
  344. void __iomem *ctrl_base;
  345. void __iomem *mregs;
  346. #ifdef CONFIG_USB_TUSB6010
  347. dma_addr_t async;
  348. dma_addr_t sync;
  349. void __iomem *sync_va;
  350. #endif
  351. /* passed down from chip/board specific irq handlers */
  352. u8 int_usb;
  353. u16 int_rx;
  354. u16 int_tx;
  355. struct otg_transceiver *xceiv;
  356. int nIrq;
  357. unsigned irq_wake:1;
  358. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  359. #define control_ep endpoints
  360. #define VBUSERR_RETRY_COUNT 3
  361. u16 vbuserr_retry;
  362. u16 epmask;
  363. u8 nr_endpoints;
  364. u8 board_mode; /* enum musb_mode */
  365. int (*board_set_power)(int state);
  366. int (*set_clock)(struct clk *clk, int is_active);
  367. u8 min_power; /* vbus for periph, in mA/2 */
  368. bool is_host;
  369. int a_wait_bcon; /* VBUS timeout in msecs */
  370. unsigned long idle_timeout; /* Next timeout in jiffies */
  371. /* active means connected and not suspended */
  372. unsigned is_active:1;
  373. unsigned is_multipoint:1;
  374. unsigned ignore_disconnect:1; /* during bus resets */
  375. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  376. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  377. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  378. unsigned bulk_split:1;
  379. #define can_bulk_split(musb,type) \
  380. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  381. unsigned bulk_combine:1;
  382. #define can_bulk_combine(musb,type) \
  383. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  384. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  385. /* is_suspended means USB B_PERIPHERAL suspend */
  386. unsigned is_suspended:1;
  387. /* may_wakeup means remote wakeup is enabled */
  388. unsigned may_wakeup:1;
  389. /* is_self_powered is reported in device status and the
  390. * config descriptor. is_bus_powered means B_PERIPHERAL
  391. * draws some VBUS current; both can be true.
  392. */
  393. unsigned is_self_powered:1;
  394. unsigned is_bus_powered:1;
  395. unsigned set_address:1;
  396. unsigned test_mode:1;
  397. unsigned softconnect:1;
  398. u8 address;
  399. u8 test_mode_nr;
  400. u16 ackpend; /* ep0 */
  401. enum musb_g_ep0_state ep0_state;
  402. struct usb_gadget g; /* the gadget */
  403. struct usb_gadget_driver *gadget_driver; /* its driver */
  404. #endif
  405. struct musb_hdrc_config *config;
  406. #ifdef MUSB_CONFIG_PROC_FS
  407. struct proc_dir_entry *proc_entry;
  408. #endif
  409. };
  410. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  411. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  412. {
  413. return container_of(g, struct musb, g);
  414. }
  415. #endif
  416. #ifdef CONFIG_BLACKFIN
  417. static inline int musb_read_fifosize(struct musb *musb,
  418. struct musb_hw_ep *hw_ep, u8 epnum)
  419. {
  420. musb->nr_endpoints++;
  421. musb->epmask |= (1 << epnum);
  422. if (epnum < 5) {
  423. hw_ep->max_packet_sz_tx = 128;
  424. hw_ep->max_packet_sz_rx = 128;
  425. } else {
  426. hw_ep->max_packet_sz_tx = 1024;
  427. hw_ep->max_packet_sz_rx = 1024;
  428. }
  429. hw_ep->is_shared_fifo = false;
  430. return 0;
  431. }
  432. static inline void musb_configure_ep0(struct musb *musb)
  433. {
  434. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  435. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  436. musb->endpoints[0].is_shared_fifo = true;
  437. }
  438. #else
  439. static inline int musb_read_fifosize(struct musb *musb,
  440. struct musb_hw_ep *hw_ep, u8 epnum)
  441. {
  442. void *mbase = musb->mregs;
  443. u8 reg = 0;
  444. /* read from core using indexed model */
  445. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  446. /* 0's returned when no more endpoints */
  447. if (!reg)
  448. return -ENODEV;
  449. musb->nr_endpoints++;
  450. musb->epmask |= (1 << epnum);
  451. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  452. /* shared TX/RX FIFO? */
  453. if ((reg & 0xf0) == 0xf0) {
  454. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  455. hw_ep->is_shared_fifo = true;
  456. return 0;
  457. } else {
  458. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  459. hw_ep->is_shared_fifo = false;
  460. }
  461. return 0;
  462. }
  463. static inline void musb_configure_ep0(struct musb *musb)
  464. {
  465. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  466. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  467. musb->endpoints[0].is_shared_fifo = true;
  468. }
  469. #endif /* CONFIG_BLACKFIN */
  470. /***************************** Glue it together *****************************/
  471. extern const char musb_driver_name[];
  472. extern void musb_start(struct musb *musb);
  473. extern void musb_stop(struct musb *musb);
  474. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  475. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  476. extern void musb_load_testpacket(struct musb *);
  477. extern irqreturn_t musb_interrupt(struct musb *);
  478. extern void musb_hnp_stop(struct musb *musb);
  479. #ifdef CONFIG_PM
  480. #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
  481. defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_BLACKFIN)
  482. extern void musb_platform_save_context(struct musb *musb,
  483. struct musb_context_registers *musb_context);
  484. extern void musb_platform_restore_context(struct musb *musb,
  485. struct musb_context_registers *musb_context);
  486. #else
  487. #define musb_platform_save_context(m, x) do {} while (0)
  488. #define musb_platform_restore_context(m, x) do {} while (0)
  489. #endif
  490. #endif
  491. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  492. {
  493. if (musb->ops->set_vbus)
  494. musb->ops->set_vbus(musb, is_on);
  495. }
  496. static inline void musb_platform_enable(struct musb *musb)
  497. {
  498. if (musb->ops->enable)
  499. musb->ops->enable(musb);
  500. }
  501. static inline void musb_platform_disable(struct musb *musb)
  502. {
  503. if (musb->ops->disable)
  504. musb->ops->disable(musb);
  505. }
  506. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  507. {
  508. if (!musb->ops->set_mode)
  509. return 0;
  510. return musb->ops->set_mode(musb, mode);
  511. }
  512. static inline void musb_platform_try_idle(struct musb *musb,
  513. unsigned long timeout)
  514. {
  515. if (musb->ops->try_idle)
  516. musb->ops->try_idle(musb, timeout);
  517. }
  518. static inline int musb_platform_get_vbus_status(struct musb *musb)
  519. {
  520. if (!musb->ops->vbus_status)
  521. return 0;
  522. return musb->ops->vbus_status(musb);
  523. }
  524. static inline int musb_platform_init(struct musb *musb)
  525. {
  526. if (!musb->ops->init)
  527. return -EINVAL;
  528. return musb->ops->init(musb);
  529. }
  530. static inline int musb_platform_exit(struct musb *musb)
  531. {
  532. if (!musb->ops->exit)
  533. return -EINVAL;
  534. return musb->ops->exit(musb);
  535. }
  536. static inline int musb_platform_suspend(struct musb *musb)
  537. {
  538. if (!musb->ops->suspend)
  539. return 0;
  540. return musb->ops->suspend(musb);
  541. }
  542. static inline int musb_platform_resume(struct musb *musb)
  543. {
  544. if (!musb->ops->resume)
  545. return 0;
  546. return musb->ops->resume(musb);
  547. }
  548. #endif /* __MUSB_CORE_H__ */