qd65xx.c 10 KB

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  1. /*
  2. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  3. */
  4. /*
  5. * Version 0.03 Cleaned auto-tune, added probe
  6. * Version 0.04 Added second channel tuning
  7. * Version 0.05 Enhanced tuning ; added qd6500 support
  8. * Version 0.06 Added dos driver's list
  9. * Version 0.07 Second channel bug fix
  10. *
  11. * QDI QD6500/QD6580 EIDE controller fast support
  12. *
  13. * To activate controller support, use "ide0=qd65xx"
  14. * To enable tuning, use "hda=autotune hdb=autotune"
  15. * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
  16. */
  17. /*
  18. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  19. * Samuel Thibault <samuel.thibault@fnac.net>
  20. */
  21. #include <linux/module.h>
  22. #include <linux/types.h>
  23. #include <linux/kernel.h>
  24. #include <linux/delay.h>
  25. #include <linux/timer.h>
  26. #include <linux/mm.h>
  27. #include <linux/ioport.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/hdreg.h>
  30. #include <linux/ide.h>
  31. #include <linux/init.h>
  32. #include <asm/system.h>
  33. #include <asm/io.h>
  34. #define DRV_NAME "qd65xx"
  35. #include "qd65xx.h"
  36. /*
  37. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  38. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  39. * -- qd6500 is a single IDE interface
  40. * -- qd6580 is a dual IDE interface
  41. *
  42. * More research on qd6580 being done by willmore@cig.mot.com (David)
  43. * More Information given by Petr Soucek (petr@ryston.cz)
  44. * http://www.ryston.cz/petr/vlb
  45. */
  46. /*
  47. * base: Timer1
  48. *
  49. *
  50. * base+0x01: Config (R/O)
  51. *
  52. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  53. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  54. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  55. * bit 3: qd6500: 1 = disabled, 0 = enabled
  56. * qd6580: 1
  57. * upper nibble:
  58. * qd6500: 1100
  59. * qd6580: either 1010 or 0101
  60. *
  61. *
  62. * base+0x02: Timer2 (qd6580 only)
  63. *
  64. *
  65. * base+0x03: Control (qd6580 only)
  66. *
  67. * bits 0-3 must always be set 1
  68. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  69. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  70. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  71. * channel 1 for hdc & hdd
  72. * bit 1 : 1 = only disks on primary port
  73. * 0 = disks & ATAPI devices on primary port
  74. * bit 2-4 : always 0
  75. * bit 5 : status, but of what ?
  76. * bit 6 : always set 1 by dos driver
  77. * bit 7 : set 1 for non-ATAPI devices on primary port
  78. * (maybe read-ahead and post-write buffer ?)
  79. */
  80. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  81. /*
  82. * qd65xx_select:
  83. *
  84. * This routine is invoked to prepare for access to a given drive.
  85. */
  86. static void qd65xx_select(ide_drive_t *drive)
  87. {
  88. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  89. (QD_TIMREG(drive) & 0x02);
  90. if (timings[index] != QD_TIMING(drive))
  91. outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  92. }
  93. /*
  94. * qd6500_compute_timing
  95. *
  96. * computes the timing value where
  97. * lower nibble represents active time, in count of VLB clocks
  98. * upper nibble represents recovery time, in count of VLB clocks
  99. */
  100. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  101. {
  102. int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
  103. u8 act_cyc, rec_cyc;
  104. if (clk <= 33) {
  105. act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
  106. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
  107. } else {
  108. act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
  109. rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
  110. }
  111. return (rec_cyc << 4) | 0x08 | act_cyc;
  112. }
  113. /*
  114. * qd6580_compute_timing
  115. *
  116. * idem for qd6580
  117. */
  118. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  119. {
  120. int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
  121. u8 act_cyc, rec_cyc;
  122. act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
  123. rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
  124. return (rec_cyc << 4) | act_cyc;
  125. }
  126. /*
  127. * qd_find_disk_type
  128. *
  129. * tries to find timing from dos driver's table
  130. */
  131. static int qd_find_disk_type (ide_drive_t *drive,
  132. int *active_time, int *recovery_time)
  133. {
  134. struct qd65xx_timing_s *p;
  135. char model[40];
  136. if (!*drive->id->model) return 0;
  137. strncpy(model,drive->id->model,40);
  138. ide_fixstring(model,40,1); /* byte-swap */
  139. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  140. if (!strncmp(p->model, model+p->offset, 4)) {
  141. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  142. *active_time = p->active;
  143. *recovery_time = p->recovery;
  144. return 1;
  145. }
  146. }
  147. return 0;
  148. }
  149. /*
  150. * qd_set_timing:
  151. *
  152. * records the timing
  153. */
  154. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  155. {
  156. drive->drive_data &= 0xff00;
  157. drive->drive_data |= timing;
  158. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  159. }
  160. static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
  161. {
  162. int active_time = 175;
  163. int recovery_time = 415; /* worst case values from the dos driver */
  164. /*
  165. * FIXME: use "pio" value
  166. */
  167. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  168. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  169. && drive->id->eide_pio >= 240) {
  170. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  171. drive->id->tPIO);
  172. active_time = 110;
  173. recovery_time = drive->id->eide_pio - 120;
  174. }
  175. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  176. }
  177. static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
  178. {
  179. ide_hwif_t *hwif = drive->hwif;
  180. unsigned int cycle_time;
  181. int active_time = 175;
  182. int recovery_time = 415; /* worst case values from the dos driver */
  183. u8 base = (hwif->config_data & 0xff00) >> 8;
  184. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  185. cycle_time = ide_pio_cycle_time(drive, pio);
  186. switch (pio) {
  187. case 0: break;
  188. case 3:
  189. if (cycle_time >= 110) {
  190. active_time = 86;
  191. recovery_time = cycle_time - 102;
  192. } else
  193. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  194. break;
  195. case 4:
  196. if (cycle_time >= 69) {
  197. active_time = 70;
  198. recovery_time = cycle_time - 61;
  199. } else
  200. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  201. break;
  202. default:
  203. if (cycle_time >= 180) {
  204. active_time = 110;
  205. recovery_time = cycle_time - 120;
  206. } else {
  207. active_time = ide_pio_timings[pio].active_time;
  208. recovery_time = cycle_time - active_time;
  209. }
  210. }
  211. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  212. }
  213. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  214. outb(0x5f, QD_CONTROL_PORT);
  215. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  216. "and post-write buffer on %s.\n",
  217. drive->name, HWIF(drive)->name);
  218. }
  219. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  220. }
  221. /*
  222. * qd_testreg
  223. *
  224. * tests if the given port is a register
  225. */
  226. static int __init qd_testreg(int port)
  227. {
  228. unsigned long flags;
  229. u8 savereg, readreg;
  230. local_irq_save(flags);
  231. savereg = inb_p(port);
  232. outb_p(QD_TESTVAL, port); /* safe value */
  233. readreg = inb_p(port);
  234. outb(savereg, port);
  235. local_irq_restore(flags);
  236. if (savereg == QD_TESTVAL) {
  237. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  238. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  239. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  240. return 1;
  241. }
  242. return (readreg != QD_TESTVAL);
  243. }
  244. static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
  245. {
  246. u8 base = (hwif->config_data & 0xff00) >> 8;
  247. u8 config = QD_CONFIG(hwif);
  248. hwif->drives[0].drive_data = QD6500_DEF_DATA;
  249. hwif->drives[1].drive_data = QD6500_DEF_DATA;
  250. }
  251. static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
  252. {
  253. u16 t1, t2;
  254. u8 base = (hwif->config_data & 0xff00) >> 8;
  255. u8 config = QD_CONFIG(hwif);
  256. if (hwif->host_flags & IDE_HFLAG_SINGLE) {
  257. t1 = QD6580_DEF_DATA;
  258. t2 = QD6580_DEF_DATA2;
  259. } else
  260. t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
  261. hwif->drives[0].drive_data = t1;
  262. hwif->drives[1].drive_data = t2;
  263. }
  264. static const struct ide_port_ops qd6500_port_ops = {
  265. .port_init_devs = qd6500_port_init_devs,
  266. .set_pio_mode = qd6500_set_pio_mode,
  267. .selectproc = qd65xx_select,
  268. };
  269. static const struct ide_port_ops qd6580_port_ops = {
  270. .port_init_devs = qd6580_port_init_devs,
  271. .set_pio_mode = qd6580_set_pio_mode,
  272. .selectproc = qd65xx_select,
  273. };
  274. static const struct ide_port_info qd65xx_port_info __initdata = {
  275. .name = DRV_NAME,
  276. .chipset = ide_qd65xx,
  277. .host_flags = IDE_HFLAG_IO_32BIT |
  278. IDE_HFLAG_NO_DMA |
  279. IDE_HFLAG_NO_AUTOTUNE,
  280. .pio_mask = ATA_PIO4,
  281. };
  282. /*
  283. * qd_probe:
  284. *
  285. * looks at the specified baseport, and if qd found, registers & initialises it
  286. * return 1 if another qd may be probed
  287. */
  288. static int __init qd_probe(int base)
  289. {
  290. int rc;
  291. u8 config, unit, control;
  292. struct ide_port_info d = qd65xx_port_info;
  293. config = inb(QD_CONFIG_PORT);
  294. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  295. return -ENODEV;
  296. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  297. if (unit)
  298. d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
  299. switch (config & 0xf0) {
  300. case QD_CONFIG_QD6500:
  301. if (qd_testreg(base))
  302. return -ENODEV; /* bad register */
  303. if (config & QD_CONFIG_DISABLED) {
  304. printk(KERN_WARNING "qd6500 is disabled !\n");
  305. return -ENODEV;
  306. }
  307. printk(KERN_NOTICE "qd6500 at %#x\n", base);
  308. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  309. config, QD_ID3);
  310. d.port_ops = &qd6500_port_ops;
  311. d.host_flags |= IDE_HFLAG_SINGLE;
  312. break;
  313. case QD_CONFIG_QD6580_A:
  314. case QD_CONFIG_QD6580_B:
  315. if (qd_testreg(base) || qd_testreg(base + 0x02))
  316. return -ENODEV; /* bad registers */
  317. control = inb(QD_CONTROL_PORT);
  318. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  319. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  320. config, control, QD_ID3);
  321. outb(QD_DEF_CONTR, QD_CONTROL_PORT);
  322. d.port_ops = &qd6580_port_ops;
  323. if (control & QD_CONTR_SEC_DISABLED)
  324. d.host_flags |= IDE_HFLAG_SINGLE;
  325. printk(KERN_INFO "qd6580: %s IDE board\n",
  326. (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
  327. break;
  328. default:
  329. return -ENODEV;
  330. }
  331. rc = ide_legacy_device_add(&d, (base << 8) | config);
  332. if (d.host_flags & IDE_HFLAG_SINGLE)
  333. return (rc == 0) ? 1 : rc;
  334. return rc;
  335. }
  336. static int probe_qd65xx;
  337. module_param_named(probe, probe_qd65xx, bool, 0);
  338. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  339. static int __init qd65xx_init(void)
  340. {
  341. int rc1, rc2 = -ENODEV;
  342. if (probe_qd65xx == 0)
  343. return -ENODEV;
  344. rc1 = qd_probe(0x30);
  345. if (rc1)
  346. rc2 = qd_probe(0xb0);
  347. if (rc1 < 0 && rc2 < 0)
  348. return -ENODEV;
  349. return 0;
  350. }
  351. module_init(qd65xx_init);
  352. MODULE_AUTHOR("Samuel Thibault");
  353. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  354. MODULE_LICENSE("GPL");