stmpe.c 23 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License, version 2
  5. * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
  6. */
  7. #include <linux/gpio.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/irq.h>
  12. #include <linux/slab.h>
  13. #include <linux/i2c.h>
  14. #include <linux/mfd/core.h>
  15. #include <linux/mfd/stmpe.h>
  16. #include "stmpe.h"
  17. static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  18. {
  19. return stmpe->variant->enable(stmpe, blocks, true);
  20. }
  21. static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  22. {
  23. return stmpe->variant->enable(stmpe, blocks, false);
  24. }
  25. static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  26. {
  27. int ret;
  28. ret = i2c_smbus_read_byte_data(stmpe->i2c, reg);
  29. if (ret < 0)
  30. dev_err(stmpe->dev, "failed to read reg %#x: %d\n",
  31. reg, ret);
  32. dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  33. return ret;
  34. }
  35. static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  36. {
  37. int ret;
  38. dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  39. ret = i2c_smbus_write_byte_data(stmpe->i2c, reg, val);
  40. if (ret < 0)
  41. dev_err(stmpe->dev, "failed to write reg %#x: %d\n",
  42. reg, ret);
  43. return ret;
  44. }
  45. static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  46. {
  47. int ret;
  48. ret = __stmpe_reg_read(stmpe, reg);
  49. if (ret < 0)
  50. return ret;
  51. ret &= ~mask;
  52. ret |= val;
  53. return __stmpe_reg_write(stmpe, reg, ret);
  54. }
  55. static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  56. u8 *values)
  57. {
  58. int ret;
  59. ret = i2c_smbus_read_i2c_block_data(stmpe->i2c, reg, length, values);
  60. if (ret < 0)
  61. dev_err(stmpe->dev, "failed to read regs %#x: %d\n",
  62. reg, ret);
  63. dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
  64. stmpe_dump_bytes("stmpe rd: ", values, length);
  65. return ret;
  66. }
  67. static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  68. const u8 *values)
  69. {
  70. int ret;
  71. dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
  72. stmpe_dump_bytes("stmpe wr: ", values, length);
  73. ret = i2c_smbus_write_i2c_block_data(stmpe->i2c, reg, length,
  74. values);
  75. if (ret < 0)
  76. dev_err(stmpe->dev, "failed to write regs %#x: %d\n",
  77. reg, ret);
  78. return ret;
  79. }
  80. /**
  81. * stmpe_enable - enable blocks on an STMPE device
  82. * @stmpe: Device to work on
  83. * @blocks: Mask of blocks (enum stmpe_block values) to enable
  84. */
  85. int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  86. {
  87. int ret;
  88. mutex_lock(&stmpe->lock);
  89. ret = __stmpe_enable(stmpe, blocks);
  90. mutex_unlock(&stmpe->lock);
  91. return ret;
  92. }
  93. EXPORT_SYMBOL_GPL(stmpe_enable);
  94. /**
  95. * stmpe_disable - disable blocks on an STMPE device
  96. * @stmpe: Device to work on
  97. * @blocks: Mask of blocks (enum stmpe_block values) to enable
  98. */
  99. int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  100. {
  101. int ret;
  102. mutex_lock(&stmpe->lock);
  103. ret = __stmpe_disable(stmpe, blocks);
  104. mutex_unlock(&stmpe->lock);
  105. return ret;
  106. }
  107. EXPORT_SYMBOL_GPL(stmpe_disable);
  108. /**
  109. * stmpe_reg_read() - read a single STMPE register
  110. * @stmpe: Device to read from
  111. * @reg: Register to read
  112. */
  113. int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  114. {
  115. int ret;
  116. mutex_lock(&stmpe->lock);
  117. ret = __stmpe_reg_read(stmpe, reg);
  118. mutex_unlock(&stmpe->lock);
  119. return ret;
  120. }
  121. EXPORT_SYMBOL_GPL(stmpe_reg_read);
  122. /**
  123. * stmpe_reg_write() - write a single STMPE register
  124. * @stmpe: Device to write to
  125. * @reg: Register to write
  126. * @val: Value to write
  127. */
  128. int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  129. {
  130. int ret;
  131. mutex_lock(&stmpe->lock);
  132. ret = __stmpe_reg_write(stmpe, reg, val);
  133. mutex_unlock(&stmpe->lock);
  134. return ret;
  135. }
  136. EXPORT_SYMBOL_GPL(stmpe_reg_write);
  137. /**
  138. * stmpe_set_bits() - set the value of a bitfield in a STMPE register
  139. * @stmpe: Device to write to
  140. * @reg: Register to write
  141. * @mask: Mask of bits to set
  142. * @val: Value to set
  143. */
  144. int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  145. {
  146. int ret;
  147. mutex_lock(&stmpe->lock);
  148. ret = __stmpe_set_bits(stmpe, reg, mask, val);
  149. mutex_unlock(&stmpe->lock);
  150. return ret;
  151. }
  152. EXPORT_SYMBOL_GPL(stmpe_set_bits);
  153. /**
  154. * stmpe_block_read() - read multiple STMPE registers
  155. * @stmpe: Device to read from
  156. * @reg: First register
  157. * @length: Number of registers
  158. * @values: Buffer to write to
  159. */
  160. int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
  161. {
  162. int ret;
  163. mutex_lock(&stmpe->lock);
  164. ret = __stmpe_block_read(stmpe, reg, length, values);
  165. mutex_unlock(&stmpe->lock);
  166. return ret;
  167. }
  168. EXPORT_SYMBOL_GPL(stmpe_block_read);
  169. /**
  170. * stmpe_block_write() - write multiple STMPE registers
  171. * @stmpe: Device to write to
  172. * @reg: First register
  173. * @length: Number of registers
  174. * @values: Values to write
  175. */
  176. int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  177. const u8 *values)
  178. {
  179. int ret;
  180. mutex_lock(&stmpe->lock);
  181. ret = __stmpe_block_write(stmpe, reg, length, values);
  182. mutex_unlock(&stmpe->lock);
  183. return ret;
  184. }
  185. EXPORT_SYMBOL_GPL(stmpe_block_write);
  186. /**
  187. * stmpe_set_altfunc()- set the alternate function for STMPE pins
  188. * @stmpe: Device to configure
  189. * @pins: Bitmask of pins to affect
  190. * @block: block to enable alternate functions for
  191. *
  192. * @pins is assumed to have a bit set for each of the bits whose alternate
  193. * function is to be changed, numbered according to the GPIOXY numbers.
  194. *
  195. * If the GPIO module is not enabled, this function automatically enables it in
  196. * order to perform the change.
  197. */
  198. int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
  199. {
  200. struct stmpe_variant_info *variant = stmpe->variant;
  201. u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
  202. int af_bits = variant->af_bits;
  203. int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
  204. int afperreg = 8 / af_bits;
  205. int mask = (1 << af_bits) - 1;
  206. u8 regs[numregs];
  207. int af;
  208. int ret;
  209. mutex_lock(&stmpe->lock);
  210. ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
  211. if (ret < 0)
  212. goto out;
  213. ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
  214. if (ret < 0)
  215. goto out;
  216. af = variant->get_altfunc(stmpe, block);
  217. while (pins) {
  218. int pin = __ffs(pins);
  219. int regoffset = numregs - (pin / afperreg) - 1;
  220. int pos = (pin % afperreg) * (8 / afperreg);
  221. regs[regoffset] &= ~(mask << pos);
  222. regs[regoffset] |= af << pos;
  223. pins &= ~(1 << pin);
  224. }
  225. ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
  226. out:
  227. mutex_unlock(&stmpe->lock);
  228. return ret;
  229. }
  230. EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
  231. /*
  232. * GPIO (all variants)
  233. */
  234. static struct resource stmpe_gpio_resources[] = {
  235. /* Start and end filled dynamically */
  236. {
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. static struct mfd_cell stmpe_gpio_cell = {
  241. .name = "stmpe-gpio",
  242. .resources = stmpe_gpio_resources,
  243. .num_resources = ARRAY_SIZE(stmpe_gpio_resources),
  244. };
  245. /*
  246. * Keypad (1601, 2401, 2403)
  247. */
  248. static struct resource stmpe_keypad_resources[] = {
  249. {
  250. .name = "KEYPAD",
  251. .start = 0,
  252. .end = 0,
  253. .flags = IORESOURCE_IRQ,
  254. },
  255. {
  256. .name = "KEYPAD_OVER",
  257. .start = 1,
  258. .end = 1,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. };
  262. static struct mfd_cell stmpe_keypad_cell = {
  263. .name = "stmpe-keypad",
  264. .resources = stmpe_keypad_resources,
  265. .num_resources = ARRAY_SIZE(stmpe_keypad_resources),
  266. };
  267. /*
  268. * Touchscreen (STMPE811)
  269. */
  270. static struct resource stmpe_ts_resources[] = {
  271. {
  272. .name = "TOUCH_DET",
  273. .start = 0,
  274. .end = 0,
  275. .flags = IORESOURCE_IRQ,
  276. },
  277. {
  278. .name = "FIFO_TH",
  279. .start = 1,
  280. .end = 1,
  281. .flags = IORESOURCE_IRQ,
  282. },
  283. };
  284. static struct mfd_cell stmpe_ts_cell = {
  285. .name = "stmpe-ts",
  286. .resources = stmpe_ts_resources,
  287. .num_resources = ARRAY_SIZE(stmpe_ts_resources),
  288. };
  289. /*
  290. * STMPE811
  291. */
  292. static const u8 stmpe811_regs[] = {
  293. [STMPE_IDX_CHIP_ID] = STMPE811_REG_CHIP_ID,
  294. [STMPE_IDX_ICR_LSB] = STMPE811_REG_INT_CTRL,
  295. [STMPE_IDX_IER_LSB] = STMPE811_REG_INT_EN,
  296. [STMPE_IDX_ISR_MSB] = STMPE811_REG_INT_STA,
  297. [STMPE_IDX_GPMR_LSB] = STMPE811_REG_GPIO_MP_STA,
  298. [STMPE_IDX_GPSR_LSB] = STMPE811_REG_GPIO_SET_PIN,
  299. [STMPE_IDX_GPCR_LSB] = STMPE811_REG_GPIO_CLR_PIN,
  300. [STMPE_IDX_GPDR_LSB] = STMPE811_REG_GPIO_DIR,
  301. [STMPE_IDX_GPRER_LSB] = STMPE811_REG_GPIO_RE,
  302. [STMPE_IDX_GPFER_LSB] = STMPE811_REG_GPIO_FE,
  303. [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
  304. [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
  305. [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
  306. [STMPE_IDX_GPEDR_MSB] = STMPE811_REG_GPIO_ED,
  307. };
  308. static struct stmpe_variant_block stmpe811_blocks[] = {
  309. {
  310. .cell = &stmpe_gpio_cell,
  311. .irq = STMPE811_IRQ_GPIOC,
  312. .block = STMPE_BLOCK_GPIO,
  313. },
  314. {
  315. .cell = &stmpe_ts_cell,
  316. .irq = STMPE811_IRQ_TOUCH_DET,
  317. .block = STMPE_BLOCK_TOUCHSCREEN,
  318. },
  319. };
  320. static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
  321. bool enable)
  322. {
  323. unsigned int mask = 0;
  324. if (blocks & STMPE_BLOCK_GPIO)
  325. mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
  326. if (blocks & STMPE_BLOCK_ADC)
  327. mask |= STMPE811_SYS_CTRL2_ADC_OFF;
  328. if (blocks & STMPE_BLOCK_TOUCHSCREEN)
  329. mask |= STMPE811_SYS_CTRL2_TSC_OFF;
  330. return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
  331. enable ? 0 : mask);
  332. }
  333. static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  334. {
  335. /* 0 for touchscreen, 1 for GPIO */
  336. return block != STMPE_BLOCK_TOUCHSCREEN;
  337. }
  338. static struct stmpe_variant_info stmpe811 = {
  339. .name = "stmpe811",
  340. .id_val = 0x0811,
  341. .id_mask = 0xffff,
  342. .num_gpios = 8,
  343. .af_bits = 1,
  344. .regs = stmpe811_regs,
  345. .blocks = stmpe811_blocks,
  346. .num_blocks = ARRAY_SIZE(stmpe811_blocks),
  347. .num_irqs = STMPE811_NR_INTERNAL_IRQS,
  348. .enable = stmpe811_enable,
  349. .get_altfunc = stmpe811_get_altfunc,
  350. };
  351. /*
  352. * STMPE1601
  353. */
  354. static const u8 stmpe1601_regs[] = {
  355. [STMPE_IDX_CHIP_ID] = STMPE1601_REG_CHIP_ID,
  356. [STMPE_IDX_ICR_LSB] = STMPE1601_REG_ICR_LSB,
  357. [STMPE_IDX_IER_LSB] = STMPE1601_REG_IER_LSB,
  358. [STMPE_IDX_ISR_MSB] = STMPE1601_REG_ISR_MSB,
  359. [STMPE_IDX_GPMR_LSB] = STMPE1601_REG_GPIO_MP_LSB,
  360. [STMPE_IDX_GPSR_LSB] = STMPE1601_REG_GPIO_SET_LSB,
  361. [STMPE_IDX_GPCR_LSB] = STMPE1601_REG_GPIO_CLR_LSB,
  362. [STMPE_IDX_GPDR_LSB] = STMPE1601_REG_GPIO_SET_DIR_LSB,
  363. [STMPE_IDX_GPRER_LSB] = STMPE1601_REG_GPIO_RE_LSB,
  364. [STMPE_IDX_GPFER_LSB] = STMPE1601_REG_GPIO_FE_LSB,
  365. [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
  366. [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
  367. [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
  368. [STMPE_IDX_GPEDR_MSB] = STMPE1601_REG_GPIO_ED_MSB,
  369. };
  370. static struct stmpe_variant_block stmpe1601_blocks[] = {
  371. {
  372. .cell = &stmpe_gpio_cell,
  373. .irq = STMPE24XX_IRQ_GPIOC,
  374. .block = STMPE_BLOCK_GPIO,
  375. },
  376. {
  377. .cell = &stmpe_keypad_cell,
  378. .irq = STMPE24XX_IRQ_KEYPAD,
  379. .block = STMPE_BLOCK_KEYPAD,
  380. },
  381. };
  382. /* supported autosleep timeout delay (in msecs) */
  383. static const int stmpe_autosleep_delay[] = {
  384. 4, 16, 32, 64, 128, 256, 512, 1024,
  385. };
  386. static int stmpe_round_timeout(int timeout)
  387. {
  388. int i;
  389. for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
  390. if (stmpe_autosleep_delay[i] >= timeout)
  391. return i;
  392. }
  393. /*
  394. * requests for delays longer than supported should not return the
  395. * longest supported delay
  396. */
  397. return -EINVAL;
  398. }
  399. static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
  400. {
  401. int ret;
  402. if (!stmpe->variant->enable_autosleep)
  403. return -ENOSYS;
  404. mutex_lock(&stmpe->lock);
  405. ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
  406. mutex_unlock(&stmpe->lock);
  407. return ret;
  408. }
  409. /*
  410. * Both stmpe 1601/2403 support same layout for autosleep
  411. */
  412. static int stmpe1601_autosleep(struct stmpe *stmpe,
  413. int autosleep_timeout)
  414. {
  415. int ret, timeout;
  416. /* choose the best available timeout */
  417. timeout = stmpe_round_timeout(autosleep_timeout);
  418. if (timeout < 0) {
  419. dev_err(stmpe->dev, "invalid timeout\n");
  420. return timeout;
  421. }
  422. ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
  423. STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
  424. timeout);
  425. if (ret < 0)
  426. return ret;
  427. return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
  428. STPME1601_AUTOSLEEP_ENABLE,
  429. STPME1601_AUTOSLEEP_ENABLE);
  430. }
  431. static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
  432. bool enable)
  433. {
  434. unsigned int mask = 0;
  435. if (blocks & STMPE_BLOCK_GPIO)
  436. mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
  437. if (blocks & STMPE_BLOCK_KEYPAD)
  438. mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
  439. return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
  440. enable ? mask : 0);
  441. }
  442. static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  443. {
  444. switch (block) {
  445. case STMPE_BLOCK_PWM:
  446. return 2;
  447. case STMPE_BLOCK_KEYPAD:
  448. return 1;
  449. case STMPE_BLOCK_GPIO:
  450. default:
  451. return 0;
  452. }
  453. }
  454. static struct stmpe_variant_info stmpe1601 = {
  455. .name = "stmpe1601",
  456. .id_val = 0x0210,
  457. .id_mask = 0xfff0, /* at least 0x0210 and 0x0212 */
  458. .num_gpios = 16,
  459. .af_bits = 2,
  460. .regs = stmpe1601_regs,
  461. .blocks = stmpe1601_blocks,
  462. .num_blocks = ARRAY_SIZE(stmpe1601_blocks),
  463. .num_irqs = STMPE1601_NR_INTERNAL_IRQS,
  464. .enable = stmpe1601_enable,
  465. .get_altfunc = stmpe1601_get_altfunc,
  466. .enable_autosleep = stmpe1601_autosleep,
  467. };
  468. /*
  469. * STMPE24XX
  470. */
  471. static const u8 stmpe24xx_regs[] = {
  472. [STMPE_IDX_CHIP_ID] = STMPE24XX_REG_CHIP_ID,
  473. [STMPE_IDX_ICR_LSB] = STMPE24XX_REG_ICR_LSB,
  474. [STMPE_IDX_IER_LSB] = STMPE24XX_REG_IER_LSB,
  475. [STMPE_IDX_ISR_MSB] = STMPE24XX_REG_ISR_MSB,
  476. [STMPE_IDX_GPMR_LSB] = STMPE24XX_REG_GPMR_LSB,
  477. [STMPE_IDX_GPSR_LSB] = STMPE24XX_REG_GPSR_LSB,
  478. [STMPE_IDX_GPCR_LSB] = STMPE24XX_REG_GPCR_LSB,
  479. [STMPE_IDX_GPDR_LSB] = STMPE24XX_REG_GPDR_LSB,
  480. [STMPE_IDX_GPRER_LSB] = STMPE24XX_REG_GPRER_LSB,
  481. [STMPE_IDX_GPFER_LSB] = STMPE24XX_REG_GPFER_LSB,
  482. [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
  483. [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
  484. [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
  485. [STMPE_IDX_GPEDR_MSB] = STMPE24XX_REG_GPEDR_MSB,
  486. };
  487. static struct stmpe_variant_block stmpe24xx_blocks[] = {
  488. {
  489. .cell = &stmpe_gpio_cell,
  490. .irq = STMPE24XX_IRQ_GPIOC,
  491. .block = STMPE_BLOCK_GPIO,
  492. },
  493. {
  494. .cell = &stmpe_keypad_cell,
  495. .irq = STMPE24XX_IRQ_KEYPAD,
  496. .block = STMPE_BLOCK_KEYPAD,
  497. },
  498. };
  499. static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
  500. bool enable)
  501. {
  502. unsigned int mask = 0;
  503. if (blocks & STMPE_BLOCK_GPIO)
  504. mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
  505. if (blocks & STMPE_BLOCK_KEYPAD)
  506. mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
  507. return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
  508. enable ? mask : 0);
  509. }
  510. static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
  511. {
  512. switch (block) {
  513. case STMPE_BLOCK_ROTATOR:
  514. return 2;
  515. case STMPE_BLOCK_KEYPAD:
  516. return 1;
  517. case STMPE_BLOCK_GPIO:
  518. default:
  519. return 0;
  520. }
  521. }
  522. static struct stmpe_variant_info stmpe2401 = {
  523. .name = "stmpe2401",
  524. .id_val = 0x0101,
  525. .id_mask = 0xffff,
  526. .num_gpios = 24,
  527. .af_bits = 2,
  528. .regs = stmpe24xx_regs,
  529. .blocks = stmpe24xx_blocks,
  530. .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
  531. .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
  532. .enable = stmpe24xx_enable,
  533. .get_altfunc = stmpe24xx_get_altfunc,
  534. };
  535. static struct stmpe_variant_info stmpe2403 = {
  536. .name = "stmpe2403",
  537. .id_val = 0x0120,
  538. .id_mask = 0xffff,
  539. .num_gpios = 24,
  540. .af_bits = 2,
  541. .regs = stmpe24xx_regs,
  542. .blocks = stmpe24xx_blocks,
  543. .num_blocks = ARRAY_SIZE(stmpe24xx_blocks),
  544. .num_irqs = STMPE24XX_NR_INTERNAL_IRQS,
  545. .enable = stmpe24xx_enable,
  546. .get_altfunc = stmpe24xx_get_altfunc,
  547. .enable_autosleep = stmpe1601_autosleep, /* same as stmpe1601 */
  548. };
  549. static struct stmpe_variant_info *stmpe_variant_info[] = {
  550. [STMPE811] = &stmpe811,
  551. [STMPE1601] = &stmpe1601,
  552. [STMPE2401] = &stmpe2401,
  553. [STMPE2403] = &stmpe2403,
  554. };
  555. static irqreturn_t stmpe_irq(int irq, void *data)
  556. {
  557. struct stmpe *stmpe = data;
  558. struct stmpe_variant_info *variant = stmpe->variant;
  559. int num = DIV_ROUND_UP(variant->num_irqs, 8);
  560. u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
  561. u8 isr[num];
  562. int ret;
  563. int i;
  564. ret = stmpe_block_read(stmpe, israddr, num, isr);
  565. if (ret < 0)
  566. return IRQ_NONE;
  567. for (i = 0; i < num; i++) {
  568. int bank = num - i - 1;
  569. u8 status = isr[i];
  570. u8 clear;
  571. status &= stmpe->ier[bank];
  572. if (!status)
  573. continue;
  574. clear = status;
  575. while (status) {
  576. int bit = __ffs(status);
  577. int line = bank * 8 + bit;
  578. handle_nested_irq(stmpe->irq_base + line);
  579. status &= ~(1 << bit);
  580. }
  581. stmpe_reg_write(stmpe, israddr + i, clear);
  582. }
  583. return IRQ_HANDLED;
  584. }
  585. static void stmpe_irq_lock(struct irq_data *data)
  586. {
  587. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  588. mutex_lock(&stmpe->irq_lock);
  589. }
  590. static void stmpe_irq_sync_unlock(struct irq_data *data)
  591. {
  592. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  593. struct stmpe_variant_info *variant = stmpe->variant;
  594. int num = DIV_ROUND_UP(variant->num_irqs, 8);
  595. int i;
  596. for (i = 0; i < num; i++) {
  597. u8 new = stmpe->ier[i];
  598. u8 old = stmpe->oldier[i];
  599. if (new == old)
  600. continue;
  601. stmpe->oldier[i] = new;
  602. stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
  603. }
  604. mutex_unlock(&stmpe->irq_lock);
  605. }
  606. static void stmpe_irq_mask(struct irq_data *data)
  607. {
  608. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  609. int offset = data->irq - stmpe->irq_base;
  610. int regoffset = offset / 8;
  611. int mask = 1 << (offset % 8);
  612. stmpe->ier[regoffset] &= ~mask;
  613. }
  614. static void stmpe_irq_unmask(struct irq_data *data)
  615. {
  616. struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
  617. int offset = data->irq - stmpe->irq_base;
  618. int regoffset = offset / 8;
  619. int mask = 1 << (offset % 8);
  620. stmpe->ier[regoffset] |= mask;
  621. }
  622. static struct irq_chip stmpe_irq_chip = {
  623. .name = "stmpe",
  624. .irq_bus_lock = stmpe_irq_lock,
  625. .irq_bus_sync_unlock = stmpe_irq_sync_unlock,
  626. .irq_mask = stmpe_irq_mask,
  627. .irq_unmask = stmpe_irq_unmask,
  628. };
  629. static int __devinit stmpe_irq_init(struct stmpe *stmpe)
  630. {
  631. int num_irqs = stmpe->variant->num_irqs;
  632. int base = stmpe->irq_base;
  633. int irq;
  634. for (irq = base; irq < base + num_irqs; irq++) {
  635. irq_set_chip_data(irq, stmpe);
  636. irq_set_chip_and_handler(irq, &stmpe_irq_chip,
  637. handle_edge_irq);
  638. irq_set_nested_thread(irq, 1);
  639. #ifdef CONFIG_ARM
  640. set_irq_flags(irq, IRQF_VALID);
  641. #else
  642. irq_set_noprobe(irq);
  643. #endif
  644. }
  645. return 0;
  646. }
  647. static void stmpe_irq_remove(struct stmpe *stmpe)
  648. {
  649. int num_irqs = stmpe->variant->num_irqs;
  650. int base = stmpe->irq_base;
  651. int irq;
  652. for (irq = base; irq < base + num_irqs; irq++) {
  653. #ifdef CONFIG_ARM
  654. set_irq_flags(irq, 0);
  655. #endif
  656. irq_set_chip_and_handler(irq, NULL, NULL);
  657. irq_set_chip_data(irq, NULL);
  658. }
  659. }
  660. static int __devinit stmpe_chip_init(struct stmpe *stmpe)
  661. {
  662. unsigned int irq_trigger = stmpe->pdata->irq_trigger;
  663. int autosleep_timeout = stmpe->pdata->autosleep_timeout;
  664. struct stmpe_variant_info *variant = stmpe->variant;
  665. u8 icr = STMPE_ICR_LSB_GIM;
  666. unsigned int id;
  667. u8 data[2];
  668. int ret;
  669. ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
  670. ARRAY_SIZE(data), data);
  671. if (ret < 0)
  672. return ret;
  673. id = (data[0] << 8) | data[1];
  674. if ((id & variant->id_mask) != variant->id_val) {
  675. dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
  676. return -EINVAL;
  677. }
  678. dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
  679. /* Disable all modules -- subdrivers should enable what they need. */
  680. ret = stmpe_disable(stmpe, ~0);
  681. if (ret)
  682. return ret;
  683. if (irq_trigger == IRQF_TRIGGER_FALLING ||
  684. irq_trigger == IRQF_TRIGGER_RISING)
  685. icr |= STMPE_ICR_LSB_EDGE;
  686. if (irq_trigger == IRQF_TRIGGER_RISING ||
  687. irq_trigger == IRQF_TRIGGER_HIGH)
  688. icr |= STMPE_ICR_LSB_HIGH;
  689. if (stmpe->pdata->irq_invert_polarity)
  690. icr ^= STMPE_ICR_LSB_HIGH;
  691. if (stmpe->pdata->autosleep) {
  692. ret = stmpe_autosleep(stmpe, autosleep_timeout);
  693. if (ret)
  694. return ret;
  695. }
  696. return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
  697. }
  698. static int __devinit stmpe_add_device(struct stmpe *stmpe,
  699. struct mfd_cell *cell, int irq)
  700. {
  701. return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
  702. NULL, stmpe->irq_base + irq);
  703. }
  704. static int __devinit stmpe_devices_init(struct stmpe *stmpe)
  705. {
  706. struct stmpe_variant_info *variant = stmpe->variant;
  707. unsigned int platform_blocks = stmpe->pdata->blocks;
  708. int ret = -EINVAL;
  709. int i;
  710. for (i = 0; i < variant->num_blocks; i++) {
  711. struct stmpe_variant_block *block = &variant->blocks[i];
  712. if (!(platform_blocks & block->block))
  713. continue;
  714. platform_blocks &= ~block->block;
  715. ret = stmpe_add_device(stmpe, block->cell, block->irq);
  716. if (ret)
  717. return ret;
  718. }
  719. if (platform_blocks)
  720. dev_warn(stmpe->dev,
  721. "platform wants blocks (%#x) not present on variant",
  722. platform_blocks);
  723. return ret;
  724. }
  725. #ifdef CONFIG_PM
  726. static int stmpe_suspend(struct device *dev)
  727. {
  728. struct i2c_client *i2c = to_i2c_client(dev);
  729. struct stmpe *stmpe = i2c_get_clientdata(i2c);
  730. if (device_may_wakeup(&i2c->dev))
  731. enable_irq_wake(stmpe->irq);
  732. return 0;
  733. }
  734. static int stmpe_resume(struct device *dev)
  735. {
  736. struct i2c_client *i2c = to_i2c_client(dev);
  737. struct stmpe *stmpe = i2c_get_clientdata(i2c);
  738. if (device_may_wakeup(&i2c->dev))
  739. disable_irq_wake(stmpe->irq);
  740. return 0;
  741. }
  742. #endif
  743. static int __devinit stmpe_probe(struct i2c_client *i2c,
  744. const struct i2c_device_id *id)
  745. {
  746. struct stmpe_platform_data *pdata = i2c->dev.platform_data;
  747. struct stmpe *stmpe;
  748. int ret;
  749. if (!pdata)
  750. return -EINVAL;
  751. stmpe = kzalloc(sizeof(struct stmpe), GFP_KERNEL);
  752. if (!stmpe)
  753. return -ENOMEM;
  754. mutex_init(&stmpe->irq_lock);
  755. mutex_init(&stmpe->lock);
  756. stmpe->dev = &i2c->dev;
  757. stmpe->i2c = i2c;
  758. stmpe->pdata = pdata;
  759. stmpe->irq_base = pdata->irq_base;
  760. stmpe->partnum = id->driver_data;
  761. stmpe->variant = stmpe_variant_info[stmpe->partnum];
  762. stmpe->regs = stmpe->variant->regs;
  763. stmpe->num_gpios = stmpe->variant->num_gpios;
  764. i2c_set_clientdata(i2c, stmpe);
  765. if (pdata->irq_over_gpio) {
  766. ret = gpio_request_one(pdata->irq_gpio, GPIOF_DIR_IN, "stmpe");
  767. if (ret) {
  768. dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
  769. ret);
  770. goto out_free;
  771. }
  772. stmpe->irq = gpio_to_irq(pdata->irq_gpio);
  773. } else {
  774. stmpe->irq = i2c->irq;
  775. }
  776. ret = stmpe_chip_init(stmpe);
  777. if (ret)
  778. goto free_gpio;
  779. ret = stmpe_irq_init(stmpe);
  780. if (ret)
  781. goto free_gpio;
  782. ret = request_threaded_irq(stmpe->irq, NULL, stmpe_irq,
  783. pdata->irq_trigger | IRQF_ONESHOT,
  784. "stmpe", stmpe);
  785. if (ret) {
  786. dev_err(stmpe->dev, "failed to request IRQ: %d\n", ret);
  787. goto out_removeirq;
  788. }
  789. ret = stmpe_devices_init(stmpe);
  790. if (ret) {
  791. dev_err(stmpe->dev, "failed to add children\n");
  792. goto out_removedevs;
  793. }
  794. return 0;
  795. out_removedevs:
  796. mfd_remove_devices(stmpe->dev);
  797. free_irq(stmpe->irq, stmpe);
  798. out_removeirq:
  799. stmpe_irq_remove(stmpe);
  800. free_gpio:
  801. if (pdata->irq_over_gpio)
  802. gpio_free(pdata->irq_gpio);
  803. out_free:
  804. kfree(stmpe);
  805. return ret;
  806. }
  807. static int __devexit stmpe_remove(struct i2c_client *client)
  808. {
  809. struct stmpe *stmpe = i2c_get_clientdata(client);
  810. mfd_remove_devices(stmpe->dev);
  811. free_irq(stmpe->irq, stmpe);
  812. stmpe_irq_remove(stmpe);
  813. if (stmpe->pdata->irq_over_gpio)
  814. gpio_free(stmpe->pdata->irq_gpio);
  815. kfree(stmpe);
  816. return 0;
  817. }
  818. static const struct i2c_device_id stmpe_id[] = {
  819. { "stmpe811", STMPE811 },
  820. { "stmpe1601", STMPE1601 },
  821. { "stmpe2401", STMPE2401 },
  822. { "stmpe2403", STMPE2403 },
  823. { }
  824. };
  825. MODULE_DEVICE_TABLE(i2c, stmpe_id);
  826. #ifdef CONFIG_PM
  827. static const struct dev_pm_ops stmpe_dev_pm_ops = {
  828. .suspend = stmpe_suspend,
  829. .resume = stmpe_resume,
  830. };
  831. #endif
  832. static struct i2c_driver stmpe_driver = {
  833. .driver.name = "stmpe",
  834. .driver.owner = THIS_MODULE,
  835. #ifdef CONFIG_PM
  836. .driver.pm = &stmpe_dev_pm_ops,
  837. #endif
  838. .probe = stmpe_probe,
  839. .remove = __devexit_p(stmpe_remove),
  840. .id_table = stmpe_id,
  841. };
  842. static int __init stmpe_init(void)
  843. {
  844. return i2c_add_driver(&stmpe_driver);
  845. }
  846. subsys_initcall(stmpe_init);
  847. static void __exit stmpe_exit(void)
  848. {
  849. i2c_del_driver(&stmpe_driver);
  850. }
  851. module_exit(stmpe_exit);
  852. MODULE_LICENSE("GPL v2");
  853. MODULE_DESCRIPTION("STMPE MFD core driver");
  854. MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");