r8a66597-udc.c 42 KB

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  1. /*
  2. * R8A66597 UDC (USB gadget)
  3. *
  4. * Copyright (C) 2006-2009 Renesas Solutions Corp.
  5. *
  6. * Author : Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. *
  21. */
  22. #include <linux/module.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <linux/io.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/clk.h>
  28. #include <linux/err.h>
  29. #include <linux/slab.h>
  30. #include <linux/usb/ch9.h>
  31. #include <linux/usb/gadget.h>
  32. #include "r8a66597-udc.h"
  33. #define DRIVER_VERSION "2009-08-18"
  34. static const char udc_name[] = "r8a66597_udc";
  35. static const char *r8a66597_ep_name[] = {
  36. "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7",
  37. "ep8", "ep9",
  38. };
  39. static void init_controller(struct r8a66597 *r8a66597);
  40. static void disable_controller(struct r8a66597 *r8a66597);
  41. static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req);
  42. static void irq_packet_write(struct r8a66597_ep *ep,
  43. struct r8a66597_request *req);
  44. static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
  45. gfp_t gfp_flags);
  46. static void transfer_complete(struct r8a66597_ep *ep,
  47. struct r8a66597_request *req, int status);
  48. /*-------------------------------------------------------------------------*/
  49. static inline u16 get_usb_speed(struct r8a66597 *r8a66597)
  50. {
  51. return r8a66597_read(r8a66597, DVSTCTR0) & RHST;
  52. }
  53. static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
  54. unsigned long reg)
  55. {
  56. u16 tmp;
  57. tmp = r8a66597_read(r8a66597, INTENB0);
  58. r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
  59. INTENB0);
  60. r8a66597_bset(r8a66597, (1 << pipenum), reg);
  61. r8a66597_write(r8a66597, tmp, INTENB0);
  62. }
  63. static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
  64. unsigned long reg)
  65. {
  66. u16 tmp;
  67. tmp = r8a66597_read(r8a66597, INTENB0);
  68. r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
  69. INTENB0);
  70. r8a66597_bclr(r8a66597, (1 << pipenum), reg);
  71. r8a66597_write(r8a66597, tmp, INTENB0);
  72. }
  73. static void r8a66597_usb_connect(struct r8a66597 *r8a66597)
  74. {
  75. r8a66597_bset(r8a66597, CTRE, INTENB0);
  76. r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0);
  77. r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
  78. }
  79. static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597)
  80. __releases(r8a66597->lock)
  81. __acquires(r8a66597->lock)
  82. {
  83. r8a66597_bclr(r8a66597, CTRE, INTENB0);
  84. r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0);
  85. r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
  86. r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
  87. spin_unlock(&r8a66597->lock);
  88. r8a66597->driver->disconnect(&r8a66597->gadget);
  89. spin_lock(&r8a66597->lock);
  90. disable_controller(r8a66597);
  91. init_controller(r8a66597);
  92. r8a66597_bset(r8a66597, VBSE, INTENB0);
  93. INIT_LIST_HEAD(&r8a66597->ep[0].queue);
  94. }
  95. static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
  96. {
  97. u16 pid = 0;
  98. unsigned long offset;
  99. if (pipenum == 0)
  100. pid = r8a66597_read(r8a66597, DCPCTR) & PID;
  101. else if (pipenum < R8A66597_MAX_NUM_PIPE) {
  102. offset = get_pipectr_addr(pipenum);
  103. pid = r8a66597_read(r8a66597, offset) & PID;
  104. } else
  105. printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
  106. return pid;
  107. }
  108. static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
  109. u16 pid)
  110. {
  111. unsigned long offset;
  112. if (pipenum == 0)
  113. r8a66597_mdfy(r8a66597, pid, PID, DCPCTR);
  114. else if (pipenum < R8A66597_MAX_NUM_PIPE) {
  115. offset = get_pipectr_addr(pipenum);
  116. r8a66597_mdfy(r8a66597, pid, PID, offset);
  117. } else
  118. printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
  119. }
  120. static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
  121. {
  122. control_reg_set_pid(r8a66597, pipenum, PID_BUF);
  123. }
  124. static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
  125. {
  126. control_reg_set_pid(r8a66597, pipenum, PID_NAK);
  127. }
  128. static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
  129. {
  130. control_reg_set_pid(r8a66597, pipenum, PID_STALL);
  131. }
  132. static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
  133. {
  134. u16 ret = 0;
  135. unsigned long offset;
  136. if (pipenum == 0)
  137. ret = r8a66597_read(r8a66597, DCPCTR);
  138. else if (pipenum < R8A66597_MAX_NUM_PIPE) {
  139. offset = get_pipectr_addr(pipenum);
  140. ret = r8a66597_read(r8a66597, offset);
  141. } else
  142. printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
  143. return ret;
  144. }
  145. static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
  146. {
  147. unsigned long offset;
  148. pipe_stop(r8a66597, pipenum);
  149. if (pipenum == 0)
  150. r8a66597_bset(r8a66597, SQCLR, DCPCTR);
  151. else if (pipenum < R8A66597_MAX_NUM_PIPE) {
  152. offset = get_pipectr_addr(pipenum);
  153. r8a66597_bset(r8a66597, SQCLR, offset);
  154. } else
  155. printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum);
  156. }
  157. static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
  158. {
  159. u16 tmp;
  160. int size;
  161. if (pipenum == 0) {
  162. tmp = r8a66597_read(r8a66597, DCPCFG);
  163. if ((tmp & R8A66597_CNTMD) != 0)
  164. size = 256;
  165. else {
  166. tmp = r8a66597_read(r8a66597, DCPMAXP);
  167. size = tmp & MAXP;
  168. }
  169. } else {
  170. r8a66597_write(r8a66597, pipenum, PIPESEL);
  171. tmp = r8a66597_read(r8a66597, PIPECFG);
  172. if ((tmp & R8A66597_CNTMD) != 0) {
  173. tmp = r8a66597_read(r8a66597, PIPEBUF);
  174. size = ((tmp >> 10) + 1) * 64;
  175. } else {
  176. tmp = r8a66597_read(r8a66597, PIPEMAXP);
  177. size = tmp & MXPS;
  178. }
  179. }
  180. return size;
  181. }
  182. static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
  183. {
  184. if (r8a66597->pdata->on_chip)
  185. return MBW_32;
  186. else
  187. return MBW_16;
  188. }
  189. static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
  190. {
  191. struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
  192. if (ep->use_dma)
  193. return;
  194. r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
  195. ndelay(450);
  196. r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
  197. }
  198. static int pipe_buffer_setting(struct r8a66597 *r8a66597,
  199. struct r8a66597_pipe_info *info)
  200. {
  201. u16 bufnum = 0, buf_bsize = 0;
  202. u16 pipecfg = 0;
  203. if (info->pipe == 0)
  204. return -EINVAL;
  205. r8a66597_write(r8a66597, info->pipe, PIPESEL);
  206. if (info->dir_in)
  207. pipecfg |= R8A66597_DIR;
  208. pipecfg |= info->type;
  209. pipecfg |= info->epnum;
  210. switch (info->type) {
  211. case R8A66597_INT:
  212. bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);
  213. buf_bsize = 0;
  214. break;
  215. case R8A66597_BULK:
  216. /* isochronous pipes may be used as bulk pipes */
  217. if (info->pipe >= R8A66597_BASE_PIPENUM_BULK)
  218. bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
  219. else
  220. bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
  221. bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16);
  222. buf_bsize = 7;
  223. pipecfg |= R8A66597_DBLB;
  224. if (!info->dir_in)
  225. pipecfg |= R8A66597_SHTNAK;
  226. break;
  227. case R8A66597_ISO:
  228. bufnum = R8A66597_BASE_BUFNUM +
  229. (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;
  230. buf_bsize = 7;
  231. break;
  232. }
  233. if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) {
  234. pr_err("r8a66597 pipe memory is insufficient\n");
  235. return -ENOMEM;
  236. }
  237. r8a66597_write(r8a66597, pipecfg, PIPECFG);
  238. r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF);
  239. r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP);
  240. if (info->interval)
  241. info->interval--;
  242. r8a66597_write(r8a66597, info->interval, PIPEPERI);
  243. return 0;
  244. }
  245. static void pipe_buffer_release(struct r8a66597 *r8a66597,
  246. struct r8a66597_pipe_info *info)
  247. {
  248. if (info->pipe == 0)
  249. return;
  250. if (is_bulk_pipe(info->pipe))
  251. r8a66597->bulk--;
  252. else if (is_interrupt_pipe(info->pipe))
  253. r8a66597->interrupt--;
  254. else if (is_isoc_pipe(info->pipe)) {
  255. r8a66597->isochronous--;
  256. if (info->type == R8A66597_BULK)
  257. r8a66597->bulk--;
  258. } else
  259. printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n",
  260. info->pipe);
  261. }
  262. static void pipe_initialize(struct r8a66597_ep *ep)
  263. {
  264. struct r8a66597 *r8a66597 = ep->r8a66597;
  265. r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel);
  266. r8a66597_write(r8a66597, ACLRM, ep->pipectr);
  267. r8a66597_write(r8a66597, 0, ep->pipectr);
  268. r8a66597_write(r8a66597, SQCLR, ep->pipectr);
  269. if (ep->use_dma) {
  270. r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
  271. ndelay(450);
  272. r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
  273. }
  274. }
  275. static void r8a66597_ep_setting(struct r8a66597 *r8a66597,
  276. struct r8a66597_ep *ep,
  277. const struct usb_endpoint_descriptor *desc,
  278. u16 pipenum, int dma)
  279. {
  280. ep->use_dma = 0;
  281. ep->fifoaddr = CFIFO;
  282. ep->fifosel = CFIFOSEL;
  283. ep->fifoctr = CFIFOCTR;
  284. ep->fifotrn = 0;
  285. ep->pipectr = get_pipectr_addr(pipenum);
  286. ep->pipenum = pipenum;
  287. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  288. r8a66597->pipenum2ep[pipenum] = ep;
  289. r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK]
  290. = ep;
  291. INIT_LIST_HEAD(&ep->queue);
  292. }
  293. static void r8a66597_ep_release(struct r8a66597_ep *ep)
  294. {
  295. struct r8a66597 *r8a66597 = ep->r8a66597;
  296. u16 pipenum = ep->pipenum;
  297. if (pipenum == 0)
  298. return;
  299. if (ep->use_dma)
  300. r8a66597->num_dma--;
  301. ep->pipenum = 0;
  302. ep->busy = 0;
  303. ep->use_dma = 0;
  304. }
  305. static int alloc_pipe_config(struct r8a66597_ep *ep,
  306. const struct usb_endpoint_descriptor *desc)
  307. {
  308. struct r8a66597 *r8a66597 = ep->r8a66597;
  309. struct r8a66597_pipe_info info;
  310. int dma = 0;
  311. unsigned char *counter;
  312. int ret;
  313. ep->desc = desc;
  314. if (ep->pipenum) /* already allocated pipe */
  315. return 0;
  316. switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
  317. case USB_ENDPOINT_XFER_BULK:
  318. if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) {
  319. if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
  320. printk(KERN_ERR "bulk pipe is insufficient\n");
  321. return -ENODEV;
  322. } else {
  323. info.pipe = R8A66597_BASE_PIPENUM_ISOC
  324. + r8a66597->isochronous;
  325. counter = &r8a66597->isochronous;
  326. }
  327. } else {
  328. info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;
  329. counter = &r8a66597->bulk;
  330. }
  331. info.type = R8A66597_BULK;
  332. dma = 1;
  333. break;
  334. case USB_ENDPOINT_XFER_INT:
  335. if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) {
  336. printk(KERN_ERR "interrupt pipe is insufficient\n");
  337. return -ENODEV;
  338. }
  339. info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;
  340. info.type = R8A66597_INT;
  341. counter = &r8a66597->interrupt;
  342. break;
  343. case USB_ENDPOINT_XFER_ISOC:
  344. if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
  345. printk(KERN_ERR "isochronous pipe is insufficient\n");
  346. return -ENODEV;
  347. }
  348. info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;
  349. info.type = R8A66597_ISO;
  350. counter = &r8a66597->isochronous;
  351. break;
  352. default:
  353. printk(KERN_ERR "unexpect xfer type\n");
  354. return -EINVAL;
  355. }
  356. ep->type = info.type;
  357. info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
  358. info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  359. info.interval = desc->bInterval;
  360. if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
  361. info.dir_in = 1;
  362. else
  363. info.dir_in = 0;
  364. ret = pipe_buffer_setting(r8a66597, &info);
  365. if (ret < 0) {
  366. printk(KERN_ERR "pipe_buffer_setting fail\n");
  367. return ret;
  368. }
  369. (*counter)++;
  370. if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK)
  371. r8a66597->bulk++;
  372. r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);
  373. pipe_initialize(ep);
  374. return 0;
  375. }
  376. static int free_pipe_config(struct r8a66597_ep *ep)
  377. {
  378. struct r8a66597 *r8a66597 = ep->r8a66597;
  379. struct r8a66597_pipe_info info;
  380. info.pipe = ep->pipenum;
  381. info.type = ep->type;
  382. pipe_buffer_release(r8a66597, &info);
  383. r8a66597_ep_release(ep);
  384. return 0;
  385. }
  386. /*-------------------------------------------------------------------------*/
  387. static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
  388. {
  389. enable_irq_ready(r8a66597, pipenum);
  390. enable_irq_nrdy(r8a66597, pipenum);
  391. }
  392. static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
  393. {
  394. disable_irq_ready(r8a66597, pipenum);
  395. disable_irq_nrdy(r8a66597, pipenum);
  396. }
  397. /* if complete is true, gadget driver complete function is not call */
  398. static void control_end(struct r8a66597 *r8a66597, unsigned ccpl)
  399. {
  400. r8a66597->ep[0].internal_ccpl = ccpl;
  401. pipe_start(r8a66597, 0);
  402. r8a66597_bset(r8a66597, CCPL, DCPCTR);
  403. }
  404. static void start_ep0_write(struct r8a66597_ep *ep,
  405. struct r8a66597_request *req)
  406. {
  407. struct r8a66597 *r8a66597 = ep->r8a66597;
  408. pipe_change(r8a66597, ep->pipenum);
  409. r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL);
  410. r8a66597_write(r8a66597, BCLR, ep->fifoctr);
  411. if (req->req.length == 0) {
  412. r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
  413. pipe_start(r8a66597, 0);
  414. transfer_complete(ep, req, 0);
  415. } else {
  416. r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
  417. irq_ep0_write(ep, req);
  418. }
  419. }
  420. static void start_packet_write(struct r8a66597_ep *ep,
  421. struct r8a66597_request *req)
  422. {
  423. struct r8a66597 *r8a66597 = ep->r8a66597;
  424. u16 tmp;
  425. pipe_change(r8a66597, ep->pipenum);
  426. disable_irq_empty(r8a66597, ep->pipenum);
  427. pipe_start(r8a66597, ep->pipenum);
  428. tmp = r8a66597_read(r8a66597, ep->fifoctr);
  429. if (unlikely((tmp & FRDY) == 0))
  430. pipe_irq_enable(r8a66597, ep->pipenum);
  431. else
  432. irq_packet_write(ep, req);
  433. }
  434. static void start_packet_read(struct r8a66597_ep *ep,
  435. struct r8a66597_request *req)
  436. {
  437. struct r8a66597 *r8a66597 = ep->r8a66597;
  438. u16 pipenum = ep->pipenum;
  439. if (ep->pipenum == 0) {
  440. r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL);
  441. r8a66597_write(r8a66597, BCLR, ep->fifoctr);
  442. pipe_start(r8a66597, pipenum);
  443. pipe_irq_enable(r8a66597, pipenum);
  444. } else {
  445. if (ep->use_dma) {
  446. r8a66597_bset(r8a66597, TRCLR, ep->fifosel);
  447. pipe_change(r8a66597, pipenum);
  448. r8a66597_bset(r8a66597, TRENB, ep->fifosel);
  449. r8a66597_write(r8a66597,
  450. (req->req.length + ep->ep.maxpacket - 1)
  451. / ep->ep.maxpacket,
  452. ep->fifotrn);
  453. }
  454. pipe_start(r8a66597, pipenum); /* trigger once */
  455. pipe_irq_enable(r8a66597, pipenum);
  456. }
  457. }
  458. static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req)
  459. {
  460. if (ep->desc->bEndpointAddress & USB_DIR_IN)
  461. start_packet_write(ep, req);
  462. else
  463. start_packet_read(ep, req);
  464. }
  465. static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req)
  466. {
  467. u16 ctsq;
  468. ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ;
  469. switch (ctsq) {
  470. case CS_RDDS:
  471. start_ep0_write(ep, req);
  472. break;
  473. case CS_WRDS:
  474. start_packet_read(ep, req);
  475. break;
  476. case CS_WRND:
  477. control_end(ep->r8a66597, 0);
  478. break;
  479. default:
  480. printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq);
  481. break;
  482. }
  483. }
  484. static void init_controller(struct r8a66597 *r8a66597)
  485. {
  486. u16 vif = r8a66597->pdata->vif ? LDRV : 0;
  487. u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
  488. u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
  489. if (r8a66597->pdata->on_chip) {
  490. if (r8a66597->pdata->buswait)
  491. r8a66597_write(r8a66597, r8a66597->pdata->buswait,
  492. SYSCFG1);
  493. else
  494. r8a66597_write(r8a66597, 0x0f, SYSCFG1);
  495. r8a66597_bset(r8a66597, HSE, SYSCFG0);
  496. r8a66597_bclr(r8a66597, USBE, SYSCFG0);
  497. r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
  498. r8a66597_bset(r8a66597, USBE, SYSCFG0);
  499. r8a66597_bset(r8a66597, SCKE, SYSCFG0);
  500. r8a66597_bset(r8a66597, irq_sense, INTENB1);
  501. r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
  502. DMA0CFG);
  503. } else {
  504. r8a66597_bset(r8a66597, vif | endian, PINCFG);
  505. r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */
  506. r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
  507. XTAL, SYSCFG0);
  508. r8a66597_bclr(r8a66597, USBE, SYSCFG0);
  509. r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
  510. r8a66597_bset(r8a66597, USBE, SYSCFG0);
  511. r8a66597_bset(r8a66597, XCKE, SYSCFG0);
  512. msleep(3);
  513. r8a66597_bset(r8a66597, PLLC, SYSCFG0);
  514. msleep(1);
  515. r8a66597_bset(r8a66597, SCKE, SYSCFG0);
  516. r8a66597_bset(r8a66597, irq_sense, INTENB1);
  517. r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
  518. DMA0CFG);
  519. }
  520. }
  521. static void disable_controller(struct r8a66597 *r8a66597)
  522. {
  523. if (r8a66597->pdata->on_chip) {
  524. r8a66597_bset(r8a66597, SCKE, SYSCFG0);
  525. r8a66597_bclr(r8a66597, UTST, TESTMODE);
  526. /* disable interrupts */
  527. r8a66597_write(r8a66597, 0, INTENB0);
  528. r8a66597_write(r8a66597, 0, INTENB1);
  529. r8a66597_write(r8a66597, 0, BRDYENB);
  530. r8a66597_write(r8a66597, 0, BEMPENB);
  531. r8a66597_write(r8a66597, 0, NRDYENB);
  532. /* clear status */
  533. r8a66597_write(r8a66597, 0, BRDYSTS);
  534. r8a66597_write(r8a66597, 0, NRDYSTS);
  535. r8a66597_write(r8a66597, 0, BEMPSTS);
  536. r8a66597_bclr(r8a66597, USBE, SYSCFG0);
  537. r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
  538. } else {
  539. r8a66597_bclr(r8a66597, UTST, TESTMODE);
  540. r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
  541. udelay(1);
  542. r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
  543. udelay(1);
  544. udelay(1);
  545. r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
  546. }
  547. }
  548. static void r8a66597_start_xclock(struct r8a66597 *r8a66597)
  549. {
  550. u16 tmp;
  551. if (!r8a66597->pdata->on_chip) {
  552. tmp = r8a66597_read(r8a66597, SYSCFG0);
  553. if (!(tmp & XCKE))
  554. r8a66597_bset(r8a66597, XCKE, SYSCFG0);
  555. }
  556. }
  557. static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep)
  558. {
  559. return list_entry(ep->queue.next, struct r8a66597_request, queue);
  560. }
  561. /*-------------------------------------------------------------------------*/
  562. static void transfer_complete(struct r8a66597_ep *ep,
  563. struct r8a66597_request *req, int status)
  564. __releases(r8a66597->lock)
  565. __acquires(r8a66597->lock)
  566. {
  567. int restart = 0;
  568. if (unlikely(ep->pipenum == 0)) {
  569. if (ep->internal_ccpl) {
  570. ep->internal_ccpl = 0;
  571. return;
  572. }
  573. }
  574. list_del_init(&req->queue);
  575. if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
  576. req->req.status = -ESHUTDOWN;
  577. else
  578. req->req.status = status;
  579. if (!list_empty(&ep->queue))
  580. restart = 1;
  581. spin_unlock(&ep->r8a66597->lock);
  582. req->req.complete(&ep->ep, &req->req);
  583. spin_lock(&ep->r8a66597->lock);
  584. if (restart) {
  585. req = get_request_from_ep(ep);
  586. if (ep->desc)
  587. start_packet(ep, req);
  588. }
  589. }
  590. static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req)
  591. {
  592. int i;
  593. u16 tmp;
  594. unsigned bufsize;
  595. size_t size;
  596. void *buf;
  597. u16 pipenum = ep->pipenum;
  598. struct r8a66597 *r8a66597 = ep->r8a66597;
  599. pipe_change(r8a66597, pipenum);
  600. r8a66597_bset(r8a66597, ISEL, ep->fifosel);
  601. i = 0;
  602. do {
  603. tmp = r8a66597_read(r8a66597, ep->fifoctr);
  604. if (i++ > 100000) {
  605. printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus"
  606. "conflict. please power off this controller.");
  607. return;
  608. }
  609. ndelay(1);
  610. } while ((tmp & FRDY) == 0);
  611. /* prepare parameters */
  612. bufsize = get_buffer_size(r8a66597, pipenum);
  613. buf = req->req.buf + req->req.actual;
  614. size = min(bufsize, req->req.length - req->req.actual);
  615. /* write fifo */
  616. if (req->req.buf) {
  617. if (size > 0)
  618. r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
  619. if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
  620. r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
  621. }
  622. /* update parameters */
  623. req->req.actual += size;
  624. /* check transfer finish */
  625. if ((!req->req.zero && (req->req.actual == req->req.length))
  626. || (size % ep->ep.maxpacket)
  627. || (size == 0)) {
  628. disable_irq_ready(r8a66597, pipenum);
  629. disable_irq_empty(r8a66597, pipenum);
  630. } else {
  631. disable_irq_ready(r8a66597, pipenum);
  632. enable_irq_empty(r8a66597, pipenum);
  633. }
  634. pipe_start(r8a66597, pipenum);
  635. }
  636. static void irq_packet_write(struct r8a66597_ep *ep,
  637. struct r8a66597_request *req)
  638. {
  639. u16 tmp;
  640. unsigned bufsize;
  641. size_t size;
  642. void *buf;
  643. u16 pipenum = ep->pipenum;
  644. struct r8a66597 *r8a66597 = ep->r8a66597;
  645. pipe_change(r8a66597, pipenum);
  646. tmp = r8a66597_read(r8a66597, ep->fifoctr);
  647. if (unlikely((tmp & FRDY) == 0)) {
  648. pipe_stop(r8a66597, pipenum);
  649. pipe_irq_disable(r8a66597, pipenum);
  650. printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum);
  651. return;
  652. }
  653. /* prepare parameters */
  654. bufsize = get_buffer_size(r8a66597, pipenum);
  655. buf = req->req.buf + req->req.actual;
  656. size = min(bufsize, req->req.length - req->req.actual);
  657. /* write fifo */
  658. if (req->req.buf) {
  659. r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
  660. if ((size == 0)
  661. || ((size % ep->ep.maxpacket) != 0)
  662. || ((bufsize != ep->ep.maxpacket)
  663. && (bufsize > size)))
  664. r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
  665. }
  666. /* update parameters */
  667. req->req.actual += size;
  668. /* check transfer finish */
  669. if ((!req->req.zero && (req->req.actual == req->req.length))
  670. || (size % ep->ep.maxpacket)
  671. || (size == 0)) {
  672. disable_irq_ready(r8a66597, pipenum);
  673. enable_irq_empty(r8a66597, pipenum);
  674. } else {
  675. disable_irq_empty(r8a66597, pipenum);
  676. pipe_irq_enable(r8a66597, pipenum);
  677. }
  678. }
  679. static void irq_packet_read(struct r8a66597_ep *ep,
  680. struct r8a66597_request *req)
  681. {
  682. u16 tmp;
  683. int rcv_len, bufsize, req_len;
  684. int size;
  685. void *buf;
  686. u16 pipenum = ep->pipenum;
  687. struct r8a66597 *r8a66597 = ep->r8a66597;
  688. int finish = 0;
  689. pipe_change(r8a66597, pipenum);
  690. tmp = r8a66597_read(r8a66597, ep->fifoctr);
  691. if (unlikely((tmp & FRDY) == 0)) {
  692. req->req.status = -EPIPE;
  693. pipe_stop(r8a66597, pipenum);
  694. pipe_irq_disable(r8a66597, pipenum);
  695. printk(KERN_ERR "read fifo not ready");
  696. return;
  697. }
  698. /* prepare parameters */
  699. rcv_len = tmp & DTLN;
  700. bufsize = get_buffer_size(r8a66597, pipenum);
  701. buf = req->req.buf + req->req.actual;
  702. req_len = req->req.length - req->req.actual;
  703. if (rcv_len < bufsize)
  704. size = min(rcv_len, req_len);
  705. else
  706. size = min(bufsize, req_len);
  707. /* update parameters */
  708. req->req.actual += size;
  709. /* check transfer finish */
  710. if ((!req->req.zero && (req->req.actual == req->req.length))
  711. || (size % ep->ep.maxpacket)
  712. || (size == 0)) {
  713. pipe_stop(r8a66597, pipenum);
  714. pipe_irq_disable(r8a66597, pipenum);
  715. finish = 1;
  716. }
  717. /* read fifo */
  718. if (req->req.buf) {
  719. if (size == 0)
  720. r8a66597_write(r8a66597, BCLR, ep->fifoctr);
  721. else
  722. r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size);
  723. }
  724. if ((ep->pipenum != 0) && finish)
  725. transfer_complete(ep, req, 0);
  726. }
  727. static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb)
  728. {
  729. u16 check;
  730. u16 pipenum;
  731. struct r8a66597_ep *ep;
  732. struct r8a66597_request *req;
  733. if ((status & BRDY0) && (enb & BRDY0)) {
  734. r8a66597_write(r8a66597, ~BRDY0, BRDYSTS);
  735. r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL);
  736. ep = &r8a66597->ep[0];
  737. req = get_request_from_ep(ep);
  738. irq_packet_read(ep, req);
  739. } else {
  740. for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
  741. check = 1 << pipenum;
  742. if ((status & check) && (enb & check)) {
  743. r8a66597_write(r8a66597, ~check, BRDYSTS);
  744. ep = r8a66597->pipenum2ep[pipenum];
  745. req = get_request_from_ep(ep);
  746. if (ep->desc->bEndpointAddress & USB_DIR_IN)
  747. irq_packet_write(ep, req);
  748. else
  749. irq_packet_read(ep, req);
  750. }
  751. }
  752. }
  753. }
  754. static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb)
  755. {
  756. u16 tmp;
  757. u16 check;
  758. u16 pipenum;
  759. struct r8a66597_ep *ep;
  760. struct r8a66597_request *req;
  761. if ((status & BEMP0) && (enb & BEMP0)) {
  762. r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
  763. ep = &r8a66597->ep[0];
  764. req = get_request_from_ep(ep);
  765. irq_ep0_write(ep, req);
  766. } else {
  767. for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
  768. check = 1 << pipenum;
  769. if ((status & check) && (enb & check)) {
  770. r8a66597_write(r8a66597, ~check, BEMPSTS);
  771. tmp = control_reg_get(r8a66597, pipenum);
  772. if ((tmp & INBUFM) == 0) {
  773. disable_irq_empty(r8a66597, pipenum);
  774. pipe_irq_disable(r8a66597, pipenum);
  775. pipe_stop(r8a66597, pipenum);
  776. ep = r8a66597->pipenum2ep[pipenum];
  777. req = get_request_from_ep(ep);
  778. if (!list_empty(&ep->queue))
  779. transfer_complete(ep, req, 0);
  780. }
  781. }
  782. }
  783. }
  784. }
  785. static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
  786. __releases(r8a66597->lock)
  787. __acquires(r8a66597->lock)
  788. {
  789. struct r8a66597_ep *ep;
  790. u16 pid;
  791. u16 status = 0;
  792. u16 w_index = le16_to_cpu(ctrl->wIndex);
  793. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  794. case USB_RECIP_DEVICE:
  795. status = 1 << USB_DEVICE_SELF_POWERED;
  796. break;
  797. case USB_RECIP_INTERFACE:
  798. status = 0;
  799. break;
  800. case USB_RECIP_ENDPOINT:
  801. ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
  802. pid = control_reg_get_pid(r8a66597, ep->pipenum);
  803. if (pid == PID_STALL)
  804. status = 1 << USB_ENDPOINT_HALT;
  805. else
  806. status = 0;
  807. break;
  808. default:
  809. pipe_stall(r8a66597, 0);
  810. return; /* exit */
  811. }
  812. r8a66597->ep0_data = cpu_to_le16(status);
  813. r8a66597->ep0_req->buf = &r8a66597->ep0_data;
  814. r8a66597->ep0_req->length = 2;
  815. /* AV: what happens if we get called again before that gets through? */
  816. spin_unlock(&r8a66597->lock);
  817. r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL);
  818. spin_lock(&r8a66597->lock);
  819. }
  820. static void clear_feature(struct r8a66597 *r8a66597,
  821. struct usb_ctrlrequest *ctrl)
  822. {
  823. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  824. case USB_RECIP_DEVICE:
  825. control_end(r8a66597, 1);
  826. break;
  827. case USB_RECIP_INTERFACE:
  828. control_end(r8a66597, 1);
  829. break;
  830. case USB_RECIP_ENDPOINT: {
  831. struct r8a66597_ep *ep;
  832. struct r8a66597_request *req;
  833. u16 w_index = le16_to_cpu(ctrl->wIndex);
  834. ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
  835. if (!ep->wedge) {
  836. pipe_stop(r8a66597, ep->pipenum);
  837. control_reg_sqclr(r8a66597, ep->pipenum);
  838. spin_unlock(&r8a66597->lock);
  839. usb_ep_clear_halt(&ep->ep);
  840. spin_lock(&r8a66597->lock);
  841. }
  842. control_end(r8a66597, 1);
  843. req = get_request_from_ep(ep);
  844. if (ep->busy) {
  845. ep->busy = 0;
  846. if (list_empty(&ep->queue))
  847. break;
  848. start_packet(ep, req);
  849. } else if (!list_empty(&ep->queue))
  850. pipe_start(r8a66597, ep->pipenum);
  851. }
  852. break;
  853. default:
  854. pipe_stall(r8a66597, 0);
  855. break;
  856. }
  857. }
  858. static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
  859. {
  860. u16 tmp;
  861. int timeout = 3000;
  862. switch (ctrl->bRequestType & USB_RECIP_MASK) {
  863. case USB_RECIP_DEVICE:
  864. switch (le16_to_cpu(ctrl->wValue)) {
  865. case USB_DEVICE_TEST_MODE:
  866. control_end(r8a66597, 1);
  867. /* Wait for the completion of status stage */
  868. do {
  869. tmp = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
  870. udelay(1);
  871. } while (tmp != CS_IDST || timeout-- > 0);
  872. if (tmp == CS_IDST)
  873. r8a66597_bset(r8a66597,
  874. le16_to_cpu(ctrl->wIndex >> 8),
  875. TESTMODE);
  876. break;
  877. default:
  878. pipe_stall(r8a66597, 0);
  879. break;
  880. }
  881. break;
  882. case USB_RECIP_INTERFACE:
  883. control_end(r8a66597, 1);
  884. break;
  885. case USB_RECIP_ENDPOINT: {
  886. struct r8a66597_ep *ep;
  887. u16 w_index = le16_to_cpu(ctrl->wIndex);
  888. ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
  889. pipe_stall(r8a66597, ep->pipenum);
  890. control_end(r8a66597, 1);
  891. }
  892. break;
  893. default:
  894. pipe_stall(r8a66597, 0);
  895. break;
  896. }
  897. }
  898. /* if return value is true, call class driver's setup() */
  899. static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
  900. {
  901. u16 *p = (u16 *)ctrl;
  902. unsigned long offset = USBREQ;
  903. int i, ret = 0;
  904. /* read fifo */
  905. r8a66597_write(r8a66597, ~VALID, INTSTS0);
  906. for (i = 0; i < 4; i++)
  907. p[i] = r8a66597_read(r8a66597, offset + i*2);
  908. /* check request */
  909. if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
  910. switch (ctrl->bRequest) {
  911. case USB_REQ_GET_STATUS:
  912. get_status(r8a66597, ctrl);
  913. break;
  914. case USB_REQ_CLEAR_FEATURE:
  915. clear_feature(r8a66597, ctrl);
  916. break;
  917. case USB_REQ_SET_FEATURE:
  918. set_feature(r8a66597, ctrl);
  919. break;
  920. default:
  921. ret = 1;
  922. break;
  923. }
  924. } else
  925. ret = 1;
  926. return ret;
  927. }
  928. static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597)
  929. {
  930. u16 speed = get_usb_speed(r8a66597);
  931. switch (speed) {
  932. case HSMODE:
  933. r8a66597->gadget.speed = USB_SPEED_HIGH;
  934. break;
  935. case FSMODE:
  936. r8a66597->gadget.speed = USB_SPEED_FULL;
  937. break;
  938. default:
  939. r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
  940. printk(KERN_ERR "USB speed unknown\n");
  941. }
  942. }
  943. static void irq_device_state(struct r8a66597 *r8a66597)
  944. {
  945. u16 dvsq;
  946. dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ;
  947. r8a66597_write(r8a66597, ~DVST, INTSTS0);
  948. if (dvsq == DS_DFLT) {
  949. /* bus reset */
  950. spin_unlock(&r8a66597->lock);
  951. r8a66597->driver->disconnect(&r8a66597->gadget);
  952. spin_lock(&r8a66597->lock);
  953. r8a66597_update_usb_speed(r8a66597);
  954. }
  955. if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG)
  956. r8a66597_update_usb_speed(r8a66597);
  957. if ((dvsq == DS_CNFG || dvsq == DS_ADDS)
  958. && r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
  959. r8a66597_update_usb_speed(r8a66597);
  960. r8a66597->old_dvsq = dvsq;
  961. }
  962. static void irq_control_stage(struct r8a66597 *r8a66597)
  963. __releases(r8a66597->lock)
  964. __acquires(r8a66597->lock)
  965. {
  966. struct usb_ctrlrequest ctrl;
  967. u16 ctsq;
  968. ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
  969. r8a66597_write(r8a66597, ~CTRT, INTSTS0);
  970. switch (ctsq) {
  971. case CS_IDST: {
  972. struct r8a66597_ep *ep;
  973. struct r8a66597_request *req;
  974. ep = &r8a66597->ep[0];
  975. req = get_request_from_ep(ep);
  976. transfer_complete(ep, req, 0);
  977. }
  978. break;
  979. case CS_RDDS:
  980. case CS_WRDS:
  981. case CS_WRND:
  982. if (setup_packet(r8a66597, &ctrl)) {
  983. spin_unlock(&r8a66597->lock);
  984. if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl)
  985. < 0)
  986. pipe_stall(r8a66597, 0);
  987. spin_lock(&r8a66597->lock);
  988. }
  989. break;
  990. case CS_RDSS:
  991. case CS_WRSS:
  992. control_end(r8a66597, 0);
  993. break;
  994. default:
  995. printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq);
  996. break;
  997. }
  998. }
  999. static irqreturn_t r8a66597_irq(int irq, void *_r8a66597)
  1000. {
  1001. struct r8a66597 *r8a66597 = _r8a66597;
  1002. u16 intsts0;
  1003. u16 intenb0;
  1004. u16 brdysts, nrdysts, bempsts;
  1005. u16 brdyenb, nrdyenb, bempenb;
  1006. u16 savepipe;
  1007. u16 mask0;
  1008. spin_lock(&r8a66597->lock);
  1009. intsts0 = r8a66597_read(r8a66597, INTSTS0);
  1010. intenb0 = r8a66597_read(r8a66597, INTENB0);
  1011. savepipe = r8a66597_read(r8a66597, CFIFOSEL);
  1012. mask0 = intsts0 & intenb0;
  1013. if (mask0) {
  1014. brdysts = r8a66597_read(r8a66597, BRDYSTS);
  1015. nrdysts = r8a66597_read(r8a66597, NRDYSTS);
  1016. bempsts = r8a66597_read(r8a66597, BEMPSTS);
  1017. brdyenb = r8a66597_read(r8a66597, BRDYENB);
  1018. nrdyenb = r8a66597_read(r8a66597, NRDYENB);
  1019. bempenb = r8a66597_read(r8a66597, BEMPENB);
  1020. if (mask0 & VBINT) {
  1021. r8a66597_write(r8a66597, 0xffff & ~VBINT,
  1022. INTSTS0);
  1023. r8a66597_start_xclock(r8a66597);
  1024. /* start vbus sampling */
  1025. r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0)
  1026. & VBSTS;
  1027. r8a66597->scount = R8A66597_MAX_SAMPLING;
  1028. mod_timer(&r8a66597->timer,
  1029. jiffies + msecs_to_jiffies(50));
  1030. }
  1031. if (intsts0 & DVSQ)
  1032. irq_device_state(r8a66597);
  1033. if ((intsts0 & BRDY) && (intenb0 & BRDYE)
  1034. && (brdysts & brdyenb))
  1035. irq_pipe_ready(r8a66597, brdysts, brdyenb);
  1036. if ((intsts0 & BEMP) && (intenb0 & BEMPE)
  1037. && (bempsts & bempenb))
  1038. irq_pipe_empty(r8a66597, bempsts, bempenb);
  1039. if (intsts0 & CTRT)
  1040. irq_control_stage(r8a66597);
  1041. }
  1042. r8a66597_write(r8a66597, savepipe, CFIFOSEL);
  1043. spin_unlock(&r8a66597->lock);
  1044. return IRQ_HANDLED;
  1045. }
  1046. static void r8a66597_timer(unsigned long _r8a66597)
  1047. {
  1048. struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
  1049. unsigned long flags;
  1050. u16 tmp;
  1051. spin_lock_irqsave(&r8a66597->lock, flags);
  1052. tmp = r8a66597_read(r8a66597, SYSCFG0);
  1053. if (r8a66597->scount > 0) {
  1054. tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS;
  1055. if (tmp == r8a66597->old_vbus) {
  1056. r8a66597->scount--;
  1057. if (r8a66597->scount == 0) {
  1058. if (tmp == VBSTS)
  1059. r8a66597_usb_connect(r8a66597);
  1060. else
  1061. r8a66597_usb_disconnect(r8a66597);
  1062. } else {
  1063. mod_timer(&r8a66597->timer,
  1064. jiffies + msecs_to_jiffies(50));
  1065. }
  1066. } else {
  1067. r8a66597->scount = R8A66597_MAX_SAMPLING;
  1068. r8a66597->old_vbus = tmp;
  1069. mod_timer(&r8a66597->timer,
  1070. jiffies + msecs_to_jiffies(50));
  1071. }
  1072. }
  1073. spin_unlock_irqrestore(&r8a66597->lock, flags);
  1074. }
  1075. /*-------------------------------------------------------------------------*/
  1076. static int r8a66597_enable(struct usb_ep *_ep,
  1077. const struct usb_endpoint_descriptor *desc)
  1078. {
  1079. struct r8a66597_ep *ep;
  1080. ep = container_of(_ep, struct r8a66597_ep, ep);
  1081. return alloc_pipe_config(ep, desc);
  1082. }
  1083. static int r8a66597_disable(struct usb_ep *_ep)
  1084. {
  1085. struct r8a66597_ep *ep;
  1086. struct r8a66597_request *req;
  1087. unsigned long flags;
  1088. ep = container_of(_ep, struct r8a66597_ep, ep);
  1089. BUG_ON(!ep);
  1090. while (!list_empty(&ep->queue)) {
  1091. req = get_request_from_ep(ep);
  1092. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1093. transfer_complete(ep, req, -ECONNRESET);
  1094. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1095. }
  1096. pipe_irq_disable(ep->r8a66597, ep->pipenum);
  1097. return free_pipe_config(ep);
  1098. }
  1099. static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep,
  1100. gfp_t gfp_flags)
  1101. {
  1102. struct r8a66597_request *req;
  1103. req = kzalloc(sizeof(struct r8a66597_request), gfp_flags);
  1104. if (!req)
  1105. return NULL;
  1106. INIT_LIST_HEAD(&req->queue);
  1107. return &req->req;
  1108. }
  1109. static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req)
  1110. {
  1111. struct r8a66597_request *req;
  1112. req = container_of(_req, struct r8a66597_request, req);
  1113. kfree(req);
  1114. }
  1115. static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
  1116. gfp_t gfp_flags)
  1117. {
  1118. struct r8a66597_ep *ep;
  1119. struct r8a66597_request *req;
  1120. unsigned long flags;
  1121. int request = 0;
  1122. ep = container_of(_ep, struct r8a66597_ep, ep);
  1123. req = container_of(_req, struct r8a66597_request, req);
  1124. if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
  1125. return -ESHUTDOWN;
  1126. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1127. if (list_empty(&ep->queue))
  1128. request = 1;
  1129. list_add_tail(&req->queue, &ep->queue);
  1130. req->req.actual = 0;
  1131. req->req.status = -EINPROGRESS;
  1132. if (ep->desc == NULL) /* control */
  1133. start_ep0(ep, req);
  1134. else {
  1135. if (request && !ep->busy)
  1136. start_packet(ep, req);
  1137. }
  1138. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1139. return 0;
  1140. }
  1141. static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1142. {
  1143. struct r8a66597_ep *ep;
  1144. struct r8a66597_request *req;
  1145. unsigned long flags;
  1146. ep = container_of(_ep, struct r8a66597_ep, ep);
  1147. req = container_of(_req, struct r8a66597_request, req);
  1148. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1149. if (!list_empty(&ep->queue))
  1150. transfer_complete(ep, req, -ECONNRESET);
  1151. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1152. return 0;
  1153. }
  1154. static int r8a66597_set_halt(struct usb_ep *_ep, int value)
  1155. {
  1156. struct r8a66597_ep *ep;
  1157. struct r8a66597_request *req;
  1158. unsigned long flags;
  1159. int ret = 0;
  1160. ep = container_of(_ep, struct r8a66597_ep, ep);
  1161. req = get_request_from_ep(ep);
  1162. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1163. if (!list_empty(&ep->queue)) {
  1164. ret = -EAGAIN;
  1165. goto out;
  1166. }
  1167. if (value) {
  1168. ep->busy = 1;
  1169. pipe_stall(ep->r8a66597, ep->pipenum);
  1170. } else {
  1171. ep->busy = 0;
  1172. ep->wedge = 0;
  1173. pipe_stop(ep->r8a66597, ep->pipenum);
  1174. }
  1175. out:
  1176. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1177. return ret;
  1178. }
  1179. static int r8a66597_set_wedge(struct usb_ep *_ep)
  1180. {
  1181. struct r8a66597_ep *ep;
  1182. unsigned long flags;
  1183. ep = container_of(_ep, struct r8a66597_ep, ep);
  1184. if (!ep || !ep->desc)
  1185. return -EINVAL;
  1186. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1187. ep->wedge = 1;
  1188. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1189. return usb_ep_set_halt(_ep);
  1190. }
  1191. static void r8a66597_fifo_flush(struct usb_ep *_ep)
  1192. {
  1193. struct r8a66597_ep *ep;
  1194. unsigned long flags;
  1195. ep = container_of(_ep, struct r8a66597_ep, ep);
  1196. spin_lock_irqsave(&ep->r8a66597->lock, flags);
  1197. if (list_empty(&ep->queue) && !ep->busy) {
  1198. pipe_stop(ep->r8a66597, ep->pipenum);
  1199. r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr);
  1200. }
  1201. spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
  1202. }
  1203. static struct usb_ep_ops r8a66597_ep_ops = {
  1204. .enable = r8a66597_enable,
  1205. .disable = r8a66597_disable,
  1206. .alloc_request = r8a66597_alloc_request,
  1207. .free_request = r8a66597_free_request,
  1208. .queue = r8a66597_queue,
  1209. .dequeue = r8a66597_dequeue,
  1210. .set_halt = r8a66597_set_halt,
  1211. .set_wedge = r8a66597_set_wedge,
  1212. .fifo_flush = r8a66597_fifo_flush,
  1213. };
  1214. /*-------------------------------------------------------------------------*/
  1215. static struct r8a66597 *the_controller;
  1216. static int r8a66597_start(struct usb_gadget_driver *driver,
  1217. int (*bind)(struct usb_gadget *))
  1218. {
  1219. struct r8a66597 *r8a66597 = the_controller;
  1220. int retval;
  1221. if (!driver
  1222. || driver->speed != USB_SPEED_HIGH
  1223. || !bind
  1224. || !driver->setup)
  1225. return -EINVAL;
  1226. if (!r8a66597)
  1227. return -ENODEV;
  1228. if (r8a66597->driver)
  1229. return -EBUSY;
  1230. /* hook up the driver */
  1231. driver->driver.bus = NULL;
  1232. r8a66597->driver = driver;
  1233. r8a66597->gadget.dev.driver = &driver->driver;
  1234. retval = device_add(&r8a66597->gadget.dev);
  1235. if (retval) {
  1236. printk(KERN_ERR "device_add error (%d)\n", retval);
  1237. goto error;
  1238. }
  1239. retval = bind(&r8a66597->gadget);
  1240. if (retval) {
  1241. printk(KERN_ERR "bind to driver error (%d)\n", retval);
  1242. device_del(&r8a66597->gadget.dev);
  1243. goto error;
  1244. }
  1245. init_controller(r8a66597);
  1246. r8a66597_bset(r8a66597, VBSE, INTENB0);
  1247. if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) {
  1248. r8a66597_start_xclock(r8a66597);
  1249. /* start vbus sampling */
  1250. r8a66597->old_vbus = r8a66597_read(r8a66597,
  1251. INTSTS0) & VBSTS;
  1252. r8a66597->scount = R8A66597_MAX_SAMPLING;
  1253. mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50));
  1254. }
  1255. return 0;
  1256. error:
  1257. r8a66597->driver = NULL;
  1258. r8a66597->gadget.dev.driver = NULL;
  1259. return retval;
  1260. }
  1261. static int r8a66597_stop(struct usb_gadget_driver *driver)
  1262. {
  1263. struct r8a66597 *r8a66597 = the_controller;
  1264. unsigned long flags;
  1265. if (driver != r8a66597->driver || !driver->unbind)
  1266. return -EINVAL;
  1267. spin_lock_irqsave(&r8a66597->lock, flags);
  1268. if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN)
  1269. r8a66597_usb_disconnect(r8a66597);
  1270. r8a66597_bclr(r8a66597, VBSE, INTENB0);
  1271. disable_controller(r8a66597);
  1272. spin_unlock_irqrestore(&r8a66597->lock, flags);
  1273. driver->unbind(&r8a66597->gadget);
  1274. device_del(&r8a66597->gadget.dev);
  1275. r8a66597->driver = NULL;
  1276. return 0;
  1277. }
  1278. /*-------------------------------------------------------------------------*/
  1279. static int r8a66597_get_frame(struct usb_gadget *_gadget)
  1280. {
  1281. struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget);
  1282. return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
  1283. }
  1284. static int r8a66597_pullup(struct usb_gadget *gadget, int is_on)
  1285. {
  1286. struct r8a66597 *r8a66597 = gadget_to_r8a66597(gadget);
  1287. unsigned long flags;
  1288. spin_lock_irqsave(&r8a66597->lock, flags);
  1289. if (is_on)
  1290. r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
  1291. else
  1292. r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
  1293. spin_unlock_irqrestore(&r8a66597->lock, flags);
  1294. return 0;
  1295. }
  1296. static struct usb_gadget_ops r8a66597_gadget_ops = {
  1297. .get_frame = r8a66597_get_frame,
  1298. .start = r8a66597_start,
  1299. .stop = r8a66597_stop,
  1300. .pullup = r8a66597_pullup,
  1301. };
  1302. static int __exit r8a66597_remove(struct platform_device *pdev)
  1303. {
  1304. struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
  1305. usb_del_gadget_udc(&r8a66597->gadget);
  1306. del_timer_sync(&r8a66597->timer);
  1307. iounmap(r8a66597->reg);
  1308. free_irq(platform_get_irq(pdev, 0), r8a66597);
  1309. r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
  1310. #ifdef CONFIG_HAVE_CLK
  1311. if (r8a66597->pdata->on_chip) {
  1312. clk_disable(r8a66597->clk);
  1313. clk_put(r8a66597->clk);
  1314. }
  1315. #endif
  1316. kfree(r8a66597);
  1317. return 0;
  1318. }
  1319. static void nop_completion(struct usb_ep *ep, struct usb_request *r)
  1320. {
  1321. }
  1322. static int __init r8a66597_probe(struct platform_device *pdev)
  1323. {
  1324. #ifdef CONFIG_HAVE_CLK
  1325. char clk_name[8];
  1326. #endif
  1327. struct resource *res, *ires;
  1328. int irq;
  1329. void __iomem *reg = NULL;
  1330. struct r8a66597 *r8a66597 = NULL;
  1331. int ret = 0;
  1332. int i;
  1333. unsigned long irq_trigger;
  1334. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1335. if (!res) {
  1336. ret = -ENODEV;
  1337. printk(KERN_ERR "platform_get_resource error.\n");
  1338. goto clean_up;
  1339. }
  1340. ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1341. irq = ires->start;
  1342. irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
  1343. if (irq < 0) {
  1344. ret = -ENODEV;
  1345. printk(KERN_ERR "platform_get_irq error.\n");
  1346. goto clean_up;
  1347. }
  1348. reg = ioremap(res->start, resource_size(res));
  1349. if (reg == NULL) {
  1350. ret = -ENOMEM;
  1351. printk(KERN_ERR "ioremap error.\n");
  1352. goto clean_up;
  1353. }
  1354. /* initialize ucd */
  1355. r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL);
  1356. if (r8a66597 == NULL) {
  1357. ret = -ENOMEM;
  1358. printk(KERN_ERR "kzalloc error\n");
  1359. goto clean_up;
  1360. }
  1361. spin_lock_init(&r8a66597->lock);
  1362. dev_set_drvdata(&pdev->dev, r8a66597);
  1363. r8a66597->pdata = pdev->dev.platform_data;
  1364. r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
  1365. r8a66597->gadget.ops = &r8a66597_gadget_ops;
  1366. device_initialize(&r8a66597->gadget.dev);
  1367. dev_set_name(&r8a66597->gadget.dev, "gadget");
  1368. r8a66597->gadget.is_dualspeed = 1;
  1369. r8a66597->gadget.dev.parent = &pdev->dev;
  1370. r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask;
  1371. r8a66597->gadget.dev.release = pdev->dev.release;
  1372. r8a66597->gadget.name = udc_name;
  1373. init_timer(&r8a66597->timer);
  1374. r8a66597->timer.function = r8a66597_timer;
  1375. r8a66597->timer.data = (unsigned long)r8a66597;
  1376. r8a66597->reg = reg;
  1377. #ifdef CONFIG_HAVE_CLK
  1378. if (r8a66597->pdata->on_chip) {
  1379. snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
  1380. r8a66597->clk = clk_get(&pdev->dev, clk_name);
  1381. if (IS_ERR(r8a66597->clk)) {
  1382. dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
  1383. clk_name);
  1384. ret = PTR_ERR(r8a66597->clk);
  1385. goto clean_up;
  1386. }
  1387. clk_enable(r8a66597->clk);
  1388. }
  1389. #endif
  1390. disable_controller(r8a66597); /* make sure controller is disabled */
  1391. ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED,
  1392. udc_name, r8a66597);
  1393. if (ret < 0) {
  1394. printk(KERN_ERR "request_irq error (%d)\n", ret);
  1395. goto clean_up2;
  1396. }
  1397. INIT_LIST_HEAD(&r8a66597->gadget.ep_list);
  1398. r8a66597->gadget.ep0 = &r8a66597->ep[0].ep;
  1399. INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list);
  1400. for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
  1401. struct r8a66597_ep *ep = &r8a66597->ep[i];
  1402. if (i != 0) {
  1403. INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list);
  1404. list_add_tail(&r8a66597->ep[i].ep.ep_list,
  1405. &r8a66597->gadget.ep_list);
  1406. }
  1407. ep->r8a66597 = r8a66597;
  1408. INIT_LIST_HEAD(&ep->queue);
  1409. ep->ep.name = r8a66597_ep_name[i];
  1410. ep->ep.ops = &r8a66597_ep_ops;
  1411. ep->ep.maxpacket = 512;
  1412. }
  1413. r8a66597->ep[0].ep.maxpacket = 64;
  1414. r8a66597->ep[0].pipenum = 0;
  1415. r8a66597->ep[0].fifoaddr = CFIFO;
  1416. r8a66597->ep[0].fifosel = CFIFOSEL;
  1417. r8a66597->ep[0].fifoctr = CFIFOCTR;
  1418. r8a66597->ep[0].fifotrn = 0;
  1419. r8a66597->ep[0].pipectr = get_pipectr_addr(0);
  1420. r8a66597->pipenum2ep[0] = &r8a66597->ep[0];
  1421. r8a66597->epaddr2ep[0] = &r8a66597->ep[0];
  1422. the_controller = r8a66597;
  1423. r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep,
  1424. GFP_KERNEL);
  1425. if (r8a66597->ep0_req == NULL)
  1426. goto clean_up3;
  1427. r8a66597->ep0_req->complete = nop_completion;
  1428. ret = usb_add_gadget_udc(&pdev->dev, &r8a66597->gadget);
  1429. if (ret)
  1430. goto err_add_udc;
  1431. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1432. return 0;
  1433. err_add_udc:
  1434. r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
  1435. clean_up3:
  1436. free_irq(irq, r8a66597);
  1437. clean_up2:
  1438. #ifdef CONFIG_HAVE_CLK
  1439. if (r8a66597->pdata->on_chip) {
  1440. clk_disable(r8a66597->clk);
  1441. clk_put(r8a66597->clk);
  1442. }
  1443. #endif
  1444. clean_up:
  1445. if (r8a66597) {
  1446. if (r8a66597->ep0_req)
  1447. r8a66597_free_request(&r8a66597->ep[0].ep,
  1448. r8a66597->ep0_req);
  1449. kfree(r8a66597);
  1450. }
  1451. if (reg)
  1452. iounmap(reg);
  1453. return ret;
  1454. }
  1455. /*-------------------------------------------------------------------------*/
  1456. static struct platform_driver r8a66597_driver = {
  1457. .remove = __exit_p(r8a66597_remove),
  1458. .driver = {
  1459. .name = (char *) udc_name,
  1460. },
  1461. };
  1462. MODULE_ALIAS("platform:r8a66597_udc");
  1463. static int __init r8a66597_udc_init(void)
  1464. {
  1465. return platform_driver_probe(&r8a66597_driver, r8a66597_probe);
  1466. }
  1467. module_init(r8a66597_udc_init);
  1468. static void __exit r8a66597_udc_cleanup(void)
  1469. {
  1470. platform_driver_unregister(&r8a66597_driver);
  1471. }
  1472. module_exit(r8a66597_udc_cleanup);
  1473. MODULE_DESCRIPTION("R8A66597 USB gadget driver");
  1474. MODULE_LICENSE("GPL");
  1475. MODULE_AUTHOR("Yoshihiro Shimoda");