setup.c 33 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mmc/host.h>
  14. #include <linux/mmc/sh_mmcif.h>
  15. #include <linux/mmc/sh_mobile_sdhi.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/gpio.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/delay.h>
  21. #include <linux/usb/r8a66597.h>
  22. #include <linux/usb/renesas_usbhs.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c/tsc2007.h>
  25. #include <linux/spi/spi.h>
  26. #include <linux/spi/sh_msiof.h>
  27. #include <linux/spi/mmc_spi.h>
  28. #include <linux/input.h>
  29. #include <linux/input/sh_keysc.h>
  30. #include <video/sh_mobile_lcdc.h>
  31. #include <sound/sh_fsi.h>
  32. #include <media/sh_mobile_ceu.h>
  33. #include <media/tw9910.h>
  34. #include <media/mt9t112.h>
  35. #include <asm/heartbeat.h>
  36. #include <asm/sh_eth.h>
  37. #include <asm/clock.h>
  38. #include <asm/suspend.h>
  39. #include <cpu/sh7724.h>
  40. /*
  41. * Address Interface BusWidth
  42. *-----------------------------------------
  43. * 0x0000_0000 uboot 16bit
  44. * 0x0004_0000 Linux romImage 16bit
  45. * 0x0014_0000 MTD for Linux 16bit
  46. * 0x0400_0000 Internal I/O 16/32bit
  47. * 0x0800_0000 DRAM 32bit
  48. * 0x1800_0000 MFI 16bit
  49. */
  50. /* SWITCH
  51. *------------------------------
  52. * DS2[1] = FlashROM write protect ON : write protect
  53. * OFF : No write protect
  54. * DS2[2] = RMII / TS, SCIF ON : RMII
  55. * OFF : TS, SCIF3
  56. * DS2[3] = Camera / Video ON : Camera
  57. * OFF : NTSC/PAL (IN)
  58. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  59. * OFF : SH7724 DV_CLK
  60. * DS2[6-7] = MMC / SD ON-OFF : SD
  61. * OFF-ON : MMC
  62. */
  63. /* Heartbeat */
  64. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  65. static struct heartbeat_data heartbeat_data = {
  66. .nr_bits = 4,
  67. .bit_pos = led_pos,
  68. };
  69. static struct resource heartbeat_resource = {
  70. .start = 0xA405012C, /* PTG */
  71. .end = 0xA405012E - 1,
  72. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  73. };
  74. static struct platform_device heartbeat_device = {
  75. .name = "heartbeat",
  76. .id = -1,
  77. .dev = {
  78. .platform_data = &heartbeat_data,
  79. },
  80. .num_resources = 1,
  81. .resource = &heartbeat_resource,
  82. };
  83. /* MTD */
  84. static struct mtd_partition nor_flash_partitions[] = {
  85. {
  86. .name = "boot loader",
  87. .offset = 0,
  88. .size = (5 * 1024 * 1024),
  89. .mask_flags = MTD_WRITEABLE, /* force read-only */
  90. }, {
  91. .name = "free-area",
  92. .offset = MTDPART_OFS_APPEND,
  93. .size = MTDPART_SIZ_FULL,
  94. },
  95. };
  96. static struct physmap_flash_data nor_flash_data = {
  97. .width = 2,
  98. .parts = nor_flash_partitions,
  99. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  100. };
  101. static struct resource nor_flash_resources[] = {
  102. [0] = {
  103. .name = "NOR Flash",
  104. .start = 0x00000000,
  105. .end = 0x03ffffff,
  106. .flags = IORESOURCE_MEM,
  107. }
  108. };
  109. static struct platform_device nor_flash_device = {
  110. .name = "physmap-flash",
  111. .resource = nor_flash_resources,
  112. .num_resources = ARRAY_SIZE(nor_flash_resources),
  113. .dev = {
  114. .platform_data = &nor_flash_data,
  115. },
  116. };
  117. /* SH Eth */
  118. #define SH_ETH_ADDR (0xA4600000)
  119. static struct resource sh_eth_resources[] = {
  120. [0] = {
  121. .start = SH_ETH_ADDR,
  122. .end = SH_ETH_ADDR + 0x1FC,
  123. .flags = IORESOURCE_MEM,
  124. },
  125. [1] = {
  126. .start = 91,
  127. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  128. },
  129. };
  130. static struct sh_eth_plat_data sh_eth_plat = {
  131. .phy = 0x1f, /* SMSC LAN8700 */
  132. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  133. .register_type = SH_ETH_REG_FAST_SH4,
  134. .phy_interface = PHY_INTERFACE_MODE_MII,
  135. .ether_link_active_low = 1
  136. };
  137. static struct platform_device sh_eth_device = {
  138. .name = "sh-eth",
  139. .id = 0,
  140. .dev = {
  141. .platform_data = &sh_eth_plat,
  142. },
  143. .num_resources = ARRAY_SIZE(sh_eth_resources),
  144. .resource = sh_eth_resources,
  145. .archdata = {
  146. .hwblk_id = HWBLK_ETHER,
  147. },
  148. };
  149. /* USB0 host */
  150. static void usb0_port_power(int port, int power)
  151. {
  152. gpio_set_value(GPIO_PTB4, power);
  153. }
  154. static struct r8a66597_platdata usb0_host_data = {
  155. .on_chip = 1,
  156. .port_power = usb0_port_power,
  157. };
  158. static struct resource usb0_host_resources[] = {
  159. [0] = {
  160. .start = 0xa4d80000,
  161. .end = 0xa4d80124 - 1,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = 65,
  166. .end = 65,
  167. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  168. },
  169. };
  170. static struct platform_device usb0_host_device = {
  171. .name = "r8a66597_hcd",
  172. .id = 0,
  173. .dev = {
  174. .dma_mask = NULL, /* not use dma */
  175. .coherent_dma_mask = 0xffffffff,
  176. .platform_data = &usb0_host_data,
  177. },
  178. .num_resources = ARRAY_SIZE(usb0_host_resources),
  179. .resource = usb0_host_resources,
  180. };
  181. /* USB1 host/function */
  182. static void usb1_port_power(int port, int power)
  183. {
  184. gpio_set_value(GPIO_PTB5, power);
  185. }
  186. static struct r8a66597_platdata usb1_common_data = {
  187. .on_chip = 1,
  188. .port_power = usb1_port_power,
  189. };
  190. static struct resource usb1_common_resources[] = {
  191. [0] = {
  192. .start = 0xa4d90000,
  193. .end = 0xa4d90124 - 1,
  194. .flags = IORESOURCE_MEM,
  195. },
  196. [1] = {
  197. .start = 66,
  198. .end = 66,
  199. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  200. },
  201. };
  202. static struct platform_device usb1_common_device = {
  203. /* .name will be added in arch_setup */
  204. .id = 1,
  205. .dev = {
  206. .dma_mask = NULL, /* not use dma */
  207. .coherent_dma_mask = 0xffffffff,
  208. .platform_data = &usb1_common_data,
  209. },
  210. .num_resources = ARRAY_SIZE(usb1_common_resources),
  211. .resource = usb1_common_resources,
  212. };
  213. /*
  214. * USBHS
  215. */
  216. static int usbhs_get_id(struct platform_device *pdev)
  217. {
  218. return gpio_get_value(GPIO_PTB3);
  219. }
  220. static struct renesas_usbhs_platform_info usbhs_info = {
  221. .platform_callback = {
  222. .get_id = usbhs_get_id,
  223. },
  224. .driver_param = {
  225. .buswait_bwait = 4,
  226. .detection_delay = 5,
  227. },
  228. };
  229. static struct resource usbhs_resources[] = {
  230. [0] = {
  231. .start = 0xa4d90000,
  232. .end = 0xa4d90124 - 1,
  233. .flags = IORESOURCE_MEM,
  234. },
  235. [1] = {
  236. .start = 66,
  237. .end = 66,
  238. .flags = IORESOURCE_IRQ,
  239. },
  240. };
  241. static struct platform_device usbhs_device = {
  242. .name = "renesas_usbhs",
  243. .id = 1,
  244. .dev = {
  245. .dma_mask = NULL, /* not use dma */
  246. .coherent_dma_mask = 0xffffffff,
  247. .platform_data = &usbhs_info,
  248. },
  249. .num_resources = ARRAY_SIZE(usbhs_resources),
  250. .resource = usbhs_resources,
  251. .archdata = {
  252. .hwblk_id = HWBLK_USB1,
  253. },
  254. };
  255. /* LCDC */
  256. static const struct fb_videomode ecovec_lcd_modes[] = {
  257. {
  258. .name = "Panel",
  259. .xres = 800,
  260. .yres = 480,
  261. .left_margin = 220,
  262. .right_margin = 110,
  263. .hsync_len = 70,
  264. .upper_margin = 20,
  265. .lower_margin = 5,
  266. .vsync_len = 5,
  267. .sync = 0, /* hsync and vsync are active low */
  268. },
  269. };
  270. static const struct fb_videomode ecovec_dvi_modes[] = {
  271. {
  272. .name = "DVI",
  273. .xres = 1280,
  274. .yres = 720,
  275. .left_margin = 220,
  276. .right_margin = 110,
  277. .hsync_len = 40,
  278. .upper_margin = 20,
  279. .lower_margin = 5,
  280. .vsync_len = 5,
  281. .sync = 0, /* hsync and vsync are active low */
  282. },
  283. };
  284. static int ecovec24_set_brightness(void *board_data, int brightness)
  285. {
  286. gpio_set_value(GPIO_PTR1, brightness);
  287. return 0;
  288. }
  289. static int ecovec24_get_brightness(void *board_data)
  290. {
  291. return gpio_get_value(GPIO_PTR1);
  292. }
  293. static struct sh_mobile_lcdc_info lcdc_info = {
  294. .ch[0] = {
  295. .interface_type = RGB18,
  296. .chan = LCDC_CHAN_MAINLCD,
  297. .bpp = 16,
  298. .lcd_size_cfg = { /* 7.0 inch */
  299. .width = 152,
  300. .height = 91,
  301. },
  302. .board_cfg = {
  303. .set_brightness = ecovec24_set_brightness,
  304. .get_brightness = ecovec24_get_brightness,
  305. },
  306. .bl_info = {
  307. .name = "sh_mobile_lcdc_bl",
  308. .max_brightness = 1,
  309. },
  310. }
  311. };
  312. static struct resource lcdc_resources[] = {
  313. [0] = {
  314. .name = "LCDC",
  315. .start = 0xfe940000,
  316. .end = 0xfe942fff,
  317. .flags = IORESOURCE_MEM,
  318. },
  319. [1] = {
  320. .start = 106,
  321. .flags = IORESOURCE_IRQ,
  322. },
  323. };
  324. static struct platform_device lcdc_device = {
  325. .name = "sh_mobile_lcdc_fb",
  326. .num_resources = ARRAY_SIZE(lcdc_resources),
  327. .resource = lcdc_resources,
  328. .dev = {
  329. .platform_data = &lcdc_info,
  330. },
  331. .archdata = {
  332. .hwblk_id = HWBLK_LCDC,
  333. },
  334. };
  335. /* CEU0 */
  336. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  337. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  338. };
  339. static struct resource ceu0_resources[] = {
  340. [0] = {
  341. .name = "CEU0",
  342. .start = 0xfe910000,
  343. .end = 0xfe91009f,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. [1] = {
  347. .start = 52,
  348. .flags = IORESOURCE_IRQ,
  349. },
  350. [2] = {
  351. /* place holder for contiguous memory */
  352. },
  353. };
  354. static struct platform_device ceu0_device = {
  355. .name = "sh_mobile_ceu",
  356. .id = 0, /* "ceu0" clock */
  357. .num_resources = ARRAY_SIZE(ceu0_resources),
  358. .resource = ceu0_resources,
  359. .dev = {
  360. .platform_data = &sh_mobile_ceu0_info,
  361. },
  362. .archdata = {
  363. .hwblk_id = HWBLK_CEU0,
  364. },
  365. };
  366. /* CEU1 */
  367. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  368. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  369. };
  370. static struct resource ceu1_resources[] = {
  371. [0] = {
  372. .name = "CEU1",
  373. .start = 0xfe914000,
  374. .end = 0xfe91409f,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. [1] = {
  378. .start = 63,
  379. .flags = IORESOURCE_IRQ,
  380. },
  381. [2] = {
  382. /* place holder for contiguous memory */
  383. },
  384. };
  385. static struct platform_device ceu1_device = {
  386. .name = "sh_mobile_ceu",
  387. .id = 1, /* "ceu1" clock */
  388. .num_resources = ARRAY_SIZE(ceu1_resources),
  389. .resource = ceu1_resources,
  390. .dev = {
  391. .platform_data = &sh_mobile_ceu1_info,
  392. },
  393. .archdata = {
  394. .hwblk_id = HWBLK_CEU1,
  395. },
  396. };
  397. /* I2C device */
  398. static struct i2c_board_info i2c0_devices[] = {
  399. {
  400. I2C_BOARD_INFO("da7210", 0x1a),
  401. },
  402. };
  403. static struct i2c_board_info i2c1_devices[] = {
  404. {
  405. I2C_BOARD_INFO("r2025sd", 0x32),
  406. },
  407. {
  408. I2C_BOARD_INFO("lis3lv02d", 0x1c),
  409. .irq = 33,
  410. }
  411. };
  412. /* KEYSC */
  413. static struct sh_keysc_info keysc_info = {
  414. .mode = SH_KEYSC_MODE_1,
  415. .scan_timing = 3,
  416. .delay = 50,
  417. .kycr2_delay = 100,
  418. .keycodes = { KEY_1, 0, 0, 0, 0,
  419. KEY_2, 0, 0, 0, 0,
  420. KEY_3, 0, 0, 0, 0,
  421. KEY_4, 0, 0, 0, 0,
  422. KEY_5, 0, 0, 0, 0,
  423. KEY_6, 0, 0, 0, 0, },
  424. };
  425. static struct resource keysc_resources[] = {
  426. [0] = {
  427. .name = "KEYSC",
  428. .start = 0x044b0000,
  429. .end = 0x044b000f,
  430. .flags = IORESOURCE_MEM,
  431. },
  432. [1] = {
  433. .start = 79,
  434. .flags = IORESOURCE_IRQ,
  435. },
  436. };
  437. static struct platform_device keysc_device = {
  438. .name = "sh_keysc",
  439. .id = 0, /* keysc0 clock */
  440. .num_resources = ARRAY_SIZE(keysc_resources),
  441. .resource = keysc_resources,
  442. .dev = {
  443. .platform_data = &keysc_info,
  444. },
  445. .archdata = {
  446. .hwblk_id = HWBLK_KEYSC,
  447. },
  448. };
  449. /* TouchScreen */
  450. #define IRQ0 32
  451. static int ts_get_pendown_state(void)
  452. {
  453. int val = 0;
  454. gpio_free(GPIO_FN_INTC_IRQ0);
  455. gpio_request(GPIO_PTZ0, NULL);
  456. gpio_direction_input(GPIO_PTZ0);
  457. val = gpio_get_value(GPIO_PTZ0);
  458. gpio_free(GPIO_PTZ0);
  459. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  460. return val ? 0 : 1;
  461. }
  462. static int ts_init(void)
  463. {
  464. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  465. return 0;
  466. }
  467. static struct tsc2007_platform_data tsc2007_info = {
  468. .model = 2007,
  469. .x_plate_ohms = 180,
  470. .get_pendown_state = ts_get_pendown_state,
  471. .init_platform_hw = ts_init,
  472. };
  473. static struct i2c_board_info ts_i2c_clients = {
  474. I2C_BOARD_INFO("tsc2007", 0x48),
  475. .type = "tsc2007",
  476. .platform_data = &tsc2007_info,
  477. .irq = IRQ0,
  478. };
  479. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  480. /* SDHI0 */
  481. static void sdhi0_set_pwr(struct platform_device *pdev, int state)
  482. {
  483. gpio_set_value(GPIO_PTB6, state);
  484. }
  485. static struct sh_mobile_sdhi_info sdhi0_info = {
  486. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  487. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  488. .set_pwr = sdhi0_set_pwr,
  489. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  490. };
  491. static struct resource sdhi0_resources[] = {
  492. [0] = {
  493. .name = "SDHI0",
  494. .start = 0x04ce0000,
  495. .end = 0x04ce00ff,
  496. .flags = IORESOURCE_MEM,
  497. },
  498. [1] = {
  499. .start = 100,
  500. .flags = IORESOURCE_IRQ,
  501. },
  502. };
  503. static struct platform_device sdhi0_device = {
  504. .name = "sh_mobile_sdhi",
  505. .num_resources = ARRAY_SIZE(sdhi0_resources),
  506. .resource = sdhi0_resources,
  507. .id = 0,
  508. .dev = {
  509. .platform_data = &sdhi0_info,
  510. },
  511. .archdata = {
  512. .hwblk_id = HWBLK_SDHI0,
  513. },
  514. };
  515. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  516. /* SDHI1 */
  517. static void sdhi1_set_pwr(struct platform_device *pdev, int state)
  518. {
  519. gpio_set_value(GPIO_PTB7, state);
  520. }
  521. static struct sh_mobile_sdhi_info sdhi1_info = {
  522. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  523. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  524. .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
  525. .set_pwr = sdhi1_set_pwr,
  526. };
  527. static struct resource sdhi1_resources[] = {
  528. [0] = {
  529. .name = "SDHI1",
  530. .start = 0x04cf0000,
  531. .end = 0x04cf00ff,
  532. .flags = IORESOURCE_MEM,
  533. },
  534. [1] = {
  535. .start = 23,
  536. .flags = IORESOURCE_IRQ,
  537. },
  538. };
  539. static struct platform_device sdhi1_device = {
  540. .name = "sh_mobile_sdhi",
  541. .num_resources = ARRAY_SIZE(sdhi1_resources),
  542. .resource = sdhi1_resources,
  543. .id = 1,
  544. .dev = {
  545. .platform_data = &sdhi1_info,
  546. },
  547. .archdata = {
  548. .hwblk_id = HWBLK_SDHI1,
  549. },
  550. };
  551. #endif /* CONFIG_MMC_SH_MMCIF */
  552. #else
  553. /* MMC SPI */
  554. static int mmc_spi_get_ro(struct device *dev)
  555. {
  556. return gpio_get_value(GPIO_PTY6);
  557. }
  558. static int mmc_spi_get_cd(struct device *dev)
  559. {
  560. return !gpio_get_value(GPIO_PTY7);
  561. }
  562. static void mmc_spi_setpower(struct device *dev, unsigned int maskval)
  563. {
  564. gpio_set_value(GPIO_PTB6, maskval ? 1 : 0);
  565. }
  566. static struct mmc_spi_platform_data mmc_spi_info = {
  567. .get_ro = mmc_spi_get_ro,
  568. .get_cd = mmc_spi_get_cd,
  569. .caps = MMC_CAP_NEEDS_POLL,
  570. .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */
  571. .setpower = mmc_spi_setpower,
  572. };
  573. static struct spi_board_info spi_bus[] = {
  574. {
  575. .modalias = "mmc_spi",
  576. .platform_data = &mmc_spi_info,
  577. .max_speed_hz = 5000000,
  578. .mode = SPI_MODE_0,
  579. .controller_data = (void *) GPIO_PTM4,
  580. },
  581. };
  582. /* MSIOF0 */
  583. static struct sh_msiof_spi_info msiof0_data = {
  584. .num_chipselect = 1,
  585. };
  586. static struct resource msiof0_resources[] = {
  587. [0] = {
  588. .name = "MSIOF0",
  589. .start = 0xa4c40000,
  590. .end = 0xa4c40063,
  591. .flags = IORESOURCE_MEM,
  592. },
  593. [1] = {
  594. .start = 84,
  595. .flags = IORESOURCE_IRQ,
  596. },
  597. };
  598. static struct platform_device msiof0_device = {
  599. .name = "spi_sh_msiof",
  600. .id = 0, /* MSIOF0 */
  601. .dev = {
  602. .platform_data = &msiof0_data,
  603. },
  604. .num_resources = ARRAY_SIZE(msiof0_resources),
  605. .resource = msiof0_resources,
  606. .archdata = {
  607. .hwblk_id = HWBLK_MSIOF0,
  608. },
  609. };
  610. #endif
  611. /* I2C Video/Camera */
  612. static struct i2c_board_info i2c_camera[] = {
  613. {
  614. I2C_BOARD_INFO("tw9910", 0x45),
  615. },
  616. {
  617. /* 1st camera */
  618. I2C_BOARD_INFO("mt9t112", 0x3c),
  619. },
  620. {
  621. /* 2nd camera */
  622. I2C_BOARD_INFO("mt9t112", 0x3c),
  623. },
  624. };
  625. /* tw9910 */
  626. static int tw9910_power(struct device *dev, int mode)
  627. {
  628. int val = mode ? 0 : 1;
  629. gpio_set_value(GPIO_PTU2, val);
  630. if (mode)
  631. mdelay(100);
  632. return 0;
  633. }
  634. static struct tw9910_video_info tw9910_info = {
  635. .buswidth = SOCAM_DATAWIDTH_8,
  636. .mpout = TW9910_MPO_FIELD,
  637. };
  638. static struct soc_camera_link tw9910_link = {
  639. .i2c_adapter_id = 0,
  640. .bus_id = 1,
  641. .power = tw9910_power,
  642. .board_info = &i2c_camera[0],
  643. .priv = &tw9910_info,
  644. };
  645. /* mt9t112 */
  646. static int mt9t112_power1(struct device *dev, int mode)
  647. {
  648. gpio_set_value(GPIO_PTA3, mode);
  649. if (mode)
  650. mdelay(100);
  651. return 0;
  652. }
  653. static struct mt9t112_camera_info mt9t112_info1 = {
  654. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  655. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  656. };
  657. static struct soc_camera_link mt9t112_link1 = {
  658. .i2c_adapter_id = 0,
  659. .power = mt9t112_power1,
  660. .bus_id = 0,
  661. .board_info = &i2c_camera[1],
  662. .priv = &mt9t112_info1,
  663. };
  664. static int mt9t112_power2(struct device *dev, int mode)
  665. {
  666. gpio_set_value(GPIO_PTA4, mode);
  667. if (mode)
  668. mdelay(100);
  669. return 0;
  670. }
  671. static struct mt9t112_camera_info mt9t112_info2 = {
  672. .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8,
  673. .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */
  674. };
  675. static struct soc_camera_link mt9t112_link2 = {
  676. .i2c_adapter_id = 1,
  677. .power = mt9t112_power2,
  678. .bus_id = 1,
  679. .board_info = &i2c_camera[2],
  680. .priv = &mt9t112_info2,
  681. };
  682. static struct platform_device camera_devices[] = {
  683. {
  684. .name = "soc-camera-pdrv",
  685. .id = 0,
  686. .dev = {
  687. .platform_data = &tw9910_link,
  688. },
  689. },
  690. {
  691. .name = "soc-camera-pdrv",
  692. .id = 1,
  693. .dev = {
  694. .platform_data = &mt9t112_link1,
  695. },
  696. },
  697. {
  698. .name = "soc-camera-pdrv",
  699. .id = 2,
  700. .dev = {
  701. .platform_data = &mt9t112_link2,
  702. },
  703. },
  704. };
  705. /* FSI */
  706. static struct sh_fsi_platform_info fsi_info = {
  707. .portb_flags = SH_FSI_BRS_INV,
  708. };
  709. static struct resource fsi_resources[] = {
  710. [0] = {
  711. .name = "FSI",
  712. .start = 0xFE3C0000,
  713. .end = 0xFE3C021d,
  714. .flags = IORESOURCE_MEM,
  715. },
  716. [1] = {
  717. .start = 108,
  718. .flags = IORESOURCE_IRQ,
  719. },
  720. };
  721. static struct platform_device fsi_device = {
  722. .name = "sh_fsi",
  723. .id = 0,
  724. .num_resources = ARRAY_SIZE(fsi_resources),
  725. .resource = fsi_resources,
  726. .dev = {
  727. .platform_data = &fsi_info,
  728. },
  729. .archdata = {
  730. .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */
  731. },
  732. };
  733. /* IrDA */
  734. static struct resource irda_resources[] = {
  735. [0] = {
  736. .name = "IrDA",
  737. .start = 0xA45D0000,
  738. .end = 0xA45D0049,
  739. .flags = IORESOURCE_MEM,
  740. },
  741. [1] = {
  742. .start = 20,
  743. .flags = IORESOURCE_IRQ,
  744. },
  745. };
  746. static struct platform_device irda_device = {
  747. .name = "sh_sir",
  748. .num_resources = ARRAY_SIZE(irda_resources),
  749. .resource = irda_resources,
  750. };
  751. #include <media/ak881x.h>
  752. #include <media/sh_vou.h>
  753. static struct ak881x_pdata ak881x_pdata = {
  754. .flags = AK881X_IF_MODE_SLAVE,
  755. };
  756. static struct i2c_board_info ak8813 = {
  757. I2C_BOARD_INFO("ak8813", 0x20),
  758. .platform_data = &ak881x_pdata,
  759. };
  760. static struct sh_vou_pdata sh_vou_pdata = {
  761. .bus_fmt = SH_VOU_BUS_8BIT,
  762. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  763. .board_info = &ak8813,
  764. .i2c_adap = 0,
  765. };
  766. static struct resource sh_vou_resources[] = {
  767. [0] = {
  768. .start = 0xfe960000,
  769. .end = 0xfe962043,
  770. .flags = IORESOURCE_MEM,
  771. },
  772. [1] = {
  773. .start = 55,
  774. .flags = IORESOURCE_IRQ,
  775. },
  776. };
  777. static struct platform_device vou_device = {
  778. .name = "sh-vou",
  779. .id = -1,
  780. .num_resources = ARRAY_SIZE(sh_vou_resources),
  781. .resource = sh_vou_resources,
  782. .dev = {
  783. .platform_data = &sh_vou_pdata,
  784. },
  785. .archdata = {
  786. .hwblk_id = HWBLK_VOU,
  787. },
  788. };
  789. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  790. /* SH_MMCIF */
  791. static void mmcif_set_pwr(struct platform_device *pdev, int state)
  792. {
  793. gpio_set_value(GPIO_PTB7, state);
  794. }
  795. static void mmcif_down_pwr(struct platform_device *pdev)
  796. {
  797. gpio_set_value(GPIO_PTB7, 0);
  798. }
  799. static struct resource sh_mmcif_resources[] = {
  800. [0] = {
  801. .name = "SH_MMCIF",
  802. .start = 0xA4CA0000,
  803. .end = 0xA4CA00FF,
  804. .flags = IORESOURCE_MEM,
  805. },
  806. [1] = {
  807. /* MMC2I */
  808. .start = 29,
  809. .flags = IORESOURCE_IRQ,
  810. },
  811. [2] = {
  812. /* MMC3I */
  813. .start = 30,
  814. .flags = IORESOURCE_IRQ,
  815. },
  816. };
  817. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  818. .set_pwr = mmcif_set_pwr,
  819. .down_pwr = mmcif_down_pwr,
  820. .sup_pclk = 0, /* SH7724: Max Pclk/2 */
  821. .caps = MMC_CAP_4_BIT_DATA |
  822. MMC_CAP_8_BIT_DATA |
  823. MMC_CAP_NEEDS_POLL,
  824. .ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
  825. };
  826. static struct platform_device sh_mmcif_device = {
  827. .name = "sh_mmcif",
  828. .id = 0,
  829. .dev = {
  830. .platform_data = &sh_mmcif_plat,
  831. },
  832. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  833. .resource = sh_mmcif_resources,
  834. .archdata = {
  835. .hwblk_id = HWBLK_MMC,
  836. },
  837. };
  838. #endif
  839. static struct platform_device *ecovec_devices[] __initdata = {
  840. &heartbeat_device,
  841. &nor_flash_device,
  842. &sh_eth_device,
  843. &usb0_host_device,
  844. &usb1_common_device,
  845. &usbhs_device,
  846. &lcdc_device,
  847. &ceu0_device,
  848. &ceu1_device,
  849. &keysc_device,
  850. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  851. &sdhi0_device,
  852. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  853. &sdhi1_device,
  854. #endif
  855. #else
  856. &msiof0_device,
  857. #endif
  858. &camera_devices[0],
  859. &camera_devices[1],
  860. &camera_devices[2],
  861. &fsi_device,
  862. &irda_device,
  863. &vou_device,
  864. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  865. &sh_mmcif_device,
  866. #endif
  867. };
  868. #ifdef CONFIG_I2C
  869. #define EEPROM_ADDR 0x50
  870. static u8 mac_read(struct i2c_adapter *a, u8 command)
  871. {
  872. struct i2c_msg msg[2];
  873. u8 buf;
  874. int ret;
  875. msg[0].addr = EEPROM_ADDR;
  876. msg[0].flags = 0;
  877. msg[0].len = 1;
  878. msg[0].buf = &command;
  879. msg[1].addr = EEPROM_ADDR;
  880. msg[1].flags = I2C_M_RD;
  881. msg[1].len = 1;
  882. msg[1].buf = &buf;
  883. ret = i2c_transfer(a, msg, 2);
  884. if (ret < 0) {
  885. printk(KERN_ERR "error %d\n", ret);
  886. buf = 0xff;
  887. }
  888. return buf;
  889. }
  890. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  891. {
  892. struct i2c_adapter *a = i2c_get_adapter(1);
  893. int i;
  894. if (!a) {
  895. pr_err("can not get I2C 1\n");
  896. return;
  897. }
  898. /* read MAC address from EEPROM */
  899. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  900. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  901. msleep(10);
  902. }
  903. i2c_put_adapter(a);
  904. }
  905. #else
  906. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  907. {
  908. pr_err("unable to read sh_eth MAC address\n");
  909. }
  910. #endif
  911. #define PORT_HIZA 0xA4050158
  912. #define IODRIVEA 0xA405018A
  913. extern char ecovec24_sdram_enter_start;
  914. extern char ecovec24_sdram_enter_end;
  915. extern char ecovec24_sdram_leave_start;
  916. extern char ecovec24_sdram_leave_end;
  917. static int __init arch_setup(void)
  918. {
  919. struct clk *clk;
  920. /* register board specific self-refresh code */
  921. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  922. SUSP_SH_RSTANDBY,
  923. &ecovec24_sdram_enter_start,
  924. &ecovec24_sdram_enter_end,
  925. &ecovec24_sdram_leave_start,
  926. &ecovec24_sdram_leave_end);
  927. /* enable STATUS0, STATUS2 and PDSTATUS */
  928. gpio_request(GPIO_FN_STATUS0, NULL);
  929. gpio_request(GPIO_FN_STATUS2, NULL);
  930. gpio_request(GPIO_FN_PDSTATUS, NULL);
  931. /* enable SCIFA0 */
  932. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  933. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  934. /* enable debug LED */
  935. gpio_request(GPIO_PTG0, NULL);
  936. gpio_request(GPIO_PTG1, NULL);
  937. gpio_request(GPIO_PTG2, NULL);
  938. gpio_request(GPIO_PTG3, NULL);
  939. gpio_direction_output(GPIO_PTG0, 0);
  940. gpio_direction_output(GPIO_PTG1, 0);
  941. gpio_direction_output(GPIO_PTG2, 0);
  942. gpio_direction_output(GPIO_PTG3, 0);
  943. __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  944. /* enable SH-Eth */
  945. gpio_request(GPIO_PTA1, NULL);
  946. gpio_direction_output(GPIO_PTA1, 1);
  947. mdelay(20);
  948. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  949. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  950. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  951. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  952. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  953. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  954. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  955. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  956. gpio_request(GPIO_FN_MDIO, NULL);
  957. gpio_request(GPIO_FN_MDC, NULL);
  958. gpio_request(GPIO_FN_LNKSTA, NULL);
  959. /* enable USB */
  960. __raw_writew(0x0000, 0xA4D80000);
  961. __raw_writew(0x0000, 0xA4D90000);
  962. gpio_request(GPIO_PTB3, NULL);
  963. gpio_request(GPIO_PTB4, NULL);
  964. gpio_request(GPIO_PTB5, NULL);
  965. gpio_direction_input(GPIO_PTB3);
  966. gpio_direction_output(GPIO_PTB4, 0);
  967. gpio_direction_output(GPIO_PTB5, 0);
  968. __raw_writew(0x0600, 0xa40501d4);
  969. __raw_writew(0x0600, 0xa4050192);
  970. if (gpio_get_value(GPIO_PTB3)) {
  971. printk(KERN_INFO "USB1 function is selected\n");
  972. usb1_common_device.name = "r8a66597_udc";
  973. } else {
  974. printk(KERN_INFO "USB1 host is selected\n");
  975. usb1_common_device.name = "r8a66597_hcd";
  976. }
  977. /* enable LCDC */
  978. gpio_request(GPIO_FN_LCDD23, NULL);
  979. gpio_request(GPIO_FN_LCDD22, NULL);
  980. gpio_request(GPIO_FN_LCDD21, NULL);
  981. gpio_request(GPIO_FN_LCDD20, NULL);
  982. gpio_request(GPIO_FN_LCDD19, NULL);
  983. gpio_request(GPIO_FN_LCDD18, NULL);
  984. gpio_request(GPIO_FN_LCDD17, NULL);
  985. gpio_request(GPIO_FN_LCDD16, NULL);
  986. gpio_request(GPIO_FN_LCDD15, NULL);
  987. gpio_request(GPIO_FN_LCDD14, NULL);
  988. gpio_request(GPIO_FN_LCDD13, NULL);
  989. gpio_request(GPIO_FN_LCDD12, NULL);
  990. gpio_request(GPIO_FN_LCDD11, NULL);
  991. gpio_request(GPIO_FN_LCDD10, NULL);
  992. gpio_request(GPIO_FN_LCDD9, NULL);
  993. gpio_request(GPIO_FN_LCDD8, NULL);
  994. gpio_request(GPIO_FN_LCDD7, NULL);
  995. gpio_request(GPIO_FN_LCDD6, NULL);
  996. gpio_request(GPIO_FN_LCDD5, NULL);
  997. gpio_request(GPIO_FN_LCDD4, NULL);
  998. gpio_request(GPIO_FN_LCDD3, NULL);
  999. gpio_request(GPIO_FN_LCDD2, NULL);
  1000. gpio_request(GPIO_FN_LCDD1, NULL);
  1001. gpio_request(GPIO_FN_LCDD0, NULL);
  1002. gpio_request(GPIO_FN_LCDDISP, NULL);
  1003. gpio_request(GPIO_FN_LCDHSYN, NULL);
  1004. gpio_request(GPIO_FN_LCDDCK, NULL);
  1005. gpio_request(GPIO_FN_LCDVSYN, NULL);
  1006. gpio_request(GPIO_FN_LCDDON, NULL);
  1007. gpio_request(GPIO_FN_LCDLCLK, NULL);
  1008. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  1009. gpio_request(GPIO_PTE6, NULL);
  1010. gpio_request(GPIO_PTU1, NULL);
  1011. gpio_request(GPIO_PTR1, NULL);
  1012. gpio_request(GPIO_PTA2, NULL);
  1013. gpio_direction_input(GPIO_PTE6);
  1014. gpio_direction_output(GPIO_PTU1, 0);
  1015. gpio_direction_output(GPIO_PTR1, 0);
  1016. gpio_direction_output(GPIO_PTA2, 0);
  1017. /* I/O buffer drive ability is high */
  1018. __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA);
  1019. if (gpio_get_value(GPIO_PTE6)) {
  1020. /* DVI */
  1021. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  1022. lcdc_info.ch[0].clock_divider = 1;
  1023. lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes;
  1024. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes);
  1025. gpio_set_value(GPIO_PTA2, 1);
  1026. gpio_set_value(GPIO_PTU1, 1);
  1027. } else {
  1028. /* Panel */
  1029. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1030. lcdc_info.ch[0].clock_divider = 2;
  1031. lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes;
  1032. lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes);
  1033. gpio_set_value(GPIO_PTR1, 1);
  1034. /* FIXME
  1035. *
  1036. * LCDDON control is needed for Panel,
  1037. * but current sh_mobile_lcdc driver doesn't control it.
  1038. * It is temporary correspondence
  1039. */
  1040. gpio_request(GPIO_PTF4, NULL);
  1041. gpio_direction_output(GPIO_PTF4, 1);
  1042. /* enable TouchScreen */
  1043. i2c_register_board_info(0, &ts_i2c_clients, 1);
  1044. irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  1045. }
  1046. /* enable CEU0 */
  1047. gpio_request(GPIO_FN_VIO0_D15, NULL);
  1048. gpio_request(GPIO_FN_VIO0_D14, NULL);
  1049. gpio_request(GPIO_FN_VIO0_D13, NULL);
  1050. gpio_request(GPIO_FN_VIO0_D12, NULL);
  1051. gpio_request(GPIO_FN_VIO0_D11, NULL);
  1052. gpio_request(GPIO_FN_VIO0_D10, NULL);
  1053. gpio_request(GPIO_FN_VIO0_D9, NULL);
  1054. gpio_request(GPIO_FN_VIO0_D8, NULL);
  1055. gpio_request(GPIO_FN_VIO0_D7, NULL);
  1056. gpio_request(GPIO_FN_VIO0_D6, NULL);
  1057. gpio_request(GPIO_FN_VIO0_D5, NULL);
  1058. gpio_request(GPIO_FN_VIO0_D4, NULL);
  1059. gpio_request(GPIO_FN_VIO0_D3, NULL);
  1060. gpio_request(GPIO_FN_VIO0_D2, NULL);
  1061. gpio_request(GPIO_FN_VIO0_D1, NULL);
  1062. gpio_request(GPIO_FN_VIO0_D0, NULL);
  1063. gpio_request(GPIO_FN_VIO0_VD, NULL);
  1064. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  1065. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  1066. gpio_request(GPIO_FN_VIO0_HD, NULL);
  1067. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  1068. /* enable CEU1 */
  1069. gpio_request(GPIO_FN_VIO1_D7, NULL);
  1070. gpio_request(GPIO_FN_VIO1_D6, NULL);
  1071. gpio_request(GPIO_FN_VIO1_D5, NULL);
  1072. gpio_request(GPIO_FN_VIO1_D4, NULL);
  1073. gpio_request(GPIO_FN_VIO1_D3, NULL);
  1074. gpio_request(GPIO_FN_VIO1_D2, NULL);
  1075. gpio_request(GPIO_FN_VIO1_D1, NULL);
  1076. gpio_request(GPIO_FN_VIO1_D0, NULL);
  1077. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  1078. gpio_request(GPIO_FN_VIO1_HD, NULL);
  1079. gpio_request(GPIO_FN_VIO1_VD, NULL);
  1080. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  1081. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  1082. /* enable KEYSC */
  1083. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  1084. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  1085. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1086. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1087. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1088. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1089. gpio_request(GPIO_FN_KEYIN0, NULL);
  1090. /* enable user debug switch */
  1091. gpio_request(GPIO_PTR0, NULL);
  1092. gpio_request(GPIO_PTR4, NULL);
  1093. gpio_request(GPIO_PTR5, NULL);
  1094. gpio_request(GPIO_PTR6, NULL);
  1095. gpio_direction_input(GPIO_PTR0);
  1096. gpio_direction_input(GPIO_PTR4);
  1097. gpio_direction_input(GPIO_PTR5);
  1098. gpio_direction_input(GPIO_PTR6);
  1099. #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
  1100. /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */
  1101. gpio_request(GPIO_FN_SDHI0CD, NULL);
  1102. gpio_request(GPIO_FN_SDHI0WP, NULL);
  1103. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  1104. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  1105. gpio_request(GPIO_FN_SDHI0D3, NULL);
  1106. gpio_request(GPIO_FN_SDHI0D2, NULL);
  1107. gpio_request(GPIO_FN_SDHI0D1, NULL);
  1108. gpio_request(GPIO_FN_SDHI0D0, NULL);
  1109. gpio_request(GPIO_PTB6, NULL);
  1110. gpio_direction_output(GPIO_PTB6, 0);
  1111. #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1112. /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */
  1113. gpio_request(GPIO_FN_SDHI1CD, NULL);
  1114. gpio_request(GPIO_FN_SDHI1WP, NULL);
  1115. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  1116. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  1117. gpio_request(GPIO_FN_SDHI1D3, NULL);
  1118. gpio_request(GPIO_FN_SDHI1D2, NULL);
  1119. gpio_request(GPIO_FN_SDHI1D1, NULL);
  1120. gpio_request(GPIO_FN_SDHI1D0, NULL);
  1121. gpio_request(GPIO_PTB7, NULL);
  1122. gpio_direction_output(GPIO_PTB7, 0);
  1123. /* I/O buffer drive ability is high for SDHI1 */
  1124. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1125. #endif /* CONFIG_MMC_SH_MMCIF */
  1126. #else
  1127. /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
  1128. gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
  1129. gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
  1130. gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
  1131. gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
  1132. gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
  1133. gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
  1134. gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
  1135. gpio_request(GPIO_PTY6, NULL); /* write protect */
  1136. gpio_direction_input(GPIO_PTY6);
  1137. gpio_request(GPIO_PTY7, NULL); /* card detect */
  1138. gpio_direction_input(GPIO_PTY7);
  1139. spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
  1140. #endif
  1141. /* enable Video */
  1142. gpio_request(GPIO_PTU2, NULL);
  1143. gpio_direction_output(GPIO_PTU2, 1);
  1144. /* enable Camera */
  1145. gpio_request(GPIO_PTA3, NULL);
  1146. gpio_request(GPIO_PTA4, NULL);
  1147. gpio_direction_output(GPIO_PTA3, 0);
  1148. gpio_direction_output(GPIO_PTA4, 0);
  1149. /* enable FSI */
  1150. gpio_request(GPIO_FN_FSIMCKB, NULL);
  1151. gpio_request(GPIO_FN_FSIIBSD, NULL);
  1152. gpio_request(GPIO_FN_FSIOBSD, NULL);
  1153. gpio_request(GPIO_FN_FSIIBBCK, NULL);
  1154. gpio_request(GPIO_FN_FSIIBLRCK, NULL);
  1155. gpio_request(GPIO_FN_FSIOBBCK, NULL);
  1156. gpio_request(GPIO_FN_FSIOBLRCK, NULL);
  1157. gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
  1158. /* set SPU2 clock to 83.4 MHz */
  1159. clk = clk_get(NULL, "spu_clk");
  1160. if (!IS_ERR(clk)) {
  1161. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  1162. clk_put(clk);
  1163. }
  1164. /* change parent of FSI B */
  1165. clk = clk_get(NULL, "fsib_clk");
  1166. if (!IS_ERR(clk)) {
  1167. /* 48kHz dummy clock was used to make sure 1/1 divide */
  1168. clk_set_rate(&sh7724_fsimckb_clk, 48000);
  1169. clk_set_parent(clk, &sh7724_fsimckb_clk);
  1170. clk_set_rate(clk, 48000);
  1171. clk_put(clk);
  1172. }
  1173. gpio_request(GPIO_PTU0, NULL);
  1174. gpio_direction_output(GPIO_PTU0, 0);
  1175. mdelay(20);
  1176. /* enable motion sensor */
  1177. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  1178. gpio_direction_input(GPIO_FN_INTC_IRQ1);
  1179. /* set VPU clock to 166 MHz */
  1180. clk = clk_get(NULL, "vpu_clk");
  1181. if (!IS_ERR(clk)) {
  1182. clk_set_rate(clk, clk_round_rate(clk, 166000000));
  1183. clk_put(clk);
  1184. }
  1185. /* enable IrDA */
  1186. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  1187. gpio_request(GPIO_FN_IRDA_IN, NULL);
  1188. gpio_request(GPIO_PTU5, NULL);
  1189. gpio_direction_output(GPIO_PTU5, 0);
  1190. #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
  1191. /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */
  1192. gpio_request(GPIO_FN_MMC_D7, NULL);
  1193. gpio_request(GPIO_FN_MMC_D6, NULL);
  1194. gpio_request(GPIO_FN_MMC_D5, NULL);
  1195. gpio_request(GPIO_FN_MMC_D4, NULL);
  1196. gpio_request(GPIO_FN_MMC_D3, NULL);
  1197. gpio_request(GPIO_FN_MMC_D2, NULL);
  1198. gpio_request(GPIO_FN_MMC_D1, NULL);
  1199. gpio_request(GPIO_FN_MMC_D0, NULL);
  1200. gpio_request(GPIO_FN_MMC_CLK, NULL);
  1201. gpio_request(GPIO_FN_MMC_CMD, NULL);
  1202. gpio_request(GPIO_PTB7, NULL);
  1203. gpio_direction_output(GPIO_PTB7, 0);
  1204. /* I/O buffer drive ability is high for MMCIF */
  1205. __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  1206. #endif
  1207. /* enable I2C device */
  1208. i2c_register_board_info(0, i2c0_devices,
  1209. ARRAY_SIZE(i2c0_devices));
  1210. i2c_register_board_info(1, i2c1_devices,
  1211. ARRAY_SIZE(i2c1_devices));
  1212. #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE)
  1213. /* VOU */
  1214. gpio_request(GPIO_FN_DV_D15, NULL);
  1215. gpio_request(GPIO_FN_DV_D14, NULL);
  1216. gpio_request(GPIO_FN_DV_D13, NULL);
  1217. gpio_request(GPIO_FN_DV_D12, NULL);
  1218. gpio_request(GPIO_FN_DV_D11, NULL);
  1219. gpio_request(GPIO_FN_DV_D10, NULL);
  1220. gpio_request(GPIO_FN_DV_D9, NULL);
  1221. gpio_request(GPIO_FN_DV_D8, NULL);
  1222. gpio_request(GPIO_FN_DV_CLKI, NULL);
  1223. gpio_request(GPIO_FN_DV_CLK, NULL);
  1224. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  1225. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  1226. /* AK8813 power / reset sequence */
  1227. gpio_request(GPIO_PTG4, NULL);
  1228. gpio_request(GPIO_PTU3, NULL);
  1229. /* Reset */
  1230. gpio_direction_output(GPIO_PTG4, 0);
  1231. /* Power down */
  1232. gpio_direction_output(GPIO_PTU3, 1);
  1233. udelay(10);
  1234. /* Power up, reset */
  1235. gpio_set_value(GPIO_PTU3, 0);
  1236. udelay(10);
  1237. /* Remove reset */
  1238. gpio_set_value(GPIO_PTG4, 1);
  1239. #endif
  1240. return platform_add_devices(ecovec_devices,
  1241. ARRAY_SIZE(ecovec_devices));
  1242. }
  1243. arch_initcall(arch_setup);
  1244. static int __init devices_setup(void)
  1245. {
  1246. sh_eth_init(&sh_eth_plat);
  1247. return 0;
  1248. }
  1249. device_initcall(devices_setup);
  1250. static struct sh_machine_vector mv_ecovec __initmv = {
  1251. .mv_name = "R0P7724 (EcoVec)",
  1252. };