page_64.h 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170
  1. #ifndef _ASM_POWERPC_PAGE_64_H
  2. #define _ASM_POWERPC_PAGE_64_H
  3. /*
  4. * Copyright (C) 2001 PPC64 Team, IBM Corp
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. /*
  12. * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
  13. * specific, every notion of page number shared with the firmware, TCEs,
  14. * iommu, etc... still uses a page size of 4K.
  15. */
  16. #define HW_PAGE_SHIFT 12
  17. #define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
  18. #define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
  19. /*
  20. * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
  21. * HW_PAGE_SHIFT, that is 4K pages.
  22. */
  23. #define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
  24. /* Segment size; normal 256M segments */
  25. #define SID_SHIFT 28
  26. #define SID_MASK ASM_CONST(0xfffffffff)
  27. #define ESID_MASK 0xfffffffff0000000UL
  28. #define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
  29. /* 1T segments */
  30. #define SID_SHIFT_1T 40
  31. #define SID_MASK_1T 0xffffffUL
  32. #define ESID_MASK_1T 0xffffff0000000000UL
  33. #define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
  34. #ifndef __ASSEMBLY__
  35. #include <asm/cache.h>
  36. typedef unsigned long pte_basic_t;
  37. static __inline__ void clear_page(void *addr)
  38. {
  39. unsigned long lines, line_size;
  40. line_size = ppc64_caches.dline_size;
  41. lines = ppc64_caches.dlines_per_page;
  42. __asm__ __volatile__(
  43. "mtctr %1 # clear_page\n\
  44. 1: dcbz 0,%0\n\
  45. add %0,%0,%3\n\
  46. bdnz+ 1b"
  47. : "=r" (addr)
  48. : "r" (lines), "0" (addr), "r" (line_size)
  49. : "ctr", "memory");
  50. }
  51. extern void copy_page(void *to, void *from);
  52. /* Log 2 of page table size */
  53. extern u64 ppc64_pft_size;
  54. /* Large pages size */
  55. #ifdef CONFIG_HUGETLB_PAGE
  56. extern unsigned int HPAGE_SHIFT;
  57. #else
  58. #define HPAGE_SHIFT PAGE_SHIFT
  59. #endif
  60. #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
  61. #define HPAGE_MASK (~(HPAGE_SIZE - 1))
  62. #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
  63. #define HUGE_MAX_HSTATE (MMU_PAGE_COUNT-1)
  64. #endif /* __ASSEMBLY__ */
  65. #ifdef CONFIG_PPC_MM_SLICES
  66. #define SLICE_LOW_SHIFT 28
  67. #define SLICE_HIGH_SHIFT 40
  68. #define SLICE_LOW_TOP (0x100000000ul)
  69. #define SLICE_NUM_LOW (SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
  70. #define SLICE_NUM_HIGH (PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
  71. #define GET_LOW_SLICE_INDEX(addr) ((addr) >> SLICE_LOW_SHIFT)
  72. #define GET_HIGH_SLICE_INDEX(addr) ((addr) >> SLICE_HIGH_SHIFT)
  73. #ifndef __ASSEMBLY__
  74. struct slice_mask {
  75. u16 low_slices;
  76. u16 high_slices;
  77. };
  78. struct mm_struct;
  79. extern unsigned long slice_get_unmapped_area(unsigned long addr,
  80. unsigned long len,
  81. unsigned long flags,
  82. unsigned int psize,
  83. int topdown,
  84. int use_cache);
  85. extern unsigned int get_slice_psize(struct mm_struct *mm,
  86. unsigned long addr);
  87. extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
  88. extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
  89. extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
  90. unsigned long len, unsigned int psize);
  91. #define slice_mm_new_context(mm) ((mm)->context.id == MMU_NO_CONTEXT)
  92. #endif /* __ASSEMBLY__ */
  93. #else
  94. #define slice_init()
  95. #ifdef CONFIG_PPC_STD_MMU_64
  96. #define get_slice_psize(mm, addr) ((mm)->context.user_psize)
  97. #define slice_set_user_psize(mm, psize) \
  98. do { \
  99. (mm)->context.user_psize = (psize); \
  100. (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
  101. } while (0)
  102. #else /* CONFIG_PPC_STD_MMU_64 */
  103. #ifdef CONFIG_PPC_64K_PAGES
  104. #define get_slice_psize(mm, addr) MMU_PAGE_64K
  105. #else /* CONFIG_PPC_64K_PAGES */
  106. #define get_slice_psize(mm, addr) MMU_PAGE_4K
  107. #endif /* !CONFIG_PPC_64K_PAGES */
  108. #define slice_set_user_psize(mm, psize) do { BUG(); } while(0)
  109. #endif /* !CONFIG_PPC_STD_MMU_64 */
  110. #define slice_set_range_psize(mm, start, len, psize) \
  111. slice_set_user_psize((mm), (psize))
  112. #define slice_mm_new_context(mm) 1
  113. #endif /* CONFIG_PPC_MM_SLICES */
  114. #ifdef CONFIG_HUGETLB_PAGE
  115. #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
  116. #endif /* !CONFIG_HUGETLB_PAGE */
  117. #define VM_DATA_DEFAULT_FLAGS \
  118. (is_32bit_task() ? \
  119. VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
  120. /*
  121. * This is the default if a program doesn't have a PT_GNU_STACK
  122. * program header entry. The PPC64 ELF ABI has a non executable stack
  123. * stack by default, so in the absence of a PT_GNU_STACK program header
  124. * we turn execute permission off.
  125. */
  126. #define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \
  127. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  128. #define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \
  129. VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
  130. #define VM_STACK_DEFAULT_FLAGS \
  131. (is_32bit_task() ? \
  132. VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
  133. #include <asm-generic/getorder.h>
  134. #endif /* _ASM_POWERPC_PAGE_64_H */