tll6527m.c 22 KB

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  1. /* File: arch/blackfin/mach-bf527/boards/tll6527m.c
  2. * Based on: arch/blackfin/mach-bf527/boards/ezkit.c
  3. * Author: Ashish Gupta
  4. *
  5. * Copyright: 2010 - The Learning Labs Inc.
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/i2c.h>
  17. #include <linux/irq.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/usb/musb.h>
  20. #include <linux/leds.h>
  21. #include <linux/input.h>
  22. #include <asm/dma.h>
  23. #include <asm/bfin5xx_spi.h>
  24. #include <asm/reboot.h>
  25. #include <asm/nand.h>
  26. #include <asm/portmux.h>
  27. #include <asm/dpmc.h>
  28. #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  29. || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  30. #include <linux/spi/ad7879.h>
  31. #define LCD_BACKLIGHT_GPIO 0x40
  32. /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  33. * LCD Backlight Enable
  34. */
  35. #endif
  36. /*
  37. * Name the Board for the /proc/cpuinfo
  38. */
  39. const char bfin_board_name[] = "TLL6527M";
  40. /*
  41. * Driver needs to know address, irq and flag pin.
  42. */
  43. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  44. static struct resource musb_resources[] = {
  45. [0] = {
  46. .start = 0xffc03800,
  47. .end = 0xffc03cff,
  48. .flags = IORESOURCE_MEM,
  49. },
  50. [1] = { /* general IRQ */
  51. .start = IRQ_USB_INT0,
  52. .end = IRQ_USB_INT0,
  53. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  54. },
  55. [2] = { /* DMA IRQ */
  56. .start = IRQ_USB_DMA,
  57. .end = IRQ_USB_DMA,
  58. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  59. },
  60. };
  61. static struct musb_hdrc_config musb_config = {
  62. .multipoint = 0,
  63. .dyn_fifo = 0,
  64. .soft_con = 1,
  65. .dma = 1,
  66. .num_eps = 8,
  67. .dma_channels = 8,
  68. /*.gpio_vrsel = GPIO_PG13,*/
  69. /* Some custom boards need to be active low, just set it to "0"
  70. * if it is the case.
  71. */
  72. .gpio_vrsel_active = 1,
  73. };
  74. static struct musb_hdrc_platform_data musb_plat = {
  75. #if defined(CONFIG_USB_MUSB_OTG)
  76. .mode = MUSB_OTG,
  77. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78. .mode = MUSB_HOST,
  79. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80. .mode = MUSB_PERIPHERAL,
  81. #endif
  82. .config = &musb_config,
  83. };
  84. static u64 musb_dmamask = ~(u32)0;
  85. static struct platform_device musb_device = {
  86. .name = "musb-blackfin",
  87. .id = 0,
  88. .dev = {
  89. .dma_mask = &musb_dmamask,
  90. .coherent_dma_mask = 0xffffffff,
  91. .platform_data = &musb_plat,
  92. },
  93. .num_resources = ARRAY_SIZE(musb_resources),
  94. .resource = musb_resources,
  95. };
  96. #endif
  97. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  98. #include <asm/bfin-lq035q1.h>
  99. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  100. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  101. .ppi_mode = USE_RGB565_16_BIT_PPI,
  102. .use_bl = 1,
  103. .gpio_bl = LCD_BACKLIGHT_GPIO,
  104. };
  105. static struct resource bfin_lq035q1_resources[] = {
  106. {
  107. .start = IRQ_PPI_ERROR,
  108. .end = IRQ_PPI_ERROR,
  109. .flags = IORESOURCE_IRQ,
  110. },
  111. };
  112. static struct platform_device bfin_lq035q1_device = {
  113. .name = "bfin-lq035q1",
  114. .id = -1,
  115. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  116. .resource = bfin_lq035q1_resources,
  117. .dev = {
  118. .platform_data = &bfin_lq035q1_data,
  119. },
  120. };
  121. #endif
  122. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  123. static struct mtd_partition tll6527m_partitions[] = {
  124. {
  125. .name = "bootloader(nor)",
  126. .size = 0xA0000,
  127. .offset = 0,
  128. }, {
  129. .name = "linux kernel(nor)",
  130. .size = 0xD00000,
  131. .offset = MTDPART_OFS_APPEND,
  132. }, {
  133. .name = "file system(nor)",
  134. .size = MTDPART_SIZ_FULL,
  135. .offset = MTDPART_OFS_APPEND,
  136. }
  137. };
  138. static struct physmap_flash_data tll6527m_flash_data = {
  139. .width = 2,
  140. .parts = tll6527m_partitions,
  141. .nr_parts = ARRAY_SIZE(tll6527m_partitions),
  142. };
  143. static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
  144. static struct resource tll6527m_flash_resource[] = {
  145. {
  146. .name = "cfi_probe",
  147. .start = 0x20000000,
  148. .end = 0x201fffff,
  149. .flags = IORESOURCE_MEM,
  150. }, {
  151. .start = (unsigned long)tll6527m_flash_gpios,
  152. .end = ARRAY_SIZE(tll6527m_flash_gpios),
  153. .flags = IORESOURCE_IRQ,
  154. }
  155. };
  156. static struct platform_device tll6527m_flash_device = {
  157. .name = "gpio-addr-flash",
  158. .id = 0,
  159. .dev = {
  160. .platform_data = &tll6527m_flash_data,
  161. },
  162. .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
  163. .resource = tll6527m_flash_resource,
  164. };
  165. #endif
  166. #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
  167. /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
  168. * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
  169. * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
  170. * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
  171. */
  172. #include <linux/gpio-decoder.h>
  173. #define EXP_GPIO_SPISEL_BASE 0x64
  174. static unsigned gpio_addr_inputs[] = {
  175. GPIO_PG1, GPIO_PH9, GPIO_PH10
  176. };
  177. static struct gpio_decoder_platform_data spi_decoded_cs = {
  178. .base = EXP_GPIO_SPISEL_BASE,
  179. .input_addrs = gpio_addr_inputs,
  180. .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
  181. .default_output = 0,
  182. /* .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
  183. };
  184. static struct platform_device spi_decoded_gpio = {
  185. .name = "gpio-decoder",
  186. .id = 0,
  187. .dev = {
  188. .platform_data = &spi_decoded_cs,
  189. },
  190. };
  191. #else
  192. #define EXP_GPIO_SPISEL_BASE 0x0
  193. #endif
  194. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  195. #include <linux/input/adxl34x.h>
  196. static const struct adxl34x_platform_data adxl345_info = {
  197. .x_axis_offset = 0,
  198. .y_axis_offset = 0,
  199. .z_axis_offset = 0,
  200. .tap_threshold = 0x31,
  201. .tap_duration = 0x10,
  202. .tap_latency = 0x60,
  203. .tap_window = 0xF0,
  204. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  205. .act_axis_control = 0xFF,
  206. .activity_threshold = 5,
  207. .inactivity_threshold = 2,
  208. .inactivity_time = 2,
  209. .free_fall_threshold = 0x7,
  210. .free_fall_time = 0x20,
  211. .data_rate = 0x8,
  212. .data_range = ADXL_FULL_RES,
  213. .ev_type = EV_ABS,
  214. .ev_code_x = ABS_X, /* EV_REL */
  215. .ev_code_y = ABS_Y, /* EV_REL */
  216. .ev_code_z = ABS_Z, /* EV_REL */
  217. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  218. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  219. .ev_code_act_inactivity = KEY_A, /* EV_KEY */
  220. .use_int2 = 1,
  221. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  222. .fifo_mode = ADXL_FIFO_STREAM,
  223. };
  224. #endif
  225. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  226. static struct platform_device rtc_device = {
  227. .name = "rtc-bfin",
  228. .id = -1,
  229. };
  230. #endif
  231. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  232. #include <linux/bfin_mac.h>
  233. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  234. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  235. {
  236. .addr = 1,
  237. .irq = IRQ_MAC_PHYINT,
  238. },
  239. };
  240. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  241. .phydev_number = 1,
  242. .phydev_data = bfin_phydev_data,
  243. .phy_mode = PHY_INTERFACE_MODE_RMII,
  244. .mac_peripherals = bfin_mac_peripherals,
  245. };
  246. static struct platform_device bfin_mii_bus = {
  247. .name = "bfin_mii_bus",
  248. .dev = {
  249. .platform_data = &bfin_mii_bus_data,
  250. }
  251. };
  252. static struct platform_device bfin_mac_device = {
  253. .name = "bfin_mac",
  254. .dev = {
  255. .platform_data = &bfin_mii_bus,
  256. }
  257. };
  258. #endif
  259. #if defined(CONFIG_MTD_M25P80) \
  260. || defined(CONFIG_MTD_M25P80_MODULE)
  261. static struct mtd_partition bfin_spi_flash_partitions[] = {
  262. {
  263. .name = "bootloader(spi)",
  264. .size = 0x00040000,
  265. .offset = 0,
  266. .mask_flags = MTD_CAP_ROM
  267. }, {
  268. .name = "linux kernel(spi)",
  269. .size = MTDPART_SIZ_FULL,
  270. .offset = MTDPART_OFS_APPEND,
  271. }
  272. };
  273. static struct flash_platform_data bfin_spi_flash_data = {
  274. .name = "m25p80",
  275. .parts = bfin_spi_flash_partitions,
  276. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  277. .type = "m25p16",
  278. };
  279. /* SPI flash chip (m25p64) */
  280. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  281. .enable_dma = 0, /* use dma transfer with this chip*/
  282. };
  283. #endif
  284. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  285. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  286. .enable_dma = 0,
  287. };
  288. #endif
  289. #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  290. || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  291. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  292. .model = 7879, /* Model = AD7879 */
  293. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  294. .pressure_max = 10000,
  295. .pressure_min = 0,
  296. .first_conversion_delay = 3,
  297. /* wait 512us before do a first conversion */
  298. .acquisition_time = 1, /* 4us acquisition time per sample */
  299. .median = 2, /* do 8 measurements */
  300. .averaging = 1,
  301. /* take the average of 4 middle samples */
  302. .pen_down_acc_interval = 255, /* 9.4 ms */
  303. .gpio_export = 1, /* configure AUX as GPIO output*/
  304. .gpio_base = LCD_BACKLIGHT_GPIO,
  305. };
  306. #endif
  307. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  308. static struct platform_device bfin_i2s = {
  309. .name = "bfin-i2s",
  310. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  311. /* TODO: add platform data here */
  312. };
  313. #endif
  314. #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
  315. #include <linux/spi/mcp23s08.h>
  316. static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
  317. .chip[0].is_present = true,
  318. .base = 0x30,
  319. };
  320. static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
  321. .chip[2].is_present = true,
  322. .base = 0x38,
  323. };
  324. #endif
  325. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  326. #if defined(CONFIG_MTD_M25P80) \
  327. || defined(CONFIG_MTD_M25P80_MODULE)
  328. {
  329. /* the modalias must be the same as spi device driver name */
  330. .modalias = "m25p80", /* Name of spi_driver for this device */
  331. .max_speed_hz = 25000000,
  332. /* max spi clock (SCK) speed in HZ */
  333. .bus_num = 0, /* Framework bus number */
  334. .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
  335. /* Can be connected to TLL6527M GPIO connector */
  336. /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
  337. .platform_data = &bfin_spi_flash_data,
  338. .controller_data = &spi_flash_chip_info,
  339. .mode = SPI_MODE_3,
  340. },
  341. #endif
  342. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  343. {
  344. .modalias = "mmc_spi",
  345. /*
  346. * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
  347. * SPI buffer limitations
  348. */
  349. .max_speed_hz = 10000000,
  350. /* max spi clock (SCK) speed in HZ */
  351. .bus_num = 0,
  352. .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
  353. .controller_data = &mmc_spi_chip_info,
  354. .mode = SPI_MODE_0,
  355. },
  356. #endif
  357. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
  358. || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  359. {
  360. .modalias = "ad7879",
  361. .platform_data = &bfin_ad7879_ts_info,
  362. .irq = IRQ_PH14,
  363. .max_speed_hz = 5000000,
  364. /* max spi clock (SCK) speed in HZ */
  365. .bus_num = 0,
  366. .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
  367. .mode = SPI_CPHA | SPI_CPOL,
  368. },
  369. #endif
  370. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  371. {
  372. .modalias = "spidev",
  373. .max_speed_hz = 10000000,
  374. /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
  375. .bus_num = 0,
  376. .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
  377. .mode = SPI_CPHA | SPI_CPOL,
  378. },
  379. #endif
  380. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  381. {
  382. .modalias = "bfin-lq035q1-spi",
  383. .max_speed_hz = 20000000,
  384. .bus_num = 0,
  385. .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
  386. .mode = SPI_CPHA | SPI_CPOL,
  387. },
  388. #endif
  389. #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
  390. {
  391. .modalias = "mcp23s08",
  392. .platform_data = &bfin_mcp23s08_sys_gpio_info,
  393. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  394. .bus_num = 0,
  395. .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
  396. .mode = SPI_CPHA | SPI_CPOL,
  397. },
  398. {
  399. .modalias = "mcp23s08",
  400. .platform_data = &bfin_mcp23s08_usr_gpio_info,
  401. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  402. .bus_num = 0,
  403. .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
  404. .mode = SPI_CPHA | SPI_CPOL,
  405. },
  406. #endif
  407. };
  408. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  409. /* SPI controller data */
  410. static struct bfin5xx_spi_master bfin_spi0_info = {
  411. .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
  412. /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
  413. .enable_dma = 1, /* master has the ability to do dma transfer */
  414. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  415. };
  416. /* SPI (0) */
  417. static struct resource bfin_spi0_resource[] = {
  418. [0] = {
  419. .start = SPI0_REGBASE,
  420. .end = SPI0_REGBASE + 0xFF,
  421. .flags = IORESOURCE_MEM,
  422. },
  423. [1] = {
  424. .start = CH_SPI,
  425. .end = CH_SPI,
  426. .flags = IORESOURCE_DMA,
  427. },
  428. [2] = {
  429. .start = IRQ_SPI,
  430. .end = IRQ_SPI,
  431. .flags = IORESOURCE_IRQ,
  432. },
  433. };
  434. static struct platform_device bfin_spi0_device = {
  435. .name = "bfin-spi",
  436. .id = 0, /* Bus number */
  437. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  438. .resource = bfin_spi0_resource,
  439. .dev = {
  440. .platform_data = &bfin_spi0_info, /* Passed to driver */
  441. },
  442. };
  443. #endif /* spi master and devices */
  444. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  445. #ifdef CONFIG_SERIAL_BFIN_UART0
  446. static struct resource bfin_uart0_resources[] = {
  447. {
  448. .start = UART0_THR,
  449. .end = UART0_GCTL+2,
  450. .flags = IORESOURCE_MEM,
  451. },
  452. {
  453. .start = IRQ_UART0_RX,
  454. .end = IRQ_UART0_RX+1,
  455. .flags = IORESOURCE_IRQ,
  456. },
  457. {
  458. .start = IRQ_UART0_ERROR,
  459. .end = IRQ_UART0_ERROR,
  460. .flags = IORESOURCE_IRQ,
  461. },
  462. {
  463. .start = CH_UART0_TX,
  464. .end = CH_UART0_TX,
  465. .flags = IORESOURCE_DMA,
  466. },
  467. {
  468. .start = CH_UART0_RX,
  469. .end = CH_UART0_RX,
  470. .flags = IORESOURCE_DMA,
  471. },
  472. };
  473. static unsigned short bfin_uart0_peripherals[] = {
  474. P_UART0_TX, P_UART0_RX, 0
  475. };
  476. static struct platform_device bfin_uart0_device = {
  477. .name = "bfin-uart",
  478. .id = 0,
  479. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  480. .resource = bfin_uart0_resources,
  481. .dev = {
  482. .platform_data = &bfin_uart0_peripherals,
  483. /* Passed to driver */
  484. },
  485. };
  486. #endif
  487. #ifdef CONFIG_SERIAL_BFIN_UART1
  488. static struct resource bfin_uart1_resources[] = {
  489. {
  490. .start = UART1_THR,
  491. .end = UART1_GCTL+2,
  492. .flags = IORESOURCE_MEM,
  493. },
  494. {
  495. .start = IRQ_UART1_RX,
  496. .end = IRQ_UART1_RX+1,
  497. .flags = IORESOURCE_IRQ,
  498. },
  499. {
  500. .start = IRQ_UART1_ERROR,
  501. .end = IRQ_UART1_ERROR,
  502. .flags = IORESOURCE_IRQ,
  503. },
  504. {
  505. .start = CH_UART1_TX,
  506. .end = CH_UART1_TX,
  507. .flags = IORESOURCE_DMA,
  508. },
  509. {
  510. .start = CH_UART1_RX,
  511. .end = CH_UART1_RX,
  512. .flags = IORESOURCE_DMA,
  513. },
  514. #ifdef CONFIG_BFIN_UART1_CTSRTS
  515. { /* CTS pin */
  516. .start = GPIO_PF9,
  517. .end = GPIO_PF9,
  518. .flags = IORESOURCE_IO,
  519. },
  520. { /* RTS pin */
  521. .start = GPIO_PF10,
  522. .end = GPIO_PF10,
  523. .flags = IORESOURCE_IO,
  524. },
  525. #endif
  526. };
  527. static unsigned short bfin_uart1_peripherals[] = {
  528. P_UART1_TX, P_UART1_RX, 0
  529. };
  530. static struct platform_device bfin_uart1_device = {
  531. .name = "bfin-uart",
  532. .id = 1,
  533. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  534. .resource = bfin_uart1_resources,
  535. .dev = {
  536. .platform_data = &bfin_uart1_peripherals,
  537. /* Passed to driver */
  538. },
  539. };
  540. #endif
  541. #endif
  542. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  543. #ifdef CONFIG_BFIN_SIR0
  544. static struct resource bfin_sir0_resources[] = {
  545. {
  546. .start = 0xFFC00400,
  547. .end = 0xFFC004FF,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. {
  551. .start = IRQ_UART0_RX,
  552. .end = IRQ_UART0_RX+1,
  553. .flags = IORESOURCE_IRQ,
  554. },
  555. {
  556. .start = CH_UART0_RX,
  557. .end = CH_UART0_RX+1,
  558. .flags = IORESOURCE_DMA,
  559. },
  560. };
  561. static struct platform_device bfin_sir0_device = {
  562. .name = "bfin_sir",
  563. .id = 0,
  564. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  565. .resource = bfin_sir0_resources,
  566. };
  567. #endif
  568. #ifdef CONFIG_BFIN_SIR1
  569. static struct resource bfin_sir1_resources[] = {
  570. {
  571. .start = 0xFFC02000,
  572. .end = 0xFFC020FF,
  573. .flags = IORESOURCE_MEM,
  574. },
  575. {
  576. .start = IRQ_UART1_RX,
  577. .end = IRQ_UART1_RX+1,
  578. .flags = IORESOURCE_IRQ,
  579. },
  580. {
  581. .start = CH_UART1_RX,
  582. .end = CH_UART1_RX+1,
  583. .flags = IORESOURCE_DMA,
  584. },
  585. };
  586. static struct platform_device bfin_sir1_device = {
  587. .name = "bfin_sir",
  588. .id = 1,
  589. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  590. .resource = bfin_sir1_resources,
  591. };
  592. #endif
  593. #endif
  594. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  595. static struct resource bfin_twi0_resource[] = {
  596. [0] = {
  597. .start = TWI0_REGBASE,
  598. .end = TWI0_REGBASE,
  599. .flags = IORESOURCE_MEM,
  600. },
  601. [1] = {
  602. .start = IRQ_TWI,
  603. .end = IRQ_TWI,
  604. .flags = IORESOURCE_IRQ,
  605. },
  606. };
  607. static struct platform_device i2c_bfin_twi_device = {
  608. .name = "i2c-bfin-twi",
  609. .id = 0,
  610. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  611. .resource = bfin_twi0_resource,
  612. };
  613. #endif
  614. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  615. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  616. {
  617. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  618. },
  619. #endif
  620. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  621. {
  622. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  623. },
  624. #endif
  625. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
  626. || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  627. {
  628. I2C_BOARD_INFO("ad7879", 0x2C),
  629. .irq = IRQ_PH14,
  630. .platform_data = (void *)&bfin_ad7879_ts_info,
  631. },
  632. #endif
  633. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  634. {
  635. I2C_BOARD_INFO("ssm2602", 0x1b),
  636. },
  637. #endif
  638. {
  639. I2C_BOARD_INFO("adm1192", 0x2e),
  640. },
  641. {
  642. I2C_BOARD_INFO("ltc3576", 0x09),
  643. },
  644. #if defined(CONFIG_INPUT_ADXL34X_I2C) \
  645. || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  646. {
  647. I2C_BOARD_INFO("adxl34x", 0x53),
  648. .irq = IRQ_PH13,
  649. .platform_data = (void *)&adxl345_info,
  650. },
  651. #endif
  652. };
  653. #if defined(CONFIG_SERIAL_BFIN_SPORT) \
  654. || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  655. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  656. static struct resource bfin_sport0_uart_resources[] = {
  657. {
  658. .start = SPORT0_TCR1,
  659. .end = SPORT0_MRCS3+4,
  660. .flags = IORESOURCE_MEM,
  661. },
  662. {
  663. .start = IRQ_SPORT0_RX,
  664. .end = IRQ_SPORT0_RX+1,
  665. .flags = IORESOURCE_IRQ,
  666. },
  667. {
  668. .start = IRQ_SPORT0_ERROR,
  669. .end = IRQ_SPORT0_ERROR,
  670. .flags = IORESOURCE_IRQ,
  671. },
  672. };
  673. static unsigned short bfin_sport0_peripherals[] = {
  674. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  675. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  676. };
  677. static struct platform_device bfin_sport0_uart_device = {
  678. .name = "bfin-sport-uart",
  679. .id = 0,
  680. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  681. .resource = bfin_sport0_uart_resources,
  682. .dev = {
  683. .platform_data = &bfin_sport0_peripherals,
  684. /* Passed to driver */
  685. },
  686. };
  687. #endif
  688. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  689. static struct resource bfin_sport1_uart_resources[] = {
  690. {
  691. .start = SPORT1_TCR1,
  692. .end = SPORT1_MRCS3+4,
  693. .flags = IORESOURCE_MEM,
  694. },
  695. {
  696. .start = IRQ_SPORT1_RX,
  697. .end = IRQ_SPORT1_RX+1,
  698. .flags = IORESOURCE_IRQ,
  699. },
  700. {
  701. .start = IRQ_SPORT1_ERROR,
  702. .end = IRQ_SPORT1_ERROR,
  703. .flags = IORESOURCE_IRQ,
  704. },
  705. };
  706. static unsigned short bfin_sport1_peripherals[] = {
  707. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  708. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  709. };
  710. static struct platform_device bfin_sport1_uart_device = {
  711. .name = "bfin-sport-uart",
  712. .id = 1,
  713. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  714. .resource = bfin_sport1_uart_resources,
  715. .dev = {
  716. .platform_data = &bfin_sport1_peripherals,
  717. /* Passed to driver */
  718. },
  719. };
  720. #endif
  721. #endif
  722. static const unsigned int cclk_vlev_datasheet[] = {
  723. VRPAIR(VLEV_100, 400000000),
  724. VRPAIR(VLEV_105, 426000000),
  725. VRPAIR(VLEV_110, 500000000),
  726. VRPAIR(VLEV_115, 533000000),
  727. VRPAIR(VLEV_120, 600000000),
  728. };
  729. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  730. .tuple_tab = cclk_vlev_datasheet,
  731. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  732. .vr_settling_time = 25 /* us */,
  733. };
  734. static struct platform_device bfin_dpmc = {
  735. .name = "bfin dpmc",
  736. .dev = {
  737. .platform_data = &bfin_dmpc_vreg_data,
  738. },
  739. };
  740. static struct platform_device *tll6527m_devices[] __initdata = {
  741. &bfin_dpmc,
  742. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  743. &rtc_device,
  744. #endif
  745. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  746. &musb_device,
  747. #endif
  748. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  749. &bfin_mii_bus,
  750. &bfin_mac_device,
  751. #endif
  752. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  753. &bfin_spi0_device,
  754. #endif
  755. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  756. &bfin_lq035q1_device,
  757. #endif
  758. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  759. #ifdef CONFIG_SERIAL_BFIN_UART0
  760. &bfin_uart0_device,
  761. #endif
  762. #ifdef CONFIG_SERIAL_BFIN_UART1
  763. &bfin_uart1_device,
  764. #endif
  765. #endif
  766. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  767. #ifdef CONFIG_BFIN_SIR0
  768. &bfin_sir0_device,
  769. #endif
  770. #ifdef CONFIG_BFIN_SIR1
  771. &bfin_sir1_device,
  772. #endif
  773. #endif
  774. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  775. &i2c_bfin_twi_device,
  776. #endif
  777. #if defined(CONFIG_SERIAL_BFIN_SPORT) \
  778. || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  779. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  780. &bfin_sport0_uart_device,
  781. #endif
  782. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  783. &bfin_sport1_uart_device,
  784. #endif
  785. #endif
  786. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  787. &tll6527m_flash_device,
  788. #endif
  789. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  790. &bfin_i2s,
  791. #endif
  792. #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
  793. &spi_decoded_gpio,
  794. #endif
  795. };
  796. static int __init tll6527m_init(void)
  797. {
  798. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  799. i2c_register_board_info(0, bfin_i2c_board_info,
  800. ARRAY_SIZE(bfin_i2c_board_info));
  801. platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
  802. spi_register_board_info(bfin_spi_board_info,
  803. ARRAY_SIZE(bfin_spi_board_info));
  804. return 0;
  805. }
  806. arch_initcall(tll6527m_init);
  807. static struct platform_device *tll6527m_early_devices[] __initdata = {
  808. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  809. #ifdef CONFIG_SERIAL_BFIN_UART0
  810. &bfin_uart0_device,
  811. #endif
  812. #ifdef CONFIG_SERIAL_BFIN_UART1
  813. &bfin_uart1_device,
  814. #endif
  815. #endif
  816. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  817. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  818. &bfin_sport0_uart_device,
  819. #endif
  820. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  821. &bfin_sport1_uart_device,
  822. #endif
  823. #endif
  824. };
  825. void __init native_machine_early_platform_add_devices(void)
  826. {
  827. printk(KERN_INFO "register early platform devices\n");
  828. early_platform_add_devices(tll6527m_early_devices,
  829. ARRAY_SIZE(tll6527m_early_devices));
  830. }
  831. void native_machine_restart(char *cmd)
  832. {
  833. /* workaround reboot hang when booting from SPI */
  834. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  835. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  836. }
  837. void bfin_get_ether_addr(char *addr)
  838. {
  839. /* the MAC is stored in OTP memory page 0xDF */
  840. u32 ret;
  841. u64 otp_mac;
  842. u32 (*otp_read)(u32 page, u32 flags,
  843. u64 *page_content) = (void *)0xEF00001A;
  844. ret = otp_read(0xDF, 0x00, &otp_mac);
  845. if (!(ret & 0x1)) {
  846. char *otp_mac_p = (char *)&otp_mac;
  847. for (ret = 0; ret < 6; ++ret)
  848. addr[ret] = otp_mac_p[5 - ret];
  849. }
  850. }
  851. EXPORT_SYMBOL(bfin_get_ether_addr);