ad7160eval.c 20 KB

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  1. /*
  2. * Copyright 2004-20010 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <linux/leds.h>
  20. #include <linux/input.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  35. static struct resource musb_resources[] = {
  36. [0] = {
  37. .start = 0xffc03800,
  38. .end = 0xffc03cff,
  39. .flags = IORESOURCE_MEM,
  40. },
  41. [1] = { /* general IRQ */
  42. .start = IRQ_USB_INT0,
  43. .end = IRQ_USB_INT0,
  44. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  45. },
  46. [2] = { /* DMA IRQ */
  47. .start = IRQ_USB_DMA,
  48. .end = IRQ_USB_DMA,
  49. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  50. },
  51. };
  52. static struct musb_hdrc_config musb_config = {
  53. .multipoint = 0,
  54. .dyn_fifo = 0,
  55. .soft_con = 1,
  56. .dma = 1,
  57. .num_eps = 8,
  58. .dma_channels = 8,
  59. .gpio_vrsel = GPIO_PG13,
  60. /* Some custom boards need to be active low, just set it to "0"
  61. * if it is the case.
  62. */
  63. .gpio_vrsel_active = 1,
  64. .clkin = 24, /* musb CLKIN in MHZ */
  65. };
  66. static struct musb_hdrc_platform_data musb_plat = {
  67. #if defined(CONFIG_USB_MUSB_OTG)
  68. .mode = MUSB_OTG,
  69. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  70. .mode = MUSB_HOST,
  71. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  72. .mode = MUSB_PERIPHERAL,
  73. #endif
  74. .config = &musb_config,
  75. };
  76. static u64 musb_dmamask = ~(u32)0;
  77. static struct platform_device musb_device = {
  78. .name = "musb-blackfin",
  79. .id = 0,
  80. .dev = {
  81. .dma_mask = &musb_dmamask,
  82. .coherent_dma_mask = 0xffffffff,
  83. .platform_data = &musb_plat,
  84. },
  85. .num_resources = ARRAY_SIZE(musb_resources),
  86. .resource = musb_resources,
  87. };
  88. #endif
  89. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  90. static struct resource bf52x_ra158z_resources[] = {
  91. {
  92. .start = IRQ_PPI_ERROR,
  93. .end = IRQ_PPI_ERROR,
  94. .flags = IORESOURCE_IRQ,
  95. },
  96. };
  97. static struct platform_device bf52x_ra158z_device = {
  98. .name = "bfin-ra158z",
  99. .id = -1,
  100. .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
  101. .resource = bf52x_ra158z_resources,
  102. };
  103. #endif
  104. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  105. static struct mtd_partition ad7160eval_partitions[] = {
  106. {
  107. .name = "bootloader(nor)",
  108. .size = 0x40000,
  109. .offset = 0,
  110. }, {
  111. .name = "linux kernel(nor)",
  112. .size = 0x1C0000,
  113. .offset = MTDPART_OFS_APPEND,
  114. }, {
  115. .name = "file system(nor)",
  116. .size = MTDPART_SIZ_FULL,
  117. .offset = MTDPART_OFS_APPEND,
  118. }
  119. };
  120. static struct physmap_flash_data ad7160eval_flash_data = {
  121. .width = 2,
  122. .parts = ad7160eval_partitions,
  123. .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
  124. };
  125. static struct resource ad7160eval_flash_resource = {
  126. .start = 0x20000000,
  127. .end = 0x203fffff,
  128. .flags = IORESOURCE_MEM,
  129. };
  130. static struct platform_device ad7160eval_flash_device = {
  131. .name = "physmap-flash",
  132. .id = 0,
  133. .dev = {
  134. .platform_data = &ad7160eval_flash_data,
  135. },
  136. .num_resources = 1,
  137. .resource = &ad7160eval_flash_resource,
  138. };
  139. #endif
  140. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  141. static struct mtd_partition partition_info[] = {
  142. {
  143. .name = "linux kernel(nand)",
  144. .offset = 0,
  145. .size = 4 * 1024 * 1024,
  146. },
  147. {
  148. .name = "file system(nand)",
  149. .offset = MTDPART_OFS_APPEND,
  150. .size = MTDPART_SIZ_FULL,
  151. },
  152. };
  153. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  154. .data_width = NFC_NWIDTH_8,
  155. .partitions = partition_info,
  156. .nr_partitions = ARRAY_SIZE(partition_info),
  157. .rd_dly = 3,
  158. .wr_dly = 3,
  159. };
  160. static struct resource bf5xx_nand_resources[] = {
  161. {
  162. .start = NFC_CTL,
  163. .end = NFC_DATA_RD + 2,
  164. .flags = IORESOURCE_MEM,
  165. },
  166. {
  167. .start = CH_NFC,
  168. .end = CH_NFC,
  169. .flags = IORESOURCE_IRQ,
  170. },
  171. };
  172. static struct platform_device bf5xx_nand_device = {
  173. .name = "bf5xx-nand",
  174. .id = 0,
  175. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  176. .resource = bf5xx_nand_resources,
  177. .dev = {
  178. .platform_data = &bf5xx_nand_platform,
  179. },
  180. };
  181. #endif
  182. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  183. static struct platform_device rtc_device = {
  184. .name = "rtc-bfin",
  185. .id = -1,
  186. };
  187. #endif
  188. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  189. #include <linux/bfin_mac.h>
  190. static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  191. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  192. {
  193. .addr = 1,
  194. .irq = IRQ_MAC_PHYINT,
  195. },
  196. };
  197. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  198. .phydev_number = 1,
  199. .phydev_data = bfin_phydev_data,
  200. .phy_mode = PHY_INTERFACE_MODE_RMII,
  201. .mac_peripherals = bfin_mac_peripherals,
  202. };
  203. static struct platform_device bfin_mii_bus = {
  204. .name = "bfin_mii_bus",
  205. .dev = {
  206. .platform_data = &bfin_mii_bus_data,
  207. }
  208. };
  209. static struct platform_device bfin_mac_device = {
  210. .name = "bfin_mac",
  211. .dev = {
  212. .platform_data = &bfin_mii_bus,
  213. }
  214. };
  215. #endif
  216. #if defined(CONFIG_MTD_M25P80) \
  217. || defined(CONFIG_MTD_M25P80_MODULE)
  218. static struct mtd_partition bfin_spi_flash_partitions[] = {
  219. {
  220. .name = "bootloader(spi)",
  221. .size = 0x00040000,
  222. .offset = 0,
  223. .mask_flags = MTD_CAP_ROM
  224. }, {
  225. .name = "linux kernel(spi)",
  226. .size = MTDPART_SIZ_FULL,
  227. .offset = MTDPART_OFS_APPEND,
  228. }
  229. };
  230. static struct flash_platform_data bfin_spi_flash_data = {
  231. .name = "m25p80",
  232. .parts = bfin_spi_flash_partitions,
  233. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  234. .type = "m25p16",
  235. };
  236. /* SPI flash chip (m25p64) */
  237. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  238. .enable_dma = 0, /* use dma transfer with this chip*/
  239. };
  240. #endif
  241. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  242. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  243. .enable_dma = 0,
  244. };
  245. #endif
  246. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  247. static struct platform_device bfin_i2s = {
  248. .name = "bfin-i2s",
  249. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  250. /* TODO: add platform data here */
  251. };
  252. #endif
  253. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  254. static struct platform_device bfin_tdm = {
  255. .name = "bfin-tdm",
  256. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  257. /* TODO: add platform data here */
  258. };
  259. #endif
  260. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  261. #if defined(CONFIG_MTD_M25P80) \
  262. || defined(CONFIG_MTD_M25P80_MODULE)
  263. {
  264. /* the modalias must be the same as spi device driver name */
  265. .modalias = "m25p80", /* Name of spi_driver for this device */
  266. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  267. .bus_num = 0, /* Framework bus number */
  268. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  269. .platform_data = &bfin_spi_flash_data,
  270. .controller_data = &spi_flash_chip_info,
  271. .mode = SPI_MODE_3,
  272. },
  273. #endif
  274. #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
  275. || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  276. {
  277. .modalias = "ad183x",
  278. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  279. .bus_num = 0,
  280. .chip_select = 4,
  281. },
  282. #endif
  283. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  284. {
  285. .modalias = "mmc_spi",
  286. .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
  287. .bus_num = 0,
  288. .chip_select = GPIO_PH3 + MAX_CTRL_CS,
  289. .controller_data = &mmc_spi_chip_info,
  290. .mode = SPI_MODE_3,
  291. },
  292. #endif
  293. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  294. {
  295. .modalias = "spidev",
  296. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  297. .bus_num = 0,
  298. .chip_select = 1,
  299. },
  300. #endif
  301. };
  302. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  303. /* SPI controller data */
  304. static struct bfin5xx_spi_master bfin_spi0_info = {
  305. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  306. .enable_dma = 1, /* master has the ability to do dma transfer */
  307. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  308. };
  309. /* SPI (0) */
  310. static struct resource bfin_spi0_resource[] = {
  311. [0] = {
  312. .start = SPI0_REGBASE,
  313. .end = SPI0_REGBASE + 0xFF,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. [1] = {
  317. .start = CH_SPI,
  318. .end = CH_SPI,
  319. .flags = IORESOURCE_DMA,
  320. },
  321. [2] = {
  322. .start = IRQ_SPI,
  323. .end = IRQ_SPI,
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. };
  327. static struct platform_device bfin_spi0_device = {
  328. .name = "bfin-spi",
  329. .id = 0, /* Bus number */
  330. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  331. .resource = bfin_spi0_resource,
  332. .dev = {
  333. .platform_data = &bfin_spi0_info, /* Passed to driver */
  334. },
  335. };
  336. #endif /* spi master and devices */
  337. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  338. #ifdef CONFIG_SERIAL_BFIN_UART0
  339. static struct resource bfin_uart0_resources[] = {
  340. {
  341. .start = UART0_THR,
  342. .end = UART0_GCTL+2,
  343. .flags = IORESOURCE_MEM,
  344. },
  345. {
  346. .start = IRQ_UART0_RX,
  347. .end = IRQ_UART0_RX+1,
  348. .flags = IORESOURCE_IRQ,
  349. },
  350. {
  351. .start = IRQ_UART0_ERROR,
  352. .end = IRQ_UART0_ERROR,
  353. .flags = IORESOURCE_IRQ,
  354. },
  355. {
  356. .start = CH_UART0_TX,
  357. .end = CH_UART0_TX,
  358. .flags = IORESOURCE_DMA,
  359. },
  360. {
  361. .start = CH_UART0_RX,
  362. .end = CH_UART0_RX,
  363. .flags = IORESOURCE_DMA,
  364. },
  365. };
  366. static unsigned short bfin_uart0_peripherals[] = {
  367. P_UART0_TX, P_UART0_RX, 0
  368. };
  369. static struct platform_device bfin_uart0_device = {
  370. .name = "bfin-uart",
  371. .id = 0,
  372. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  373. .resource = bfin_uart0_resources,
  374. .dev = {
  375. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  376. },
  377. };
  378. #endif
  379. #ifdef CONFIG_SERIAL_BFIN_UART1
  380. static struct resource bfin_uart1_resources[] = {
  381. {
  382. .start = UART1_THR,
  383. .end = UART1_GCTL+2,
  384. .flags = IORESOURCE_MEM,
  385. },
  386. {
  387. .start = IRQ_UART1_RX,
  388. .end = IRQ_UART1_RX+1,
  389. .flags = IORESOURCE_IRQ,
  390. },
  391. {
  392. .start = IRQ_UART1_ERROR,
  393. .end = IRQ_UART1_ERROR,
  394. .flags = IORESOURCE_IRQ,
  395. },
  396. {
  397. .start = CH_UART1_TX,
  398. .end = CH_UART1_TX,
  399. .flags = IORESOURCE_DMA,
  400. },
  401. {
  402. .start = CH_UART1_RX,
  403. .end = CH_UART1_RX,
  404. .flags = IORESOURCE_DMA,
  405. },
  406. #ifdef CONFIG_BFIN_UART1_CTSRTS
  407. { /* CTS pin */
  408. .start = GPIO_PF9,
  409. .end = GPIO_PF9,
  410. .flags = IORESOURCE_IO,
  411. },
  412. { /* RTS pin */
  413. .start = GPIO_PF10,
  414. .end = GPIO_PF10,
  415. .flags = IORESOURCE_IO,
  416. },
  417. #endif
  418. };
  419. static unsigned short bfin_uart1_peripherals[] = {
  420. P_UART1_TX, P_UART1_RX, 0
  421. };
  422. static struct platform_device bfin_uart1_device = {
  423. .name = "bfin-uart",
  424. .id = 1,
  425. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  426. .resource = bfin_uart1_resources,
  427. .dev = {
  428. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  429. },
  430. };
  431. #endif
  432. #endif
  433. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  434. #ifdef CONFIG_BFIN_SIR0
  435. static struct resource bfin_sir0_resources[] = {
  436. {
  437. .start = 0xFFC00400,
  438. .end = 0xFFC004FF,
  439. .flags = IORESOURCE_MEM,
  440. },
  441. {
  442. .start = IRQ_UART0_RX,
  443. .end = IRQ_UART0_RX+1,
  444. .flags = IORESOURCE_IRQ,
  445. },
  446. {
  447. .start = CH_UART0_RX,
  448. .end = CH_UART0_RX+1,
  449. .flags = IORESOURCE_DMA,
  450. },
  451. };
  452. static struct platform_device bfin_sir0_device = {
  453. .name = "bfin_sir",
  454. .id = 0,
  455. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  456. .resource = bfin_sir0_resources,
  457. };
  458. #endif
  459. #ifdef CONFIG_BFIN_SIR1
  460. static struct resource bfin_sir1_resources[] = {
  461. {
  462. .start = 0xFFC02000,
  463. .end = 0xFFC020FF,
  464. .flags = IORESOURCE_MEM,
  465. },
  466. {
  467. .start = IRQ_UART1_RX,
  468. .end = IRQ_UART1_RX+1,
  469. .flags = IORESOURCE_IRQ,
  470. },
  471. {
  472. .start = CH_UART1_RX,
  473. .end = CH_UART1_RX+1,
  474. .flags = IORESOURCE_DMA,
  475. },
  476. };
  477. static struct platform_device bfin_sir1_device = {
  478. .name = "bfin_sir",
  479. .id = 1,
  480. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  481. .resource = bfin_sir1_resources,
  482. };
  483. #endif
  484. #endif
  485. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  486. #include <linux/input/ad7160.h>
  487. static const struct ad7160_platform_data bfin_ad7160_ts_info = {
  488. .sensor_x_res = 854,
  489. .sensor_y_res = 480,
  490. .pressure = 100,
  491. .filter_coef = 3,
  492. .coord_pref = AD7160_ORIG_TOP_LEFT,
  493. .first_touch_window = 5,
  494. .move_window = 3,
  495. .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
  496. AD7160_EMIT_ABS_MT_PRESSURE |
  497. AD7160_TRACKING_ID_ASCENDING,
  498. .finger_act_ctrl = 0x64,
  499. .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
  500. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  501. AD7160_HAPTIC_SLOT_B(60) |
  502. AD7160_HAPTIC_SLOT_B_LVL_LOW,
  503. .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
  504. AD7160_HAPTIC_SLOT_A_LVL_HIGH |
  505. AD7160_HAPTIC_SLOT_B(80) |
  506. AD7160_HAPTIC_SLOT_B_LVL_LOW |
  507. AD7160_HAPTIC_SLOT_C(120) |
  508. AD7160_HAPTIC_SLOT_C_LVL_HIGH |
  509. AD7160_HAPTIC_SLOT_D(30) |
  510. AD7160_HAPTIC_SLOT_D_LVL_LOW,
  511. };
  512. #endif
  513. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  514. static struct resource bfin_twi0_resource[] = {
  515. [0] = {
  516. .start = TWI0_REGBASE,
  517. .end = TWI0_REGBASE,
  518. .flags = IORESOURCE_MEM,
  519. },
  520. [1] = {
  521. .start = IRQ_TWI,
  522. .end = IRQ_TWI,
  523. .flags = IORESOURCE_IRQ,
  524. },
  525. };
  526. static struct platform_device i2c_bfin_twi_device = {
  527. .name = "i2c-bfin-twi",
  528. .id = 0,
  529. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  530. .resource = bfin_twi0_resource,
  531. };
  532. #endif
  533. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  534. #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
  535. {
  536. I2C_BOARD_INFO("ad7160", 0x33),
  537. .irq = IRQ_PH1,
  538. .platform_data = (void *)&bfin_ad7160_ts_info,
  539. },
  540. #endif
  541. };
  542. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  543. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  544. static struct resource bfin_sport0_uart_resources[] = {
  545. {
  546. .start = SPORT0_TCR1,
  547. .end = SPORT0_MRCS3+4,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. {
  551. .start = IRQ_SPORT0_RX,
  552. .end = IRQ_SPORT0_RX+1,
  553. .flags = IORESOURCE_IRQ,
  554. },
  555. {
  556. .start = IRQ_SPORT0_ERROR,
  557. .end = IRQ_SPORT0_ERROR,
  558. .flags = IORESOURCE_IRQ,
  559. },
  560. };
  561. static unsigned short bfin_sport0_peripherals[] = {
  562. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  563. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  564. };
  565. static struct platform_device bfin_sport0_uart_device = {
  566. .name = "bfin-sport-uart",
  567. .id = 0,
  568. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  569. .resource = bfin_sport0_uart_resources,
  570. .dev = {
  571. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  572. },
  573. };
  574. #endif
  575. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  576. static struct resource bfin_sport1_uart_resources[] = {
  577. {
  578. .start = SPORT1_TCR1,
  579. .end = SPORT1_MRCS3+4,
  580. .flags = IORESOURCE_MEM,
  581. },
  582. {
  583. .start = IRQ_SPORT1_RX,
  584. .end = IRQ_SPORT1_RX+1,
  585. .flags = IORESOURCE_IRQ,
  586. },
  587. {
  588. .start = IRQ_SPORT1_ERROR,
  589. .end = IRQ_SPORT1_ERROR,
  590. .flags = IORESOURCE_IRQ,
  591. },
  592. };
  593. static unsigned short bfin_sport1_peripherals[] = {
  594. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  595. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  596. };
  597. static struct platform_device bfin_sport1_uart_device = {
  598. .name = "bfin-sport-uart",
  599. .id = 1,
  600. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  601. .resource = bfin_sport1_uart_resources,
  602. .dev = {
  603. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  604. },
  605. };
  606. #endif
  607. #endif
  608. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  609. #include <asm/bfin_rotary.h>
  610. static struct bfin_rotary_platform_data bfin_rotary_data = {
  611. /*.rotary_up_key = KEY_UP,*/
  612. /*.rotary_down_key = KEY_DOWN,*/
  613. .rotary_rel_code = REL_WHEEL,
  614. .rotary_button_key = KEY_ENTER,
  615. .debounce = 10, /* 0..17 */
  616. .mode = ROT_QUAD_ENC | ROT_DEBE,
  617. };
  618. static struct resource bfin_rotary_resources[] = {
  619. {
  620. .start = IRQ_CNT,
  621. .end = IRQ_CNT,
  622. .flags = IORESOURCE_IRQ,
  623. },
  624. };
  625. static struct platform_device bfin_rotary_device = {
  626. .name = "bfin-rotary",
  627. .id = -1,
  628. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  629. .resource = bfin_rotary_resources,
  630. .dev = {
  631. .platform_data = &bfin_rotary_data,
  632. },
  633. };
  634. #endif
  635. static const unsigned int cclk_vlev_datasheet[] = {
  636. VRPAIR(VLEV_100, 400000000),
  637. VRPAIR(VLEV_105, 426000000),
  638. VRPAIR(VLEV_110, 500000000),
  639. VRPAIR(VLEV_115, 533000000),
  640. VRPAIR(VLEV_120, 600000000),
  641. };
  642. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  643. .tuple_tab = cclk_vlev_datasheet,
  644. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  645. .vr_settling_time = 25 /* us */,
  646. };
  647. static struct platform_device bfin_dpmc = {
  648. .name = "bfin dpmc",
  649. .dev = {
  650. .platform_data = &bfin_dmpc_vreg_data,
  651. },
  652. };
  653. static struct platform_device *stamp_devices[] __initdata = {
  654. &bfin_dpmc,
  655. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  656. &bf5xx_nand_device,
  657. #endif
  658. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  659. &rtc_device,
  660. #endif
  661. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  662. &musb_device,
  663. #endif
  664. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  665. &bfin_mii_bus,
  666. &bfin_mac_device,
  667. #endif
  668. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  669. &bfin_spi0_device,
  670. #endif
  671. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  672. #ifdef CONFIG_SERIAL_BFIN_UART0
  673. &bfin_uart0_device,
  674. #endif
  675. #ifdef CONFIG_SERIAL_BFIN_UART1
  676. &bfin_uart1_device,
  677. #endif
  678. #endif
  679. #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
  680. &bf52x_ra158z_device,
  681. #endif
  682. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  683. #ifdef CONFIG_BFIN_SIR0
  684. &bfin_sir0_device,
  685. #endif
  686. #ifdef CONFIG_BFIN_SIR1
  687. &bfin_sir1_device,
  688. #endif
  689. #endif
  690. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  691. &i2c_bfin_twi_device,
  692. #endif
  693. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  694. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  695. &bfin_sport0_uart_device,
  696. #endif
  697. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  698. &bfin_sport1_uart_device,
  699. #endif
  700. #endif
  701. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  702. &bfin_rotary_device,
  703. #endif
  704. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  705. &ad7160eval_flash_device,
  706. #endif
  707. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  708. &bfin_i2s,
  709. #endif
  710. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  711. &bfin_tdm,
  712. #endif
  713. };
  714. static int __init ad7160eval_init(void)
  715. {
  716. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  717. i2c_register_board_info(0, bfin_i2c_board_info,
  718. ARRAY_SIZE(bfin_i2c_board_info));
  719. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  720. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  721. return 0;
  722. }
  723. arch_initcall(ad7160eval_init);
  724. static struct platform_device *ad7160eval_early_devices[] __initdata = {
  725. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  726. #ifdef CONFIG_SERIAL_BFIN_UART0
  727. &bfin_uart0_device,
  728. #endif
  729. #ifdef CONFIG_SERIAL_BFIN_UART1
  730. &bfin_uart1_device,
  731. #endif
  732. #endif
  733. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  734. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  735. &bfin_sport0_uart_device,
  736. #endif
  737. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  738. &bfin_sport1_uart_device,
  739. #endif
  740. #endif
  741. };
  742. void __init native_machine_early_platform_add_devices(void)
  743. {
  744. printk(KERN_INFO "register early platform devices\n");
  745. early_platform_add_devices(ad7160eval_early_devices,
  746. ARRAY_SIZE(ad7160eval_early_devices));
  747. }
  748. void native_machine_restart(char *cmd)
  749. {
  750. /* workaround reboot hang when booting from SPI */
  751. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  752. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  753. }
  754. void bfin_get_ether_addr(char *addr)
  755. {
  756. /* the MAC is stored in OTP memory page 0xDF */
  757. u32 ret;
  758. u64 otp_mac;
  759. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  760. ret = otp_read(0xDF, 0x00, &otp_mac);
  761. if (!(ret & 0x1)) {
  762. char *otp_mac_p = (char *)&otp_mac;
  763. for (ret = 0; ret < 6; ++ret)
  764. addr[ret] = otp_mac_p[5 - ret];
  765. }
  766. }
  767. EXPORT_SYMBOL(bfin_get_ether_addr);