stmmac.txt 8.9 KB

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  1. STMicroelectronics 10/100/1000 Synopsys Ethernet driver
  2. Copyright (C) 2007-2010 STMicroelectronics Ltd
  3. Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
  4. This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers
  5. (Synopsys IP blocks); it has been fully tested on STLinux platforms.
  6. Currently this network device driver is for all STM embedded MAC/GMAC
  7. (i.e. 7xxx/5xxx SoCs) and it's known working on other platforms i.e. ARM SPEAr.
  8. DWC Ether MAC 10/100/1000 Universal version 3.41a and DWC Ether MAC 10/100
  9. Universal version 4.0 have been used for developing the first code
  10. implementation.
  11. Please, for more information also visit: www.stlinux.com
  12. 1) Kernel Configuration
  13. The kernel configuration option is STMMAC_ETH:
  14. Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) --->
  15. STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH)
  16. 2) Driver parameters list:
  17. debug: message level (0: no output, 16: all);
  18. phyaddr: to manually provide the physical address to the PHY device;
  19. dma_rxsize: DMA rx ring size;
  20. dma_txsize: DMA tx ring size;
  21. buf_sz: DMA buffer size;
  22. tc: control the HW FIFO threshold;
  23. tx_coe: Enable/Disable Tx Checksum Offload engine;
  24. watchdog: transmit timeout (in milliseconds);
  25. flow_ctrl: Flow control ability [on/off];
  26. pause: Flow Control Pause Time;
  27. tmrate: timer period (only if timer optimisation is configured).
  28. 3) Command line options
  29. Driver parameters can be also passed in command line by using:
  30. stmmaceth=dma_rxsize:128,dma_txsize:512
  31. 4) Driver information and notes
  32. 4.1) Transmit process
  33. The xmit method is invoked when the kernel needs to transmit a packet; it sets
  34. the descriptors in the ring and informs the DMA engine that there is a packet
  35. ready to be transmitted.
  36. Once the controller has finished transmitting the packet, an interrupt is
  37. triggered; So the driver will be able to release the socket buffers.
  38. By default, the driver sets the NETIF_F_SG bit in the features field of the
  39. net_device structure enabling the scatter/gather feature.
  40. 4.2) Receive process
  41. When one or more packets are received, an interrupt happens. The interrupts
  42. are not queued so the driver has to scan all the descriptors in the ring during
  43. the receive process.
  44. This is based on NAPI so the interrupt handler signals only if there is work to be
  45. done, and it exits.
  46. Then the poll method will be scheduled at some future point.
  47. The incoming packets are stored, by the DMA, in a list of pre-allocated socket
  48. buffers in order to avoid the memcpy (Zero-copy).
  49. 4.3) Timer-Driver Interrupt
  50. Instead of having the device that asynchronously notifies the frame receptions, the
  51. driver configures a timer to generate an interrupt at regular intervals.
  52. Based on the granularity of the timer, the frames that are received by the device
  53. will experience different levels of latency. Some NICs have dedicated timer
  54. device to perform this task. STMMAC can use either the RTC device or the TMU
  55. channel 2 on STLinux platforms.
  56. The timers frequency can be passed to the driver as parameter; when change it,
  57. take care of both hardware capability and network stability/performance impact.
  58. Several performance tests on STM platforms showed this optimisation allows to spare
  59. the CPU while having the maximum throughput.
  60. 4.4) WOL
  61. Wake up on Lan feature through Magic and Unicast frames are supported for the GMAC
  62. core.
  63. 4.5) DMA descriptors
  64. Driver handles both normal and enhanced descriptors. The latter has been only
  65. tested on DWC Ether MAC 10/100/1000 Universal version 3.41a.
  66. 4.6) Ethtool support
  67. Ethtool is supported. Driver statistics and internal errors can be taken using:
  68. ethtool -S ethX command. It is possible to dump registers etc.
  69. 4.7) Jumbo and Segmentation Offloading
  70. Jumbo frames are supported and tested for the GMAC.
  71. The GSO has been also added but it's performed in software.
  72. LRO is not supported.
  73. 4.8) Physical
  74. The driver is compatible with PAL to work with PHY and GPHY devices.
  75. 4.9) Platform information
  76. Several driver's information can be passed through the platform
  77. These are included in the include/linux/stmmac.h header file
  78. and detailed below as well:
  79. struct plat_stmmacenet_data {
  80. int bus_id;
  81. int phy_addr;
  82. int interface;
  83. struct stmmac_mdio_bus_data *mdio_bus_data;
  84. int pbl;
  85. int clk_csr;
  86. int has_gmac;
  87. int enh_desc;
  88. int tx_coe;
  89. int bugged_jumbo;
  90. int pmt;
  91. int force_sf_dma_mode;
  92. void (*fix_mac_speed)(void *priv, unsigned int speed);
  93. void (*bus_setup)(void __iomem *ioaddr);
  94. int (*init)(struct platform_device *pdev);
  95. void (*exit)(struct platform_device *pdev);
  96. void *bsp_priv;
  97. };
  98. Where:
  99. o bus_id: bus identifier.
  100. o phy_addr: the physical address can be passed from the platform.
  101. If it is set to -1 the driver will automatically
  102. detect it at run-time by probing all the 32 addresses.
  103. o interface: PHY device's interface.
  104. o mdio_bus_data: specific platform fields for the MDIO bus.
  105. o pbl: the Programmable Burst Length is maximum number of beats to
  106. be transferred in one DMA transaction.
  107. GMAC also enables the 4xPBL by default.
  108. o clk_csr: CSR Clock range selection.
  109. o has_gmac: uses the GMAC core.
  110. o enh_desc: if sets the MAC will use the enhanced descriptor structure.
  111. o tx_coe: core is able to perform the tx csum in HW.
  112. o bugged_jumbo: some HWs are not able to perform the csum in HW for
  113. over-sized frames due to limited buffer sizes.
  114. Setting this flag the csum will be done in SW on
  115. JUMBO frames.
  116. o pmt: core has the embedded power module (optional).
  117. o force_sf_dma_mode: force DMA to use the Store and Forward mode
  118. instead of the Threshold.
  119. o fix_mac_speed: this callback is used for modifying some syscfg registers
  120. (on ST SoCs) according to the link speed negotiated by the
  121. physical layer .
  122. o bus_setup: perform HW setup of the bus. For example, on some ST platforms
  123. this field is used to configure the AMBA bridge to generate more
  124. efficient STBus traffic.
  125. o init/exit: callbacks used for calling a custom initialisation;
  126. this is sometime necessary on some platforms (e.g. ST boxes)
  127. where the HW needs to have set some PIO lines or system cfg
  128. registers.
  129. o custom_cfg: this is a custom configuration that can be passed while
  130. initialising the resources.
  131. The we have:
  132. struct stmmac_mdio_bus_data {
  133. int bus_id;
  134. int (*phy_reset)(void *priv);
  135. unsigned int phy_mask;
  136. int *irqs;
  137. int probed_phy_irq;
  138. };
  139. Where:
  140. o bus_id: bus identifier;
  141. o phy_reset: hook to reset the phy device attached to the bus.
  142. o phy_mask: phy mask passed when register the MDIO bus within the driver.
  143. o irqs: list of IRQs, one per PHY.
  144. o probed_phy_irq: if irqs is NULL, use this for probed PHY.
  145. Below an example how the structures above are using on ST platforms.
  146. static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = {
  147. .pbl = 32,
  148. .has_gmac = 0,
  149. .enh_desc = 0,
  150. .fix_mac_speed = stxYYY_ethernet_fix_mac_speed,
  151. |
  152. |-> to write an internal syscfg
  153. | on this platform when the
  154. | link speed changes from 10 to
  155. | 100 and viceversa
  156. .init = &stmmac_claim_resource,
  157. |
  158. |-> On ST SoC this calls own "PAD"
  159. | manager framework to claim
  160. | all the resources necessary
  161. | (GPIO ...). The .custom_cfg field
  162. | is used to pass a custom config.
  163. };
  164. Below the usage of the stmmac_mdio_bus_data: on this SoC, in fact,
  165. there are two MAC cores: one MAC is for MDIO Bus/PHY emulation
  166. with fixed_link support.
  167. static struct stmmac_mdio_bus_data stmmac1_mdio_bus = {
  168. .bus_id = 1,
  169. |
  170. |-> phy device on the bus_id 1
  171. .phy_reset = phy_reset;
  172. |
  173. |-> function to provide the phy_reset on this board
  174. .phy_mask = 0,
  175. };
  176. static struct fixed_phy_status stmmac0_fixed_phy_status = {
  177. .link = 1,
  178. .speed = 100,
  179. .duplex = 1,
  180. };
  181. During the board's device_init we can configure the first
  182. MAC for fixed_link by calling:
  183. fixed_phy_add(PHY_POLL, 1, &stmmac0_fixed_phy_status));)
  184. and the second one, with a real PHY device attached to the bus,
  185. by using the stmmac_mdio_bus_data structure (to provide the id, the
  186. reset procedure etc).
  187. 4.10) List of source files:
  188. o Kconfig
  189. o Makefile
  190. o stmmac_main.c: main network device driver;
  191. o stmmac_mdio.c: mdio functions;
  192. o stmmac_ethtool.c: ethtool support;
  193. o stmmac_timer.[ch]: timer code used for mitigating the driver dma interrupts
  194. Only tested on ST40 platforms based.
  195. o stmmac.h: private driver structure;
  196. o common.h: common definitions and VFTs;
  197. o descs.h: descriptor structure definitions;
  198. o dwmac1000_core.c: GMAC core functions;
  199. o dwmac1000_dma.c: dma functions for the GMAC chip;
  200. o dwmac1000.h: specific header file for the GMAC;
  201. o dwmac100_core: MAC 100 core and dma code;
  202. o dwmac100_dma.c: dma funtions for the MAC chip;
  203. o dwmac1000.h: specific header file for the MAC;
  204. o dwmac_lib.c: generic DMA functions shared among chips
  205. o enh_desc.c: functions for handling enhanced descriptors
  206. o norm_desc.c: functions for handling normal descriptors
  207. 5) TODO:
  208. o XGMAC is not supported.
  209. o Review the timer optimisation code to use an embedded device that will be
  210. available in new chip generations.