es1370.c 83 KB

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  1. /*****************************************************************************/
  2. /*
  3. * es1370.c -- Ensoniq ES1370/Asahi Kasei AK4531 audio driver.
  4. *
  5. * Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. * Special thanks to David C. Niemi
  22. *
  23. *
  24. * Module command line parameters:
  25. * lineout if 1 the LINE jack is used as an output instead of an input.
  26. * LINE then contains the unmixed dsp output. This can be used
  27. * to make the card a four channel one: use dsp to output two
  28. * channels to LINE and dac to output the other two channels to
  29. * SPKR. Set the mixer to only output synth to SPKR.
  30. * micbias sets the +5V bias to the mic if using an electretmic.
  31. *
  32. *
  33. * Note: sync mode is not yet supported (i.e. running dsp and dac from the same
  34. * clock source)
  35. *
  36. * Supported devices:
  37. * /dev/dsp standard /dev/dsp device, (mostly) OSS compatible
  38. * /dev/mixer standard /dev/mixer device, (mostly) OSS compatible
  39. * /dev/dsp1 additional DAC, like /dev/dsp, but output only,
  40. * only 5512, 11025, 22050 and 44100 samples/s,
  41. * outputs to mixer "SYNTH" setting
  42. * /dev/midi simple MIDI UART interface, no ioctl
  43. *
  44. * NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  45. * to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  46. * there are several MIDI to PCM (WAV) packages, one of them is timidity.
  47. *
  48. * Revision history
  49. * 26.03.1998 0.1 Initial release
  50. * 31.03.1998 0.2 Fix bug in GETOSPACE
  51. * 04.04.1998 0.3 Make it work (again) under 2.0.33
  52. * Fix mixer write operation not returning the actual
  53. * settings
  54. * 05.04.1998 0.4 First attempt at using the new PCI stuff
  55. * 29.04.1998 0.5 Fix hang when ^C is pressed on amp
  56. * 07.05.1998 0.6 Don't double lock around stop_*() in *_release()
  57. * 10.05.1998 0.7 First stab at a simple midi interface (no bells&whistles)
  58. * 14.05.1998 0.8 Don't allow excessive interrupt rates
  59. * 08.06.1998 0.9 First release using Alan Cox' soundcore instead of
  60. * miscdevice
  61. * 05.07.1998 0.10 Fixed the driver to correctly maintin OSS style volume
  62. * settings (not sure if this should be standard)
  63. * Fixed many references: f_flags should be f_mode
  64. * -- Gerald Britton <gbritton@mit.edu>
  65. * 03.08.1998 0.11 Now mixer behaviour can basically be selected between
  66. * "OSS documented" and "OSS actual" behaviour
  67. * Fixed mixer table thanks to Hakan.Lennestal@lu.erisoft.se
  68. * On module startup, set DAC2 to 11kSPS instead of 5.5kSPS,
  69. * as it produces an annoying ssssh in the lower sampling rate
  70. * Do not include modversions.h
  71. * 22.08.1998 0.12 Mixer registers actually have 5 instead of 4 bits
  72. * pointed out by Itai Nahshon
  73. * 31.08.1998 0.13 Fix realplayer problems - dac.count issues
  74. * 08.10.1998 0.14 Joystick support fixed
  75. * -- Oliver Neukum <c188@org.chemie.uni-muenchen.de>
  76. * 10.12.1998 0.15 Fix drain_dac trying to wait on not yet initialized DMA
  77. * 16.12.1998 0.16 Don't wake up app until there are fragsize bytes to read/write
  78. * 06.01.1999 0.17 remove the silly SA_INTERRUPT flag.
  79. * hopefully killed the egcs section type conflict
  80. * 12.03.1999 0.18 cinfo.blocks should be reset after GETxPTR ioctl.
  81. * reported by Johan Maes <joma@telindus.be>
  82. * 22.03.1999 0.19 return EAGAIN instead of EBUSY when O_NONBLOCK
  83. * read/write cannot be executed
  84. * 07.04.1999 0.20 implemented the following ioctl's: SOUND_PCM_READ_RATE,
  85. * SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  86. * Alpha fixes reported by Peter Jones <pjones@redhat.com>
  87. * Note: joystick address handling might still be wrong on archs
  88. * other than i386
  89. * 10.05.1999 0.21 Added support for an electret mic for SB PCI64
  90. * to the Linux kernel sound driver. This mod also straighten
  91. * out the question marks around the mic impedance setting
  92. * (micz). From Kim.Berts@fisub.mail.abb.com
  93. * 11.05.1999 0.22 Implemented the IMIX call to mute recording monitor.
  94. * Guenter Geiger <geiger@epy.co.at>
  95. * 15.06.1999 0.23 Fix bad allocation bug.
  96. * Thanks to Deti Fliegl <fliegl@in.tum.de>
  97. * 28.06.1999 0.24 Add pci_set_master
  98. * 02.08.1999 0.25 Added workaround for the "phantom write" bug first
  99. * documented by Dave Sharpless from Anchor Games
  100. * 03.08.1999 0.26 adapt to Linus' new __setup/__initcall
  101. * added kernel command line option "es1370=joystick[,lineout[,micbias]]"
  102. * removed CONFIG_SOUND_ES1370_JOYPORT_BOOT kludge
  103. * 12.08.1999 0.27 module_init/__setup fixes
  104. * 19.08.1999 0.28 SOUND_MIXER_IMIX fixes, reported by Gianluca <gialluca@mail.tiscalinet.it>
  105. * 31.08.1999 0.29 add spin_lock_init
  106. * replaced current->state = x with set_current_state(x)
  107. * 03.09.1999 0.30 change read semantics for MIDI to match
  108. * OSS more closely; remove possible wakeup race
  109. * 28.10.1999 0.31 More waitqueue races fixed
  110. * 08.01.2000 0.32 Prevent some ioctl's from returning bad count values on underrun/overrun;
  111. * Tim Janik's BSE (Bedevilled Sound Engine) found this
  112. * 07.02.2000 0.33 Use pci_alloc_consistent and pci_register_driver
  113. * 21.11.2000 0.34 Initialize dma buffers in poll, otherwise poll may return a bogus mask
  114. * 12.12.2000 0.35 More dma buffer initializations, patch from
  115. * Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  116. * 07.01.2001 0.36 Timeout change in wrcodec as requested by Frank Klemm <pfk@fuchs.offl.uni-jena.de>
  117. * 31.01.2001 0.37 Register/Unregister gameport
  118. * Fix SETTRIGGER non OSS API conformity
  119. * 03.01.2003 0.38 open_mode fixes from Georg Acher <acher@in.tum.de>
  120. *
  121. * some important things missing in Ensoniq documentation:
  122. *
  123. * Experimental PCLKDIV results: play the same waveforms on both DAC1 and DAC2
  124. * and vary PCLKDIV to obtain zero beat.
  125. * 5512sps: 254
  126. * 44100sps: 30
  127. * seems to be fs = 1411200/(PCLKDIV+2)
  128. *
  129. * should find out when curr_sample_ct is cleared and
  130. * where exactly the CCB fetches data
  131. *
  132. * The card uses a 22.5792 MHz crystal.
  133. * The LINEIN jack may be converted to an AOUT jack by
  134. * setting pin 47 (XCTL0) of the ES1370 to high.
  135. * Pin 48 (XCTL1) of the ES1370 sets the +5V bias for an electretmic
  136. *
  137. *
  138. */
  139. /*****************************************************************************/
  140. #include <linux/interrupt.h>
  141. #include <linux/module.h>
  142. #include <linux/string.h>
  143. #include <linux/ioport.h>
  144. #include <linux/sched.h>
  145. #include <linux/delay.h>
  146. #include <linux/sound.h>
  147. #include <linux/slab.h>
  148. #include <linux/soundcard.h>
  149. #include <linux/pci.h>
  150. #include <linux/smp_lock.h>
  151. #include <linux/init.h>
  152. #include <linux/poll.h>
  153. #include <linux/spinlock.h>
  154. #include <linux/gameport.h>
  155. #include <linux/wait.h>
  156. #include <linux/dma-mapping.h>
  157. #include <asm/io.h>
  158. #include <asm/page.h>
  159. #include <asm/uaccess.h>
  160. /* --------------------------------------------------------------------- */
  161. #undef OSS_DOCUMENTED_MIXER_SEMANTICS
  162. #define DBG(x) {}
  163. /*#define DBG(x) {x}*/
  164. /* --------------------------------------------------------------------- */
  165. #ifndef PCI_VENDOR_ID_ENSONIQ
  166. #define PCI_VENDOR_ID_ENSONIQ 0x1274
  167. #endif
  168. #ifndef PCI_DEVICE_ID_ENSONIQ_ES1370
  169. #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
  170. #endif
  171. #define ES1370_MAGIC ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1370)
  172. #define ES1370_EXTENT 0x40
  173. #define JOY_EXTENT 8
  174. #define ES1370_REG_CONTROL 0x00
  175. #define ES1370_REG_STATUS 0x04
  176. #define ES1370_REG_UART_DATA 0x08
  177. #define ES1370_REG_UART_STATUS 0x09
  178. #define ES1370_REG_UART_CONTROL 0x09
  179. #define ES1370_REG_UART_TEST 0x0a
  180. #define ES1370_REG_MEMPAGE 0x0c
  181. #define ES1370_REG_CODEC 0x10
  182. #define ES1370_REG_SERIAL_CONTROL 0x20
  183. #define ES1370_REG_DAC1_SCOUNT 0x24
  184. #define ES1370_REG_DAC2_SCOUNT 0x28
  185. #define ES1370_REG_ADC_SCOUNT 0x2c
  186. #define ES1370_REG_DAC1_FRAMEADR 0xc30
  187. #define ES1370_REG_DAC1_FRAMECNT 0xc34
  188. #define ES1370_REG_DAC2_FRAMEADR 0xc38
  189. #define ES1370_REG_DAC2_FRAMECNT 0xc3c
  190. #define ES1370_REG_ADC_FRAMEADR 0xd30
  191. #define ES1370_REG_ADC_FRAMECNT 0xd34
  192. #define ES1370_REG_PHANTOM_FRAMEADR 0xd38
  193. #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c
  194. #define ES1370_FMT_U8_MONO 0
  195. #define ES1370_FMT_U8_STEREO 1
  196. #define ES1370_FMT_S16_MONO 2
  197. #define ES1370_FMT_S16_STEREO 3
  198. #define ES1370_FMT_STEREO 1
  199. #define ES1370_FMT_S16 2
  200. #define ES1370_FMT_MASK 3
  201. static const unsigned sample_size[] = { 1, 2, 2, 4 };
  202. static const unsigned sample_shift[] = { 0, 1, 1, 2 };
  203. static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
  204. #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
  205. #define DAC2_DIVTOSR(x) (1411200/((x)+2))
  206. #define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */
  207. #define CTRL_XCTL1 0x40000000 /* electret mic bias */
  208. #define CTRL_OPEN 0x20000000 /* no function, can be read and written */
  209. #define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */
  210. #define CTRL_SH_PCLKDIV 16
  211. #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
  212. #define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
  213. #define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
  214. #define CTRL_SH_WTSRSEL 12
  215. #define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */
  216. #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
  217. #define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */
  218. #define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */
  219. #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
  220. #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
  221. #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
  222. #define CTRL_ADC_EN 0x00000010 /* enable ADC */
  223. #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
  224. #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */
  225. #define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */
  226. #define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */
  227. #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
  228. #define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */
  229. #define STAT_CBUSY 0x00000200 /* 1 = codec busy */
  230. #define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */
  231. #define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
  232. #define STAT_SH_VC 5
  233. #define STAT_MCCB 0x00000010 /* CCB int pending */
  234. #define STAT_UART 0x00000008 /* UART int pending */
  235. #define STAT_DAC1 0x00000004 /* DAC1 int pending */
  236. #define STAT_DAC2 0x00000002 /* DAC2 int pending */
  237. #define STAT_ADC 0x00000001 /* ADC int pending */
  238. #define USTAT_RXINT 0x80 /* UART rx int pending */
  239. #define USTAT_TXINT 0x04 /* UART tx int pending */
  240. #define USTAT_TXRDY 0x02 /* UART tx ready */
  241. #define USTAT_RXRDY 0x01 /* UART rx ready */
  242. #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
  243. #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
  244. #define UCTRL_ENA_TXINT 0x20 /* enable TX int */
  245. #define UCTRL_CNTRL 0x03 /* control field */
  246. #define UCTRL_CNTRL_SWR 0x03 /* software reset command */
  247. #define SCTRL_P2ENDINC 0x00380000 /* */
  248. #define SCTRL_SH_P2ENDINC 19
  249. #define SCTRL_P2STINC 0x00070000 /* */
  250. #define SCTRL_SH_P2STINC 16
  251. #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
  252. #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
  253. #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
  254. #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
  255. #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
  256. #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
  257. #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
  258. #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
  259. #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
  260. #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
  261. #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
  262. #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
  263. #define SCTRL_R1FMT 0x00000030 /* format mask */
  264. #define SCTRL_SH_R1FMT 4
  265. #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
  266. #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
  267. #define SCTRL_P2FMT 0x0000000c /* format mask */
  268. #define SCTRL_SH_P2FMT 2
  269. #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
  270. #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
  271. #define SCTRL_P1FMT 0x00000003 /* format mask */
  272. #define SCTRL_SH_P1FMT 0
  273. /* misc stuff */
  274. #define FMODE_DAC 4 /* slight misuse of mode_t */
  275. /* MIDI buffer sizes */
  276. #define MIDIINBUF 256
  277. #define MIDIOUTBUF 256
  278. #define FMODE_MIDI_SHIFT 3
  279. #define FMODE_MIDI_READ (FMODE_READ << FMODE_MIDI_SHIFT)
  280. #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
  281. /* --------------------------------------------------------------------- */
  282. struct es1370_state {
  283. /* magic */
  284. unsigned int magic;
  285. /* list of es1370 devices */
  286. struct list_head devs;
  287. /* the corresponding pci_dev structure */
  288. struct pci_dev *dev;
  289. /* soundcore stuff */
  290. int dev_audio;
  291. int dev_mixer;
  292. int dev_dac;
  293. int dev_midi;
  294. /* hardware resources */
  295. unsigned long io; /* long for SPARC */
  296. unsigned int irq;
  297. /* mixer registers; there is no HW readback */
  298. struct {
  299. unsigned short vol[10];
  300. unsigned int recsrc;
  301. unsigned int modcnt;
  302. unsigned short micpreamp;
  303. unsigned int imix;
  304. } mix;
  305. /* wave stuff */
  306. unsigned ctrl;
  307. unsigned sctrl;
  308. spinlock_t lock;
  309. struct semaphore open_sem;
  310. mode_t open_mode;
  311. wait_queue_head_t open_wait;
  312. struct dmabuf {
  313. void *rawbuf;
  314. dma_addr_t dmaaddr;
  315. unsigned buforder;
  316. unsigned numfrag;
  317. unsigned fragshift;
  318. unsigned hwptr, swptr;
  319. unsigned total_bytes;
  320. int count;
  321. unsigned error; /* over/underrun */
  322. wait_queue_head_t wait;
  323. /* redundant, but makes calculations easier */
  324. unsigned fragsize;
  325. unsigned dmasize;
  326. unsigned fragsamples;
  327. /* OSS stuff */
  328. unsigned mapped:1;
  329. unsigned ready:1;
  330. unsigned endcleared:1;
  331. unsigned enabled:1;
  332. unsigned ossfragshift;
  333. int ossmaxfrags;
  334. unsigned subdivision;
  335. } dma_dac1, dma_dac2, dma_adc;
  336. /* The following buffer is used to point the phantom write channel to. */
  337. unsigned char *bugbuf_cpu;
  338. dma_addr_t bugbuf_dma;
  339. /* midi stuff */
  340. struct {
  341. unsigned ird, iwr, icnt;
  342. unsigned ord, owr, ocnt;
  343. wait_queue_head_t iwait;
  344. wait_queue_head_t owait;
  345. unsigned char ibuf[MIDIINBUF];
  346. unsigned char obuf[MIDIOUTBUF];
  347. } midi;
  348. struct gameport *gameport;
  349. struct semaphore sem;
  350. };
  351. /* --------------------------------------------------------------------- */
  352. static LIST_HEAD(devs);
  353. /* --------------------------------------------------------------------- */
  354. static inline unsigned ld2(unsigned int x)
  355. {
  356. unsigned r = 0;
  357. if (x >= 0x10000) {
  358. x >>= 16;
  359. r += 16;
  360. }
  361. if (x >= 0x100) {
  362. x >>= 8;
  363. r += 8;
  364. }
  365. if (x >= 0x10) {
  366. x >>= 4;
  367. r += 4;
  368. }
  369. if (x >= 4) {
  370. x >>= 2;
  371. r += 2;
  372. }
  373. if (x >= 2)
  374. r++;
  375. return r;
  376. }
  377. /* --------------------------------------------------------------------- */
  378. static void wrcodec(struct es1370_state *s, unsigned char idx, unsigned char data)
  379. {
  380. unsigned long tmo = jiffies + HZ/10, j;
  381. do {
  382. j = jiffies;
  383. if (!(inl(s->io+ES1370_REG_STATUS) & STAT_CSTAT)) {
  384. outw((((unsigned short)idx)<<8)|data, s->io+ES1370_REG_CODEC);
  385. return;
  386. }
  387. schedule();
  388. } while ((signed)(tmo-j) > 0);
  389. printk(KERN_ERR "es1370: write to codec register timeout\n");
  390. }
  391. /* --------------------------------------------------------------------- */
  392. static inline void stop_adc(struct es1370_state *s)
  393. {
  394. unsigned long flags;
  395. spin_lock_irqsave(&s->lock, flags);
  396. s->ctrl &= ~CTRL_ADC_EN;
  397. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  398. spin_unlock_irqrestore(&s->lock, flags);
  399. }
  400. static inline void stop_dac1(struct es1370_state *s)
  401. {
  402. unsigned long flags;
  403. spin_lock_irqsave(&s->lock, flags);
  404. s->ctrl &= ~CTRL_DAC1_EN;
  405. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  406. spin_unlock_irqrestore(&s->lock, flags);
  407. }
  408. static inline void stop_dac2(struct es1370_state *s)
  409. {
  410. unsigned long flags;
  411. spin_lock_irqsave(&s->lock, flags);
  412. s->ctrl &= ~CTRL_DAC2_EN;
  413. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  414. spin_unlock_irqrestore(&s->lock, flags);
  415. }
  416. static void start_dac1(struct es1370_state *s)
  417. {
  418. unsigned long flags;
  419. unsigned fragremain, fshift;
  420. spin_lock_irqsave(&s->lock, flags);
  421. if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
  422. && s->dma_dac1.ready) {
  423. s->ctrl |= CTRL_DAC1_EN;
  424. s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
  425. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  426. fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
  427. fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
  428. if (fragremain < 2*fshift)
  429. fragremain = s->dma_dac1.fragsize;
  430. outl((fragremain >> fshift) - 1, s->io+ES1370_REG_DAC1_SCOUNT);
  431. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  432. outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1370_REG_DAC1_SCOUNT);
  433. }
  434. spin_unlock_irqrestore(&s->lock, flags);
  435. }
  436. static void start_dac2(struct es1370_state *s)
  437. {
  438. unsigned long flags;
  439. unsigned fragremain, fshift;
  440. spin_lock_irqsave(&s->lock, flags);
  441. if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
  442. && s->dma_dac2.ready) {
  443. s->ctrl |= CTRL_DAC2_EN;
  444. s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
  445. SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
  446. (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
  447. (0 << SCTRL_SH_P2STINC);
  448. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  449. fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
  450. fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
  451. if (fragremain < 2*fshift)
  452. fragremain = s->dma_dac2.fragsize;
  453. outl((fragremain >> fshift) - 1, s->io+ES1370_REG_DAC2_SCOUNT);
  454. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  455. outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1370_REG_DAC2_SCOUNT);
  456. }
  457. spin_unlock_irqrestore(&s->lock, flags);
  458. }
  459. static void start_adc(struct es1370_state *s)
  460. {
  461. unsigned long flags;
  462. unsigned fragremain, fshift;
  463. spin_lock_irqsave(&s->lock, flags);
  464. if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
  465. && s->dma_adc.ready) {
  466. s->ctrl |= CTRL_ADC_EN;
  467. s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
  468. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  469. fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
  470. fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
  471. if (fragremain < 2*fshift)
  472. fragremain = s->dma_adc.fragsize;
  473. outl((fragremain >> fshift) - 1, s->io+ES1370_REG_ADC_SCOUNT);
  474. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  475. outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1370_REG_ADC_SCOUNT);
  476. }
  477. spin_unlock_irqrestore(&s->lock, flags);
  478. }
  479. /* --------------------------------------------------------------------- */
  480. #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
  481. #define DMABUF_MINORDER 1
  482. static inline void dealloc_dmabuf(struct es1370_state *s, struct dmabuf *db)
  483. {
  484. struct page *page, *pend;
  485. if (db->rawbuf) {
  486. /* undo marking the pages as reserved */
  487. pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
  488. for (page = virt_to_page(db->rawbuf); page <= pend; page++)
  489. ClearPageReserved(page);
  490. pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
  491. }
  492. db->rawbuf = NULL;
  493. db->mapped = db->ready = 0;
  494. }
  495. static int prog_dmabuf(struct es1370_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
  496. {
  497. int order;
  498. unsigned bytepersec;
  499. unsigned bufs;
  500. struct page *page, *pend;
  501. db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
  502. if (!db->rawbuf) {
  503. db->ready = db->mapped = 0;
  504. for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
  505. if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
  506. break;
  507. if (!db->rawbuf)
  508. return -ENOMEM;
  509. db->buforder = order;
  510. /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
  511. pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
  512. for (page = virt_to_page(db->rawbuf); page <= pend; page++)
  513. SetPageReserved(page);
  514. }
  515. fmt &= ES1370_FMT_MASK;
  516. bytepersec = rate << sample_shift[fmt];
  517. bufs = PAGE_SIZE << db->buforder;
  518. if (db->ossfragshift) {
  519. if ((1000 << db->ossfragshift) < bytepersec)
  520. db->fragshift = ld2(bytepersec/1000);
  521. else
  522. db->fragshift = db->ossfragshift;
  523. } else {
  524. db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
  525. if (db->fragshift < 3)
  526. db->fragshift = 3;
  527. }
  528. db->numfrag = bufs >> db->fragshift;
  529. while (db->numfrag < 4 && db->fragshift > 3) {
  530. db->fragshift--;
  531. db->numfrag = bufs >> db->fragshift;
  532. }
  533. db->fragsize = 1 << db->fragshift;
  534. if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
  535. db->numfrag = db->ossmaxfrags;
  536. db->fragsamples = db->fragsize >> sample_shift[fmt];
  537. db->dmasize = db->numfrag << db->fragshift;
  538. memset(db->rawbuf, (fmt & ES1370_FMT_S16) ? 0 : 0x80, db->dmasize);
  539. outl((reg >> 8) & 15, s->io+ES1370_REG_MEMPAGE);
  540. outl(db->dmaaddr, s->io+(reg & 0xff));
  541. outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
  542. db->enabled = 1;
  543. db->ready = 1;
  544. return 0;
  545. }
  546. static inline int prog_dmabuf_adc(struct es1370_state *s)
  547. {
  548. stop_adc(s);
  549. return prog_dmabuf(s, &s->dma_adc, DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
  550. (s->sctrl >> SCTRL_SH_R1FMT) & ES1370_FMT_MASK, ES1370_REG_ADC_FRAMEADR);
  551. }
  552. static inline int prog_dmabuf_dac2(struct es1370_state *s)
  553. {
  554. stop_dac2(s);
  555. return prog_dmabuf(s, &s->dma_dac2, DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
  556. (s->sctrl >> SCTRL_SH_P2FMT) & ES1370_FMT_MASK, ES1370_REG_DAC2_FRAMEADR);
  557. }
  558. static inline int prog_dmabuf_dac1(struct es1370_state *s)
  559. {
  560. stop_dac1(s);
  561. return prog_dmabuf(s, &s->dma_dac1, dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
  562. (s->sctrl >> SCTRL_SH_P1FMT) & ES1370_FMT_MASK, ES1370_REG_DAC1_FRAMEADR);
  563. }
  564. static inline unsigned get_hwptr(struct es1370_state *s, struct dmabuf *db, unsigned reg)
  565. {
  566. unsigned hwptr, diff;
  567. outl((reg >> 8) & 15, s->io+ES1370_REG_MEMPAGE);
  568. hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
  569. diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
  570. db->hwptr = hwptr;
  571. return diff;
  572. }
  573. static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
  574. {
  575. if (bptr + len > bsize) {
  576. unsigned x = bsize - bptr;
  577. memset(((char *)buf) + bptr, c, x);
  578. bptr = 0;
  579. len -= x;
  580. }
  581. memset(((char *)buf) + bptr, c, len);
  582. }
  583. /* call with spinlock held! */
  584. static void es1370_update_ptr(struct es1370_state *s)
  585. {
  586. int diff;
  587. /* update ADC pointer */
  588. if (s->ctrl & CTRL_ADC_EN) {
  589. diff = get_hwptr(s, &s->dma_adc, ES1370_REG_ADC_FRAMECNT);
  590. s->dma_adc.total_bytes += diff;
  591. s->dma_adc.count += diff;
  592. if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
  593. wake_up(&s->dma_adc.wait);
  594. if (!s->dma_adc.mapped) {
  595. if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
  596. s->ctrl &= ~CTRL_ADC_EN;
  597. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  598. s->dma_adc.error++;
  599. }
  600. }
  601. }
  602. /* update DAC1 pointer */
  603. if (s->ctrl & CTRL_DAC1_EN) {
  604. diff = get_hwptr(s, &s->dma_dac1, ES1370_REG_DAC1_FRAMECNT);
  605. s->dma_dac1.total_bytes += diff;
  606. if (s->dma_dac1.mapped) {
  607. s->dma_dac1.count += diff;
  608. if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
  609. wake_up(&s->dma_dac1.wait);
  610. } else {
  611. s->dma_dac1.count -= diff;
  612. if (s->dma_dac1.count <= 0) {
  613. s->ctrl &= ~CTRL_DAC1_EN;
  614. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  615. s->dma_dac1.error++;
  616. } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
  617. clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
  618. s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
  619. s->dma_dac1.endcleared = 1;
  620. }
  621. if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
  622. wake_up(&s->dma_dac1.wait);
  623. }
  624. }
  625. /* update DAC2 pointer */
  626. if (s->ctrl & CTRL_DAC2_EN) {
  627. diff = get_hwptr(s, &s->dma_dac2, ES1370_REG_DAC2_FRAMECNT);
  628. s->dma_dac2.total_bytes += diff;
  629. if (s->dma_dac2.mapped) {
  630. s->dma_dac2.count += diff;
  631. if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
  632. wake_up(&s->dma_dac2.wait);
  633. } else {
  634. s->dma_dac2.count -= diff;
  635. if (s->dma_dac2.count <= 0) {
  636. s->ctrl &= ~CTRL_DAC2_EN;
  637. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  638. s->dma_dac2.error++;
  639. } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
  640. clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
  641. s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
  642. s->dma_dac2.endcleared = 1;
  643. }
  644. if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
  645. wake_up(&s->dma_dac2.wait);
  646. }
  647. }
  648. }
  649. /* hold spinlock for the following! */
  650. static void es1370_handle_midi(struct es1370_state *s)
  651. {
  652. unsigned char ch;
  653. int wake;
  654. if (!(s->ctrl & CTRL_UART_EN))
  655. return;
  656. wake = 0;
  657. while (inb(s->io+ES1370_REG_UART_STATUS) & USTAT_RXRDY) {
  658. ch = inb(s->io+ES1370_REG_UART_DATA);
  659. if (s->midi.icnt < MIDIINBUF) {
  660. s->midi.ibuf[s->midi.iwr] = ch;
  661. s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
  662. s->midi.icnt++;
  663. }
  664. wake = 1;
  665. }
  666. if (wake)
  667. wake_up(&s->midi.iwait);
  668. wake = 0;
  669. while ((inb(s->io+ES1370_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
  670. outb(s->midi.obuf[s->midi.ord], s->io+ES1370_REG_UART_DATA);
  671. s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
  672. s->midi.ocnt--;
  673. if (s->midi.ocnt < MIDIOUTBUF-16)
  674. wake = 1;
  675. }
  676. if (wake)
  677. wake_up(&s->midi.owait);
  678. outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1370_REG_UART_CONTROL);
  679. }
  680. static irqreturn_t es1370_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  681. {
  682. struct es1370_state *s = (struct es1370_state *)dev_id;
  683. unsigned int intsrc, sctl;
  684. /* fastpath out, to ease interrupt sharing */
  685. intsrc = inl(s->io+ES1370_REG_STATUS);
  686. if (!(intsrc & 0x80000000))
  687. return IRQ_NONE;
  688. spin_lock(&s->lock);
  689. /* clear audio interrupts first */
  690. sctl = s->sctrl;
  691. if (intsrc & STAT_ADC)
  692. sctl &= ~SCTRL_R1INTEN;
  693. if (intsrc & STAT_DAC1)
  694. sctl &= ~SCTRL_P1INTEN;
  695. if (intsrc & STAT_DAC2)
  696. sctl &= ~SCTRL_P2INTEN;
  697. outl(sctl, s->io+ES1370_REG_SERIAL_CONTROL);
  698. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  699. es1370_update_ptr(s);
  700. es1370_handle_midi(s);
  701. spin_unlock(&s->lock);
  702. return IRQ_HANDLED;
  703. }
  704. /* --------------------------------------------------------------------- */
  705. static const char invalid_magic[] = KERN_CRIT "es1370: invalid magic value\n";
  706. #define VALIDATE_STATE(s) \
  707. ({ \
  708. if (!(s) || (s)->magic != ES1370_MAGIC) { \
  709. printk(invalid_magic); \
  710. return -ENXIO; \
  711. } \
  712. })
  713. /* --------------------------------------------------------------------- */
  714. static const struct {
  715. unsigned volidx:4;
  716. unsigned left:4;
  717. unsigned right:4;
  718. unsigned stereo:1;
  719. unsigned recmask:13;
  720. unsigned avail:1;
  721. } mixtable[SOUND_MIXER_NRDEVICES] = {
  722. [SOUND_MIXER_VOLUME] = { 0, 0x0, 0x1, 1, 0x0000, 1 }, /* master */
  723. [SOUND_MIXER_PCM] = { 1, 0x2, 0x3, 1, 0x0400, 1 }, /* voice */
  724. [SOUND_MIXER_SYNTH] = { 2, 0x4, 0x5, 1, 0x0060, 1 }, /* FM */
  725. [SOUND_MIXER_CD] = { 3, 0x6, 0x7, 1, 0x0006, 1 }, /* CD */
  726. [SOUND_MIXER_LINE] = { 4, 0x8, 0x9, 1, 0x0018, 1 }, /* Line */
  727. [SOUND_MIXER_LINE1] = { 5, 0xa, 0xb, 1, 0x1800, 1 }, /* AUX */
  728. [SOUND_MIXER_LINE2] = { 6, 0xc, 0x0, 0, 0x0100, 1 }, /* Mono1 */
  729. [SOUND_MIXER_LINE3] = { 7, 0xd, 0x0, 0, 0x0200, 1 }, /* Mono2 */
  730. [SOUND_MIXER_MIC] = { 8, 0xe, 0x0, 0, 0x0001, 1 }, /* Mic */
  731. [SOUND_MIXER_OGAIN] = { 9, 0xf, 0x0, 0, 0x0000, 1 } /* mono out */
  732. };
  733. static void set_recsrc(struct es1370_state *s, unsigned int val)
  734. {
  735. unsigned int i, j;
  736. for (j = i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
  737. if (!(val & (1 << i)))
  738. continue;
  739. if (!mixtable[i].recmask) {
  740. val &= ~(1 << i);
  741. continue;
  742. }
  743. j |= mixtable[i].recmask;
  744. }
  745. s->mix.recsrc = val;
  746. wrcodec(s, 0x12, j & 0xd5);
  747. wrcodec(s, 0x13, j & 0xaa);
  748. wrcodec(s, 0x14, (j >> 8) & 0x17);
  749. wrcodec(s, 0x15, (j >> 8) & 0x0f);
  750. i = (j & 0x37f) | ((j << 1) & 0x3000) | 0xc60;
  751. if (!s->mix.imix) {
  752. i &= 0xff60; /* mute record and line monitor */
  753. }
  754. wrcodec(s, 0x10, i);
  755. wrcodec(s, 0x11, i >> 8);
  756. }
  757. static int mixer_ioctl(struct es1370_state *s, unsigned int cmd, unsigned long arg)
  758. {
  759. unsigned long flags;
  760. int i, val;
  761. unsigned char l, r, rl, rr;
  762. int __user *p = (int __user *)arg;
  763. VALIDATE_STATE(s);
  764. if (cmd == SOUND_MIXER_PRIVATE1) {
  765. /* enable/disable/query mixer preamp */
  766. if (get_user(val, p))
  767. return -EFAULT;
  768. if (val != -1) {
  769. s->mix.micpreamp = !!val;
  770. wrcodec(s, 0x19, s->mix.micpreamp);
  771. }
  772. return put_user(s->mix.micpreamp, p);
  773. }
  774. if (cmd == SOUND_MIXER_PRIVATE2) {
  775. /* enable/disable/query use of linein as second lineout */
  776. if (get_user(val, p))
  777. return -EFAULT;
  778. if (val != -1) {
  779. spin_lock_irqsave(&s->lock, flags);
  780. if (val)
  781. s->ctrl |= CTRL_XCTL0;
  782. else
  783. s->ctrl &= ~CTRL_XCTL0;
  784. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  785. spin_unlock_irqrestore(&s->lock, flags);
  786. }
  787. return put_user((s->ctrl & CTRL_XCTL0) ? 1 : 0, p);
  788. }
  789. if (cmd == SOUND_MIXER_PRIVATE3) {
  790. /* enable/disable/query microphone impedance setting */
  791. if (get_user(val, p))
  792. return -EFAULT;
  793. if (val != -1) {
  794. spin_lock_irqsave(&s->lock, flags);
  795. if (val)
  796. s->ctrl |= CTRL_XCTL1;
  797. else
  798. s->ctrl &= ~CTRL_XCTL1;
  799. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  800. spin_unlock_irqrestore(&s->lock, flags);
  801. }
  802. return put_user((s->ctrl & CTRL_XCTL1) ? 1 : 0, p);
  803. }
  804. if (cmd == SOUND_MIXER_INFO) {
  805. mixer_info info;
  806. strncpy(info.id, "ES1370", sizeof(info.id));
  807. strncpy(info.name, "Ensoniq ES1370", sizeof(info.name));
  808. info.modify_counter = s->mix.modcnt;
  809. if (copy_to_user((void __user *)arg, &info, sizeof(info)))
  810. return -EFAULT;
  811. return 0;
  812. }
  813. if (cmd == SOUND_OLD_MIXER_INFO) {
  814. _old_mixer_info info;
  815. strncpy(info.id, "ES1370", sizeof(info.id));
  816. strncpy(info.name, "Ensoniq ES1370", sizeof(info.name));
  817. if (copy_to_user((void __user *)arg, &info, sizeof(info)))
  818. return -EFAULT;
  819. return 0;
  820. }
  821. if (cmd == OSS_GETVERSION)
  822. return put_user(SOUND_VERSION, p);
  823. if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
  824. return -EINVAL;
  825. if (_SIOC_DIR(cmd) == _SIOC_READ) {
  826. switch (_IOC_NR(cmd)) {
  827. case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
  828. return put_user(s->mix.recsrc, p);
  829. case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
  830. val = SOUND_MASK_IMIX;
  831. for (i = 0; i < SOUND_MIXER_NRDEVICES; i++)
  832. if (mixtable[i].avail)
  833. val |= 1 << i;
  834. return put_user(val, p);
  835. case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
  836. for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
  837. if (mixtable[i].recmask)
  838. val |= 1 << i;
  839. return put_user(val, p);
  840. case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
  841. for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
  842. if (mixtable[i].stereo)
  843. val |= 1 << i;
  844. return put_user(val, p);
  845. case SOUND_MIXER_CAPS:
  846. return put_user(0, p);
  847. case SOUND_MIXER_IMIX:
  848. return put_user(s->mix.imix, p);
  849. default:
  850. i = _IOC_NR(cmd);
  851. if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
  852. return -EINVAL;
  853. return put_user(s->mix.vol[mixtable[i].volidx], p);
  854. }
  855. }
  856. if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
  857. return -EINVAL;
  858. s->mix.modcnt++;
  859. switch (_IOC_NR(cmd)) {
  860. case SOUND_MIXER_IMIX:
  861. if (get_user(s->mix.imix, p))
  862. return -EFAULT;
  863. set_recsrc(s, s->mix.recsrc);
  864. return 0;
  865. case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
  866. if (get_user(val, p))
  867. return -EFAULT;
  868. set_recsrc(s, val);
  869. return 0;
  870. default:
  871. i = _IOC_NR(cmd);
  872. if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].avail)
  873. return -EINVAL;
  874. if (get_user(val, p))
  875. return -EFAULT;
  876. l = val & 0xff;
  877. if (l > 100)
  878. l = 100;
  879. if (mixtable[i].stereo) {
  880. r = (val >> 8) & 0xff;
  881. if (r > 100)
  882. r = 100;
  883. if (l < 7) {
  884. rl = 0x80;
  885. l = 0;
  886. } else {
  887. rl = 31 - ((l - 7) / 3);
  888. l = (31 - rl) * 3 + 7;
  889. }
  890. if (r < 7) {
  891. rr = 0x80;
  892. r = 0;
  893. } else {
  894. rr = 31 - ((r - 7) / 3);
  895. r = (31 - rr) * 3 + 7;
  896. }
  897. wrcodec(s, mixtable[i].right, rr);
  898. } else {
  899. if (mixtable[i].left == 15) {
  900. if (l < 2) {
  901. rr = rl = 0x80;
  902. r = l = 0;
  903. } else {
  904. rl = 7 - ((l - 2) / 14);
  905. r = l = (7 - rl) * 14 + 2;
  906. }
  907. } else {
  908. if (l < 7) {
  909. rl = 0x80;
  910. r = l = 0;
  911. } else {
  912. rl = 31 - ((l - 7) / 3);
  913. r = l = (31 - rl) * 3 + 7;
  914. }
  915. }
  916. }
  917. wrcodec(s, mixtable[i].left, rl);
  918. #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
  919. s->mix.vol[mixtable[i].volidx] = ((unsigned int)r << 8) | l;
  920. #else
  921. s->mix.vol[mixtable[i].volidx] = val;
  922. #endif
  923. return put_user(s->mix.vol[mixtable[i].volidx], p);
  924. }
  925. }
  926. /* --------------------------------------------------------------------- */
  927. static int es1370_open_mixdev(struct inode *inode, struct file *file)
  928. {
  929. unsigned int minor = iminor(inode);
  930. struct list_head *list;
  931. struct es1370_state *s;
  932. for (list = devs.next; ; list = list->next) {
  933. if (list == &devs)
  934. return -ENODEV;
  935. s = list_entry(list, struct es1370_state, devs);
  936. if (s->dev_mixer == minor)
  937. break;
  938. }
  939. VALIDATE_STATE(s);
  940. file->private_data = s;
  941. return nonseekable_open(inode, file);
  942. }
  943. static int es1370_release_mixdev(struct inode *inode, struct file *file)
  944. {
  945. struct es1370_state *s = (struct es1370_state *)file->private_data;
  946. VALIDATE_STATE(s);
  947. return 0;
  948. }
  949. static int es1370_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
  950. {
  951. return mixer_ioctl((struct es1370_state *)file->private_data, cmd, arg);
  952. }
  953. static /*const*/ struct file_operations es1370_mixer_fops = {
  954. .owner = THIS_MODULE,
  955. .llseek = no_llseek,
  956. .ioctl = es1370_ioctl_mixdev,
  957. .open = es1370_open_mixdev,
  958. .release = es1370_release_mixdev,
  959. };
  960. /* --------------------------------------------------------------------- */
  961. static int drain_dac1(struct es1370_state *s, int nonblock)
  962. {
  963. DECLARE_WAITQUEUE(wait, current);
  964. unsigned long flags;
  965. int count, tmo;
  966. if (s->dma_dac1.mapped || !s->dma_dac1.ready)
  967. return 0;
  968. add_wait_queue(&s->dma_dac1.wait, &wait);
  969. for (;;) {
  970. __set_current_state(TASK_INTERRUPTIBLE);
  971. spin_lock_irqsave(&s->lock, flags);
  972. count = s->dma_dac1.count;
  973. spin_unlock_irqrestore(&s->lock, flags);
  974. if (count <= 0)
  975. break;
  976. if (signal_pending(current))
  977. break;
  978. if (nonblock) {
  979. remove_wait_queue(&s->dma_dac1.wait, &wait);
  980. set_current_state(TASK_RUNNING);
  981. return -EBUSY;
  982. }
  983. tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2
  984. / dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
  985. tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
  986. if (!schedule_timeout(tmo + 1))
  987. DBG(printk(KERN_DEBUG "es1370: dma timed out??\n");)
  988. }
  989. remove_wait_queue(&s->dma_dac1.wait, &wait);
  990. set_current_state(TASK_RUNNING);
  991. if (signal_pending(current))
  992. return -ERESTARTSYS;
  993. return 0;
  994. }
  995. static int drain_dac2(struct es1370_state *s, int nonblock)
  996. {
  997. DECLARE_WAITQUEUE(wait, current);
  998. unsigned long flags;
  999. int count, tmo;
  1000. if (s->dma_dac2.mapped || !s->dma_dac2.ready)
  1001. return 0;
  1002. add_wait_queue(&s->dma_dac2.wait, &wait);
  1003. for (;;) {
  1004. __set_current_state(TASK_INTERRUPTIBLE);
  1005. spin_lock_irqsave(&s->lock, flags);
  1006. count = s->dma_dac2.count;
  1007. spin_unlock_irqrestore(&s->lock, flags);
  1008. if (count <= 0)
  1009. break;
  1010. if (signal_pending(current))
  1011. break;
  1012. if (nonblock) {
  1013. remove_wait_queue(&s->dma_dac2.wait, &wait);
  1014. set_current_state(TASK_RUNNING);
  1015. return -EBUSY;
  1016. }
  1017. tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2
  1018. / DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV);
  1019. tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
  1020. if (!schedule_timeout(tmo + 1))
  1021. DBG(printk(KERN_DEBUG "es1370: dma timed out??\n");)
  1022. }
  1023. remove_wait_queue(&s->dma_dac2.wait, &wait);
  1024. set_current_state(TASK_RUNNING);
  1025. if (signal_pending(current))
  1026. return -ERESTARTSYS;
  1027. return 0;
  1028. }
  1029. /* --------------------------------------------------------------------- */
  1030. static ssize_t es1370_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
  1031. {
  1032. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1033. DECLARE_WAITQUEUE(wait, current);
  1034. ssize_t ret = 0;
  1035. unsigned long flags;
  1036. unsigned swptr;
  1037. int cnt;
  1038. VALIDATE_STATE(s);
  1039. if (s->dma_adc.mapped)
  1040. return -ENXIO;
  1041. if (!access_ok(VERIFY_WRITE, buffer, count))
  1042. return -EFAULT;
  1043. down(&s->sem);
  1044. if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
  1045. goto out;
  1046. add_wait_queue(&s->dma_adc.wait, &wait);
  1047. while (count > 0) {
  1048. spin_lock_irqsave(&s->lock, flags);
  1049. swptr = s->dma_adc.swptr;
  1050. cnt = s->dma_adc.dmasize-swptr;
  1051. if (s->dma_adc.count < cnt)
  1052. cnt = s->dma_adc.count;
  1053. if (cnt <= 0)
  1054. __set_current_state(TASK_INTERRUPTIBLE);
  1055. spin_unlock_irqrestore(&s->lock, flags);
  1056. if (cnt > count)
  1057. cnt = count;
  1058. if (cnt <= 0) {
  1059. if (s->dma_adc.enabled)
  1060. start_adc(s);
  1061. if (file->f_flags & O_NONBLOCK) {
  1062. if (!ret)
  1063. ret = -EAGAIN;
  1064. goto out;
  1065. }
  1066. up(&s->sem);
  1067. schedule();
  1068. if (signal_pending(current)) {
  1069. if (!ret)
  1070. ret = -ERESTARTSYS;
  1071. goto out;
  1072. }
  1073. down(&s->sem);
  1074. if (s->dma_adc.mapped)
  1075. {
  1076. ret = -ENXIO;
  1077. goto out;
  1078. }
  1079. continue;
  1080. }
  1081. if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
  1082. if (!ret)
  1083. ret = -EFAULT;
  1084. goto out;
  1085. }
  1086. swptr = (swptr + cnt) % s->dma_adc.dmasize;
  1087. spin_lock_irqsave(&s->lock, flags);
  1088. s->dma_adc.swptr = swptr;
  1089. s->dma_adc.count -= cnt;
  1090. spin_unlock_irqrestore(&s->lock, flags);
  1091. count -= cnt;
  1092. buffer += cnt;
  1093. ret += cnt;
  1094. if (s->dma_adc.enabled)
  1095. start_adc(s);
  1096. }
  1097. out:
  1098. up(&s->sem);
  1099. remove_wait_queue(&s->dma_adc.wait, &wait);
  1100. set_current_state(TASK_RUNNING);
  1101. return ret;
  1102. }
  1103. static ssize_t es1370_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
  1104. {
  1105. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1106. DECLARE_WAITQUEUE(wait, current);
  1107. ssize_t ret = 0;
  1108. unsigned long flags;
  1109. unsigned swptr;
  1110. int cnt;
  1111. VALIDATE_STATE(s);
  1112. if (s->dma_dac2.mapped)
  1113. return -ENXIO;
  1114. if (!access_ok(VERIFY_READ, buffer, count))
  1115. return -EFAULT;
  1116. down(&s->sem);
  1117. if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
  1118. goto out;
  1119. ret = 0;
  1120. add_wait_queue(&s->dma_dac2.wait, &wait);
  1121. while (count > 0) {
  1122. spin_lock_irqsave(&s->lock, flags);
  1123. if (s->dma_dac2.count < 0) {
  1124. s->dma_dac2.count = 0;
  1125. s->dma_dac2.swptr = s->dma_dac2.hwptr;
  1126. }
  1127. swptr = s->dma_dac2.swptr;
  1128. cnt = s->dma_dac2.dmasize-swptr;
  1129. if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
  1130. cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
  1131. if (cnt <= 0)
  1132. __set_current_state(TASK_INTERRUPTIBLE);
  1133. spin_unlock_irqrestore(&s->lock, flags);
  1134. if (cnt > count)
  1135. cnt = count;
  1136. if (cnt <= 0) {
  1137. if (s->dma_dac2.enabled)
  1138. start_dac2(s);
  1139. if (file->f_flags & O_NONBLOCK) {
  1140. if (!ret)
  1141. ret = -EAGAIN;
  1142. goto out;
  1143. }
  1144. up(&s->sem);
  1145. schedule();
  1146. if (signal_pending(current)) {
  1147. if (!ret)
  1148. ret = -ERESTARTSYS;
  1149. goto out;
  1150. }
  1151. down(&s->sem);
  1152. if (s->dma_dac2.mapped)
  1153. {
  1154. ret = -ENXIO;
  1155. goto out;
  1156. }
  1157. continue;
  1158. }
  1159. if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
  1160. if (!ret)
  1161. ret = -EFAULT;
  1162. goto out;
  1163. }
  1164. swptr = (swptr + cnt) % s->dma_dac2.dmasize;
  1165. spin_lock_irqsave(&s->lock, flags);
  1166. s->dma_dac2.swptr = swptr;
  1167. s->dma_dac2.count += cnt;
  1168. s->dma_dac2.endcleared = 0;
  1169. spin_unlock_irqrestore(&s->lock, flags);
  1170. count -= cnt;
  1171. buffer += cnt;
  1172. ret += cnt;
  1173. if (s->dma_dac2.enabled)
  1174. start_dac2(s);
  1175. }
  1176. out:
  1177. up(&s->sem);
  1178. remove_wait_queue(&s->dma_dac2.wait, &wait);
  1179. set_current_state(TASK_RUNNING);
  1180. return ret;
  1181. }
  1182. /* No kernel lock - we have our own spinlock */
  1183. static unsigned int es1370_poll(struct file *file, struct poll_table_struct *wait)
  1184. {
  1185. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1186. unsigned long flags;
  1187. unsigned int mask = 0;
  1188. VALIDATE_STATE(s);
  1189. if (file->f_mode & FMODE_WRITE) {
  1190. if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
  1191. return 0;
  1192. poll_wait(file, &s->dma_dac2.wait, wait);
  1193. }
  1194. if (file->f_mode & FMODE_READ) {
  1195. if (!s->dma_adc.ready && prog_dmabuf_adc(s))
  1196. return 0;
  1197. poll_wait(file, &s->dma_adc.wait, wait);
  1198. }
  1199. spin_lock_irqsave(&s->lock, flags);
  1200. es1370_update_ptr(s);
  1201. if (file->f_mode & FMODE_READ) {
  1202. if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
  1203. mask |= POLLIN | POLLRDNORM;
  1204. }
  1205. if (file->f_mode & FMODE_WRITE) {
  1206. if (s->dma_dac2.mapped) {
  1207. if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
  1208. mask |= POLLOUT | POLLWRNORM;
  1209. } else {
  1210. if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
  1211. mask |= POLLOUT | POLLWRNORM;
  1212. }
  1213. }
  1214. spin_unlock_irqrestore(&s->lock, flags);
  1215. return mask;
  1216. }
  1217. static int es1370_mmap(struct file *file, struct vm_area_struct *vma)
  1218. {
  1219. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1220. struct dmabuf *db;
  1221. int ret = 0;
  1222. unsigned long size;
  1223. VALIDATE_STATE(s);
  1224. lock_kernel();
  1225. down(&s->sem);
  1226. if (vma->vm_flags & VM_WRITE) {
  1227. if ((ret = prog_dmabuf_dac2(s)) != 0) {
  1228. goto out;
  1229. }
  1230. db = &s->dma_dac2;
  1231. } else if (vma->vm_flags & VM_READ) {
  1232. if ((ret = prog_dmabuf_adc(s)) != 0) {
  1233. goto out;
  1234. }
  1235. db = &s->dma_adc;
  1236. } else {
  1237. ret = -EINVAL;
  1238. goto out;
  1239. }
  1240. if (vma->vm_pgoff != 0) {
  1241. ret = -EINVAL;
  1242. goto out;
  1243. }
  1244. size = vma->vm_end - vma->vm_start;
  1245. if (size > (PAGE_SIZE << db->buforder)) {
  1246. ret = -EINVAL;
  1247. goto out;
  1248. }
  1249. if (remap_pfn_range(vma, vma->vm_start,
  1250. virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
  1251. size, vma->vm_page_prot)) {
  1252. ret = -EAGAIN;
  1253. goto out;
  1254. }
  1255. db->mapped = 1;
  1256. out:
  1257. up(&s->sem);
  1258. unlock_kernel();
  1259. return ret;
  1260. }
  1261. static int es1370_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
  1262. {
  1263. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1264. unsigned long flags;
  1265. audio_buf_info abinfo;
  1266. count_info cinfo;
  1267. int count;
  1268. int val, mapped, ret;
  1269. void __user *argp = (void __user *)arg;
  1270. int __user *p = argp;
  1271. VALIDATE_STATE(s);
  1272. mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
  1273. ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
  1274. switch (cmd) {
  1275. case OSS_GETVERSION:
  1276. return put_user(SOUND_VERSION, p);
  1277. case SNDCTL_DSP_SYNC:
  1278. if (file->f_mode & FMODE_WRITE)
  1279. return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
  1280. return 0;
  1281. case SNDCTL_DSP_SETDUPLEX:
  1282. return 0;
  1283. case SNDCTL_DSP_GETCAPS:
  1284. return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
  1285. case SNDCTL_DSP_RESET:
  1286. if (file->f_mode & FMODE_WRITE) {
  1287. stop_dac2(s);
  1288. synchronize_irq(s->irq);
  1289. s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
  1290. }
  1291. if (file->f_mode & FMODE_READ) {
  1292. stop_adc(s);
  1293. synchronize_irq(s->irq);
  1294. s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
  1295. }
  1296. return 0;
  1297. case SNDCTL_DSP_SPEED:
  1298. if (get_user(val, p))
  1299. return -EFAULT;
  1300. if (val >= 0) {
  1301. if (s->open_mode & (~file->f_mode) & (FMODE_READ|FMODE_WRITE))
  1302. return -EINVAL;
  1303. if (val < 4000)
  1304. val = 4000;
  1305. if (val > 50000)
  1306. val = 50000;
  1307. stop_adc(s);
  1308. stop_dac2(s);
  1309. s->dma_adc.ready = s->dma_dac2.ready = 0;
  1310. spin_lock_irqsave(&s->lock, flags);
  1311. s->ctrl = (s->ctrl & ~CTRL_PCLKDIV) | (DAC2_SRTODIV(val) << CTRL_SH_PCLKDIV);
  1312. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  1313. spin_unlock_irqrestore(&s->lock, flags);
  1314. }
  1315. return put_user(DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), p);
  1316. case SNDCTL_DSP_STEREO:
  1317. if (get_user(val, p))
  1318. return -EFAULT;
  1319. if (file->f_mode & FMODE_READ) {
  1320. stop_adc(s);
  1321. s->dma_adc.ready = 0;
  1322. spin_lock_irqsave(&s->lock, flags);
  1323. if (val)
  1324. s->sctrl |= SCTRL_R1SMB;
  1325. else
  1326. s->sctrl &= ~SCTRL_R1SMB;
  1327. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1328. spin_unlock_irqrestore(&s->lock, flags);
  1329. }
  1330. if (file->f_mode & FMODE_WRITE) {
  1331. stop_dac2(s);
  1332. s->dma_dac2.ready = 0;
  1333. spin_lock_irqsave(&s->lock, flags);
  1334. if (val)
  1335. s->sctrl |= SCTRL_P2SMB;
  1336. else
  1337. s->sctrl &= ~SCTRL_P2SMB;
  1338. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1339. spin_unlock_irqrestore(&s->lock, flags);
  1340. }
  1341. return 0;
  1342. case SNDCTL_DSP_CHANNELS:
  1343. if (get_user(val, p))
  1344. return -EFAULT;
  1345. if (val != 0) {
  1346. if (file->f_mode & FMODE_READ) {
  1347. stop_adc(s);
  1348. s->dma_adc.ready = 0;
  1349. spin_lock_irqsave(&s->lock, flags);
  1350. if (val >= 2)
  1351. s->sctrl |= SCTRL_R1SMB;
  1352. else
  1353. s->sctrl &= ~SCTRL_R1SMB;
  1354. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1355. spin_unlock_irqrestore(&s->lock, flags);
  1356. }
  1357. if (file->f_mode & FMODE_WRITE) {
  1358. stop_dac2(s);
  1359. s->dma_dac2.ready = 0;
  1360. spin_lock_irqsave(&s->lock, flags);
  1361. if (val >= 2)
  1362. s->sctrl |= SCTRL_P2SMB;
  1363. else
  1364. s->sctrl &= ~SCTRL_P2SMB;
  1365. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1366. spin_unlock_irqrestore(&s->lock, flags);
  1367. }
  1368. }
  1369. return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
  1370. case SNDCTL_DSP_GETFMTS: /* Returns a mask */
  1371. return put_user(AFMT_S16_LE|AFMT_U8, p);
  1372. case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
  1373. if (get_user(val, p))
  1374. return -EFAULT;
  1375. if (val != AFMT_QUERY) {
  1376. if (file->f_mode & FMODE_READ) {
  1377. stop_adc(s);
  1378. s->dma_adc.ready = 0;
  1379. spin_lock_irqsave(&s->lock, flags);
  1380. if (val == AFMT_S16_LE)
  1381. s->sctrl |= SCTRL_R1SEB;
  1382. else
  1383. s->sctrl &= ~SCTRL_R1SEB;
  1384. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1385. spin_unlock_irqrestore(&s->lock, flags);
  1386. }
  1387. if (file->f_mode & FMODE_WRITE) {
  1388. stop_dac2(s);
  1389. s->dma_dac2.ready = 0;
  1390. spin_lock_irqsave(&s->lock, flags);
  1391. if (val == AFMT_S16_LE)
  1392. s->sctrl |= SCTRL_P2SEB;
  1393. else
  1394. s->sctrl &= ~SCTRL_P2SEB;
  1395. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1396. spin_unlock_irqrestore(&s->lock, flags);
  1397. }
  1398. }
  1399. return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
  1400. AFMT_S16_LE : AFMT_U8, p);
  1401. case SNDCTL_DSP_POST:
  1402. return 0;
  1403. case SNDCTL_DSP_GETTRIGGER:
  1404. val = 0;
  1405. if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
  1406. val |= PCM_ENABLE_INPUT;
  1407. if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
  1408. val |= PCM_ENABLE_OUTPUT;
  1409. return put_user(val, p);
  1410. case SNDCTL_DSP_SETTRIGGER:
  1411. if (get_user(val, p))
  1412. return -EFAULT;
  1413. if (file->f_mode & FMODE_READ) {
  1414. if (val & PCM_ENABLE_INPUT) {
  1415. if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
  1416. return ret;
  1417. s->dma_adc.enabled = 1;
  1418. start_adc(s);
  1419. } else {
  1420. s->dma_adc.enabled = 0;
  1421. stop_adc(s);
  1422. }
  1423. }
  1424. if (file->f_mode & FMODE_WRITE) {
  1425. if (val & PCM_ENABLE_OUTPUT) {
  1426. if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
  1427. return ret;
  1428. s->dma_dac2.enabled = 1;
  1429. start_dac2(s);
  1430. } else {
  1431. s->dma_dac2.enabled = 0;
  1432. stop_dac2(s);
  1433. }
  1434. }
  1435. return 0;
  1436. case SNDCTL_DSP_GETOSPACE:
  1437. if (!(file->f_mode & FMODE_WRITE))
  1438. return -EINVAL;
  1439. if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
  1440. return val;
  1441. spin_lock_irqsave(&s->lock, flags);
  1442. es1370_update_ptr(s);
  1443. abinfo.fragsize = s->dma_dac2.fragsize;
  1444. count = s->dma_dac2.count;
  1445. if (count < 0)
  1446. count = 0;
  1447. abinfo.bytes = s->dma_dac2.dmasize - count;
  1448. abinfo.fragstotal = s->dma_dac2.numfrag;
  1449. abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
  1450. spin_unlock_irqrestore(&s->lock, flags);
  1451. return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
  1452. case SNDCTL_DSP_GETISPACE:
  1453. if (!(file->f_mode & FMODE_READ))
  1454. return -EINVAL;
  1455. if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
  1456. return val;
  1457. spin_lock_irqsave(&s->lock, flags);
  1458. es1370_update_ptr(s);
  1459. abinfo.fragsize = s->dma_adc.fragsize;
  1460. count = s->dma_adc.count;
  1461. if (count < 0)
  1462. count = 0;
  1463. abinfo.bytes = count;
  1464. abinfo.fragstotal = s->dma_adc.numfrag;
  1465. abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
  1466. spin_unlock_irqrestore(&s->lock, flags);
  1467. return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
  1468. case SNDCTL_DSP_NONBLOCK:
  1469. file->f_flags |= O_NONBLOCK;
  1470. return 0;
  1471. case SNDCTL_DSP_GETODELAY:
  1472. if (!(file->f_mode & FMODE_WRITE))
  1473. return -EINVAL;
  1474. if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
  1475. return val;
  1476. spin_lock_irqsave(&s->lock, flags);
  1477. es1370_update_ptr(s);
  1478. count = s->dma_dac2.count;
  1479. spin_unlock_irqrestore(&s->lock, flags);
  1480. if (count < 0)
  1481. count = 0;
  1482. return put_user(count, p);
  1483. case SNDCTL_DSP_GETIPTR:
  1484. if (!(file->f_mode & FMODE_READ))
  1485. return -EINVAL;
  1486. if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
  1487. return val;
  1488. spin_lock_irqsave(&s->lock, flags);
  1489. es1370_update_ptr(s);
  1490. cinfo.bytes = s->dma_adc.total_bytes;
  1491. count = s->dma_adc.count;
  1492. if (count < 0)
  1493. count = 0;
  1494. cinfo.blocks = count >> s->dma_adc.fragshift;
  1495. cinfo.ptr = s->dma_adc.hwptr;
  1496. if (s->dma_adc.mapped)
  1497. s->dma_adc.count &= s->dma_adc.fragsize-1;
  1498. spin_unlock_irqrestore(&s->lock, flags);
  1499. if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
  1500. return -EFAULT;
  1501. return 0;
  1502. case SNDCTL_DSP_GETOPTR:
  1503. if (!(file->f_mode & FMODE_WRITE))
  1504. return -EINVAL;
  1505. if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
  1506. return val;
  1507. spin_lock_irqsave(&s->lock, flags);
  1508. es1370_update_ptr(s);
  1509. cinfo.bytes = s->dma_dac2.total_bytes;
  1510. count = s->dma_dac2.count;
  1511. if (count < 0)
  1512. count = 0;
  1513. cinfo.blocks = count >> s->dma_dac2.fragshift;
  1514. cinfo.ptr = s->dma_dac2.hwptr;
  1515. if (s->dma_dac2.mapped)
  1516. s->dma_dac2.count &= s->dma_dac2.fragsize-1;
  1517. spin_unlock_irqrestore(&s->lock, flags);
  1518. if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
  1519. return -EFAULT;
  1520. return 0;
  1521. case SNDCTL_DSP_GETBLKSIZE:
  1522. if (file->f_mode & FMODE_WRITE) {
  1523. if ((val = prog_dmabuf_dac2(s)))
  1524. return val;
  1525. return put_user(s->dma_dac2.fragsize, p);
  1526. }
  1527. if ((val = prog_dmabuf_adc(s)))
  1528. return val;
  1529. return put_user(s->dma_adc.fragsize, p);
  1530. case SNDCTL_DSP_SETFRAGMENT:
  1531. if (get_user(val, p))
  1532. return -EFAULT;
  1533. if (file->f_mode & FMODE_READ) {
  1534. s->dma_adc.ossfragshift = val & 0xffff;
  1535. s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
  1536. if (s->dma_adc.ossfragshift < 4)
  1537. s->dma_adc.ossfragshift = 4;
  1538. if (s->dma_adc.ossfragshift > 15)
  1539. s->dma_adc.ossfragshift = 15;
  1540. if (s->dma_adc.ossmaxfrags < 4)
  1541. s->dma_adc.ossmaxfrags = 4;
  1542. }
  1543. if (file->f_mode & FMODE_WRITE) {
  1544. s->dma_dac2.ossfragshift = val & 0xffff;
  1545. s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
  1546. if (s->dma_dac2.ossfragshift < 4)
  1547. s->dma_dac2.ossfragshift = 4;
  1548. if (s->dma_dac2.ossfragshift > 15)
  1549. s->dma_dac2.ossfragshift = 15;
  1550. if (s->dma_dac2.ossmaxfrags < 4)
  1551. s->dma_dac2.ossmaxfrags = 4;
  1552. }
  1553. return 0;
  1554. case SNDCTL_DSP_SUBDIVIDE:
  1555. if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
  1556. (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
  1557. return -EINVAL;
  1558. if (get_user(val, p))
  1559. return -EFAULT;
  1560. if (val != 1 && val != 2 && val != 4)
  1561. return -EINVAL;
  1562. if (file->f_mode & FMODE_READ)
  1563. s->dma_adc.subdivision = val;
  1564. if (file->f_mode & FMODE_WRITE)
  1565. s->dma_dac2.subdivision = val;
  1566. return 0;
  1567. case SOUND_PCM_READ_RATE:
  1568. return put_user(DAC2_DIVTOSR((s->ctrl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), p);
  1569. case SOUND_PCM_READ_CHANNELS:
  1570. return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ?
  1571. 2 : 1, p);
  1572. case SOUND_PCM_READ_BITS:
  1573. return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
  1574. 16 : 8, p);
  1575. case SOUND_PCM_WRITE_FILTER:
  1576. case SNDCTL_DSP_SETSYNCRO:
  1577. case SOUND_PCM_READ_FILTER:
  1578. return -EINVAL;
  1579. }
  1580. return mixer_ioctl(s, cmd, arg);
  1581. }
  1582. static int es1370_open(struct inode *inode, struct file *file)
  1583. {
  1584. unsigned int minor = iminor(inode);
  1585. DECLARE_WAITQUEUE(wait, current);
  1586. unsigned long flags;
  1587. struct list_head *list;
  1588. struct es1370_state *s;
  1589. for (list = devs.next; ; list = list->next) {
  1590. if (list == &devs)
  1591. return -ENODEV;
  1592. s = list_entry(list, struct es1370_state, devs);
  1593. if (!((s->dev_audio ^ minor) & ~0xf))
  1594. break;
  1595. }
  1596. VALIDATE_STATE(s);
  1597. file->private_data = s;
  1598. /* wait for device to become free */
  1599. down(&s->open_sem);
  1600. while (s->open_mode & file->f_mode) {
  1601. if (file->f_flags & O_NONBLOCK) {
  1602. up(&s->open_sem);
  1603. return -EBUSY;
  1604. }
  1605. add_wait_queue(&s->open_wait, &wait);
  1606. __set_current_state(TASK_INTERRUPTIBLE);
  1607. up(&s->open_sem);
  1608. schedule();
  1609. remove_wait_queue(&s->open_wait, &wait);
  1610. set_current_state(TASK_RUNNING);
  1611. if (signal_pending(current))
  1612. return -ERESTARTSYS;
  1613. down(&s->open_sem);
  1614. }
  1615. spin_lock_irqsave(&s->lock, flags);
  1616. if (!(s->open_mode & (FMODE_READ|FMODE_WRITE)))
  1617. s->ctrl = (s->ctrl & ~CTRL_PCLKDIV) | (DAC2_SRTODIV(8000) << CTRL_SH_PCLKDIV);
  1618. if (file->f_mode & FMODE_READ) {
  1619. s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
  1620. s->dma_adc.enabled = 1;
  1621. s->sctrl &= ~SCTRL_R1FMT;
  1622. if ((minor & 0xf) == SND_DEV_DSP16)
  1623. s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_R1FMT;
  1624. else
  1625. s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_R1FMT;
  1626. }
  1627. if (file->f_mode & FMODE_WRITE) {
  1628. s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
  1629. s->dma_dac2.enabled = 1;
  1630. s->sctrl &= ~SCTRL_P2FMT;
  1631. if ((minor & 0xf) == SND_DEV_DSP16)
  1632. s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_P2FMT;
  1633. else
  1634. s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_P2FMT;
  1635. }
  1636. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1637. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  1638. spin_unlock_irqrestore(&s->lock, flags);
  1639. s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
  1640. up(&s->open_sem);
  1641. init_MUTEX(&s->sem);
  1642. return nonseekable_open(inode, file);
  1643. }
  1644. static int es1370_release(struct inode *inode, struct file *file)
  1645. {
  1646. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1647. VALIDATE_STATE(s);
  1648. lock_kernel();
  1649. if (file->f_mode & FMODE_WRITE)
  1650. drain_dac2(s, file->f_flags & O_NONBLOCK);
  1651. down(&s->open_sem);
  1652. if (file->f_mode & FMODE_WRITE) {
  1653. stop_dac2(s);
  1654. synchronize_irq(s->irq);
  1655. dealloc_dmabuf(s, &s->dma_dac2);
  1656. }
  1657. if (file->f_mode & FMODE_READ) {
  1658. stop_adc(s);
  1659. dealloc_dmabuf(s, &s->dma_adc);
  1660. }
  1661. s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
  1662. wake_up(&s->open_wait);
  1663. up(&s->open_sem);
  1664. unlock_kernel();
  1665. return 0;
  1666. }
  1667. static /*const*/ struct file_operations es1370_audio_fops = {
  1668. .owner = THIS_MODULE,
  1669. .llseek = no_llseek,
  1670. .read = es1370_read,
  1671. .write = es1370_write,
  1672. .poll = es1370_poll,
  1673. .ioctl = es1370_ioctl,
  1674. .mmap = es1370_mmap,
  1675. .open = es1370_open,
  1676. .release = es1370_release,
  1677. };
  1678. /* --------------------------------------------------------------------- */
  1679. static ssize_t es1370_write_dac(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
  1680. {
  1681. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1682. DECLARE_WAITQUEUE(wait, current);
  1683. ssize_t ret = 0;
  1684. unsigned long flags;
  1685. unsigned swptr;
  1686. int cnt;
  1687. VALIDATE_STATE(s);
  1688. if (s->dma_dac1.mapped)
  1689. return -ENXIO;
  1690. if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
  1691. return ret;
  1692. if (!access_ok(VERIFY_READ, buffer, count))
  1693. return -EFAULT;
  1694. add_wait_queue(&s->dma_dac1.wait, &wait);
  1695. while (count > 0) {
  1696. spin_lock_irqsave(&s->lock, flags);
  1697. if (s->dma_dac1.count < 0) {
  1698. s->dma_dac1.count = 0;
  1699. s->dma_dac1.swptr = s->dma_dac1.hwptr;
  1700. }
  1701. swptr = s->dma_dac1.swptr;
  1702. cnt = s->dma_dac1.dmasize-swptr;
  1703. if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
  1704. cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
  1705. if (cnt <= 0)
  1706. __set_current_state(TASK_INTERRUPTIBLE);
  1707. spin_unlock_irqrestore(&s->lock, flags);
  1708. if (cnt > count)
  1709. cnt = count;
  1710. if (cnt <= 0) {
  1711. if (s->dma_dac1.enabled)
  1712. start_dac1(s);
  1713. if (file->f_flags & O_NONBLOCK) {
  1714. if (!ret)
  1715. ret = -EAGAIN;
  1716. break;
  1717. }
  1718. schedule();
  1719. if (signal_pending(current)) {
  1720. if (!ret)
  1721. ret = -ERESTARTSYS;
  1722. break;
  1723. }
  1724. continue;
  1725. }
  1726. if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
  1727. if (!ret)
  1728. ret = -EFAULT;
  1729. break;
  1730. }
  1731. swptr = (swptr + cnt) % s->dma_dac1.dmasize;
  1732. spin_lock_irqsave(&s->lock, flags);
  1733. s->dma_dac1.swptr = swptr;
  1734. s->dma_dac1.count += cnt;
  1735. s->dma_dac1.endcleared = 0;
  1736. spin_unlock_irqrestore(&s->lock, flags);
  1737. count -= cnt;
  1738. buffer += cnt;
  1739. ret += cnt;
  1740. if (s->dma_dac1.enabled)
  1741. start_dac1(s);
  1742. }
  1743. remove_wait_queue(&s->dma_dac1.wait, &wait);
  1744. set_current_state(TASK_RUNNING);
  1745. return ret;
  1746. }
  1747. /* No kernel lock - we have our own spinlock */
  1748. static unsigned int es1370_poll_dac(struct file *file, struct poll_table_struct *wait)
  1749. {
  1750. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1751. unsigned long flags;
  1752. unsigned int mask = 0;
  1753. VALIDATE_STATE(s);
  1754. if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
  1755. return 0;
  1756. poll_wait(file, &s->dma_dac1.wait, wait);
  1757. spin_lock_irqsave(&s->lock, flags);
  1758. es1370_update_ptr(s);
  1759. if (s->dma_dac1.mapped) {
  1760. if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
  1761. mask |= POLLOUT | POLLWRNORM;
  1762. } else {
  1763. if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
  1764. mask |= POLLOUT | POLLWRNORM;
  1765. }
  1766. spin_unlock_irqrestore(&s->lock, flags);
  1767. return mask;
  1768. }
  1769. static int es1370_mmap_dac(struct file *file, struct vm_area_struct *vma)
  1770. {
  1771. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1772. int ret;
  1773. unsigned long size;
  1774. VALIDATE_STATE(s);
  1775. if (!(vma->vm_flags & VM_WRITE))
  1776. return -EINVAL;
  1777. lock_kernel();
  1778. if ((ret = prog_dmabuf_dac1(s)) != 0)
  1779. goto out;
  1780. ret = -EINVAL;
  1781. if (vma->vm_pgoff != 0)
  1782. goto out;
  1783. size = vma->vm_end - vma->vm_start;
  1784. if (size > (PAGE_SIZE << s->dma_dac1.buforder))
  1785. goto out;
  1786. ret = -EAGAIN;
  1787. if (remap_pfn_range(vma, vma->vm_start,
  1788. virt_to_phys(s->dma_dac1.rawbuf) >> PAGE_SHIFT,
  1789. size, vma->vm_page_prot))
  1790. goto out;
  1791. s->dma_dac1.mapped = 1;
  1792. ret = 0;
  1793. out:
  1794. unlock_kernel();
  1795. return ret;
  1796. }
  1797. static int es1370_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
  1798. {
  1799. struct es1370_state *s = (struct es1370_state *)file->private_data;
  1800. unsigned long flags;
  1801. audio_buf_info abinfo;
  1802. count_info cinfo;
  1803. int count;
  1804. unsigned ctrl;
  1805. int val, ret;
  1806. int __user *p = (int __user *)arg;
  1807. VALIDATE_STATE(s);
  1808. switch (cmd) {
  1809. case OSS_GETVERSION:
  1810. return put_user(SOUND_VERSION, p);
  1811. case SNDCTL_DSP_SYNC:
  1812. return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
  1813. case SNDCTL_DSP_SETDUPLEX:
  1814. return -EINVAL;
  1815. case SNDCTL_DSP_GETCAPS:
  1816. return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
  1817. case SNDCTL_DSP_RESET:
  1818. stop_dac1(s);
  1819. synchronize_irq(s->irq);
  1820. s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
  1821. return 0;
  1822. case SNDCTL_DSP_SPEED:
  1823. if (get_user(val, p))
  1824. return -EFAULT;
  1825. if (val >= 0) {
  1826. stop_dac1(s);
  1827. s->dma_dac1.ready = 0;
  1828. for (ctrl = 0; ctrl <= 2; ctrl++)
  1829. if (val < (dac1_samplerate[ctrl] + dac1_samplerate[ctrl+1]) / 2)
  1830. break;
  1831. spin_lock_irqsave(&s->lock, flags);
  1832. s->ctrl = (s->ctrl & ~CTRL_WTSRSEL) | (ctrl << CTRL_SH_WTSRSEL);
  1833. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  1834. spin_unlock_irqrestore(&s->lock, flags);
  1835. }
  1836. return put_user(dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], p);
  1837. case SNDCTL_DSP_STEREO:
  1838. if (get_user(val, p))
  1839. return -EFAULT;
  1840. stop_dac1(s);
  1841. s->dma_dac1.ready = 0;
  1842. spin_lock_irqsave(&s->lock, flags);
  1843. if (val)
  1844. s->sctrl |= SCTRL_P1SMB;
  1845. else
  1846. s->sctrl &= ~SCTRL_P1SMB;
  1847. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1848. spin_unlock_irqrestore(&s->lock, flags);
  1849. return 0;
  1850. case SNDCTL_DSP_CHANNELS:
  1851. if (get_user(val, p))
  1852. return -EFAULT;
  1853. if (val != 0) {
  1854. if (s->dma_dac1.mapped)
  1855. return -EINVAL;
  1856. stop_dac1(s);
  1857. s->dma_dac1.ready = 0;
  1858. spin_lock_irqsave(&s->lock, flags);
  1859. if (val >= 2)
  1860. s->sctrl |= SCTRL_P1SMB;
  1861. else
  1862. s->sctrl &= ~SCTRL_P1SMB;
  1863. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1864. spin_unlock_irqrestore(&s->lock, flags);
  1865. }
  1866. return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
  1867. case SNDCTL_DSP_GETFMTS: /* Returns a mask */
  1868. return put_user(AFMT_S16_LE|AFMT_U8, p);
  1869. case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
  1870. if (get_user(val, p))
  1871. return -EFAULT;
  1872. if (val != AFMT_QUERY) {
  1873. stop_dac1(s);
  1874. s->dma_dac1.ready = 0;
  1875. spin_lock_irqsave(&s->lock, flags);
  1876. if (val == AFMT_S16_LE)
  1877. s->sctrl |= SCTRL_P1SEB;
  1878. else
  1879. s->sctrl &= ~SCTRL_P1SEB;
  1880. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  1881. spin_unlock_irqrestore(&s->lock, flags);
  1882. }
  1883. return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, p);
  1884. case SNDCTL_DSP_POST:
  1885. return 0;
  1886. case SNDCTL_DSP_GETTRIGGER:
  1887. return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, p);
  1888. case SNDCTL_DSP_SETTRIGGER:
  1889. if (get_user(val, p))
  1890. return -EFAULT;
  1891. if (val & PCM_ENABLE_OUTPUT) {
  1892. if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
  1893. return ret;
  1894. s->dma_dac1.enabled = 1;
  1895. start_dac1(s);
  1896. } else {
  1897. s->dma_dac1.enabled = 0;
  1898. stop_dac1(s);
  1899. }
  1900. return 0;
  1901. case SNDCTL_DSP_GETOSPACE:
  1902. if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
  1903. return val;
  1904. spin_lock_irqsave(&s->lock, flags);
  1905. es1370_update_ptr(s);
  1906. abinfo.fragsize = s->dma_dac1.fragsize;
  1907. count = s->dma_dac1.count;
  1908. if (count < 0)
  1909. count = 0;
  1910. abinfo.bytes = s->dma_dac1.dmasize - count;
  1911. abinfo.fragstotal = s->dma_dac1.numfrag;
  1912. abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
  1913. spin_unlock_irqrestore(&s->lock, flags);
  1914. return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
  1915. case SNDCTL_DSP_NONBLOCK:
  1916. file->f_flags |= O_NONBLOCK;
  1917. return 0;
  1918. case SNDCTL_DSP_GETODELAY:
  1919. if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
  1920. return val;
  1921. spin_lock_irqsave(&s->lock, flags);
  1922. es1370_update_ptr(s);
  1923. count = s->dma_dac1.count;
  1924. spin_unlock_irqrestore(&s->lock, flags);
  1925. if (count < 0)
  1926. count = 0;
  1927. return put_user(count, p);
  1928. case SNDCTL_DSP_GETOPTR:
  1929. if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
  1930. return val;
  1931. spin_lock_irqsave(&s->lock, flags);
  1932. es1370_update_ptr(s);
  1933. cinfo.bytes = s->dma_dac1.total_bytes;
  1934. count = s->dma_dac1.count;
  1935. if (count < 0)
  1936. count = 0;
  1937. cinfo.blocks = count >> s->dma_dac1.fragshift;
  1938. cinfo.ptr = s->dma_dac1.hwptr;
  1939. if (s->dma_dac1.mapped)
  1940. s->dma_dac1.count &= s->dma_dac1.fragsize-1;
  1941. spin_unlock_irqrestore(&s->lock, flags);
  1942. if (copy_to_user((void __user *)arg, &cinfo, sizeof(cinfo)))
  1943. return -EFAULT;
  1944. return 0;
  1945. case SNDCTL_DSP_GETBLKSIZE:
  1946. if ((val = prog_dmabuf_dac1(s)))
  1947. return val;
  1948. return put_user(s->dma_dac1.fragsize, p);
  1949. case SNDCTL_DSP_SETFRAGMENT:
  1950. if (get_user(val, p))
  1951. return -EFAULT;
  1952. s->dma_dac1.ossfragshift = val & 0xffff;
  1953. s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
  1954. if (s->dma_dac1.ossfragshift < 4)
  1955. s->dma_dac1.ossfragshift = 4;
  1956. if (s->dma_dac1.ossfragshift > 15)
  1957. s->dma_dac1.ossfragshift = 15;
  1958. if (s->dma_dac1.ossmaxfrags < 4)
  1959. s->dma_dac1.ossmaxfrags = 4;
  1960. return 0;
  1961. case SNDCTL_DSP_SUBDIVIDE:
  1962. if (s->dma_dac1.subdivision)
  1963. return -EINVAL;
  1964. if (get_user(val, p))
  1965. return -EFAULT;
  1966. if (val != 1 && val != 2 && val != 4)
  1967. return -EINVAL;
  1968. s->dma_dac1.subdivision = val;
  1969. return 0;
  1970. case SOUND_PCM_READ_RATE:
  1971. return put_user(dac1_samplerate[(s->ctrl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], p);
  1972. case SOUND_PCM_READ_CHANNELS:
  1973. return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
  1974. case SOUND_PCM_READ_BITS:
  1975. return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, p);
  1976. case SOUND_PCM_WRITE_FILTER:
  1977. case SNDCTL_DSP_SETSYNCRO:
  1978. case SOUND_PCM_READ_FILTER:
  1979. return -EINVAL;
  1980. }
  1981. return mixer_ioctl(s, cmd, arg);
  1982. }
  1983. static int es1370_open_dac(struct inode *inode, struct file *file)
  1984. {
  1985. unsigned int minor = iminor(inode);
  1986. DECLARE_WAITQUEUE(wait, current);
  1987. unsigned long flags;
  1988. struct list_head *list;
  1989. struct es1370_state *s;
  1990. for (list = devs.next; ; list = list->next) {
  1991. if (list == &devs)
  1992. return -ENODEV;
  1993. s = list_entry(list, struct es1370_state, devs);
  1994. if (!((s->dev_dac ^ minor) & ~0xf))
  1995. break;
  1996. }
  1997. VALIDATE_STATE(s);
  1998. /* we allow opening with O_RDWR, most programs do it although they will only write */
  1999. #if 0
  2000. if (file->f_mode & FMODE_READ)
  2001. return -EPERM;
  2002. #endif
  2003. if (!(file->f_mode & FMODE_WRITE))
  2004. return -EINVAL;
  2005. file->private_data = s;
  2006. /* wait for device to become free */
  2007. down(&s->open_sem);
  2008. while (s->open_mode & FMODE_DAC) {
  2009. if (file->f_flags & O_NONBLOCK) {
  2010. up(&s->open_sem);
  2011. return -EBUSY;
  2012. }
  2013. add_wait_queue(&s->open_wait, &wait);
  2014. __set_current_state(TASK_INTERRUPTIBLE);
  2015. up(&s->open_sem);
  2016. schedule();
  2017. remove_wait_queue(&s->open_wait, &wait);
  2018. set_current_state(TASK_RUNNING);
  2019. if (signal_pending(current))
  2020. return -ERESTARTSYS;
  2021. down(&s->open_sem);
  2022. }
  2023. s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
  2024. s->dma_dac1.enabled = 1;
  2025. spin_lock_irqsave(&s->lock, flags);
  2026. s->ctrl = (s->ctrl & ~CTRL_WTSRSEL) | (1 << CTRL_SH_WTSRSEL);
  2027. s->sctrl &= ~SCTRL_P1FMT;
  2028. if ((minor & 0xf) == SND_DEV_DSP16)
  2029. s->sctrl |= ES1370_FMT_S16_MONO << SCTRL_SH_P1FMT;
  2030. else
  2031. s->sctrl |= ES1370_FMT_U8_MONO << SCTRL_SH_P1FMT;
  2032. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  2033. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  2034. spin_unlock_irqrestore(&s->lock, flags);
  2035. s->open_mode |= FMODE_DAC;
  2036. up(&s->open_sem);
  2037. return nonseekable_open(inode, file);
  2038. }
  2039. static int es1370_release_dac(struct inode *inode, struct file *file)
  2040. {
  2041. struct es1370_state *s = (struct es1370_state *)file->private_data;
  2042. VALIDATE_STATE(s);
  2043. lock_kernel();
  2044. drain_dac1(s, file->f_flags & O_NONBLOCK);
  2045. down(&s->open_sem);
  2046. stop_dac1(s);
  2047. dealloc_dmabuf(s, &s->dma_dac1);
  2048. s->open_mode &= ~FMODE_DAC;
  2049. wake_up(&s->open_wait);
  2050. up(&s->open_sem);
  2051. unlock_kernel();
  2052. return 0;
  2053. }
  2054. static /*const*/ struct file_operations es1370_dac_fops = {
  2055. .owner = THIS_MODULE,
  2056. .llseek = no_llseek,
  2057. .write = es1370_write_dac,
  2058. .poll = es1370_poll_dac,
  2059. .ioctl = es1370_ioctl_dac,
  2060. .mmap = es1370_mmap_dac,
  2061. .open = es1370_open_dac,
  2062. .release = es1370_release_dac,
  2063. };
  2064. /* --------------------------------------------------------------------- */
  2065. static ssize_t es1370_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
  2066. {
  2067. struct es1370_state *s = (struct es1370_state *)file->private_data;
  2068. DECLARE_WAITQUEUE(wait, current);
  2069. ssize_t ret;
  2070. unsigned long flags;
  2071. unsigned ptr;
  2072. int cnt;
  2073. VALIDATE_STATE(s);
  2074. if (!access_ok(VERIFY_WRITE, buffer, count))
  2075. return -EFAULT;
  2076. if (count == 0)
  2077. return 0;
  2078. ret = 0;
  2079. add_wait_queue(&s->midi.iwait, &wait);
  2080. while (count > 0) {
  2081. spin_lock_irqsave(&s->lock, flags);
  2082. ptr = s->midi.ird;
  2083. cnt = MIDIINBUF - ptr;
  2084. if (s->midi.icnt < cnt)
  2085. cnt = s->midi.icnt;
  2086. if (cnt <= 0)
  2087. __set_current_state(TASK_INTERRUPTIBLE);
  2088. spin_unlock_irqrestore(&s->lock, flags);
  2089. if (cnt > count)
  2090. cnt = count;
  2091. if (cnt <= 0) {
  2092. if (file->f_flags & O_NONBLOCK) {
  2093. if (!ret)
  2094. ret = -EAGAIN;
  2095. break;
  2096. }
  2097. schedule();
  2098. if (signal_pending(current)) {
  2099. if (!ret)
  2100. ret = -ERESTARTSYS;
  2101. break;
  2102. }
  2103. continue;
  2104. }
  2105. if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
  2106. if (!ret)
  2107. ret = -EFAULT;
  2108. break;
  2109. }
  2110. ptr = (ptr + cnt) % MIDIINBUF;
  2111. spin_lock_irqsave(&s->lock, flags);
  2112. s->midi.ird = ptr;
  2113. s->midi.icnt -= cnt;
  2114. spin_unlock_irqrestore(&s->lock, flags);
  2115. count -= cnt;
  2116. buffer += cnt;
  2117. ret += cnt;
  2118. break;
  2119. }
  2120. __set_current_state(TASK_RUNNING);
  2121. remove_wait_queue(&s->midi.iwait, &wait);
  2122. return ret;
  2123. }
  2124. static ssize_t es1370_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
  2125. {
  2126. struct es1370_state *s = (struct es1370_state *)file->private_data;
  2127. DECLARE_WAITQUEUE(wait, current);
  2128. ssize_t ret;
  2129. unsigned long flags;
  2130. unsigned ptr;
  2131. int cnt;
  2132. VALIDATE_STATE(s);
  2133. if (!access_ok(VERIFY_READ, buffer, count))
  2134. return -EFAULT;
  2135. if (count == 0)
  2136. return 0;
  2137. ret = 0;
  2138. add_wait_queue(&s->midi.owait, &wait);
  2139. while (count > 0) {
  2140. spin_lock_irqsave(&s->lock, flags);
  2141. ptr = s->midi.owr;
  2142. cnt = MIDIOUTBUF - ptr;
  2143. if (s->midi.ocnt + cnt > MIDIOUTBUF)
  2144. cnt = MIDIOUTBUF - s->midi.ocnt;
  2145. if (cnt <= 0) {
  2146. __set_current_state(TASK_INTERRUPTIBLE);
  2147. es1370_handle_midi(s);
  2148. }
  2149. spin_unlock_irqrestore(&s->lock, flags);
  2150. if (cnt > count)
  2151. cnt = count;
  2152. if (cnt <= 0) {
  2153. if (file->f_flags & O_NONBLOCK) {
  2154. if (!ret)
  2155. ret = -EAGAIN;
  2156. break;
  2157. }
  2158. schedule();
  2159. if (signal_pending(current)) {
  2160. if (!ret)
  2161. ret = -ERESTARTSYS;
  2162. break;
  2163. }
  2164. continue;
  2165. }
  2166. if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
  2167. if (!ret)
  2168. ret = -EFAULT;
  2169. break;
  2170. }
  2171. ptr = (ptr + cnt) % MIDIOUTBUF;
  2172. spin_lock_irqsave(&s->lock, flags);
  2173. s->midi.owr = ptr;
  2174. s->midi.ocnt += cnt;
  2175. spin_unlock_irqrestore(&s->lock, flags);
  2176. count -= cnt;
  2177. buffer += cnt;
  2178. ret += cnt;
  2179. spin_lock_irqsave(&s->lock, flags);
  2180. es1370_handle_midi(s);
  2181. spin_unlock_irqrestore(&s->lock, flags);
  2182. }
  2183. __set_current_state(TASK_RUNNING);
  2184. remove_wait_queue(&s->midi.owait, &wait);
  2185. return ret;
  2186. }
  2187. /* No kernel lock - we have our own spinlock */
  2188. static unsigned int es1370_midi_poll(struct file *file, struct poll_table_struct *wait)
  2189. {
  2190. struct es1370_state *s = (struct es1370_state *)file->private_data;
  2191. unsigned long flags;
  2192. unsigned int mask = 0;
  2193. VALIDATE_STATE(s);
  2194. if (file->f_mode & FMODE_WRITE)
  2195. poll_wait(file, &s->midi.owait, wait);
  2196. if (file->f_mode & FMODE_READ)
  2197. poll_wait(file, &s->midi.iwait, wait);
  2198. spin_lock_irqsave(&s->lock, flags);
  2199. if (file->f_mode & FMODE_READ) {
  2200. if (s->midi.icnt > 0)
  2201. mask |= POLLIN | POLLRDNORM;
  2202. }
  2203. if (file->f_mode & FMODE_WRITE) {
  2204. if (s->midi.ocnt < MIDIOUTBUF)
  2205. mask |= POLLOUT | POLLWRNORM;
  2206. }
  2207. spin_unlock_irqrestore(&s->lock, flags);
  2208. return mask;
  2209. }
  2210. static int es1370_midi_open(struct inode *inode, struct file *file)
  2211. {
  2212. unsigned int minor = iminor(inode);
  2213. DECLARE_WAITQUEUE(wait, current);
  2214. unsigned long flags;
  2215. struct list_head *list;
  2216. struct es1370_state *s;
  2217. for (list = devs.next; ; list = list->next) {
  2218. if (list == &devs)
  2219. return -ENODEV;
  2220. s = list_entry(list, struct es1370_state, devs);
  2221. if (s->dev_midi == minor)
  2222. break;
  2223. }
  2224. VALIDATE_STATE(s);
  2225. file->private_data = s;
  2226. /* wait for device to become free */
  2227. down(&s->open_sem);
  2228. while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
  2229. if (file->f_flags & O_NONBLOCK) {
  2230. up(&s->open_sem);
  2231. return -EBUSY;
  2232. }
  2233. add_wait_queue(&s->open_wait, &wait);
  2234. __set_current_state(TASK_INTERRUPTIBLE);
  2235. up(&s->open_sem);
  2236. schedule();
  2237. remove_wait_queue(&s->open_wait, &wait);
  2238. set_current_state(TASK_RUNNING);
  2239. if (signal_pending(current))
  2240. return -ERESTARTSYS;
  2241. down(&s->open_sem);
  2242. }
  2243. spin_lock_irqsave(&s->lock, flags);
  2244. if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
  2245. s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
  2246. s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
  2247. outb(UCTRL_CNTRL_SWR, s->io+ES1370_REG_UART_CONTROL);
  2248. outb(0, s->io+ES1370_REG_UART_CONTROL);
  2249. outb(0, s->io+ES1370_REG_UART_TEST);
  2250. }
  2251. if (file->f_mode & FMODE_READ) {
  2252. s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
  2253. }
  2254. if (file->f_mode & FMODE_WRITE) {
  2255. s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
  2256. }
  2257. s->ctrl |= CTRL_UART_EN;
  2258. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  2259. es1370_handle_midi(s);
  2260. spin_unlock_irqrestore(&s->lock, flags);
  2261. s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
  2262. up(&s->open_sem);
  2263. return nonseekable_open(inode, file);
  2264. }
  2265. static int es1370_midi_release(struct inode *inode, struct file *file)
  2266. {
  2267. struct es1370_state *s = (struct es1370_state *)file->private_data;
  2268. DECLARE_WAITQUEUE(wait, current);
  2269. unsigned long flags;
  2270. unsigned count, tmo;
  2271. VALIDATE_STATE(s);
  2272. lock_kernel();
  2273. if (file->f_mode & FMODE_WRITE) {
  2274. add_wait_queue(&s->midi.owait, &wait);
  2275. for (;;) {
  2276. __set_current_state(TASK_INTERRUPTIBLE);
  2277. spin_lock_irqsave(&s->lock, flags);
  2278. count = s->midi.ocnt;
  2279. spin_unlock_irqrestore(&s->lock, flags);
  2280. if (count <= 0)
  2281. break;
  2282. if (signal_pending(current))
  2283. break;
  2284. if (file->f_flags & O_NONBLOCK)
  2285. break;
  2286. tmo = (count * HZ) / 3100;
  2287. if (!schedule_timeout(tmo ? : 1) && tmo)
  2288. DBG(printk(KERN_DEBUG "es1370: midi timed out??\n");)
  2289. }
  2290. remove_wait_queue(&s->midi.owait, &wait);
  2291. set_current_state(TASK_RUNNING);
  2292. }
  2293. down(&s->open_sem);
  2294. s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
  2295. spin_lock_irqsave(&s->lock, flags);
  2296. if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
  2297. s->ctrl &= ~CTRL_UART_EN;
  2298. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  2299. }
  2300. spin_unlock_irqrestore(&s->lock, flags);
  2301. wake_up(&s->open_wait);
  2302. up(&s->open_sem);
  2303. unlock_kernel();
  2304. return 0;
  2305. }
  2306. static /*const*/ struct file_operations es1370_midi_fops = {
  2307. .owner = THIS_MODULE,
  2308. .llseek = no_llseek,
  2309. .read = es1370_midi_read,
  2310. .write = es1370_midi_write,
  2311. .poll = es1370_midi_poll,
  2312. .open = es1370_midi_open,
  2313. .release = es1370_midi_release,
  2314. };
  2315. /* --------------------------------------------------------------------- */
  2316. /* maximum number of devices; only used for command line params */
  2317. #define NR_DEVICE 5
  2318. static int lineout[NR_DEVICE];
  2319. static int micbias[NR_DEVICE];
  2320. static unsigned int devindex;
  2321. module_param_array(lineout, bool, NULL, 0);
  2322. MODULE_PARM_DESC(lineout, "if 1 the LINE input is converted to LINE out");
  2323. module_param_array(micbias, bool, NULL, 0);
  2324. MODULE_PARM_DESC(micbias, "sets the +5V bias for an electret microphone");
  2325. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  2326. MODULE_DESCRIPTION("ES1370 AudioPCI Driver");
  2327. MODULE_LICENSE("GPL");
  2328. /* --------------------------------------------------------------------- */
  2329. static struct initvol {
  2330. int mixch;
  2331. int vol;
  2332. } initvol[] __devinitdata = {
  2333. { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
  2334. { SOUND_MIXER_WRITE_PCM, 0x4040 },
  2335. { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
  2336. { SOUND_MIXER_WRITE_CD, 0x4040 },
  2337. { SOUND_MIXER_WRITE_LINE, 0x4040 },
  2338. { SOUND_MIXER_WRITE_LINE1, 0x4040 },
  2339. { SOUND_MIXER_WRITE_LINE2, 0x4040 },
  2340. { SOUND_MIXER_WRITE_LINE3, 0x4040 },
  2341. { SOUND_MIXER_WRITE_MIC, 0x4040 },
  2342. { SOUND_MIXER_WRITE_OGAIN, 0x4040 }
  2343. };
  2344. static int __devinit es1370_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
  2345. {
  2346. struct es1370_state *s;
  2347. struct gameport *gp = NULL;
  2348. mm_segment_t fs;
  2349. int i, val, ret;
  2350. if ((ret=pci_enable_device(pcidev)))
  2351. return ret;
  2352. if ( !(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
  2353. !pci_resource_start(pcidev, 0)
  2354. )
  2355. return -ENODEV;
  2356. if (pcidev->irq == 0)
  2357. return -ENODEV;
  2358. i = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
  2359. if (i) {
  2360. printk(KERN_WARNING "es1370: architecture does not support 32bit PCI busmaster DMA\n");
  2361. return i;
  2362. }
  2363. if (!(s = kmalloc(sizeof(struct es1370_state), GFP_KERNEL))) {
  2364. printk(KERN_WARNING "es1370: out of memory\n");
  2365. return -ENOMEM;
  2366. }
  2367. memset(s, 0, sizeof(struct es1370_state));
  2368. init_waitqueue_head(&s->dma_adc.wait);
  2369. init_waitqueue_head(&s->dma_dac1.wait);
  2370. init_waitqueue_head(&s->dma_dac2.wait);
  2371. init_waitqueue_head(&s->open_wait);
  2372. init_waitqueue_head(&s->midi.iwait);
  2373. init_waitqueue_head(&s->midi.owait);
  2374. init_MUTEX(&s->open_sem);
  2375. spin_lock_init(&s->lock);
  2376. s->magic = ES1370_MAGIC;
  2377. s->dev = pcidev;
  2378. s->io = pci_resource_start(pcidev, 0);
  2379. s->irq = pcidev->irq;
  2380. if (!request_region(s->io, ES1370_EXTENT, "es1370")) {
  2381. printk(KERN_ERR "es1370: io ports %#lx-%#lx in use\n", s->io, s->io+ES1370_EXTENT-1);
  2382. ret = -EBUSY;
  2383. goto err_region;
  2384. }
  2385. if ((ret=request_irq(s->irq, es1370_interrupt, SA_SHIRQ, "es1370",s))) {
  2386. printk(KERN_ERR "es1370: irq %u in use\n", s->irq);
  2387. goto err_irq;
  2388. }
  2389. /* initialize codec registers */
  2390. /* note: setting CTRL_SERR_DIS is reported to break
  2391. * mic bias setting (by Kim.Berts@fisub.mail.abb.com) */
  2392. s->ctrl = CTRL_CDC_EN | (DAC2_SRTODIV(8000) << CTRL_SH_PCLKDIV) | (1 << CTRL_SH_WTSRSEL);
  2393. if (!request_region(0x200, JOY_EXTENT, "es1370")) {
  2394. printk(KERN_ERR "es1370: joystick io port 0x200 in use\n");
  2395. } else if (!(s->gameport = gp = gameport_allocate_port())) {
  2396. printk(KERN_ERR "es1370: can not allocate memory for gameport\n");
  2397. release_region(0x200, JOY_EXTENT);
  2398. } else {
  2399. gameport_set_name(gp, "ESS1370");
  2400. gameport_set_phys(gp, "pci%s/gameport0", pci_name(s->dev));
  2401. gp->dev.parent = &s->dev->dev;
  2402. gp->io = 0x200;
  2403. s->ctrl |= CTRL_JYSTK_EN;
  2404. }
  2405. if (lineout[devindex])
  2406. s->ctrl |= CTRL_XCTL0;
  2407. if (micbias[devindex])
  2408. s->ctrl |= CTRL_XCTL1;
  2409. s->sctrl = 0;
  2410. printk(KERN_INFO "es1370: found adapter at io %#lx irq %u\n"
  2411. KERN_INFO "es1370: features: joystick %s, line %s, mic impedance %s\n",
  2412. s->io, s->irq, (s->ctrl & CTRL_JYSTK_EN) ? "on" : "off",
  2413. (s->ctrl & CTRL_XCTL0) ? "out" : "in",
  2414. (s->ctrl & CTRL_XCTL1) ? "1" : "0");
  2415. /* register devices */
  2416. if ((s->dev_audio = register_sound_dsp(&es1370_audio_fops, -1)) < 0) {
  2417. ret = s->dev_audio;
  2418. goto err_dev1;
  2419. }
  2420. if ((s->dev_mixer = register_sound_mixer(&es1370_mixer_fops, -1)) < 0) {
  2421. ret = s->dev_mixer;
  2422. goto err_dev2;
  2423. }
  2424. if ((s->dev_dac = register_sound_dsp(&es1370_dac_fops, -1)) < 0) {
  2425. ret = s->dev_dac;
  2426. goto err_dev3;
  2427. }
  2428. if ((s->dev_midi = register_sound_midi(&es1370_midi_fops, -1)) < 0) {
  2429. ret = s->dev_midi;
  2430. goto err_dev4;
  2431. }
  2432. /* initialize the chips */
  2433. outl(s->ctrl, s->io+ES1370_REG_CONTROL);
  2434. outl(s->sctrl, s->io+ES1370_REG_SERIAL_CONTROL);
  2435. /* point phantom write channel to "bugbuf" */
  2436. s->bugbuf_cpu = pci_alloc_consistent(pcidev,16,&s->bugbuf_dma);
  2437. if (!s->bugbuf_cpu) {
  2438. ret = -ENOMEM;
  2439. goto err_dev5;
  2440. }
  2441. outl((ES1370_REG_PHANTOM_FRAMEADR >> 8) & 15, s->io+ES1370_REG_MEMPAGE);
  2442. outl(s->bugbuf_dma, s->io+(ES1370_REG_PHANTOM_FRAMEADR & 0xff));
  2443. outl(0, s->io+(ES1370_REG_PHANTOM_FRAMECNT & 0xff));
  2444. pci_set_master(pcidev); /* enable bus mastering */
  2445. wrcodec(s, 0x16, 3); /* no RST, PD */
  2446. wrcodec(s, 0x17, 0); /* CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off the LRCLK2 PLL; program DAC_SYNC=0!! */
  2447. wrcodec(s, 0x18, 0); /* recording source is mixer */
  2448. wrcodec(s, 0x19, s->mix.micpreamp = 1); /* turn on MIC preamp */
  2449. s->mix.imix = 1;
  2450. fs = get_fs();
  2451. set_fs(KERNEL_DS);
  2452. val = SOUND_MASK_LINE|SOUND_MASK_SYNTH|SOUND_MASK_CD;
  2453. mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
  2454. for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
  2455. val = initvol[i].vol;
  2456. mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
  2457. }
  2458. set_fs(fs);
  2459. /* register gameport */
  2460. if (gp)
  2461. gameport_register_port(gp);
  2462. /* store it in the driver field */
  2463. pci_set_drvdata(pcidev, s);
  2464. /* put it into driver list */
  2465. list_add_tail(&s->devs, &devs);
  2466. /* increment devindex */
  2467. if (devindex < NR_DEVICE-1)
  2468. devindex++;
  2469. return 0;
  2470. err_dev5:
  2471. unregister_sound_midi(s->dev_midi);
  2472. err_dev4:
  2473. unregister_sound_dsp(s->dev_dac);
  2474. err_dev3:
  2475. unregister_sound_mixer(s->dev_mixer);
  2476. err_dev2:
  2477. unregister_sound_dsp(s->dev_audio);
  2478. err_dev1:
  2479. printk(KERN_ERR "es1370: cannot register misc device\n");
  2480. free_irq(s->irq, s);
  2481. if (s->gameport) {
  2482. release_region(s->gameport->io, JOY_EXTENT);
  2483. gameport_free_port(s->gameport);
  2484. }
  2485. err_irq:
  2486. release_region(s->io, ES1370_EXTENT);
  2487. err_region:
  2488. kfree(s);
  2489. return ret;
  2490. }
  2491. static void __devexit es1370_remove(struct pci_dev *dev)
  2492. {
  2493. struct es1370_state *s = pci_get_drvdata(dev);
  2494. if (!s)
  2495. return;
  2496. list_del(&s->devs);
  2497. outl(CTRL_SERR_DIS | (1 << CTRL_SH_WTSRSEL), s->io+ES1370_REG_CONTROL); /* switch everything off */
  2498. outl(0, s->io+ES1370_REG_SERIAL_CONTROL); /* clear serial interrupts */
  2499. synchronize_irq(s->irq);
  2500. free_irq(s->irq, s);
  2501. if (s->gameport) {
  2502. int gpio = s->gameport->io;
  2503. gameport_unregister_port(s->gameport);
  2504. release_region(gpio, JOY_EXTENT);
  2505. }
  2506. release_region(s->io, ES1370_EXTENT);
  2507. unregister_sound_dsp(s->dev_audio);
  2508. unregister_sound_mixer(s->dev_mixer);
  2509. unregister_sound_dsp(s->dev_dac);
  2510. unregister_sound_midi(s->dev_midi);
  2511. pci_free_consistent(dev, 16, s->bugbuf_cpu, s->bugbuf_dma);
  2512. kfree(s);
  2513. pci_set_drvdata(dev, NULL);
  2514. }
  2515. static struct pci_device_id id_table[] = {
  2516. { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1370, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
  2517. { 0, }
  2518. };
  2519. MODULE_DEVICE_TABLE(pci, id_table);
  2520. static struct pci_driver es1370_driver = {
  2521. .name = "es1370",
  2522. .id_table = id_table,
  2523. .probe = es1370_probe,
  2524. .remove = __devexit_p(es1370_remove),
  2525. };
  2526. static int __init init_es1370(void)
  2527. {
  2528. printk(KERN_INFO "es1370: version v0.38 time " __TIME__ " " __DATE__ "\n");
  2529. return pci_module_init(&es1370_driver);
  2530. }
  2531. static void __exit cleanup_es1370(void)
  2532. {
  2533. printk(KERN_INFO "es1370: unloading\n");
  2534. pci_unregister_driver(&es1370_driver);
  2535. }
  2536. module_init(init_es1370);
  2537. module_exit(cleanup_es1370);
  2538. /* --------------------------------------------------------------------- */
  2539. #ifndef MODULE
  2540. /* format is: es1370=lineout[,micbias]] */
  2541. static int __init es1370_setup(char *str)
  2542. {
  2543. static unsigned __initdata nr_dev = 0;
  2544. if (nr_dev >= NR_DEVICE)
  2545. return 0;
  2546. (void)
  2547. ((get_option(&str,&lineout [nr_dev]) == 2)
  2548. && get_option(&str,&micbias [nr_dev])
  2549. );
  2550. nr_dev++;
  2551. return 1;
  2552. }
  2553. __setup("es1370=", es1370_setup);
  2554. #endif /* MODULE */