onenand_base.c 100 KB

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  1. /*
  2. * linux/drivers/mtd/onenand/onenand_base.c
  3. *
  4. * Copyright © 2005-2009 Samsung Electronics
  5. * Copyright © 2007 Nokia Corporation
  6. *
  7. * Kyungmin Park <kyungmin.park@samsung.com>
  8. *
  9. * Credits:
  10. * Adrian Hunter <ext-adrian.hunter@nokia.com>:
  11. * auto-placement support, read-while load support, various fixes
  12. *
  13. * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
  14. * Flex-OneNAND support
  15. * Amul Kumar Saha <amul.saha at samsung.com>
  16. * OTP support
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/init.h>
  26. #include <linux/sched.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/jiffies.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/onenand.h>
  32. #include <linux/mtd/partitions.h>
  33. #include <asm/io.h>
  34. /* Default Flex-OneNAND boundary and lock respectively */
  35. static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
  36. module_param_array(flex_bdry, int, NULL, 0400);
  37. MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
  38. "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
  39. "DIE_BDRY: SLC boundary of the die"
  40. "LOCK: Locking information for SLC boundary"
  41. " : 0->Set boundary in unlocked status"
  42. " : 1->Set boundary in locked status");
  43. /* Default OneNAND/Flex-OneNAND OTP options*/
  44. static int otp;
  45. module_param(otp, int, 0400);
  46. MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
  47. "Syntax : otp=LOCK_TYPE"
  48. "LOCK_TYPE : Keys issued, for specific OTP Lock type"
  49. " : 0 -> Default (No Blocks Locked)"
  50. " : 1 -> OTP Block lock"
  51. " : 2 -> 1st Block lock"
  52. " : 3 -> BOTH OTP Block and 1st Block lock");
  53. /**
  54. * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
  55. * For now, we expose only 64 out of 80 ecc bytes
  56. */
  57. static struct nand_ecclayout onenand_oob_128 = {
  58. .eccbytes = 64,
  59. .eccpos = {
  60. 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
  61. 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
  62. 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
  63. 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
  64. 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
  65. 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
  66. 102, 103, 104, 105
  67. },
  68. .oobfree = {
  69. {2, 4}, {18, 4}, {34, 4}, {50, 4},
  70. {66, 4}, {82, 4}, {98, 4}, {114, 4}
  71. }
  72. };
  73. /**
  74. * onenand_oob_64 - oob info for large (2KB) page
  75. */
  76. static struct nand_ecclayout onenand_oob_64 = {
  77. .eccbytes = 20,
  78. .eccpos = {
  79. 8, 9, 10, 11, 12,
  80. 24, 25, 26, 27, 28,
  81. 40, 41, 42, 43, 44,
  82. 56, 57, 58, 59, 60,
  83. },
  84. .oobfree = {
  85. {2, 3}, {14, 2}, {18, 3}, {30, 2},
  86. {34, 3}, {46, 2}, {50, 3}, {62, 2}
  87. }
  88. };
  89. /**
  90. * onenand_oob_32 - oob info for middle (1KB) page
  91. */
  92. static struct nand_ecclayout onenand_oob_32 = {
  93. .eccbytes = 10,
  94. .eccpos = {
  95. 8, 9, 10, 11, 12,
  96. 24, 25, 26, 27, 28,
  97. },
  98. .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  99. };
  100. static const unsigned char ffchars[] = {
  101. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  102. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  103. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  104. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  105. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  106. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  107. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  108. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  109. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  110. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
  111. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  112. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
  113. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  114. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
  115. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  116. 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
  117. };
  118. /**
  119. * onenand_readw - [OneNAND Interface] Read OneNAND register
  120. * @param addr address to read
  121. *
  122. * Read OneNAND register
  123. */
  124. static unsigned short onenand_readw(void __iomem *addr)
  125. {
  126. return readw(addr);
  127. }
  128. /**
  129. * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  130. * @param value value to write
  131. * @param addr address to write
  132. *
  133. * Write OneNAND register with value
  134. */
  135. static void onenand_writew(unsigned short value, void __iomem *addr)
  136. {
  137. writew(value, addr);
  138. }
  139. /**
  140. * onenand_block_address - [DEFAULT] Get block address
  141. * @param this onenand chip data structure
  142. * @param block the block
  143. * @return translated block address if DDP, otherwise same
  144. *
  145. * Setup Start Address 1 Register (F100h)
  146. */
  147. static int onenand_block_address(struct onenand_chip *this, int block)
  148. {
  149. /* Device Flash Core select, NAND Flash Block Address */
  150. if (block & this->density_mask)
  151. return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
  152. return block;
  153. }
  154. /**
  155. * onenand_bufferram_address - [DEFAULT] Get bufferram address
  156. * @param this onenand chip data structure
  157. * @param block the block
  158. * @return set DBS value if DDP, otherwise 0
  159. *
  160. * Setup Start Address 2 Register (F101h) for DDP
  161. */
  162. static int onenand_bufferram_address(struct onenand_chip *this, int block)
  163. {
  164. /* Device BufferRAM Select */
  165. if (block & this->density_mask)
  166. return ONENAND_DDP_CHIP1;
  167. return ONENAND_DDP_CHIP0;
  168. }
  169. /**
  170. * onenand_page_address - [DEFAULT] Get page address
  171. * @param page the page address
  172. * @param sector the sector address
  173. * @return combined page and sector address
  174. *
  175. * Setup Start Address 8 Register (F107h)
  176. */
  177. static int onenand_page_address(int page, int sector)
  178. {
  179. /* Flash Page Address, Flash Sector Address */
  180. int fpa, fsa;
  181. fpa = page & ONENAND_FPA_MASK;
  182. fsa = sector & ONENAND_FSA_MASK;
  183. return ((fpa << ONENAND_FPA_SHIFT) | fsa);
  184. }
  185. /**
  186. * onenand_buffer_address - [DEFAULT] Get buffer address
  187. * @param dataram1 DataRAM index
  188. * @param sectors the sector address
  189. * @param count the number of sectors
  190. * @return the start buffer value
  191. *
  192. * Setup Start Buffer Register (F200h)
  193. */
  194. static int onenand_buffer_address(int dataram1, int sectors, int count)
  195. {
  196. int bsa, bsc;
  197. /* BufferRAM Sector Address */
  198. bsa = sectors & ONENAND_BSA_MASK;
  199. if (dataram1)
  200. bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
  201. else
  202. bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
  203. /* BufferRAM Sector Count */
  204. bsc = count & ONENAND_BSC_MASK;
  205. return ((bsa << ONENAND_BSA_SHIFT) | bsc);
  206. }
  207. /**
  208. * flexonenand_block- For given address return block number
  209. * @param this - OneNAND device structure
  210. * @param addr - Address for which block number is needed
  211. */
  212. static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
  213. {
  214. unsigned boundary, blk, die = 0;
  215. if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
  216. die = 1;
  217. addr -= this->diesize[0];
  218. }
  219. boundary = this->boundary[die];
  220. blk = addr >> (this->erase_shift - 1);
  221. if (blk > boundary)
  222. blk = (blk + boundary + 1) >> 1;
  223. blk += die ? this->density_mask : 0;
  224. return blk;
  225. }
  226. inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
  227. {
  228. if (!FLEXONENAND(this))
  229. return addr >> this->erase_shift;
  230. return flexonenand_block(this, addr);
  231. }
  232. /**
  233. * flexonenand_addr - Return address of the block
  234. * @this: OneNAND device structure
  235. * @block: Block number on Flex-OneNAND
  236. *
  237. * Return address of the block
  238. */
  239. static loff_t flexonenand_addr(struct onenand_chip *this, int block)
  240. {
  241. loff_t ofs = 0;
  242. int die = 0, boundary;
  243. if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
  244. block -= this->density_mask;
  245. die = 1;
  246. ofs = this->diesize[0];
  247. }
  248. boundary = this->boundary[die];
  249. ofs += (loff_t)block << (this->erase_shift - 1);
  250. if (block > (boundary + 1))
  251. ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
  252. return ofs;
  253. }
  254. loff_t onenand_addr(struct onenand_chip *this, int block)
  255. {
  256. if (!FLEXONENAND(this))
  257. return (loff_t)block << this->erase_shift;
  258. return flexonenand_addr(this, block);
  259. }
  260. EXPORT_SYMBOL(onenand_addr);
  261. /**
  262. * onenand_get_density - [DEFAULT] Get OneNAND density
  263. * @param dev_id OneNAND device ID
  264. *
  265. * Get OneNAND density from device ID
  266. */
  267. static inline int onenand_get_density(int dev_id)
  268. {
  269. int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
  270. return (density & ONENAND_DEVICE_DENSITY_MASK);
  271. }
  272. /**
  273. * flexonenand_region - [Flex-OneNAND] Return erase region of addr
  274. * @param mtd MTD device structure
  275. * @param addr address whose erase region needs to be identified
  276. */
  277. int flexonenand_region(struct mtd_info *mtd, loff_t addr)
  278. {
  279. int i;
  280. for (i = 0; i < mtd->numeraseregions; i++)
  281. if (addr < mtd->eraseregions[i].offset)
  282. break;
  283. return i - 1;
  284. }
  285. EXPORT_SYMBOL(flexonenand_region);
  286. /**
  287. * onenand_command - [DEFAULT] Send command to OneNAND device
  288. * @param mtd MTD device structure
  289. * @param cmd the command to be sent
  290. * @param addr offset to read from or write to
  291. * @param len number of bytes to read or write
  292. *
  293. * Send command to OneNAND device. This function is used for middle/large page
  294. * devices (1KB/2KB Bytes per page)
  295. */
  296. static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
  297. {
  298. struct onenand_chip *this = mtd->priv;
  299. int value, block, page;
  300. /* Address translation */
  301. switch (cmd) {
  302. case ONENAND_CMD_UNLOCK:
  303. case ONENAND_CMD_LOCK:
  304. case ONENAND_CMD_LOCK_TIGHT:
  305. case ONENAND_CMD_UNLOCK_ALL:
  306. block = -1;
  307. page = -1;
  308. break;
  309. case FLEXONENAND_CMD_PI_ACCESS:
  310. /* addr contains die index */
  311. block = addr * this->density_mask;
  312. page = -1;
  313. break;
  314. case ONENAND_CMD_ERASE:
  315. case ONENAND_CMD_BUFFERRAM:
  316. case ONENAND_CMD_OTP_ACCESS:
  317. block = onenand_block(this, addr);
  318. page = -1;
  319. break;
  320. case FLEXONENAND_CMD_READ_PI:
  321. cmd = ONENAND_CMD_READ;
  322. block = addr * this->density_mask;
  323. page = 0;
  324. break;
  325. default:
  326. block = onenand_block(this, addr);
  327. page = (int) (addr - onenand_addr(this, block)) >> this->page_shift;
  328. if (ONENAND_IS_2PLANE(this)) {
  329. /* Make the even block number */
  330. block &= ~1;
  331. /* Is it the odd plane? */
  332. if (addr & this->writesize)
  333. block++;
  334. page >>= 1;
  335. }
  336. page &= this->page_mask;
  337. break;
  338. }
  339. /* NOTE: The setting order of the registers is very important! */
  340. if (cmd == ONENAND_CMD_BUFFERRAM) {
  341. /* Select DataRAM for DDP */
  342. value = onenand_bufferram_address(this, block);
  343. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  344. if (ONENAND_IS_MLC(this) || ONENAND_IS_2PLANE(this))
  345. /* It is always BufferRAM0 */
  346. ONENAND_SET_BUFFERRAM0(this);
  347. else
  348. /* Switch to the next data buffer */
  349. ONENAND_SET_NEXT_BUFFERRAM(this);
  350. return 0;
  351. }
  352. if (block != -1) {
  353. /* Write 'DFS, FBA' of Flash */
  354. value = onenand_block_address(this, block);
  355. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  356. /* Select DataRAM for DDP */
  357. value = onenand_bufferram_address(this, block);
  358. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  359. }
  360. if (page != -1) {
  361. /* Now we use page size operation */
  362. int sectors = 0, count = 0;
  363. int dataram;
  364. switch (cmd) {
  365. case FLEXONENAND_CMD_RECOVER_LSB:
  366. case ONENAND_CMD_READ:
  367. case ONENAND_CMD_READOOB:
  368. if (ONENAND_IS_MLC(this))
  369. /* It is always BufferRAM0 */
  370. dataram = ONENAND_SET_BUFFERRAM0(this);
  371. else
  372. dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
  373. break;
  374. default:
  375. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  376. cmd = ONENAND_CMD_2X_PROG;
  377. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  378. break;
  379. }
  380. /* Write 'FPA, FSA' of Flash */
  381. value = onenand_page_address(page, sectors);
  382. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
  383. /* Write 'BSA, BSC' of DataRAM */
  384. value = onenand_buffer_address(dataram, sectors, count);
  385. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  386. }
  387. /* Interrupt clear */
  388. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  389. /* Write command */
  390. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  391. return 0;
  392. }
  393. /**
  394. * onenand_read_ecc - return ecc status
  395. * @param this onenand chip structure
  396. */
  397. static inline int onenand_read_ecc(struct onenand_chip *this)
  398. {
  399. int ecc, i, result = 0;
  400. if (!FLEXONENAND(this))
  401. return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
  402. for (i = 0; i < 4; i++) {
  403. ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i);
  404. if (likely(!ecc))
  405. continue;
  406. if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
  407. return ONENAND_ECC_2BIT_ALL;
  408. else
  409. result = ONENAND_ECC_1BIT_ALL;
  410. }
  411. return result;
  412. }
  413. /**
  414. * onenand_wait - [DEFAULT] wait until the command is done
  415. * @param mtd MTD device structure
  416. * @param state state to select the max. timeout value
  417. *
  418. * Wait for command done. This applies to all OneNAND command
  419. * Read can take up to 30us, erase up to 2ms and program up to 350us
  420. * according to general OneNAND specs
  421. */
  422. static int onenand_wait(struct mtd_info *mtd, int state)
  423. {
  424. struct onenand_chip * this = mtd->priv;
  425. unsigned long timeout;
  426. unsigned int flags = ONENAND_INT_MASTER;
  427. unsigned int interrupt = 0;
  428. unsigned int ctrl;
  429. /* The 20 msec is enough */
  430. timeout = jiffies + msecs_to_jiffies(20);
  431. while (time_before(jiffies, timeout)) {
  432. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  433. if (interrupt & flags)
  434. break;
  435. if (state != FL_READING)
  436. cond_resched();
  437. }
  438. /* To get correct interrupt status in timeout case */
  439. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  440. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  441. /*
  442. * In the Spec. it checks the controller status first
  443. * However if you get the correct information in case of
  444. * power off recovery (POR) test, it should read ECC status first
  445. */
  446. if (interrupt & ONENAND_INT_READ) {
  447. int ecc = onenand_read_ecc(this);
  448. if (ecc) {
  449. if (ecc & ONENAND_ECC_2BIT_ALL) {
  450. printk(KERN_ERR "%s: ECC error = 0x%04x\n",
  451. __func__, ecc);
  452. mtd->ecc_stats.failed++;
  453. return -EBADMSG;
  454. } else if (ecc & ONENAND_ECC_1BIT_ALL) {
  455. printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
  456. __func__, ecc);
  457. mtd->ecc_stats.corrected++;
  458. }
  459. }
  460. } else if (state == FL_READING) {
  461. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  462. __func__, ctrl, interrupt);
  463. return -EIO;
  464. }
  465. /* If there's controller error, it's a real error */
  466. if (ctrl & ONENAND_CTRL_ERROR) {
  467. printk(KERN_ERR "%s: controller error = 0x%04x\n",
  468. __func__, ctrl);
  469. if (ctrl & ONENAND_CTRL_LOCK)
  470. printk(KERN_ERR "%s: it's locked error.\n", __func__);
  471. return -EIO;
  472. }
  473. return 0;
  474. }
  475. /*
  476. * onenand_interrupt - [DEFAULT] onenand interrupt handler
  477. * @param irq onenand interrupt number
  478. * @param dev_id interrupt data
  479. *
  480. * complete the work
  481. */
  482. static irqreturn_t onenand_interrupt(int irq, void *data)
  483. {
  484. struct onenand_chip *this = data;
  485. /* To handle shared interrupt */
  486. if (!this->complete.done)
  487. complete(&this->complete);
  488. return IRQ_HANDLED;
  489. }
  490. /*
  491. * onenand_interrupt_wait - [DEFAULT] wait until the command is done
  492. * @param mtd MTD device structure
  493. * @param state state to select the max. timeout value
  494. *
  495. * Wait for command done.
  496. */
  497. static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
  498. {
  499. struct onenand_chip *this = mtd->priv;
  500. wait_for_completion(&this->complete);
  501. return onenand_wait(mtd, state);
  502. }
  503. /*
  504. * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
  505. * @param mtd MTD device structure
  506. * @param state state to select the max. timeout value
  507. *
  508. * Try interrupt based wait (It is used one-time)
  509. */
  510. static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
  511. {
  512. struct onenand_chip *this = mtd->priv;
  513. unsigned long remain, timeout;
  514. /* We use interrupt wait first */
  515. this->wait = onenand_interrupt_wait;
  516. timeout = msecs_to_jiffies(100);
  517. remain = wait_for_completion_timeout(&this->complete, timeout);
  518. if (!remain) {
  519. printk(KERN_INFO "OneNAND: There's no interrupt. "
  520. "We use the normal wait\n");
  521. /* Release the irq */
  522. free_irq(this->irq, this);
  523. this->wait = onenand_wait;
  524. }
  525. return onenand_wait(mtd, state);
  526. }
  527. /*
  528. * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
  529. * @param mtd MTD device structure
  530. *
  531. * There's two method to wait onenand work
  532. * 1. polling - read interrupt status register
  533. * 2. interrupt - use the kernel interrupt method
  534. */
  535. static void onenand_setup_wait(struct mtd_info *mtd)
  536. {
  537. struct onenand_chip *this = mtd->priv;
  538. int syscfg;
  539. init_completion(&this->complete);
  540. if (this->irq <= 0) {
  541. this->wait = onenand_wait;
  542. return;
  543. }
  544. if (request_irq(this->irq, &onenand_interrupt,
  545. IRQF_SHARED, "onenand", this)) {
  546. /* If we can't get irq, use the normal wait */
  547. this->wait = onenand_wait;
  548. return;
  549. }
  550. /* Enable interrupt */
  551. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  552. syscfg |= ONENAND_SYS_CFG1_IOBE;
  553. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  554. this->wait = onenand_try_interrupt_wait;
  555. }
  556. /**
  557. * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
  558. * @param mtd MTD data structure
  559. * @param area BufferRAM area
  560. * @return offset given area
  561. *
  562. * Return BufferRAM offset given area
  563. */
  564. static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
  565. {
  566. struct onenand_chip *this = mtd->priv;
  567. if (ONENAND_CURRENT_BUFFERRAM(this)) {
  568. /* Note: the 'this->writesize' is a real page size */
  569. if (area == ONENAND_DATARAM)
  570. return this->writesize;
  571. if (area == ONENAND_SPARERAM)
  572. return mtd->oobsize;
  573. }
  574. return 0;
  575. }
  576. /**
  577. * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
  578. * @param mtd MTD data structure
  579. * @param area BufferRAM area
  580. * @param buffer the databuffer to put/get data
  581. * @param offset offset to read from or write to
  582. * @param count number of bytes to read/write
  583. *
  584. * Read the BufferRAM area
  585. */
  586. static int onenand_read_bufferram(struct mtd_info *mtd, int area,
  587. unsigned char *buffer, int offset, size_t count)
  588. {
  589. struct onenand_chip *this = mtd->priv;
  590. void __iomem *bufferram;
  591. bufferram = this->base + area;
  592. bufferram += onenand_bufferram_offset(mtd, area);
  593. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  594. unsigned short word;
  595. /* Align with word(16-bit) size */
  596. count--;
  597. /* Read word and save byte */
  598. word = this->read_word(bufferram + offset + count);
  599. buffer[count] = (word & 0xff);
  600. }
  601. memcpy(buffer, bufferram + offset, count);
  602. return 0;
  603. }
  604. /**
  605. * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
  606. * @param mtd MTD data structure
  607. * @param area BufferRAM area
  608. * @param buffer the databuffer to put/get data
  609. * @param offset offset to read from or write to
  610. * @param count number of bytes to read/write
  611. *
  612. * Read the BufferRAM area with Sync. Burst Mode
  613. */
  614. static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
  615. unsigned char *buffer, int offset, size_t count)
  616. {
  617. struct onenand_chip *this = mtd->priv;
  618. void __iomem *bufferram;
  619. bufferram = this->base + area;
  620. bufferram += onenand_bufferram_offset(mtd, area);
  621. this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
  622. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  623. unsigned short word;
  624. /* Align with word(16-bit) size */
  625. count--;
  626. /* Read word and save byte */
  627. word = this->read_word(bufferram + offset + count);
  628. buffer[count] = (word & 0xff);
  629. }
  630. memcpy(buffer, bufferram + offset, count);
  631. this->mmcontrol(mtd, 0);
  632. return 0;
  633. }
  634. /**
  635. * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
  636. * @param mtd MTD data structure
  637. * @param area BufferRAM area
  638. * @param buffer the databuffer to put/get data
  639. * @param offset offset to read from or write to
  640. * @param count number of bytes to read/write
  641. *
  642. * Write the BufferRAM area
  643. */
  644. static int onenand_write_bufferram(struct mtd_info *mtd, int area,
  645. const unsigned char *buffer, int offset, size_t count)
  646. {
  647. struct onenand_chip *this = mtd->priv;
  648. void __iomem *bufferram;
  649. bufferram = this->base + area;
  650. bufferram += onenand_bufferram_offset(mtd, area);
  651. if (ONENAND_CHECK_BYTE_ACCESS(count)) {
  652. unsigned short word;
  653. int byte_offset;
  654. /* Align with word(16-bit) size */
  655. count--;
  656. /* Calculate byte access offset */
  657. byte_offset = offset + count;
  658. /* Read word and save byte */
  659. word = this->read_word(bufferram + byte_offset);
  660. word = (word & ~0xff) | buffer[count];
  661. this->write_word(word, bufferram + byte_offset);
  662. }
  663. memcpy(bufferram + offset, buffer, count);
  664. return 0;
  665. }
  666. /**
  667. * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
  668. * @param mtd MTD data structure
  669. * @param addr address to check
  670. * @return blockpage address
  671. *
  672. * Get blockpage address at 2x program mode
  673. */
  674. static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
  675. {
  676. struct onenand_chip *this = mtd->priv;
  677. int blockpage, block, page;
  678. /* Calculate the even block number */
  679. block = (int) (addr >> this->erase_shift) & ~1;
  680. /* Is it the odd plane? */
  681. if (addr & this->writesize)
  682. block++;
  683. page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
  684. blockpage = (block << 7) | page;
  685. return blockpage;
  686. }
  687. /**
  688. * onenand_check_bufferram - [GENERIC] Check BufferRAM information
  689. * @param mtd MTD data structure
  690. * @param addr address to check
  691. * @return 1 if there are valid data, otherwise 0
  692. *
  693. * Check bufferram if there is data we required
  694. */
  695. static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
  696. {
  697. struct onenand_chip *this = mtd->priv;
  698. int blockpage, found = 0;
  699. unsigned int i;
  700. if (ONENAND_IS_2PLANE(this))
  701. blockpage = onenand_get_2x_blockpage(mtd, addr);
  702. else
  703. blockpage = (int) (addr >> this->page_shift);
  704. /* Is there valid data? */
  705. i = ONENAND_CURRENT_BUFFERRAM(this);
  706. if (this->bufferram[i].blockpage == blockpage)
  707. found = 1;
  708. else {
  709. /* Check another BufferRAM */
  710. i = ONENAND_NEXT_BUFFERRAM(this);
  711. if (this->bufferram[i].blockpage == blockpage) {
  712. ONENAND_SET_NEXT_BUFFERRAM(this);
  713. found = 1;
  714. }
  715. }
  716. if (found && ONENAND_IS_DDP(this)) {
  717. /* Select DataRAM for DDP */
  718. int block = onenand_block(this, addr);
  719. int value = onenand_bufferram_address(this, block);
  720. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  721. }
  722. return found;
  723. }
  724. /**
  725. * onenand_update_bufferram - [GENERIC] Update BufferRAM information
  726. * @param mtd MTD data structure
  727. * @param addr address to update
  728. * @param valid valid flag
  729. *
  730. * Update BufferRAM information
  731. */
  732. static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
  733. int valid)
  734. {
  735. struct onenand_chip *this = mtd->priv;
  736. int blockpage;
  737. unsigned int i;
  738. if (ONENAND_IS_2PLANE(this))
  739. blockpage = onenand_get_2x_blockpage(mtd, addr);
  740. else
  741. blockpage = (int) (addr >> this->page_shift);
  742. /* Invalidate another BufferRAM */
  743. i = ONENAND_NEXT_BUFFERRAM(this);
  744. if (this->bufferram[i].blockpage == blockpage)
  745. this->bufferram[i].blockpage = -1;
  746. /* Update BufferRAM */
  747. i = ONENAND_CURRENT_BUFFERRAM(this);
  748. if (valid)
  749. this->bufferram[i].blockpage = blockpage;
  750. else
  751. this->bufferram[i].blockpage = -1;
  752. }
  753. /**
  754. * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
  755. * @param mtd MTD data structure
  756. * @param addr start address to invalidate
  757. * @param len length to invalidate
  758. *
  759. * Invalidate BufferRAM information
  760. */
  761. static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
  762. unsigned int len)
  763. {
  764. struct onenand_chip *this = mtd->priv;
  765. int i;
  766. loff_t end_addr = addr + len;
  767. /* Invalidate BufferRAM */
  768. for (i = 0; i < MAX_BUFFERRAM; i++) {
  769. loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
  770. if (buf_addr >= addr && buf_addr < end_addr)
  771. this->bufferram[i].blockpage = -1;
  772. }
  773. }
  774. /**
  775. * onenand_get_device - [GENERIC] Get chip for selected access
  776. * @param mtd MTD device structure
  777. * @param new_state the state which is requested
  778. *
  779. * Get the device and lock it for exclusive access
  780. */
  781. static int onenand_get_device(struct mtd_info *mtd, int new_state)
  782. {
  783. struct onenand_chip *this = mtd->priv;
  784. DECLARE_WAITQUEUE(wait, current);
  785. /*
  786. * Grab the lock and see if the device is available
  787. */
  788. while (1) {
  789. spin_lock(&this->chip_lock);
  790. if (this->state == FL_READY) {
  791. this->state = new_state;
  792. spin_unlock(&this->chip_lock);
  793. break;
  794. }
  795. if (new_state == FL_PM_SUSPENDED) {
  796. spin_unlock(&this->chip_lock);
  797. return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
  798. }
  799. set_current_state(TASK_UNINTERRUPTIBLE);
  800. add_wait_queue(&this->wq, &wait);
  801. spin_unlock(&this->chip_lock);
  802. schedule();
  803. remove_wait_queue(&this->wq, &wait);
  804. }
  805. return 0;
  806. }
  807. /**
  808. * onenand_release_device - [GENERIC] release chip
  809. * @param mtd MTD device structure
  810. *
  811. * Deselect, release chip lock and wake up anyone waiting on the device
  812. */
  813. static void onenand_release_device(struct mtd_info *mtd)
  814. {
  815. struct onenand_chip *this = mtd->priv;
  816. /* Release the chip */
  817. spin_lock(&this->chip_lock);
  818. this->state = FL_READY;
  819. wake_up(&this->wq);
  820. spin_unlock(&this->chip_lock);
  821. }
  822. /**
  823. * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
  824. * @param mtd MTD device structure
  825. * @param buf destination address
  826. * @param column oob offset to read from
  827. * @param thislen oob length to read
  828. */
  829. static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
  830. int thislen)
  831. {
  832. struct onenand_chip *this = mtd->priv;
  833. struct nand_oobfree *free;
  834. int readcol = column;
  835. int readend = column + thislen;
  836. int lastgap = 0;
  837. unsigned int i;
  838. uint8_t *oob_buf = this->oob_buf;
  839. free = this->ecclayout->oobfree;
  840. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  841. if (readcol >= lastgap)
  842. readcol += free->offset - lastgap;
  843. if (readend >= lastgap)
  844. readend += free->offset - lastgap;
  845. lastgap = free->offset + free->length;
  846. }
  847. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  848. free = this->ecclayout->oobfree;
  849. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  850. int free_end = free->offset + free->length;
  851. if (free->offset < readend && free_end > readcol) {
  852. int st = max_t(int,free->offset,readcol);
  853. int ed = min_t(int,free_end,readend);
  854. int n = ed - st;
  855. memcpy(buf, oob_buf + st, n);
  856. buf += n;
  857. } else if (column == 0)
  858. break;
  859. }
  860. return 0;
  861. }
  862. /**
  863. * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
  864. * @param mtd MTD device structure
  865. * @param addr address to recover
  866. * @param status return value from onenand_wait / onenand_bbt_wait
  867. *
  868. * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
  869. * lower page address and MSB page has higher page address in paired pages.
  870. * If power off occurs during MSB page program, the paired LSB page data can
  871. * become corrupt. LSB page recovery read is a way to read LSB page though page
  872. * data are corrupted. When uncorrectable error occurs as a result of LSB page
  873. * read after power up, issue LSB page recovery read.
  874. */
  875. static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
  876. {
  877. struct onenand_chip *this = mtd->priv;
  878. int i;
  879. /* Recovery is only for Flex-OneNAND */
  880. if (!FLEXONENAND(this))
  881. return status;
  882. /* check if we failed due to uncorrectable error */
  883. if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
  884. return status;
  885. /* check if address lies in MLC region */
  886. i = flexonenand_region(mtd, addr);
  887. if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
  888. return status;
  889. /* We are attempting to reread, so decrement stats.failed
  890. * which was incremented by onenand_wait due to read failure
  891. */
  892. printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
  893. __func__);
  894. mtd->ecc_stats.failed--;
  895. /* Issue the LSB page recovery command */
  896. this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
  897. return this->wait(mtd, FL_READING);
  898. }
  899. /**
  900. * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
  901. * @param mtd MTD device structure
  902. * @param from offset to read from
  903. * @param ops: oob operation description structure
  904. *
  905. * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
  906. * So, read-while-load is not present.
  907. */
  908. static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  909. struct mtd_oob_ops *ops)
  910. {
  911. struct onenand_chip *this = mtd->priv;
  912. struct mtd_ecc_stats stats;
  913. size_t len = ops->len;
  914. size_t ooblen = ops->ooblen;
  915. u_char *buf = ops->datbuf;
  916. u_char *oobbuf = ops->oobbuf;
  917. int read = 0, column, thislen;
  918. int oobread = 0, oobcolumn, thisooblen, oobsize;
  919. int ret = 0;
  920. int writesize = this->writesize;
  921. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  922. __func__, (unsigned int) from, (int) len);
  923. if (ops->mode == MTD_OOB_AUTO)
  924. oobsize = this->ecclayout->oobavail;
  925. else
  926. oobsize = mtd->oobsize;
  927. oobcolumn = from & (mtd->oobsize - 1);
  928. /* Do not allow reads past end of device */
  929. if (from + len > mtd->size) {
  930. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  931. __func__);
  932. ops->retlen = 0;
  933. ops->oobretlen = 0;
  934. return -EINVAL;
  935. }
  936. stats = mtd->ecc_stats;
  937. while (read < len) {
  938. cond_resched();
  939. thislen = min_t(int, writesize, len - read);
  940. column = from & (writesize - 1);
  941. if (column + thislen > writesize)
  942. thislen = writesize - column;
  943. if (!onenand_check_bufferram(mtd, from)) {
  944. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  945. ret = this->wait(mtd, FL_READING);
  946. if (unlikely(ret))
  947. ret = onenand_recover_lsb(mtd, from, ret);
  948. onenand_update_bufferram(mtd, from, !ret);
  949. if (ret == -EBADMSG)
  950. ret = 0;
  951. }
  952. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  953. if (oobbuf) {
  954. thisooblen = oobsize - oobcolumn;
  955. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  956. if (ops->mode == MTD_OOB_AUTO)
  957. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  958. else
  959. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  960. oobread += thisooblen;
  961. oobbuf += thisooblen;
  962. oobcolumn = 0;
  963. }
  964. read += thislen;
  965. if (read == len)
  966. break;
  967. from += thislen;
  968. buf += thislen;
  969. }
  970. /*
  971. * Return success, if no ECC failures, else -EBADMSG
  972. * fs driver will take care of that, because
  973. * retlen == desired len and result == -EBADMSG
  974. */
  975. ops->retlen = read;
  976. ops->oobretlen = oobread;
  977. if (ret)
  978. return ret;
  979. if (mtd->ecc_stats.failed - stats.failed)
  980. return -EBADMSG;
  981. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  982. }
  983. /**
  984. * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
  985. * @param mtd MTD device structure
  986. * @param from offset to read from
  987. * @param ops: oob operation description structure
  988. *
  989. * OneNAND read main and/or out-of-band data
  990. */
  991. static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
  992. struct mtd_oob_ops *ops)
  993. {
  994. struct onenand_chip *this = mtd->priv;
  995. struct mtd_ecc_stats stats;
  996. size_t len = ops->len;
  997. size_t ooblen = ops->ooblen;
  998. u_char *buf = ops->datbuf;
  999. u_char *oobbuf = ops->oobbuf;
  1000. int read = 0, column, thislen;
  1001. int oobread = 0, oobcolumn, thisooblen, oobsize;
  1002. int ret = 0, boundary = 0;
  1003. int writesize = this->writesize;
  1004. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1005. __func__, (unsigned int) from, (int) len);
  1006. if (ops->mode == MTD_OOB_AUTO)
  1007. oobsize = this->ecclayout->oobavail;
  1008. else
  1009. oobsize = mtd->oobsize;
  1010. oobcolumn = from & (mtd->oobsize - 1);
  1011. /* Do not allow reads past end of device */
  1012. if ((from + len) > mtd->size) {
  1013. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1014. __func__);
  1015. ops->retlen = 0;
  1016. ops->oobretlen = 0;
  1017. return -EINVAL;
  1018. }
  1019. stats = mtd->ecc_stats;
  1020. /* Read-while-load method */
  1021. /* Do first load to bufferRAM */
  1022. if (read < len) {
  1023. if (!onenand_check_bufferram(mtd, from)) {
  1024. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1025. ret = this->wait(mtd, FL_READING);
  1026. onenand_update_bufferram(mtd, from, !ret);
  1027. if (ret == -EBADMSG)
  1028. ret = 0;
  1029. }
  1030. }
  1031. thislen = min_t(int, writesize, len - read);
  1032. column = from & (writesize - 1);
  1033. if (column + thislen > writesize)
  1034. thislen = writesize - column;
  1035. while (!ret) {
  1036. /* If there is more to load then start next load */
  1037. from += thislen;
  1038. if (read + thislen < len) {
  1039. this->command(mtd, ONENAND_CMD_READ, from, writesize);
  1040. /*
  1041. * Chip boundary handling in DDP
  1042. * Now we issued chip 1 read and pointed chip 1
  1043. * bufferram so we have to point chip 0 bufferram.
  1044. */
  1045. if (ONENAND_IS_DDP(this) &&
  1046. unlikely(from == (this->chipsize >> 1))) {
  1047. this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
  1048. boundary = 1;
  1049. } else
  1050. boundary = 0;
  1051. ONENAND_SET_PREV_BUFFERRAM(this);
  1052. }
  1053. /* While load is going, read from last bufferRAM */
  1054. this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
  1055. /* Read oob area if needed */
  1056. if (oobbuf) {
  1057. thisooblen = oobsize - oobcolumn;
  1058. thisooblen = min_t(int, thisooblen, ooblen - oobread);
  1059. if (ops->mode == MTD_OOB_AUTO)
  1060. onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
  1061. else
  1062. this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
  1063. oobread += thisooblen;
  1064. oobbuf += thisooblen;
  1065. oobcolumn = 0;
  1066. }
  1067. /* See if we are done */
  1068. read += thislen;
  1069. if (read == len)
  1070. break;
  1071. /* Set up for next read from bufferRAM */
  1072. if (unlikely(boundary))
  1073. this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
  1074. ONENAND_SET_NEXT_BUFFERRAM(this);
  1075. buf += thislen;
  1076. thislen = min_t(int, writesize, len - read);
  1077. column = 0;
  1078. cond_resched();
  1079. /* Now wait for load */
  1080. ret = this->wait(mtd, FL_READING);
  1081. onenand_update_bufferram(mtd, from, !ret);
  1082. if (ret == -EBADMSG)
  1083. ret = 0;
  1084. }
  1085. /*
  1086. * Return success, if no ECC failures, else -EBADMSG
  1087. * fs driver will take care of that, because
  1088. * retlen == desired len and result == -EBADMSG
  1089. */
  1090. ops->retlen = read;
  1091. ops->oobretlen = oobread;
  1092. if (ret)
  1093. return ret;
  1094. if (mtd->ecc_stats.failed - stats.failed)
  1095. return -EBADMSG;
  1096. return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
  1097. }
  1098. /**
  1099. * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
  1100. * @param mtd MTD device structure
  1101. * @param from offset to read from
  1102. * @param ops: oob operation description structure
  1103. *
  1104. * OneNAND read out-of-band data from the spare area
  1105. */
  1106. static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
  1107. struct mtd_oob_ops *ops)
  1108. {
  1109. struct onenand_chip *this = mtd->priv;
  1110. struct mtd_ecc_stats stats;
  1111. int read = 0, thislen, column, oobsize;
  1112. size_t len = ops->ooblen;
  1113. mtd_oob_mode_t mode = ops->mode;
  1114. u_char *buf = ops->oobbuf;
  1115. int ret = 0, readcmd;
  1116. from += ops->ooboffs;
  1117. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
  1118. __func__, (unsigned int) from, (int) len);
  1119. /* Initialize return length value */
  1120. ops->oobretlen = 0;
  1121. if (mode == MTD_OOB_AUTO)
  1122. oobsize = this->ecclayout->oobavail;
  1123. else
  1124. oobsize = mtd->oobsize;
  1125. column = from & (mtd->oobsize - 1);
  1126. if (unlikely(column >= oobsize)) {
  1127. printk(KERN_ERR "%s: Attempted to start read outside oob\n",
  1128. __func__);
  1129. return -EINVAL;
  1130. }
  1131. /* Do not allow reads past end of device */
  1132. if (unlikely(from >= mtd->size ||
  1133. column + len > ((mtd->size >> this->page_shift) -
  1134. (from >> this->page_shift)) * oobsize)) {
  1135. printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
  1136. __func__);
  1137. return -EINVAL;
  1138. }
  1139. stats = mtd->ecc_stats;
  1140. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1141. while (read < len) {
  1142. cond_resched();
  1143. thislen = oobsize - column;
  1144. thislen = min_t(int, thislen, len);
  1145. this->command(mtd, readcmd, from, mtd->oobsize);
  1146. onenand_update_bufferram(mtd, from, 0);
  1147. ret = this->wait(mtd, FL_READING);
  1148. if (unlikely(ret))
  1149. ret = onenand_recover_lsb(mtd, from, ret);
  1150. if (ret && ret != -EBADMSG) {
  1151. printk(KERN_ERR "%s: read failed = 0x%x\n",
  1152. __func__, ret);
  1153. break;
  1154. }
  1155. if (mode == MTD_OOB_AUTO)
  1156. onenand_transfer_auto_oob(mtd, buf, column, thislen);
  1157. else
  1158. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1159. read += thislen;
  1160. if (read == len)
  1161. break;
  1162. buf += thislen;
  1163. /* Read more? */
  1164. if (read < len) {
  1165. /* Page size */
  1166. from += mtd->writesize;
  1167. column = 0;
  1168. }
  1169. }
  1170. ops->oobretlen = read;
  1171. if (ret)
  1172. return ret;
  1173. if (mtd->ecc_stats.failed - stats.failed)
  1174. return -EBADMSG;
  1175. return 0;
  1176. }
  1177. /**
  1178. * onenand_read - [MTD Interface] Read data from flash
  1179. * @param mtd MTD device structure
  1180. * @param from offset to read from
  1181. * @param len number of bytes to read
  1182. * @param retlen pointer to variable to store the number of read bytes
  1183. * @param buf the databuffer to put data
  1184. *
  1185. * Read with ecc
  1186. */
  1187. static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
  1188. size_t *retlen, u_char *buf)
  1189. {
  1190. struct onenand_chip *this = mtd->priv;
  1191. struct mtd_oob_ops ops = {
  1192. .len = len,
  1193. .ooblen = 0,
  1194. .datbuf = buf,
  1195. .oobbuf = NULL,
  1196. };
  1197. int ret;
  1198. onenand_get_device(mtd, FL_READING);
  1199. ret = ONENAND_IS_MLC(this) ?
  1200. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  1201. onenand_read_ops_nolock(mtd, from, &ops);
  1202. onenand_release_device(mtd);
  1203. *retlen = ops.retlen;
  1204. return ret;
  1205. }
  1206. /**
  1207. * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
  1208. * @param mtd: MTD device structure
  1209. * @param from: offset to read from
  1210. * @param ops: oob operation description structure
  1211. * Read main and/or out-of-band
  1212. */
  1213. static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
  1214. struct mtd_oob_ops *ops)
  1215. {
  1216. struct onenand_chip *this = mtd->priv;
  1217. int ret;
  1218. switch (ops->mode) {
  1219. case MTD_OOB_PLACE:
  1220. case MTD_OOB_AUTO:
  1221. break;
  1222. case MTD_OOB_RAW:
  1223. /* Not implemented yet */
  1224. default:
  1225. return -EINVAL;
  1226. }
  1227. onenand_get_device(mtd, FL_READING);
  1228. if (ops->datbuf)
  1229. ret = ONENAND_IS_MLC(this) ?
  1230. onenand_mlc_read_ops_nolock(mtd, from, ops) :
  1231. onenand_read_ops_nolock(mtd, from, ops);
  1232. else
  1233. ret = onenand_read_oob_nolock(mtd, from, ops);
  1234. onenand_release_device(mtd);
  1235. return ret;
  1236. }
  1237. /**
  1238. * onenand_bbt_wait - [DEFAULT] wait until the command is done
  1239. * @param mtd MTD device structure
  1240. * @param state state to select the max. timeout value
  1241. *
  1242. * Wait for command done.
  1243. */
  1244. static int onenand_bbt_wait(struct mtd_info *mtd, int state)
  1245. {
  1246. struct onenand_chip *this = mtd->priv;
  1247. unsigned long timeout;
  1248. unsigned int interrupt;
  1249. unsigned int ctrl;
  1250. /* The 20 msec is enough */
  1251. timeout = jiffies + msecs_to_jiffies(20);
  1252. while (time_before(jiffies, timeout)) {
  1253. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1254. if (interrupt & ONENAND_INT_MASTER)
  1255. break;
  1256. }
  1257. /* To get correct interrupt status in timeout case */
  1258. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1259. ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  1260. if (interrupt & ONENAND_INT_READ) {
  1261. int ecc = onenand_read_ecc(this);
  1262. if (ecc & ONENAND_ECC_2BIT_ALL) {
  1263. printk(KERN_WARNING "%s: ecc error = 0x%04x, "
  1264. "controller error 0x%04x\n",
  1265. __func__, ecc, ctrl);
  1266. return ONENAND_BBT_READ_ECC_ERROR;
  1267. }
  1268. } else {
  1269. printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
  1270. __func__, ctrl, interrupt);
  1271. return ONENAND_BBT_READ_FATAL_ERROR;
  1272. }
  1273. /* Initial bad block case: 0x2400 or 0x0400 */
  1274. if (ctrl & ONENAND_CTRL_ERROR) {
  1275. printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
  1276. __func__, ctrl);
  1277. return ONENAND_BBT_READ_ERROR;
  1278. }
  1279. return 0;
  1280. }
  1281. /**
  1282. * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
  1283. * @param mtd MTD device structure
  1284. * @param from offset to read from
  1285. * @param ops oob operation description structure
  1286. *
  1287. * OneNAND read out-of-band data from the spare area for bbt scan
  1288. */
  1289. int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
  1290. struct mtd_oob_ops *ops)
  1291. {
  1292. struct onenand_chip *this = mtd->priv;
  1293. int read = 0, thislen, column;
  1294. int ret = 0, readcmd;
  1295. size_t len = ops->ooblen;
  1296. u_char *buf = ops->oobbuf;
  1297. DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
  1298. __func__, (unsigned int) from, len);
  1299. /* Initialize return value */
  1300. ops->oobretlen = 0;
  1301. /* Do not allow reads past end of device */
  1302. if (unlikely((from + len) > mtd->size)) {
  1303. printk(KERN_ERR "%s: Attempt read beyond end of device\n",
  1304. __func__);
  1305. return ONENAND_BBT_READ_FATAL_ERROR;
  1306. }
  1307. /* Grab the lock and see if the device is available */
  1308. onenand_get_device(mtd, FL_READING);
  1309. column = from & (mtd->oobsize - 1);
  1310. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1311. while (read < len) {
  1312. cond_resched();
  1313. thislen = mtd->oobsize - column;
  1314. thislen = min_t(int, thislen, len);
  1315. this->command(mtd, readcmd, from, mtd->oobsize);
  1316. onenand_update_bufferram(mtd, from, 0);
  1317. ret = this->bbt_wait(mtd, FL_READING);
  1318. if (unlikely(ret))
  1319. ret = onenand_recover_lsb(mtd, from, ret);
  1320. if (ret)
  1321. break;
  1322. this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
  1323. read += thislen;
  1324. if (read == len)
  1325. break;
  1326. buf += thislen;
  1327. /* Read more? */
  1328. if (read < len) {
  1329. /* Update Page size */
  1330. from += this->writesize;
  1331. column = 0;
  1332. }
  1333. }
  1334. /* Deselect and wake up anyone waiting on the device */
  1335. onenand_release_device(mtd);
  1336. ops->oobretlen = read;
  1337. return ret;
  1338. }
  1339. #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
  1340. /**
  1341. * onenand_verify_oob - [GENERIC] verify the oob contents after a write
  1342. * @param mtd MTD device structure
  1343. * @param buf the databuffer to verify
  1344. * @param to offset to read from
  1345. */
  1346. static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
  1347. {
  1348. struct onenand_chip *this = mtd->priv;
  1349. u_char *oob_buf = this->oob_buf;
  1350. int status, i, readcmd;
  1351. readcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
  1352. this->command(mtd, readcmd, to, mtd->oobsize);
  1353. onenand_update_bufferram(mtd, to, 0);
  1354. status = this->wait(mtd, FL_READING);
  1355. if (status)
  1356. return status;
  1357. this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
  1358. for (i = 0; i < mtd->oobsize; i++)
  1359. if (buf[i] != 0xFF && buf[i] != oob_buf[i])
  1360. return -EBADMSG;
  1361. return 0;
  1362. }
  1363. /**
  1364. * onenand_verify - [GENERIC] verify the chip contents after a write
  1365. * @param mtd MTD device structure
  1366. * @param buf the databuffer to verify
  1367. * @param addr offset to read from
  1368. * @param len number of bytes to read and compare
  1369. */
  1370. static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
  1371. {
  1372. struct onenand_chip *this = mtd->priv;
  1373. void __iomem *dataram;
  1374. int ret = 0;
  1375. int thislen, column;
  1376. while (len != 0) {
  1377. thislen = min_t(int, this->writesize, len);
  1378. column = addr & (this->writesize - 1);
  1379. if (column + thislen > this->writesize)
  1380. thislen = this->writesize - column;
  1381. this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
  1382. onenand_update_bufferram(mtd, addr, 0);
  1383. ret = this->wait(mtd, FL_READING);
  1384. if (ret)
  1385. return ret;
  1386. onenand_update_bufferram(mtd, addr, 1);
  1387. dataram = this->base + ONENAND_DATARAM;
  1388. dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
  1389. if (memcmp(buf, dataram + column, thislen))
  1390. return -EBADMSG;
  1391. len -= thislen;
  1392. buf += thislen;
  1393. addr += thislen;
  1394. }
  1395. return 0;
  1396. }
  1397. #else
  1398. #define onenand_verify(...) (0)
  1399. #define onenand_verify_oob(...) (0)
  1400. #endif
  1401. #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
  1402. static void onenand_panic_wait(struct mtd_info *mtd)
  1403. {
  1404. struct onenand_chip *this = mtd->priv;
  1405. unsigned int interrupt;
  1406. int i;
  1407. for (i = 0; i < 2000; i++) {
  1408. interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
  1409. if (interrupt & ONENAND_INT_MASTER)
  1410. break;
  1411. udelay(10);
  1412. }
  1413. }
  1414. /**
  1415. * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
  1416. * @param mtd MTD device structure
  1417. * @param to offset to write to
  1418. * @param len number of bytes to write
  1419. * @param retlen pointer to variable to store the number of written bytes
  1420. * @param buf the data to write
  1421. *
  1422. * Write with ECC
  1423. */
  1424. static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
  1425. size_t *retlen, const u_char *buf)
  1426. {
  1427. struct onenand_chip *this = mtd->priv;
  1428. int column, subpage;
  1429. int written = 0;
  1430. int ret = 0;
  1431. if (this->state == FL_PM_SUSPENDED)
  1432. return -EBUSY;
  1433. /* Wait for any existing operation to clear */
  1434. onenand_panic_wait(mtd);
  1435. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1436. __func__, (unsigned int) to, (int) len);
  1437. /* Initialize retlen, in case of early exit */
  1438. *retlen = 0;
  1439. /* Do not allow writes past end of device */
  1440. if (unlikely((to + len) > mtd->size)) {
  1441. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1442. __func__);
  1443. return -EINVAL;
  1444. }
  1445. /* Reject writes, which are not page aligned */
  1446. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1447. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1448. __func__);
  1449. return -EINVAL;
  1450. }
  1451. column = to & (mtd->writesize - 1);
  1452. /* Loop until all data write */
  1453. while (written < len) {
  1454. int thislen = min_t(int, mtd->writesize - column, len - written);
  1455. u_char *wbuf = (u_char *) buf;
  1456. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1457. /* Partial page write */
  1458. subpage = thislen < mtd->writesize;
  1459. if (subpage) {
  1460. memset(this->page_buf, 0xff, mtd->writesize);
  1461. memcpy(this->page_buf + column, buf, thislen);
  1462. wbuf = this->page_buf;
  1463. }
  1464. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1465. this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
  1466. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1467. onenand_panic_wait(mtd);
  1468. /* In partial page write we don't update bufferram */
  1469. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1470. if (ONENAND_IS_2PLANE(this)) {
  1471. ONENAND_SET_BUFFERRAM1(this);
  1472. onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
  1473. }
  1474. if (ret) {
  1475. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1476. break;
  1477. }
  1478. written += thislen;
  1479. if (written == len)
  1480. break;
  1481. column = 0;
  1482. to += thislen;
  1483. buf += thislen;
  1484. }
  1485. *retlen = written;
  1486. return ret;
  1487. }
  1488. /**
  1489. * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
  1490. * @param mtd MTD device structure
  1491. * @param oob_buf oob buffer
  1492. * @param buf source address
  1493. * @param column oob offset to write to
  1494. * @param thislen oob length to write
  1495. */
  1496. static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
  1497. const u_char *buf, int column, int thislen)
  1498. {
  1499. struct onenand_chip *this = mtd->priv;
  1500. struct nand_oobfree *free;
  1501. int writecol = column;
  1502. int writeend = column + thislen;
  1503. int lastgap = 0;
  1504. unsigned int i;
  1505. free = this->ecclayout->oobfree;
  1506. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1507. if (writecol >= lastgap)
  1508. writecol += free->offset - lastgap;
  1509. if (writeend >= lastgap)
  1510. writeend += free->offset - lastgap;
  1511. lastgap = free->offset + free->length;
  1512. }
  1513. free = this->ecclayout->oobfree;
  1514. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
  1515. int free_end = free->offset + free->length;
  1516. if (free->offset < writeend && free_end > writecol) {
  1517. int st = max_t(int,free->offset,writecol);
  1518. int ed = min_t(int,free_end,writeend);
  1519. int n = ed - st;
  1520. memcpy(oob_buf + st, buf, n);
  1521. buf += n;
  1522. } else if (column == 0)
  1523. break;
  1524. }
  1525. return 0;
  1526. }
  1527. /**
  1528. * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
  1529. * @param mtd MTD device structure
  1530. * @param to offset to write to
  1531. * @param ops oob operation description structure
  1532. *
  1533. * Write main and/or oob with ECC
  1534. */
  1535. static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
  1536. struct mtd_oob_ops *ops)
  1537. {
  1538. struct onenand_chip *this = mtd->priv;
  1539. int written = 0, column, thislen = 0, subpage = 0;
  1540. int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
  1541. int oobwritten = 0, oobcolumn, thisooblen, oobsize;
  1542. size_t len = ops->len;
  1543. size_t ooblen = ops->ooblen;
  1544. const u_char *buf = ops->datbuf;
  1545. const u_char *oob = ops->oobbuf;
  1546. u_char *oobbuf;
  1547. int ret = 0;
  1548. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1549. __func__, (unsigned int) to, (int) len);
  1550. /* Initialize retlen, in case of early exit */
  1551. ops->retlen = 0;
  1552. ops->oobretlen = 0;
  1553. /* Do not allow writes past end of device */
  1554. if (unlikely((to + len) > mtd->size)) {
  1555. printk(KERN_ERR "%s: Attempt write to past end of device\n",
  1556. __func__);
  1557. return -EINVAL;
  1558. }
  1559. /* Reject writes, which are not page aligned */
  1560. if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
  1561. printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
  1562. __func__);
  1563. return -EINVAL;
  1564. }
  1565. /* Check zero length */
  1566. if (!len)
  1567. return 0;
  1568. if (ops->mode == MTD_OOB_AUTO)
  1569. oobsize = this->ecclayout->oobavail;
  1570. else
  1571. oobsize = mtd->oobsize;
  1572. oobcolumn = to & (mtd->oobsize - 1);
  1573. column = to & (mtd->writesize - 1);
  1574. /* Loop until all data write */
  1575. while (1) {
  1576. if (written < len) {
  1577. u_char *wbuf = (u_char *) buf;
  1578. thislen = min_t(int, mtd->writesize - column, len - written);
  1579. thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
  1580. cond_resched();
  1581. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
  1582. /* Partial page write */
  1583. subpage = thislen < mtd->writesize;
  1584. if (subpage) {
  1585. memset(this->page_buf, 0xff, mtd->writesize);
  1586. memcpy(this->page_buf + column, buf, thislen);
  1587. wbuf = this->page_buf;
  1588. }
  1589. this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
  1590. if (oob) {
  1591. oobbuf = this->oob_buf;
  1592. /* We send data to spare ram with oobsize
  1593. * to prevent byte access */
  1594. memset(oobbuf, 0xff, mtd->oobsize);
  1595. if (ops->mode == MTD_OOB_AUTO)
  1596. onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
  1597. else
  1598. memcpy(oobbuf + oobcolumn, oob, thisooblen);
  1599. oobwritten += thisooblen;
  1600. oob += thisooblen;
  1601. oobcolumn = 0;
  1602. } else
  1603. oobbuf = (u_char *) ffchars;
  1604. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1605. } else
  1606. ONENAND_SET_NEXT_BUFFERRAM(this);
  1607. /*
  1608. * 2 PLANE, MLC, and Flex-OneNAND do not support
  1609. * write-while-program feature.
  1610. */
  1611. if (!ONENAND_IS_2PLANE(this) && !first) {
  1612. ONENAND_SET_PREV_BUFFERRAM(this);
  1613. ret = this->wait(mtd, FL_WRITING);
  1614. /* In partial page write we don't update bufferram */
  1615. onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
  1616. if (ret) {
  1617. written -= prevlen;
  1618. printk(KERN_ERR "%s: write failed %d\n",
  1619. __func__, ret);
  1620. break;
  1621. }
  1622. if (written == len) {
  1623. /* Only check verify write turn on */
  1624. ret = onenand_verify(mtd, buf - len, to - len, len);
  1625. if (ret)
  1626. printk(KERN_ERR "%s: verify failed %d\n",
  1627. __func__, ret);
  1628. break;
  1629. }
  1630. ONENAND_SET_NEXT_BUFFERRAM(this);
  1631. }
  1632. this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
  1633. /*
  1634. * 2 PLANE, MLC, and Flex-OneNAND wait here
  1635. */
  1636. if (ONENAND_IS_2PLANE(this)) {
  1637. ret = this->wait(mtd, FL_WRITING);
  1638. /* In partial page write we don't update bufferram */
  1639. onenand_update_bufferram(mtd, to, !ret && !subpage);
  1640. if (ret) {
  1641. printk(KERN_ERR "%s: write failed %d\n",
  1642. __func__, ret);
  1643. break;
  1644. }
  1645. /* Only check verify write turn on */
  1646. ret = onenand_verify(mtd, buf, to, thislen);
  1647. if (ret) {
  1648. printk(KERN_ERR "%s: verify failed %d\n",
  1649. __func__, ret);
  1650. break;
  1651. }
  1652. written += thislen;
  1653. if (written == len)
  1654. break;
  1655. } else
  1656. written += thislen;
  1657. column = 0;
  1658. prev_subpage = subpage;
  1659. prev = to;
  1660. prevlen = thislen;
  1661. to += thislen;
  1662. buf += thislen;
  1663. first = 0;
  1664. }
  1665. /* In error case, clear all bufferrams */
  1666. if (written != len)
  1667. onenand_invalidate_bufferram(mtd, 0, -1);
  1668. ops->retlen = written;
  1669. ops->oobretlen = oobwritten;
  1670. return ret;
  1671. }
  1672. /**
  1673. * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
  1674. * @param mtd MTD device structure
  1675. * @param to offset to write to
  1676. * @param len number of bytes to write
  1677. * @param retlen pointer to variable to store the number of written bytes
  1678. * @param buf the data to write
  1679. * @param mode operation mode
  1680. *
  1681. * OneNAND write out-of-band
  1682. */
  1683. static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  1684. struct mtd_oob_ops *ops)
  1685. {
  1686. struct onenand_chip *this = mtd->priv;
  1687. int column, ret = 0, oobsize;
  1688. int written = 0, oobcmd;
  1689. u_char *oobbuf;
  1690. size_t len = ops->ooblen;
  1691. const u_char *buf = ops->oobbuf;
  1692. mtd_oob_mode_t mode = ops->mode;
  1693. to += ops->ooboffs;
  1694. DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
  1695. __func__, (unsigned int) to, (int) len);
  1696. /* Initialize retlen, in case of early exit */
  1697. ops->oobretlen = 0;
  1698. if (mode == MTD_OOB_AUTO)
  1699. oobsize = this->ecclayout->oobavail;
  1700. else
  1701. oobsize = mtd->oobsize;
  1702. column = to & (mtd->oobsize - 1);
  1703. if (unlikely(column >= oobsize)) {
  1704. printk(KERN_ERR "%s: Attempted to start write outside oob\n",
  1705. __func__);
  1706. return -EINVAL;
  1707. }
  1708. /* For compatibility with NAND: Do not allow write past end of page */
  1709. if (unlikely(column + len > oobsize)) {
  1710. printk(KERN_ERR "%s: Attempt to write past end of page\n",
  1711. __func__);
  1712. return -EINVAL;
  1713. }
  1714. /* Do not allow reads past end of device */
  1715. if (unlikely(to >= mtd->size ||
  1716. column + len > ((mtd->size >> this->page_shift) -
  1717. (to >> this->page_shift)) * oobsize)) {
  1718. printk(KERN_ERR "%s: Attempted to write past end of device\n",
  1719. __func__);
  1720. return -EINVAL;
  1721. }
  1722. oobbuf = this->oob_buf;
  1723. oobcmd = ONENAND_IS_MLC(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
  1724. /* Loop until all data write */
  1725. while (written < len) {
  1726. int thislen = min_t(int, oobsize, len - written);
  1727. cond_resched();
  1728. this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
  1729. /* We send data to spare ram with oobsize
  1730. * to prevent byte access */
  1731. memset(oobbuf, 0xff, mtd->oobsize);
  1732. if (mode == MTD_OOB_AUTO)
  1733. onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
  1734. else
  1735. memcpy(oobbuf + column, buf, thislen);
  1736. this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
  1737. if (ONENAND_IS_MLC(this)) {
  1738. /* Set main area of DataRAM to 0xff*/
  1739. memset(this->page_buf, 0xff, mtd->writesize);
  1740. this->write_bufferram(mtd, ONENAND_DATARAM,
  1741. this->page_buf, 0, mtd->writesize);
  1742. }
  1743. this->command(mtd, oobcmd, to, mtd->oobsize);
  1744. onenand_update_bufferram(mtd, to, 0);
  1745. if (ONENAND_IS_2PLANE(this)) {
  1746. ONENAND_SET_BUFFERRAM1(this);
  1747. onenand_update_bufferram(mtd, to + this->writesize, 0);
  1748. }
  1749. ret = this->wait(mtd, FL_WRITING);
  1750. if (ret) {
  1751. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  1752. break;
  1753. }
  1754. ret = onenand_verify_oob(mtd, oobbuf, to);
  1755. if (ret) {
  1756. printk(KERN_ERR "%s: verify failed %d\n",
  1757. __func__, ret);
  1758. break;
  1759. }
  1760. written += thislen;
  1761. if (written == len)
  1762. break;
  1763. to += mtd->writesize;
  1764. buf += thislen;
  1765. column = 0;
  1766. }
  1767. ops->oobretlen = written;
  1768. return ret;
  1769. }
  1770. /**
  1771. * onenand_write - [MTD Interface] write buffer to FLASH
  1772. * @param mtd MTD device structure
  1773. * @param to offset to write to
  1774. * @param len number of bytes to write
  1775. * @param retlen pointer to variable to store the number of written bytes
  1776. * @param buf the data to write
  1777. *
  1778. * Write with ECC
  1779. */
  1780. static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
  1781. size_t *retlen, const u_char *buf)
  1782. {
  1783. struct mtd_oob_ops ops = {
  1784. .len = len,
  1785. .ooblen = 0,
  1786. .datbuf = (u_char *) buf,
  1787. .oobbuf = NULL,
  1788. };
  1789. int ret;
  1790. onenand_get_device(mtd, FL_WRITING);
  1791. ret = onenand_write_ops_nolock(mtd, to, &ops);
  1792. onenand_release_device(mtd);
  1793. *retlen = ops.retlen;
  1794. return ret;
  1795. }
  1796. /**
  1797. * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
  1798. * @param mtd: MTD device structure
  1799. * @param to: offset to write
  1800. * @param ops: oob operation description structure
  1801. */
  1802. static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
  1803. struct mtd_oob_ops *ops)
  1804. {
  1805. int ret;
  1806. switch (ops->mode) {
  1807. case MTD_OOB_PLACE:
  1808. case MTD_OOB_AUTO:
  1809. break;
  1810. case MTD_OOB_RAW:
  1811. /* Not implemented yet */
  1812. default:
  1813. return -EINVAL;
  1814. }
  1815. onenand_get_device(mtd, FL_WRITING);
  1816. if (ops->datbuf)
  1817. ret = onenand_write_ops_nolock(mtd, to, ops);
  1818. else
  1819. ret = onenand_write_oob_nolock(mtd, to, ops);
  1820. onenand_release_device(mtd);
  1821. return ret;
  1822. }
  1823. /**
  1824. * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
  1825. * @param mtd MTD device structure
  1826. * @param ofs offset from device start
  1827. * @param allowbbt 1, if its allowed to access the bbt area
  1828. *
  1829. * Check, if the block is bad. Either by reading the bad block table or
  1830. * calling of the scan function.
  1831. */
  1832. static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
  1833. {
  1834. struct onenand_chip *this = mtd->priv;
  1835. struct bbm_info *bbm = this->bbm;
  1836. /* Return info from the table */
  1837. return bbm->isbad_bbt(mtd, ofs, allowbbt);
  1838. }
  1839. /**
  1840. * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
  1841. * @param mtd MTD device structure
  1842. * @param instr erase instruction
  1843. * @param region erase region
  1844. * @param block_size erase block size
  1845. *
  1846. * Erase one or more blocks one block at a time
  1847. */
  1848. static int onenand_block_by_block_erase(struct mtd_info *mtd,
  1849. struct erase_info *instr,
  1850. struct mtd_erase_region_info *region,
  1851. unsigned int block_size)
  1852. {
  1853. struct onenand_chip *this = mtd->priv;
  1854. loff_t addr = instr->addr;
  1855. int len = instr->len;
  1856. loff_t region_end = 0;
  1857. int ret = 0;
  1858. if (region) {
  1859. /* region is set for Flex-OneNAND */
  1860. region_end = region->offset + region->erasesize * region->numblocks;
  1861. }
  1862. instr->state = MTD_ERASING;
  1863. /* Loop through the blocks */
  1864. while (len) {
  1865. cond_resched();
  1866. /* Check if we have a bad block, we do not erase bad blocks */
  1867. if (onenand_block_isbad_nolock(mtd, addr, 0)) {
  1868. printk(KERN_WARNING "%s: attempt to erase a bad block "
  1869. "at addr 0x%012llx\n",
  1870. __func__, (unsigned long long) addr);
  1871. instr->state = MTD_ERASE_FAILED;
  1872. return -EIO;
  1873. }
  1874. this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
  1875. onenand_invalidate_bufferram(mtd, addr, block_size);
  1876. ret = this->wait(mtd, FL_ERASING);
  1877. /* Check, if it is write protected */
  1878. if (ret) {
  1879. printk(KERN_ERR "%s: Failed erase, block %d\n",
  1880. __func__, onenand_block(this, addr));
  1881. instr->state = MTD_ERASE_FAILED;
  1882. instr->fail_addr = addr;
  1883. return -EIO;
  1884. }
  1885. len -= block_size;
  1886. addr += block_size;
  1887. if (addr == region_end) {
  1888. if (!len)
  1889. break;
  1890. region++;
  1891. block_size = region->erasesize;
  1892. region_end = region->offset + region->erasesize * region->numblocks;
  1893. if (len & (block_size - 1)) {
  1894. /* FIXME: This should be handled at MTD partitioning level. */
  1895. printk(KERN_ERR "%s: Unaligned address\n",
  1896. __func__);
  1897. return -EIO;
  1898. }
  1899. }
  1900. }
  1901. return 0;
  1902. }
  1903. /**
  1904. * onenand_erase - [MTD Interface] erase block(s)
  1905. * @param mtd MTD device structure
  1906. * @param instr erase instruction
  1907. *
  1908. * Erase one or more blocks
  1909. */
  1910. static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
  1911. {
  1912. struct onenand_chip *this = mtd->priv;
  1913. unsigned int block_size;
  1914. loff_t addr = instr->addr;
  1915. loff_t len = instr->len;
  1916. int ret = 0;
  1917. struct mtd_erase_region_info *region = NULL;
  1918. loff_t region_offset = 0;
  1919. DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
  1920. (unsigned long long) instr->addr, (unsigned long long) instr->len);
  1921. /* Do not allow erase past end of device */
  1922. if (unlikely((len + addr) > mtd->size)) {
  1923. printk(KERN_ERR "%s: Erase past end of device\n", __func__);
  1924. return -EINVAL;
  1925. }
  1926. if (FLEXONENAND(this)) {
  1927. /* Find the eraseregion of this address */
  1928. int i = flexonenand_region(mtd, addr);
  1929. region = &mtd->eraseregions[i];
  1930. block_size = region->erasesize;
  1931. /* Start address within region must align on block boundary.
  1932. * Erase region's start offset is always block start address.
  1933. */
  1934. region_offset = region->offset;
  1935. } else
  1936. block_size = 1 << this->erase_shift;
  1937. /* Start address must align on block boundary */
  1938. if (unlikely((addr - region_offset) & (block_size - 1))) {
  1939. printk(KERN_ERR "%s: Unaligned address\n", __func__);
  1940. return -EINVAL;
  1941. }
  1942. /* Length must align on block boundary */
  1943. if (unlikely(len & (block_size - 1))) {
  1944. printk(KERN_ERR "%s: Length not block aligned\n", __func__);
  1945. return -EINVAL;
  1946. }
  1947. instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
  1948. /* Grab the lock and see if the device is available */
  1949. onenand_get_device(mtd, FL_ERASING);
  1950. ret = onenand_block_by_block_erase(mtd, instr, region, block_size);
  1951. /* Deselect and wake up anyone waiting on the device */
  1952. onenand_release_device(mtd);
  1953. /* Do call back function */
  1954. if (!ret) {
  1955. instr->state = MTD_ERASE_DONE;
  1956. mtd_erase_callback(instr);
  1957. }
  1958. return ret;
  1959. }
  1960. /**
  1961. * onenand_sync - [MTD Interface] sync
  1962. * @param mtd MTD device structure
  1963. *
  1964. * Sync is actually a wait for chip ready function
  1965. */
  1966. static void onenand_sync(struct mtd_info *mtd)
  1967. {
  1968. DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
  1969. /* Grab the lock and see if the device is available */
  1970. onenand_get_device(mtd, FL_SYNCING);
  1971. /* Release it and go back */
  1972. onenand_release_device(mtd);
  1973. }
  1974. /**
  1975. * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
  1976. * @param mtd MTD device structure
  1977. * @param ofs offset relative to mtd start
  1978. *
  1979. * Check whether the block is bad
  1980. */
  1981. static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
  1982. {
  1983. int ret;
  1984. /* Check for invalid offset */
  1985. if (ofs > mtd->size)
  1986. return -EINVAL;
  1987. onenand_get_device(mtd, FL_READING);
  1988. ret = onenand_block_isbad_nolock(mtd, ofs, 0);
  1989. onenand_release_device(mtd);
  1990. return ret;
  1991. }
  1992. /**
  1993. * onenand_default_block_markbad - [DEFAULT] mark a block bad
  1994. * @param mtd MTD device structure
  1995. * @param ofs offset from device start
  1996. *
  1997. * This is the default implementation, which can be overridden by
  1998. * a hardware specific driver.
  1999. */
  2000. static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2001. {
  2002. struct onenand_chip *this = mtd->priv;
  2003. struct bbm_info *bbm = this->bbm;
  2004. u_char buf[2] = {0, 0};
  2005. struct mtd_oob_ops ops = {
  2006. .mode = MTD_OOB_PLACE,
  2007. .ooblen = 2,
  2008. .oobbuf = buf,
  2009. .ooboffs = 0,
  2010. };
  2011. int block;
  2012. /* Get block number */
  2013. block = onenand_block(this, ofs);
  2014. if (bbm->bbt)
  2015. bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
  2016. /* We write two bytes, so we don't have to mess with 16-bit access */
  2017. ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
  2018. /* FIXME : What to do when marking SLC block in partition
  2019. * with MLC erasesize? For now, it is not advisable to
  2020. * create partitions containing both SLC and MLC regions.
  2021. */
  2022. return onenand_write_oob_nolock(mtd, ofs, &ops);
  2023. }
  2024. /**
  2025. * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
  2026. * @param mtd MTD device structure
  2027. * @param ofs offset relative to mtd start
  2028. *
  2029. * Mark the block as bad
  2030. */
  2031. static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
  2032. {
  2033. struct onenand_chip *this = mtd->priv;
  2034. int ret;
  2035. ret = onenand_block_isbad(mtd, ofs);
  2036. if (ret) {
  2037. /* If it was bad already, return success and do nothing */
  2038. if (ret > 0)
  2039. return 0;
  2040. return ret;
  2041. }
  2042. onenand_get_device(mtd, FL_WRITING);
  2043. ret = this->block_markbad(mtd, ofs);
  2044. onenand_release_device(mtd);
  2045. return ret;
  2046. }
  2047. /**
  2048. * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
  2049. * @param mtd MTD device structure
  2050. * @param ofs offset relative to mtd start
  2051. * @param len number of bytes to lock or unlock
  2052. * @param cmd lock or unlock command
  2053. *
  2054. * Lock or unlock one or more blocks
  2055. */
  2056. static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
  2057. {
  2058. struct onenand_chip *this = mtd->priv;
  2059. int start, end, block, value, status;
  2060. int wp_status_mask;
  2061. start = onenand_block(this, ofs);
  2062. end = onenand_block(this, ofs + len) - 1;
  2063. if (cmd == ONENAND_CMD_LOCK)
  2064. wp_status_mask = ONENAND_WP_LS;
  2065. else
  2066. wp_status_mask = ONENAND_WP_US;
  2067. /* Continuous lock scheme */
  2068. if (this->options & ONENAND_HAS_CONT_LOCK) {
  2069. /* Set start block address */
  2070. this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2071. /* Set end block address */
  2072. this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
  2073. /* Write lock command */
  2074. this->command(mtd, cmd, 0, 0);
  2075. /* There's no return value */
  2076. this->wait(mtd, FL_LOCKING);
  2077. /* Sanity check */
  2078. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2079. & ONENAND_CTRL_ONGO)
  2080. continue;
  2081. /* Check lock status */
  2082. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2083. if (!(status & wp_status_mask))
  2084. printk(KERN_ERR "%s: wp status = 0x%x\n",
  2085. __func__, status);
  2086. return 0;
  2087. }
  2088. /* Block lock scheme */
  2089. for (block = start; block < end + 1; block++) {
  2090. /* Set block address */
  2091. value = onenand_block_address(this, block);
  2092. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2093. /* Select DataRAM for DDP */
  2094. value = onenand_bufferram_address(this, block);
  2095. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2096. /* Set start block address */
  2097. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2098. /* Write lock command */
  2099. this->command(mtd, cmd, 0, 0);
  2100. /* There's no return value */
  2101. this->wait(mtd, FL_LOCKING);
  2102. /* Sanity check */
  2103. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2104. & ONENAND_CTRL_ONGO)
  2105. continue;
  2106. /* Check lock status */
  2107. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2108. if (!(status & wp_status_mask))
  2109. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2110. __func__, block, status);
  2111. }
  2112. return 0;
  2113. }
  2114. /**
  2115. * onenand_lock - [MTD Interface] Lock block(s)
  2116. * @param mtd MTD device structure
  2117. * @param ofs offset relative to mtd start
  2118. * @param len number of bytes to unlock
  2119. *
  2120. * Lock one or more blocks
  2121. */
  2122. static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2123. {
  2124. int ret;
  2125. onenand_get_device(mtd, FL_LOCKING);
  2126. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
  2127. onenand_release_device(mtd);
  2128. return ret;
  2129. }
  2130. /**
  2131. * onenand_unlock - [MTD Interface] Unlock block(s)
  2132. * @param mtd MTD device structure
  2133. * @param ofs offset relative to mtd start
  2134. * @param len number of bytes to unlock
  2135. *
  2136. * Unlock one or more blocks
  2137. */
  2138. static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
  2139. {
  2140. int ret;
  2141. onenand_get_device(mtd, FL_LOCKING);
  2142. ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2143. onenand_release_device(mtd);
  2144. return ret;
  2145. }
  2146. /**
  2147. * onenand_check_lock_status - [OneNAND Interface] Check lock status
  2148. * @param this onenand chip data structure
  2149. *
  2150. * Check lock status
  2151. */
  2152. static int onenand_check_lock_status(struct onenand_chip *this)
  2153. {
  2154. unsigned int value, block, status;
  2155. unsigned int end;
  2156. end = this->chipsize >> this->erase_shift;
  2157. for (block = 0; block < end; block++) {
  2158. /* Set block address */
  2159. value = onenand_block_address(this, block);
  2160. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
  2161. /* Select DataRAM for DDP */
  2162. value = onenand_bufferram_address(this, block);
  2163. this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
  2164. /* Set start block address */
  2165. this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2166. /* Check lock status */
  2167. status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
  2168. if (!(status & ONENAND_WP_US)) {
  2169. printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
  2170. __func__, block, status);
  2171. return 0;
  2172. }
  2173. }
  2174. return 1;
  2175. }
  2176. /**
  2177. * onenand_unlock_all - [OneNAND Interface] unlock all blocks
  2178. * @param mtd MTD device structure
  2179. *
  2180. * Unlock all blocks
  2181. */
  2182. static void onenand_unlock_all(struct mtd_info *mtd)
  2183. {
  2184. struct onenand_chip *this = mtd->priv;
  2185. loff_t ofs = 0;
  2186. loff_t len = mtd->size;
  2187. if (this->options & ONENAND_HAS_UNLOCK_ALL) {
  2188. /* Set start block address */
  2189. this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
  2190. /* Write unlock command */
  2191. this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
  2192. /* There's no return value */
  2193. this->wait(mtd, FL_LOCKING);
  2194. /* Sanity check */
  2195. while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
  2196. & ONENAND_CTRL_ONGO)
  2197. continue;
  2198. /* Don't check lock status */
  2199. if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
  2200. return;
  2201. /* Check lock status */
  2202. if (onenand_check_lock_status(this))
  2203. return;
  2204. /* Workaround for all block unlock in DDP */
  2205. if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
  2206. /* All blocks on another chip */
  2207. ofs = this->chipsize >> 1;
  2208. len = this->chipsize >> 1;
  2209. }
  2210. }
  2211. onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
  2212. }
  2213. #ifdef CONFIG_MTD_ONENAND_OTP
  2214. /**
  2215. * onenand_otp_command - Send OTP specific command to OneNAND device
  2216. * @param mtd MTD device structure
  2217. * @param cmd the command to be sent
  2218. * @param addr offset to read from or write to
  2219. * @param len number of bytes to read or write
  2220. */
  2221. static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
  2222. size_t len)
  2223. {
  2224. struct onenand_chip *this = mtd->priv;
  2225. int value, block, page;
  2226. /* Address translation */
  2227. switch (cmd) {
  2228. case ONENAND_CMD_OTP_ACCESS:
  2229. block = (int) (addr >> this->erase_shift);
  2230. page = -1;
  2231. break;
  2232. default:
  2233. block = (int) (addr >> this->erase_shift);
  2234. page = (int) (addr >> this->page_shift);
  2235. if (ONENAND_IS_2PLANE(this)) {
  2236. /* Make the even block number */
  2237. block &= ~1;
  2238. /* Is it the odd plane? */
  2239. if (addr & this->writesize)
  2240. block++;
  2241. page >>= 1;
  2242. }
  2243. page &= this->page_mask;
  2244. break;
  2245. }
  2246. if (block != -1) {
  2247. /* Write 'DFS, FBA' of Flash */
  2248. value = onenand_block_address(this, block);
  2249. this->write_word(value, this->base +
  2250. ONENAND_REG_START_ADDRESS1);
  2251. }
  2252. if (page != -1) {
  2253. /* Now we use page size operation */
  2254. int sectors = 4, count = 4;
  2255. int dataram;
  2256. switch (cmd) {
  2257. default:
  2258. if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
  2259. cmd = ONENAND_CMD_2X_PROG;
  2260. dataram = ONENAND_CURRENT_BUFFERRAM(this);
  2261. break;
  2262. }
  2263. /* Write 'FPA, FSA' of Flash */
  2264. value = onenand_page_address(page, sectors);
  2265. this->write_word(value, this->base +
  2266. ONENAND_REG_START_ADDRESS8);
  2267. /* Write 'BSA, BSC' of DataRAM */
  2268. value = onenand_buffer_address(dataram, sectors, count);
  2269. this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
  2270. }
  2271. /* Interrupt clear */
  2272. this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
  2273. /* Write command */
  2274. this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
  2275. return 0;
  2276. }
  2277. /**
  2278. * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
  2279. * @param mtd MTD device structure
  2280. * @param to offset to write to
  2281. * @param len number of bytes to write
  2282. * @param retlen pointer to variable to store the number of written bytes
  2283. * @param buf the data to write
  2284. *
  2285. * OneNAND write out-of-band only for OTP
  2286. */
  2287. static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
  2288. struct mtd_oob_ops *ops)
  2289. {
  2290. struct onenand_chip *this = mtd->priv;
  2291. int column, ret = 0, oobsize;
  2292. int written = 0;
  2293. u_char *oobbuf;
  2294. size_t len = ops->ooblen;
  2295. const u_char *buf = ops->oobbuf;
  2296. int block, value, status;
  2297. to += ops->ooboffs;
  2298. /* Initialize retlen, in case of early exit */
  2299. ops->oobretlen = 0;
  2300. oobsize = mtd->oobsize;
  2301. column = to & (mtd->oobsize - 1);
  2302. oobbuf = this->oob_buf;
  2303. /* Loop until all data write */
  2304. while (written < len) {
  2305. int thislen = min_t(int, oobsize, len - written);
  2306. cond_resched();
  2307. block = (int) (to >> this->erase_shift);
  2308. /*
  2309. * Write 'DFS, FBA' of Flash
  2310. * Add: F100h DQ=DFS, FBA
  2311. */
  2312. value = onenand_block_address(this, block);
  2313. this->write_word(value, this->base +
  2314. ONENAND_REG_START_ADDRESS1);
  2315. /*
  2316. * Select DataRAM for DDP
  2317. * Add: F101h DQ=DBS
  2318. */
  2319. value = onenand_bufferram_address(this, block);
  2320. this->write_word(value, this->base +
  2321. ONENAND_REG_START_ADDRESS2);
  2322. ONENAND_SET_NEXT_BUFFERRAM(this);
  2323. /*
  2324. * Enter OTP access mode
  2325. */
  2326. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2327. this->wait(mtd, FL_OTPING);
  2328. /* We send data to spare ram with oobsize
  2329. * to prevent byte access */
  2330. memcpy(oobbuf + column, buf, thislen);
  2331. /*
  2332. * Write Data into DataRAM
  2333. * Add: 8th Word
  2334. * in sector0/spare/page0
  2335. * DQ=XXFCh
  2336. */
  2337. this->write_bufferram(mtd, ONENAND_SPARERAM,
  2338. oobbuf, 0, mtd->oobsize);
  2339. onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
  2340. onenand_update_bufferram(mtd, to, 0);
  2341. if (ONENAND_IS_2PLANE(this)) {
  2342. ONENAND_SET_BUFFERRAM1(this);
  2343. onenand_update_bufferram(mtd, to + this->writesize, 0);
  2344. }
  2345. ret = this->wait(mtd, FL_WRITING);
  2346. if (ret) {
  2347. printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
  2348. break;
  2349. }
  2350. /* Exit OTP access mode */
  2351. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2352. this->wait(mtd, FL_RESETING);
  2353. status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
  2354. status &= 0x60;
  2355. if (status == 0x60) {
  2356. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2357. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2358. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2359. } else if (status == 0x20) {
  2360. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2361. printk(KERN_DEBUG "1st Block\tLOCKED\n");
  2362. printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
  2363. } else if (status == 0x40) {
  2364. printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
  2365. printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
  2366. printk(KERN_DEBUG "OTP Block\tLOCKED\n");
  2367. } else {
  2368. printk(KERN_DEBUG "Reboot to check\n");
  2369. }
  2370. written += thislen;
  2371. if (written == len)
  2372. break;
  2373. to += mtd->writesize;
  2374. buf += thislen;
  2375. column = 0;
  2376. }
  2377. ops->oobretlen = written;
  2378. return ret;
  2379. }
  2380. /* Internal OTP operation */
  2381. typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
  2382. size_t *retlen, u_char *buf);
  2383. /**
  2384. * do_otp_read - [DEFAULT] Read OTP block area
  2385. * @param mtd MTD device structure
  2386. * @param from The offset to read
  2387. * @param len number of bytes to read
  2388. * @param retlen pointer to variable to store the number of readbytes
  2389. * @param buf the databuffer to put/get data
  2390. *
  2391. * Read OTP block area.
  2392. */
  2393. static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
  2394. size_t *retlen, u_char *buf)
  2395. {
  2396. struct onenand_chip *this = mtd->priv;
  2397. struct mtd_oob_ops ops = {
  2398. .len = len,
  2399. .ooblen = 0,
  2400. .datbuf = buf,
  2401. .oobbuf = NULL,
  2402. };
  2403. int ret;
  2404. /* Enter OTP access mode */
  2405. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2406. this->wait(mtd, FL_OTPING);
  2407. ret = ONENAND_IS_MLC(this) ?
  2408. onenand_mlc_read_ops_nolock(mtd, from, &ops) :
  2409. onenand_read_ops_nolock(mtd, from, &ops);
  2410. /* Exit OTP access mode */
  2411. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2412. this->wait(mtd, FL_RESETING);
  2413. return ret;
  2414. }
  2415. /**
  2416. * do_otp_write - [DEFAULT] Write OTP block area
  2417. * @param mtd MTD device structure
  2418. * @param to The offset to write
  2419. * @param len number of bytes to write
  2420. * @param retlen pointer to variable to store the number of write bytes
  2421. * @param buf the databuffer to put/get data
  2422. *
  2423. * Write OTP block area.
  2424. */
  2425. static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
  2426. size_t *retlen, u_char *buf)
  2427. {
  2428. struct onenand_chip *this = mtd->priv;
  2429. unsigned char *pbuf = buf;
  2430. int ret;
  2431. struct mtd_oob_ops ops;
  2432. /* Force buffer page aligned */
  2433. if (len < mtd->writesize) {
  2434. memcpy(this->page_buf, buf, len);
  2435. memset(this->page_buf + len, 0xff, mtd->writesize - len);
  2436. pbuf = this->page_buf;
  2437. len = mtd->writesize;
  2438. }
  2439. /* Enter OTP access mode */
  2440. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2441. this->wait(mtd, FL_OTPING);
  2442. ops.len = len;
  2443. ops.ooblen = 0;
  2444. ops.datbuf = pbuf;
  2445. ops.oobbuf = NULL;
  2446. ret = onenand_write_ops_nolock(mtd, to, &ops);
  2447. *retlen = ops.retlen;
  2448. /* Exit OTP access mode */
  2449. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2450. this->wait(mtd, FL_RESETING);
  2451. return ret;
  2452. }
  2453. /**
  2454. * do_otp_lock - [DEFAULT] Lock OTP block area
  2455. * @param mtd MTD device structure
  2456. * @param from The offset to lock
  2457. * @param len number of bytes to lock
  2458. * @param retlen pointer to variable to store the number of lock bytes
  2459. * @param buf the databuffer to put/get data
  2460. *
  2461. * Lock OTP block area.
  2462. */
  2463. static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
  2464. size_t *retlen, u_char *buf)
  2465. {
  2466. struct onenand_chip *this = mtd->priv;
  2467. struct mtd_oob_ops ops;
  2468. int ret;
  2469. if (FLEXONENAND(this)) {
  2470. /* Enter OTP access mode */
  2471. this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
  2472. this->wait(mtd, FL_OTPING);
  2473. /*
  2474. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2475. * main area of page 49.
  2476. */
  2477. ops.len = mtd->writesize;
  2478. ops.ooblen = 0;
  2479. ops.datbuf = buf;
  2480. ops.oobbuf = NULL;
  2481. ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
  2482. *retlen = ops.retlen;
  2483. /* Exit OTP access mode */
  2484. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2485. this->wait(mtd, FL_RESETING);
  2486. } else {
  2487. ops.mode = MTD_OOB_PLACE;
  2488. ops.ooblen = len;
  2489. ops.oobbuf = buf;
  2490. ops.ooboffs = 0;
  2491. ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
  2492. *retlen = ops.oobretlen;
  2493. }
  2494. return ret;
  2495. }
  2496. /**
  2497. * onenand_otp_walk - [DEFAULT] Handle OTP operation
  2498. * @param mtd MTD device structure
  2499. * @param from The offset to read/write
  2500. * @param len number of bytes to read/write
  2501. * @param retlen pointer to variable to store the number of read bytes
  2502. * @param buf the databuffer to put/get data
  2503. * @param action do given action
  2504. * @param mode specify user and factory
  2505. *
  2506. * Handle OTP operation.
  2507. */
  2508. static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
  2509. size_t *retlen, u_char *buf,
  2510. otp_op_t action, int mode)
  2511. {
  2512. struct onenand_chip *this = mtd->priv;
  2513. int otp_pages;
  2514. int density;
  2515. int ret = 0;
  2516. *retlen = 0;
  2517. density = onenand_get_density(this->device_id);
  2518. if (density < ONENAND_DEVICE_DENSITY_512Mb)
  2519. otp_pages = 20;
  2520. else
  2521. otp_pages = 50;
  2522. if (mode == MTD_OTP_FACTORY) {
  2523. from += mtd->writesize * otp_pages;
  2524. otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
  2525. }
  2526. /* Check User/Factory boundary */
  2527. if (mode == MTD_OTP_USER) {
  2528. if (((mtd->writesize * otp_pages) - (from + len)) < 0)
  2529. return 0;
  2530. } else {
  2531. if (((mtd->writesize * otp_pages) - len) < 0)
  2532. return 0;
  2533. }
  2534. onenand_get_device(mtd, FL_OTPING);
  2535. while (len > 0 && otp_pages > 0) {
  2536. if (!action) { /* OTP Info functions */
  2537. struct otp_info *otpinfo;
  2538. len -= sizeof(struct otp_info);
  2539. if (len <= 0) {
  2540. ret = -ENOSPC;
  2541. break;
  2542. }
  2543. otpinfo = (struct otp_info *) buf;
  2544. otpinfo->start = from;
  2545. otpinfo->length = mtd->writesize;
  2546. otpinfo->locked = 0;
  2547. from += mtd->writesize;
  2548. buf += sizeof(struct otp_info);
  2549. *retlen += sizeof(struct otp_info);
  2550. } else {
  2551. size_t tmp_retlen;
  2552. ret = action(mtd, from, len, &tmp_retlen, buf);
  2553. buf += tmp_retlen;
  2554. len -= tmp_retlen;
  2555. *retlen += tmp_retlen;
  2556. if (ret)
  2557. break;
  2558. }
  2559. otp_pages--;
  2560. }
  2561. onenand_release_device(mtd);
  2562. return ret;
  2563. }
  2564. /**
  2565. * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
  2566. * @param mtd MTD device structure
  2567. * @param buf the databuffer to put/get data
  2568. * @param len number of bytes to read
  2569. *
  2570. * Read factory OTP info.
  2571. */
  2572. static int onenand_get_fact_prot_info(struct mtd_info *mtd,
  2573. struct otp_info *buf, size_t len)
  2574. {
  2575. size_t retlen;
  2576. int ret;
  2577. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
  2578. return ret ? : retlen;
  2579. }
  2580. /**
  2581. * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
  2582. * @param mtd MTD device structure
  2583. * @param from The offset to read
  2584. * @param len number of bytes to read
  2585. * @param retlen pointer to variable to store the number of read bytes
  2586. * @param buf the databuffer to put/get data
  2587. *
  2588. * Read factory OTP area.
  2589. */
  2590. static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
  2591. size_t len, size_t *retlen, u_char *buf)
  2592. {
  2593. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
  2594. }
  2595. /**
  2596. * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
  2597. * @param mtd MTD device structure
  2598. * @param buf the databuffer to put/get data
  2599. * @param len number of bytes to read
  2600. *
  2601. * Read user OTP info.
  2602. */
  2603. static int onenand_get_user_prot_info(struct mtd_info *mtd,
  2604. struct otp_info *buf, size_t len)
  2605. {
  2606. size_t retlen;
  2607. int ret;
  2608. ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
  2609. return ret ? : retlen;
  2610. }
  2611. /**
  2612. * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
  2613. * @param mtd MTD device structure
  2614. * @param from The offset to read
  2615. * @param len number of bytes to read
  2616. * @param retlen pointer to variable to store the number of read bytes
  2617. * @param buf the databuffer to put/get data
  2618. *
  2619. * Read user OTP area.
  2620. */
  2621. static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2622. size_t len, size_t *retlen, u_char *buf)
  2623. {
  2624. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
  2625. }
  2626. /**
  2627. * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
  2628. * @param mtd MTD device structure
  2629. * @param from The offset to write
  2630. * @param len number of bytes to write
  2631. * @param retlen pointer to variable to store the number of write bytes
  2632. * @param buf the databuffer to put/get data
  2633. *
  2634. * Write user OTP area.
  2635. */
  2636. static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2637. size_t len, size_t *retlen, u_char *buf)
  2638. {
  2639. return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
  2640. }
  2641. /**
  2642. * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
  2643. * @param mtd MTD device structure
  2644. * @param from The offset to lock
  2645. * @param len number of bytes to unlock
  2646. *
  2647. * Write lock mark on spare area in page 0 in OTP block
  2648. */
  2649. static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
  2650. size_t len)
  2651. {
  2652. struct onenand_chip *this = mtd->priv;
  2653. u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
  2654. size_t retlen;
  2655. int ret;
  2656. unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
  2657. memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
  2658. : mtd->oobsize);
  2659. /*
  2660. * Write lock mark to 8th word of sector0 of page0 of the spare0.
  2661. * We write 16 bytes spare area instead of 2 bytes.
  2662. * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
  2663. * main area of page 49.
  2664. */
  2665. from = 0;
  2666. len = FLEXONENAND(this) ? mtd->writesize : 16;
  2667. /*
  2668. * Note: OTP lock operation
  2669. * OTP block : 0xXXFC XX 1111 1100
  2670. * 1st block : 0xXXF3 (If chip support) XX 1111 0011
  2671. * Both : 0xXXF0 (If chip support) XX 1111 0000
  2672. */
  2673. if (FLEXONENAND(this))
  2674. otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
  2675. /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
  2676. if (otp == 1)
  2677. buf[otp_lock_offset] = 0xFC;
  2678. else if (otp == 2)
  2679. buf[otp_lock_offset] = 0xF3;
  2680. else if (otp == 3)
  2681. buf[otp_lock_offset] = 0xF0;
  2682. else if (otp != 0)
  2683. printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
  2684. ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
  2685. return ret ? : retlen;
  2686. }
  2687. #endif /* CONFIG_MTD_ONENAND_OTP */
  2688. /**
  2689. * onenand_check_features - Check and set OneNAND features
  2690. * @param mtd MTD data structure
  2691. *
  2692. * Check and set OneNAND features
  2693. * - lock scheme
  2694. * - two plane
  2695. */
  2696. static void onenand_check_features(struct mtd_info *mtd)
  2697. {
  2698. struct onenand_chip *this = mtd->priv;
  2699. unsigned int density, process;
  2700. /* Lock scheme depends on density and process */
  2701. density = onenand_get_density(this->device_id);
  2702. process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
  2703. /* Lock scheme */
  2704. switch (density) {
  2705. case ONENAND_DEVICE_DENSITY_4Gb:
  2706. this->options |= ONENAND_HAS_2PLANE;
  2707. case ONENAND_DEVICE_DENSITY_2Gb:
  2708. /* 2Gb DDP does not have 2 plane */
  2709. if (!ONENAND_IS_DDP(this))
  2710. this->options |= ONENAND_HAS_2PLANE;
  2711. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2712. case ONENAND_DEVICE_DENSITY_1Gb:
  2713. /* A-Die has all block unlock */
  2714. if (process)
  2715. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2716. break;
  2717. default:
  2718. /* Some OneNAND has continuous lock scheme */
  2719. if (!process)
  2720. this->options |= ONENAND_HAS_CONT_LOCK;
  2721. break;
  2722. }
  2723. if (ONENAND_IS_MLC(this))
  2724. this->options &= ~ONENAND_HAS_2PLANE;
  2725. if (FLEXONENAND(this)) {
  2726. this->options &= ~ONENAND_HAS_CONT_LOCK;
  2727. this->options |= ONENAND_HAS_UNLOCK_ALL;
  2728. }
  2729. if (this->options & ONENAND_HAS_CONT_LOCK)
  2730. printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
  2731. if (this->options & ONENAND_HAS_UNLOCK_ALL)
  2732. printk(KERN_DEBUG "Chip support all block unlock\n");
  2733. if (this->options & ONENAND_HAS_2PLANE)
  2734. printk(KERN_DEBUG "Chip has 2 plane\n");
  2735. }
  2736. /**
  2737. * onenand_print_device_info - Print device & version ID
  2738. * @param device device ID
  2739. * @param version version ID
  2740. *
  2741. * Print device & version ID
  2742. */
  2743. static void onenand_print_device_info(int device, int version)
  2744. {
  2745. int vcc, demuxed, ddp, density, flexonenand;
  2746. vcc = device & ONENAND_DEVICE_VCC_MASK;
  2747. demuxed = device & ONENAND_DEVICE_IS_DEMUX;
  2748. ddp = device & ONENAND_DEVICE_IS_DDP;
  2749. density = onenand_get_density(device);
  2750. flexonenand = device & DEVICE_IS_FLEXONENAND;
  2751. printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
  2752. demuxed ? "" : "Muxed ",
  2753. flexonenand ? "Flex-" : "",
  2754. ddp ? "(DDP)" : "",
  2755. (16 << density),
  2756. vcc ? "2.65/3.3" : "1.8",
  2757. device);
  2758. printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
  2759. }
  2760. static const struct onenand_manufacturers onenand_manuf_ids[] = {
  2761. {ONENAND_MFR_SAMSUNG, "Samsung"},
  2762. {ONENAND_MFR_NUMONYX, "Numonyx"},
  2763. };
  2764. /**
  2765. * onenand_check_maf - Check manufacturer ID
  2766. * @param manuf manufacturer ID
  2767. *
  2768. * Check manufacturer ID
  2769. */
  2770. static int onenand_check_maf(int manuf)
  2771. {
  2772. int size = ARRAY_SIZE(onenand_manuf_ids);
  2773. char *name;
  2774. int i;
  2775. for (i = 0; i < size; i++)
  2776. if (manuf == onenand_manuf_ids[i].id)
  2777. break;
  2778. if (i < size)
  2779. name = onenand_manuf_ids[i].name;
  2780. else
  2781. name = "Unknown";
  2782. printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
  2783. return (i == size);
  2784. }
  2785. /**
  2786. * flexonenand_get_boundary - Reads the SLC boundary
  2787. * @param onenand_info - onenand info structure
  2788. **/
  2789. static int flexonenand_get_boundary(struct mtd_info *mtd)
  2790. {
  2791. struct onenand_chip *this = mtd->priv;
  2792. unsigned die, bdry;
  2793. int ret, syscfg, locked;
  2794. /* Disable ECC */
  2795. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  2796. this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
  2797. for (die = 0; die < this->dies; die++) {
  2798. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2799. this->wait(mtd, FL_SYNCING);
  2800. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2801. ret = this->wait(mtd, FL_READING);
  2802. bdry = this->read_word(this->base + ONENAND_DATARAM);
  2803. if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
  2804. locked = 0;
  2805. else
  2806. locked = 1;
  2807. this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
  2808. this->command(mtd, ONENAND_CMD_RESET, 0, 0);
  2809. ret = this->wait(mtd, FL_RESETING);
  2810. printk(KERN_INFO "Die %d boundary: %d%s\n", die,
  2811. this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
  2812. }
  2813. /* Enable ECC */
  2814. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  2815. return 0;
  2816. }
  2817. /**
  2818. * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
  2819. * boundary[], diesize[], mtd->size, mtd->erasesize
  2820. * @param mtd - MTD device structure
  2821. */
  2822. static void flexonenand_get_size(struct mtd_info *mtd)
  2823. {
  2824. struct onenand_chip *this = mtd->priv;
  2825. int die, i, eraseshift, density;
  2826. int blksperdie, maxbdry;
  2827. loff_t ofs;
  2828. density = onenand_get_density(this->device_id);
  2829. blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
  2830. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2831. maxbdry = blksperdie - 1;
  2832. eraseshift = this->erase_shift - 1;
  2833. mtd->numeraseregions = this->dies << 1;
  2834. /* This fills up the device boundary */
  2835. flexonenand_get_boundary(mtd);
  2836. die = ofs = 0;
  2837. i = -1;
  2838. for (; die < this->dies; die++) {
  2839. if (!die || this->boundary[die-1] != maxbdry) {
  2840. i++;
  2841. mtd->eraseregions[i].offset = ofs;
  2842. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  2843. mtd->eraseregions[i].numblocks =
  2844. this->boundary[die] + 1;
  2845. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  2846. eraseshift++;
  2847. } else {
  2848. mtd->numeraseregions -= 1;
  2849. mtd->eraseregions[i].numblocks +=
  2850. this->boundary[die] + 1;
  2851. ofs += (this->boundary[die] + 1) << (eraseshift - 1);
  2852. }
  2853. if (this->boundary[die] != maxbdry) {
  2854. i++;
  2855. mtd->eraseregions[i].offset = ofs;
  2856. mtd->eraseregions[i].erasesize = 1 << eraseshift;
  2857. mtd->eraseregions[i].numblocks = maxbdry ^
  2858. this->boundary[die];
  2859. ofs += mtd->eraseregions[i].numblocks << eraseshift;
  2860. eraseshift--;
  2861. } else
  2862. mtd->numeraseregions -= 1;
  2863. }
  2864. /* Expose MLC erase size except when all blocks are SLC */
  2865. mtd->erasesize = 1 << this->erase_shift;
  2866. if (mtd->numeraseregions == 1)
  2867. mtd->erasesize >>= 1;
  2868. printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
  2869. for (i = 0; i < mtd->numeraseregions; i++)
  2870. printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
  2871. " numblocks: %04u]\n",
  2872. (unsigned int) mtd->eraseregions[i].offset,
  2873. mtd->eraseregions[i].erasesize,
  2874. mtd->eraseregions[i].numblocks);
  2875. for (die = 0, mtd->size = 0; die < this->dies; die++) {
  2876. this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
  2877. this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
  2878. << (this->erase_shift - 1);
  2879. mtd->size += this->diesize[die];
  2880. }
  2881. }
  2882. /**
  2883. * flexonenand_check_blocks_erased - Check if blocks are erased
  2884. * @param mtd_info - mtd info structure
  2885. * @param start - first erase block to check
  2886. * @param end - last erase block to check
  2887. *
  2888. * Converting an unerased block from MLC to SLC
  2889. * causes byte values to change. Since both data and its ECC
  2890. * have changed, reads on the block give uncorrectable error.
  2891. * This might lead to the block being detected as bad.
  2892. *
  2893. * Avoid this by ensuring that the block to be converted is
  2894. * erased.
  2895. */
  2896. static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
  2897. {
  2898. struct onenand_chip *this = mtd->priv;
  2899. int i, ret;
  2900. int block;
  2901. struct mtd_oob_ops ops = {
  2902. .mode = MTD_OOB_PLACE,
  2903. .ooboffs = 0,
  2904. .ooblen = mtd->oobsize,
  2905. .datbuf = NULL,
  2906. .oobbuf = this->oob_buf,
  2907. };
  2908. loff_t addr;
  2909. printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
  2910. for (block = start; block <= end; block++) {
  2911. addr = flexonenand_addr(this, block);
  2912. if (onenand_block_isbad_nolock(mtd, addr, 0))
  2913. continue;
  2914. /*
  2915. * Since main area write results in ECC write to spare,
  2916. * it is sufficient to check only ECC bytes for change.
  2917. */
  2918. ret = onenand_read_oob_nolock(mtd, addr, &ops);
  2919. if (ret)
  2920. return ret;
  2921. for (i = 0; i < mtd->oobsize; i++)
  2922. if (this->oob_buf[i] != 0xff)
  2923. break;
  2924. if (i != mtd->oobsize) {
  2925. printk(KERN_WARNING "%s: Block %d not erased.\n",
  2926. __func__, block);
  2927. return 1;
  2928. }
  2929. }
  2930. return 0;
  2931. }
  2932. /**
  2933. * flexonenand_set_boundary - Writes the SLC boundary
  2934. * @param mtd - mtd info structure
  2935. */
  2936. int flexonenand_set_boundary(struct mtd_info *mtd, int die,
  2937. int boundary, int lock)
  2938. {
  2939. struct onenand_chip *this = mtd->priv;
  2940. int ret, density, blksperdie, old, new, thisboundary;
  2941. loff_t addr;
  2942. /* Change only once for SDP Flex-OneNAND */
  2943. if (die && (!ONENAND_IS_DDP(this)))
  2944. return 0;
  2945. /* boundary value of -1 indicates no required change */
  2946. if (boundary < 0 || boundary == this->boundary[die])
  2947. return 0;
  2948. density = onenand_get_density(this->device_id);
  2949. blksperdie = ((16 << density) << 20) >> this->erase_shift;
  2950. blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
  2951. if (boundary >= blksperdie) {
  2952. printk(KERN_ERR "%s: Invalid boundary value. "
  2953. "Boundary not changed.\n", __func__);
  2954. return -EINVAL;
  2955. }
  2956. /* Check if converting blocks are erased */
  2957. old = this->boundary[die] + (die * this->density_mask);
  2958. new = boundary + (die * this->density_mask);
  2959. ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
  2960. if (ret) {
  2961. printk(KERN_ERR "%s: Please erase blocks "
  2962. "before boundary change\n", __func__);
  2963. return ret;
  2964. }
  2965. this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
  2966. this->wait(mtd, FL_SYNCING);
  2967. /* Check is boundary is locked */
  2968. this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
  2969. ret = this->wait(mtd, FL_READING);
  2970. thisboundary = this->read_word(this->base + ONENAND_DATARAM);
  2971. if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
  2972. printk(KERN_ERR "%s: boundary locked\n", __func__);
  2973. ret = 1;
  2974. goto out;
  2975. }
  2976. printk(KERN_INFO "Changing die %d boundary: %d%s\n",
  2977. die, boundary, lock ? "(Locked)" : "(Unlocked)");
  2978. addr = die ? this->diesize[0] : 0;
  2979. boundary &= FLEXONENAND_PI_MASK;
  2980. boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
  2981. this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
  2982. ret = this->wait(mtd, FL_ERASING);
  2983. if (ret) {
  2984. printk(KERN_ERR "%s: flexonenand_set_boundary: "
  2985. "Failed PI erase for Die %d\n", __func__, die);
  2986. goto out;
  2987. }
  2988. this->write_word(boundary, this->base + ONENAND_DATARAM);
  2989. this->command(mtd, ONENAND_CMD_PROG, addr, 0);
  2990. ret = this->wait(mtd, FL_WRITING);
  2991. if (ret) {
  2992. printk(KERN_ERR "%s: Failed PI write for Die %d\n",
  2993. __func__, die);
  2994. goto out;
  2995. }
  2996. this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
  2997. ret = this->wait(mtd, FL_WRITING);
  2998. out:
  2999. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
  3000. this->wait(mtd, FL_RESETING);
  3001. if (!ret)
  3002. /* Recalculate device size on boundary change*/
  3003. flexonenand_get_size(mtd);
  3004. return ret;
  3005. }
  3006. /**
  3007. * onenand_probe - [OneNAND Interface] Probe the OneNAND device
  3008. * @param mtd MTD device structure
  3009. *
  3010. * OneNAND detection method:
  3011. * Compare the values from command with ones from register
  3012. */
  3013. static int onenand_probe(struct mtd_info *mtd)
  3014. {
  3015. struct onenand_chip *this = mtd->priv;
  3016. int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
  3017. int density;
  3018. int syscfg;
  3019. /* Save system configuration 1 */
  3020. syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
  3021. /* Clear Sync. Burst Read mode to read BootRAM */
  3022. this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
  3023. /* Send the command for reading device ID from BootRAM */
  3024. this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
  3025. /* Read manufacturer and device IDs from BootRAM */
  3026. bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
  3027. bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
  3028. /* Reset OneNAND to read default register values */
  3029. this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
  3030. /* Wait reset */
  3031. this->wait(mtd, FL_RESETING);
  3032. /* Restore system configuration 1 */
  3033. this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
  3034. /* Check manufacturer ID */
  3035. if (onenand_check_maf(bram_maf_id))
  3036. return -ENXIO;
  3037. /* Read manufacturer and device IDs from Register */
  3038. maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
  3039. dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
  3040. ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
  3041. this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
  3042. /* Check OneNAND device */
  3043. if (maf_id != bram_maf_id || dev_id != bram_dev_id)
  3044. return -ENXIO;
  3045. /* Flash device information */
  3046. onenand_print_device_info(dev_id, ver_id);
  3047. this->device_id = dev_id;
  3048. this->version_id = ver_id;
  3049. density = onenand_get_density(dev_id);
  3050. if (FLEXONENAND(this)) {
  3051. this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
  3052. /* Maximum possible erase regions */
  3053. mtd->numeraseregions = this->dies << 1;
  3054. mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
  3055. * (this->dies << 1), GFP_KERNEL);
  3056. if (!mtd->eraseregions)
  3057. return -ENOMEM;
  3058. }
  3059. /*
  3060. * For Flex-OneNAND, chipsize represents maximum possible device size.
  3061. * mtd->size represents the actual device size.
  3062. */
  3063. this->chipsize = (16 << density) << 20;
  3064. /* OneNAND page size & block size */
  3065. /* The data buffer size is equal to page size */
  3066. mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
  3067. /* We use the full BufferRAM */
  3068. if (ONENAND_IS_MLC(this))
  3069. mtd->writesize <<= 1;
  3070. mtd->oobsize = mtd->writesize >> 5;
  3071. /* Pages per a block are always 64 in OneNAND */
  3072. mtd->erasesize = mtd->writesize << 6;
  3073. /*
  3074. * Flex-OneNAND SLC area has 64 pages per block.
  3075. * Flex-OneNAND MLC area has 128 pages per block.
  3076. * Expose MLC erase size to find erase_shift and page_mask.
  3077. */
  3078. if (FLEXONENAND(this))
  3079. mtd->erasesize <<= 1;
  3080. this->erase_shift = ffs(mtd->erasesize) - 1;
  3081. this->page_shift = ffs(mtd->writesize) - 1;
  3082. this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
  3083. /* Set density mask. it is used for DDP */
  3084. if (ONENAND_IS_DDP(this))
  3085. this->density_mask = this->chipsize >> (this->erase_shift + 1);
  3086. /* It's real page size */
  3087. this->writesize = mtd->writesize;
  3088. /* REVISIT: Multichip handling */
  3089. if (FLEXONENAND(this))
  3090. flexonenand_get_size(mtd);
  3091. else
  3092. mtd->size = this->chipsize;
  3093. /* Check OneNAND features */
  3094. onenand_check_features(mtd);
  3095. /*
  3096. * We emulate the 4KiB page and 256KiB erase block size
  3097. * But oobsize is still 64 bytes.
  3098. * It is only valid if you turn on 2X program support,
  3099. * Otherwise it will be ignored by compiler.
  3100. */
  3101. if (ONENAND_IS_2PLANE(this)) {
  3102. mtd->writesize <<= 1;
  3103. mtd->erasesize <<= 1;
  3104. }
  3105. return 0;
  3106. }
  3107. /**
  3108. * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
  3109. * @param mtd MTD device structure
  3110. */
  3111. static int onenand_suspend(struct mtd_info *mtd)
  3112. {
  3113. return onenand_get_device(mtd, FL_PM_SUSPENDED);
  3114. }
  3115. /**
  3116. * onenand_resume - [MTD Interface] Resume the OneNAND flash
  3117. * @param mtd MTD device structure
  3118. */
  3119. static void onenand_resume(struct mtd_info *mtd)
  3120. {
  3121. struct onenand_chip *this = mtd->priv;
  3122. if (this->state == FL_PM_SUSPENDED)
  3123. onenand_release_device(mtd);
  3124. else
  3125. printk(KERN_ERR "%s: resume() called for the chip which is not "
  3126. "in suspended state\n", __func__);
  3127. }
  3128. /**
  3129. * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
  3130. * @param mtd MTD device structure
  3131. * @param maxchips Number of chips to scan for
  3132. *
  3133. * This fills out all the not initialized function pointers
  3134. * with the defaults.
  3135. * The flash ID is read and the mtd/chip structures are
  3136. * filled with the appropriate values.
  3137. */
  3138. int onenand_scan(struct mtd_info *mtd, int maxchips)
  3139. {
  3140. int i, ret;
  3141. struct onenand_chip *this = mtd->priv;
  3142. if (!this->read_word)
  3143. this->read_word = onenand_readw;
  3144. if (!this->write_word)
  3145. this->write_word = onenand_writew;
  3146. if (!this->command)
  3147. this->command = onenand_command;
  3148. if (!this->wait)
  3149. onenand_setup_wait(mtd);
  3150. if (!this->bbt_wait)
  3151. this->bbt_wait = onenand_bbt_wait;
  3152. if (!this->unlock_all)
  3153. this->unlock_all = onenand_unlock_all;
  3154. if (!this->read_bufferram)
  3155. this->read_bufferram = onenand_read_bufferram;
  3156. if (!this->write_bufferram)
  3157. this->write_bufferram = onenand_write_bufferram;
  3158. if (!this->block_markbad)
  3159. this->block_markbad = onenand_default_block_markbad;
  3160. if (!this->scan_bbt)
  3161. this->scan_bbt = onenand_default_bbt;
  3162. if (onenand_probe(mtd))
  3163. return -ENXIO;
  3164. /* Set Sync. Burst Read after probing */
  3165. if (this->mmcontrol) {
  3166. printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
  3167. this->read_bufferram = onenand_sync_read_bufferram;
  3168. }
  3169. /* Allocate buffers, if necessary */
  3170. if (!this->page_buf) {
  3171. this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
  3172. if (!this->page_buf) {
  3173. printk(KERN_ERR "%s: Can't allocate page_buf\n",
  3174. __func__);
  3175. return -ENOMEM;
  3176. }
  3177. this->options |= ONENAND_PAGEBUF_ALLOC;
  3178. }
  3179. if (!this->oob_buf) {
  3180. this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
  3181. if (!this->oob_buf) {
  3182. printk(KERN_ERR "%s: Can't allocate oob_buf\n",
  3183. __func__);
  3184. if (this->options & ONENAND_PAGEBUF_ALLOC) {
  3185. this->options &= ~ONENAND_PAGEBUF_ALLOC;
  3186. kfree(this->page_buf);
  3187. }
  3188. return -ENOMEM;
  3189. }
  3190. this->options |= ONENAND_OOBBUF_ALLOC;
  3191. }
  3192. this->state = FL_READY;
  3193. init_waitqueue_head(&this->wq);
  3194. spin_lock_init(&this->chip_lock);
  3195. /*
  3196. * Allow subpage writes up to oobsize.
  3197. */
  3198. switch (mtd->oobsize) {
  3199. case 128:
  3200. this->ecclayout = &onenand_oob_128;
  3201. mtd->subpage_sft = 0;
  3202. break;
  3203. case 64:
  3204. this->ecclayout = &onenand_oob_64;
  3205. mtd->subpage_sft = 2;
  3206. break;
  3207. case 32:
  3208. this->ecclayout = &onenand_oob_32;
  3209. mtd->subpage_sft = 1;
  3210. break;
  3211. default:
  3212. printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
  3213. __func__, mtd->oobsize);
  3214. mtd->subpage_sft = 0;
  3215. /* To prevent kernel oops */
  3216. this->ecclayout = &onenand_oob_32;
  3217. break;
  3218. }
  3219. this->subpagesize = mtd->writesize >> mtd->subpage_sft;
  3220. /*
  3221. * The number of bytes available for a client to place data into
  3222. * the out of band area
  3223. */
  3224. this->ecclayout->oobavail = 0;
  3225. for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
  3226. this->ecclayout->oobfree[i].length; i++)
  3227. this->ecclayout->oobavail +=
  3228. this->ecclayout->oobfree[i].length;
  3229. mtd->oobavail = this->ecclayout->oobavail;
  3230. mtd->ecclayout = this->ecclayout;
  3231. /* Fill in remaining MTD driver data */
  3232. mtd->type = MTD_NANDFLASH;
  3233. mtd->flags = MTD_CAP_NANDFLASH;
  3234. mtd->erase = onenand_erase;
  3235. mtd->point = NULL;
  3236. mtd->unpoint = NULL;
  3237. mtd->read = onenand_read;
  3238. mtd->write = onenand_write;
  3239. mtd->read_oob = onenand_read_oob;
  3240. mtd->write_oob = onenand_write_oob;
  3241. mtd->panic_write = onenand_panic_write;
  3242. #ifdef CONFIG_MTD_ONENAND_OTP
  3243. mtd->get_fact_prot_info = onenand_get_fact_prot_info;
  3244. mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
  3245. mtd->get_user_prot_info = onenand_get_user_prot_info;
  3246. mtd->read_user_prot_reg = onenand_read_user_prot_reg;
  3247. mtd->write_user_prot_reg = onenand_write_user_prot_reg;
  3248. mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
  3249. #endif
  3250. mtd->sync = onenand_sync;
  3251. mtd->lock = onenand_lock;
  3252. mtd->unlock = onenand_unlock;
  3253. mtd->suspend = onenand_suspend;
  3254. mtd->resume = onenand_resume;
  3255. mtd->block_isbad = onenand_block_isbad;
  3256. mtd->block_markbad = onenand_block_markbad;
  3257. mtd->owner = THIS_MODULE;
  3258. /* Unlock whole block */
  3259. this->unlock_all(mtd);
  3260. ret = this->scan_bbt(mtd);
  3261. if ((!FLEXONENAND(this)) || ret)
  3262. return ret;
  3263. /* Change Flex-OneNAND boundaries if required */
  3264. for (i = 0; i < MAX_DIES; i++)
  3265. flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
  3266. flex_bdry[(2 * i) + 1]);
  3267. return 0;
  3268. }
  3269. /**
  3270. * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
  3271. * @param mtd MTD device structure
  3272. */
  3273. void onenand_release(struct mtd_info *mtd)
  3274. {
  3275. struct onenand_chip *this = mtd->priv;
  3276. #ifdef CONFIG_MTD_PARTITIONS
  3277. /* Deregister partitions */
  3278. del_mtd_partitions (mtd);
  3279. #endif
  3280. /* Deregister the device */
  3281. del_mtd_device (mtd);
  3282. /* Free bad block table memory, if allocated */
  3283. if (this->bbm) {
  3284. struct bbm_info *bbm = this->bbm;
  3285. kfree(bbm->bbt);
  3286. kfree(this->bbm);
  3287. }
  3288. /* Buffers allocated by onenand_scan */
  3289. if (this->options & ONENAND_PAGEBUF_ALLOC)
  3290. kfree(this->page_buf);
  3291. if (this->options & ONENAND_OOBBUF_ALLOC)
  3292. kfree(this->oob_buf);
  3293. kfree(mtd->eraseregions);
  3294. }
  3295. EXPORT_SYMBOL_GPL(onenand_scan);
  3296. EXPORT_SYMBOL_GPL(onenand_release);
  3297. MODULE_LICENSE("GPL");
  3298. MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
  3299. MODULE_DESCRIPTION("Generic OneNAND flash driver code");