board-ap4evb.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/sh_mobile_sdhi.h>
  28. #include <linux/mfd/tmio.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <media/sh_mobile_ceu.h>
  46. #include <media/sh_mobile_csi2.h>
  47. #include <media/soc_camera.h>
  48. #include <sound/sh_fsi.h>
  49. #include <video/sh_mobile_hdmi.h>
  50. #include <video/sh_mobile_lcdc.h>
  51. #include <video/sh_mipi_dsi.h>
  52. #include <mach/common.h>
  53. #include <mach/irqs.h>
  54. #include <mach/sh7372.h>
  55. #include <asm/mach-types.h>
  56. #include <asm/mach/arch.h>
  57. #include <asm/mach/map.h>
  58. #include <asm/mach/time.h>
  59. /*
  60. * Address Interface BusWidth note
  61. * ------------------------------------------------------------------
  62. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  63. * 0x0800_0000 user area -
  64. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  65. * 0x1400_0000 Ether (LAN9220) 16bit
  66. * 0x1600_0000 user area - cannot use with NAND
  67. * 0x1800_0000 user area -
  68. * 0x1A00_0000 -
  69. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  70. */
  71. /*
  72. * NOR Flash ROM
  73. *
  74. * SW1 | SW2 | SW7 | NOR Flash ROM
  75. * bit1 | bit1 bit2 | bit1 | Memory allocation
  76. * ------+------------+------+------------------
  77. * OFF | ON OFF | ON | Area 0
  78. * OFF | ON OFF | OFF | Area 4
  79. */
  80. /*
  81. * NAND Flash ROM
  82. *
  83. * SW1 | SW2 | SW7 | NAND Flash ROM
  84. * bit1 | bit1 bit2 | bit2 | Memory allocation
  85. * ------+------------+------+------------------
  86. * OFF | ON OFF | ON | FCE 0
  87. * OFF | ON OFF | OFF | FCE 1
  88. */
  89. /*
  90. * SMSC 9220
  91. *
  92. * SW1 SMSC 9220
  93. * -----------------------
  94. * ON access disable
  95. * OFF access enable
  96. */
  97. /*
  98. * LCD / IRQ / KEYSC / IrDA
  99. *
  100. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  101. * LCD = 2nd LCDC (WVGA)
  102. *
  103. * | SW43 |
  104. * SW3 | ON | OFF |
  105. * -------------+-----------------------+---------------+
  106. * ON | KEY / IrDA | LCD |
  107. * OFF | KEY / IrDA / IRQ | IRQ |
  108. *
  109. *
  110. * QHD / WVGA display
  111. *
  112. * You can choice display type on menuconfig.
  113. * Then, check above dip-switch.
  114. */
  115. /*
  116. * USB
  117. *
  118. * J7 : 1-2 MAX3355E VBUS
  119. * 2-3 DC 5.0V
  120. *
  121. * S39: bit2: off
  122. */
  123. /*
  124. * FSI/FSMI
  125. *
  126. * SW41 : ON : SH-Mobile AP4 Audio Mode
  127. * : OFF : Bluetooth Audio Mode
  128. */
  129. /*
  130. * MMC0/SDHI1 (CN7)
  131. *
  132. * J22 : select card voltage
  133. * 1-2 pin : 1.8v
  134. * 2-3 pin : 3.3v
  135. *
  136. * SW1 | SW33
  137. * | bit1 | bit2 | bit3 | bit4
  138. * ------------+------+------+------+-------
  139. * MMC0 OFF | OFF | ON | ON | X
  140. * SDHI1 OFF | ON | X | OFF | ON
  141. *
  142. * voltage lebel
  143. * CN7 : 1.8v
  144. * CN12: 3.3v
  145. */
  146. /* MTD */
  147. static struct mtd_partition nor_flash_partitions[] = {
  148. {
  149. .name = "loader",
  150. .offset = 0x00000000,
  151. .size = 512 * 1024,
  152. .mask_flags = MTD_WRITEABLE,
  153. },
  154. {
  155. .name = "bootenv",
  156. .offset = MTDPART_OFS_APPEND,
  157. .size = 512 * 1024,
  158. .mask_flags = MTD_WRITEABLE,
  159. },
  160. {
  161. .name = "kernel_ro",
  162. .offset = MTDPART_OFS_APPEND,
  163. .size = 8 * 1024 * 1024,
  164. .mask_flags = MTD_WRITEABLE,
  165. },
  166. {
  167. .name = "kernel",
  168. .offset = MTDPART_OFS_APPEND,
  169. .size = 8 * 1024 * 1024,
  170. },
  171. {
  172. .name = "data",
  173. .offset = MTDPART_OFS_APPEND,
  174. .size = MTDPART_SIZ_FULL,
  175. },
  176. };
  177. static struct physmap_flash_data nor_flash_data = {
  178. .width = 2,
  179. .parts = nor_flash_partitions,
  180. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  181. };
  182. static struct resource nor_flash_resources[] = {
  183. [0] = {
  184. .start = 0x00000000,
  185. .end = 0x08000000 - 1,
  186. .flags = IORESOURCE_MEM,
  187. }
  188. };
  189. static struct platform_device nor_flash_device = {
  190. .name = "physmap-flash",
  191. .dev = {
  192. .platform_data = &nor_flash_data,
  193. },
  194. .num_resources = ARRAY_SIZE(nor_flash_resources),
  195. .resource = nor_flash_resources,
  196. };
  197. /* SMSC 9220 */
  198. static struct resource smc911x_resources[] = {
  199. {
  200. .start = 0x14000000,
  201. .end = 0x16000000 - 1,
  202. .flags = IORESOURCE_MEM,
  203. }, {
  204. .start = evt2irq(0x02c0) /* IRQ6A */,
  205. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  206. },
  207. };
  208. static struct smsc911x_platform_config smsc911x_info = {
  209. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  210. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  211. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  212. };
  213. static struct platform_device smc911x_device = {
  214. .name = "smsc911x",
  215. .id = -1,
  216. .num_resources = ARRAY_SIZE(smc911x_resources),
  217. .resource = smc911x_resources,
  218. .dev = {
  219. .platform_data = &smsc911x_info,
  220. },
  221. };
  222. /*
  223. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  224. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  225. */
  226. static int slot_cn7_get_cd(struct platform_device *pdev)
  227. {
  228. if (gpio_is_valid(GPIO_PORT41))
  229. return !gpio_get_value(GPIO_PORT41);
  230. else
  231. return -ENXIO;
  232. }
  233. /* SH_MMCIF */
  234. static struct resource sh_mmcif_resources[] = {
  235. [0] = {
  236. .name = "MMCIF",
  237. .start = 0xE6BD0000,
  238. .end = 0xE6BD00FF,
  239. .flags = IORESOURCE_MEM,
  240. },
  241. [1] = {
  242. /* MMC ERR */
  243. .start = evt2irq(0x1ac0),
  244. .flags = IORESOURCE_IRQ,
  245. },
  246. [2] = {
  247. /* MMC NOR */
  248. .start = evt2irq(0x1ae0),
  249. .flags = IORESOURCE_IRQ,
  250. },
  251. };
  252. static struct sh_mmcif_dma sh_mmcif_dma = {
  253. .chan_priv_rx = {
  254. .slave_id = SHDMA_SLAVE_MMCIF_RX,
  255. },
  256. .chan_priv_tx = {
  257. .slave_id = SHDMA_SLAVE_MMCIF_TX,
  258. },
  259. };
  260. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  261. .sup_pclk = 0,
  262. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  263. .caps = MMC_CAP_4_BIT_DATA |
  264. MMC_CAP_8_BIT_DATA |
  265. MMC_CAP_NEEDS_POLL,
  266. .get_cd = slot_cn7_get_cd,
  267. .dma = &sh_mmcif_dma,
  268. };
  269. static struct platform_device sh_mmcif_device = {
  270. .name = "sh_mmcif",
  271. .id = 0,
  272. .dev = {
  273. .dma_mask = NULL,
  274. .coherent_dma_mask = 0xffffffff,
  275. .platform_data = &sh_mmcif_plat,
  276. },
  277. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  278. .resource = sh_mmcif_resources,
  279. };
  280. /* SDHI0 */
  281. static struct sh_mobile_sdhi_info sdhi0_info = {
  282. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  283. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  284. };
  285. static struct resource sdhi0_resources[] = {
  286. [0] = {
  287. .name = "SDHI0",
  288. .start = 0xe6850000,
  289. .end = 0xe68501ff,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = evt2irq(0x0e00) /* SDHI0 */,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. };
  297. static struct platform_device sdhi0_device = {
  298. .name = "sh_mobile_sdhi",
  299. .num_resources = ARRAY_SIZE(sdhi0_resources),
  300. .resource = sdhi0_resources,
  301. .id = 0,
  302. .dev = {
  303. .platform_data = &sdhi0_info,
  304. },
  305. };
  306. /* SDHI1 */
  307. static struct sh_mobile_sdhi_info sdhi1_info = {
  308. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  309. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  310. .tmio_ocr_mask = MMC_VDD_165_195,
  311. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  312. .tmio_caps = MMC_CAP_NEEDS_POLL,
  313. .get_cd = slot_cn7_get_cd,
  314. };
  315. static struct resource sdhi1_resources[] = {
  316. [0] = {
  317. .name = "SDHI1",
  318. .start = 0xe6860000,
  319. .end = 0xe68601ff,
  320. .flags = IORESOURCE_MEM,
  321. },
  322. [1] = {
  323. .start = evt2irq(0x0e80),
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. };
  327. static struct platform_device sdhi1_device = {
  328. .name = "sh_mobile_sdhi",
  329. .num_resources = ARRAY_SIZE(sdhi1_resources),
  330. .resource = sdhi1_resources,
  331. .id = 1,
  332. .dev = {
  333. .platform_data = &sdhi1_info,
  334. },
  335. };
  336. /* USB1 */
  337. static void usb1_host_port_power(int port, int power)
  338. {
  339. if (!power) /* only power-on supported for now */
  340. return;
  341. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  342. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  343. }
  344. static struct r8a66597_platdata usb1_host_data = {
  345. .on_chip = 1,
  346. .port_power = usb1_host_port_power,
  347. };
  348. static struct resource usb1_host_resources[] = {
  349. [0] = {
  350. .name = "USBHS",
  351. .start = 0xE68B0000,
  352. .end = 0xE68B00E6 - 1,
  353. .flags = IORESOURCE_MEM,
  354. },
  355. [1] = {
  356. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  357. .flags = IORESOURCE_IRQ,
  358. },
  359. };
  360. static struct platform_device usb1_host_device = {
  361. .name = "r8a66597_hcd",
  362. .id = 1,
  363. .dev = {
  364. .dma_mask = NULL, /* not use dma */
  365. .coherent_dma_mask = 0xffffffff,
  366. .platform_data = &usb1_host_data,
  367. },
  368. .num_resources = ARRAY_SIZE(usb1_host_resources),
  369. .resource = usb1_host_resources,
  370. };
  371. const static struct fb_videomode ap4evb_lcdc_modes[] = {
  372. {
  373. #ifdef CONFIG_AP4EVB_QHD
  374. .name = "R63302(QHD)",
  375. .xres = 544,
  376. .yres = 961,
  377. .left_margin = 72,
  378. .right_margin = 600,
  379. .hsync_len = 16,
  380. .upper_margin = 8,
  381. .lower_margin = 8,
  382. .vsync_len = 2,
  383. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  384. #else
  385. .name = "WVGA Panel",
  386. .xres = 800,
  387. .yres = 480,
  388. .left_margin = 220,
  389. .right_margin = 110,
  390. .hsync_len = 70,
  391. .upper_margin = 20,
  392. .lower_margin = 5,
  393. .vsync_len = 5,
  394. .sync = 0,
  395. #endif
  396. },
  397. };
  398. static struct sh_mobile_lcdc_info lcdc_info = {
  399. .ch[0] = {
  400. .chan = LCDC_CHAN_MAINLCD,
  401. .bpp = 16,
  402. .lcd_cfg = ap4evb_lcdc_modes,
  403. .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
  404. }
  405. };
  406. static struct resource lcdc_resources[] = {
  407. [0] = {
  408. .name = "LCDC",
  409. .start = 0xfe940000, /* P4-only space */
  410. .end = 0xfe943fff,
  411. .flags = IORESOURCE_MEM,
  412. },
  413. [1] = {
  414. .start = intcs_evt2irq(0x580),
  415. .flags = IORESOURCE_IRQ,
  416. },
  417. };
  418. static struct platform_device lcdc_device = {
  419. .name = "sh_mobile_lcdc_fb",
  420. .num_resources = ARRAY_SIZE(lcdc_resources),
  421. .resource = lcdc_resources,
  422. .dev = {
  423. .platform_data = &lcdc_info,
  424. .coherent_dma_mask = ~0,
  425. },
  426. };
  427. /*
  428. * QHD display
  429. */
  430. #ifdef CONFIG_AP4EVB_QHD
  431. /* KEYSC (Needs SW43 set to ON) */
  432. static struct sh_keysc_info keysc_info = {
  433. .mode = SH_KEYSC_MODE_1,
  434. .scan_timing = 3,
  435. .delay = 2500,
  436. .keycodes = {
  437. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  438. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  439. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  440. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  441. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  442. },
  443. };
  444. static struct resource keysc_resources[] = {
  445. [0] = {
  446. .name = "KEYSC",
  447. .start = 0xe61b0000,
  448. .end = 0xe61b0063,
  449. .flags = IORESOURCE_MEM,
  450. },
  451. [1] = {
  452. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  453. .flags = IORESOURCE_IRQ,
  454. },
  455. };
  456. static struct platform_device keysc_device = {
  457. .name = "sh_keysc",
  458. .id = 0, /* "keysc0" clock */
  459. .num_resources = ARRAY_SIZE(keysc_resources),
  460. .resource = keysc_resources,
  461. .dev = {
  462. .platform_data = &keysc_info,
  463. },
  464. };
  465. /* MIPI-DSI */
  466. static struct resource mipidsi0_resources[] = {
  467. [0] = {
  468. .start = 0xffc60000,
  469. .end = 0xffc68fff,
  470. .flags = IORESOURCE_MEM,
  471. },
  472. };
  473. static struct sh_mipi_dsi_info mipidsi0_info = {
  474. .data_format = MIPI_RGB888,
  475. .lcd_chan = &lcdc_info.ch[0],
  476. };
  477. static struct platform_device mipidsi0_device = {
  478. .name = "sh-mipi-dsi",
  479. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  480. .resource = mipidsi0_resources,
  481. .id = 0,
  482. .dev = {
  483. .platform_data = &mipidsi0_info,
  484. },
  485. };
  486. /* This function will disappear when we switch to (runtime) PM */
  487. static int __init ap4evb_init_display_clk(void)
  488. {
  489. struct clk *lcdc_clk;
  490. struct clk *dsitx_clk;
  491. int ret;
  492. lcdc_clk = clk_get(&lcdc_device.dev, "sh_mobile_lcdc_fb.0");
  493. if (IS_ERR(lcdc_clk))
  494. return PTR_ERR(lcdc_clk);
  495. dsitx_clk = clk_get(&mipidsi0_device.dev, "sh-mipi-dsi.0");
  496. if (IS_ERR(dsitx_clk)) {
  497. ret = PTR_ERR(dsitx_clk);
  498. goto eclkdsitxget;
  499. }
  500. ret = clk_enable(lcdc_clk);
  501. if (ret < 0)
  502. goto eclklcdcon;
  503. ret = clk_enable(dsitx_clk);
  504. if (ret < 0)
  505. goto eclkdsitxon;
  506. return 0;
  507. eclkdsitxon:
  508. clk_disable(lcdc_clk);
  509. eclklcdcon:
  510. clk_put(dsitx_clk);
  511. eclkdsitxget:
  512. clk_put(lcdc_clk);
  513. return ret;
  514. }
  515. device_initcall(ap4evb_init_display_clk);
  516. static struct platform_device *qhd_devices[] __initdata = {
  517. &mipidsi0_device,
  518. &keysc_device,
  519. };
  520. #endif /* CONFIG_AP4EVB_QHD */
  521. /* FSI */
  522. #define IRQ_FSI evt2irq(0x1840)
  523. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  524. {
  525. int ret = 0;
  526. if (rate <= 0)
  527. return ret;
  528. if (enable) {
  529. ret = clk_set_rate(clk, rate);
  530. if (0 == ret)
  531. ret = clk_enable(clk);
  532. } else {
  533. clk_disable(clk);
  534. }
  535. return ret;
  536. }
  537. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  538. {
  539. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  540. }
  541. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  542. {
  543. struct clk *fsia_ick;
  544. struct clk *fsiack;
  545. int ret = -EIO;
  546. fsia_ick = clk_get(dev, "icka");
  547. if (IS_ERR(fsia_ick))
  548. return PTR_ERR(fsia_ick);
  549. /*
  550. * FSIACK is connected to AK4642,
  551. * and use external clock pin from it.
  552. * it is parent of fsia_ick now.
  553. */
  554. fsiack = clk_get_parent(fsia_ick);
  555. if (!fsiack)
  556. goto fsia_ick_out;
  557. /*
  558. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  559. *
  560. ** FIXME **
  561. * Because the freq_table of external clk (fsiack) are all 0,
  562. * the return value of clk_round_rate became 0.
  563. * So, it use __fsi_set_rate here.
  564. */
  565. ret = __fsi_set_rate(fsiack, rate, enable);
  566. if (ret < 0)
  567. goto fsiack_out;
  568. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  569. if ((ret < 0) && enable)
  570. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  571. fsiack_out:
  572. clk_put(fsiack);
  573. fsia_ick_out:
  574. clk_put(fsia_ick);
  575. return 0;
  576. }
  577. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  578. {
  579. struct clk *fsib_clk;
  580. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  581. long fsib_rate = 0;
  582. long fdiv_rate = 0;
  583. int ackmd_bpfmd;
  584. int ret;
  585. switch (rate) {
  586. case 44100:
  587. fsib_rate = rate * 256;
  588. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  589. break;
  590. case 48000:
  591. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  592. fdiv_rate = rate * 256;
  593. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  594. break;
  595. default:
  596. pr_err("unsupported rate in FSI2 port B\n");
  597. return -EINVAL;
  598. }
  599. /* FSI B setting */
  600. fsib_clk = clk_get(dev, "ickb");
  601. if (IS_ERR(fsib_clk))
  602. return -EIO;
  603. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  604. if (ret < 0)
  605. goto fsi_set_rate_end;
  606. /* FSI DIV setting */
  607. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  608. if (ret < 0) {
  609. /* disable FSI B */
  610. if (enable)
  611. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  612. goto fsi_set_rate_end;
  613. }
  614. ret = ackmd_bpfmd;
  615. fsi_set_rate_end:
  616. clk_put(fsib_clk);
  617. return ret;
  618. }
  619. static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
  620. {
  621. int ret;
  622. if (is_porta)
  623. ret = fsi_ak4642_set_rate(dev, rate, enable);
  624. else
  625. ret = fsi_hdmi_set_rate(dev, rate, enable);
  626. return ret;
  627. }
  628. static struct sh_fsi_platform_info fsi_info = {
  629. .porta_flags = SH_FSI_BRS_INV |
  630. SH_FSI_OUT_SLAVE_MODE |
  631. SH_FSI_IN_SLAVE_MODE |
  632. SH_FSI_OFMT(PCM) |
  633. SH_FSI_IFMT(PCM),
  634. .portb_flags = SH_FSI_BRS_INV |
  635. SH_FSI_BRM_INV |
  636. SH_FSI_LRS_INV |
  637. SH_FSI_OFMT(SPDIF),
  638. .set_rate = fsi_set_rate,
  639. };
  640. static struct resource fsi_resources[] = {
  641. [0] = {
  642. .name = "FSI",
  643. .start = 0xFE3C0000,
  644. .end = 0xFE3C0400 - 1,
  645. .flags = IORESOURCE_MEM,
  646. },
  647. [1] = {
  648. .start = IRQ_FSI,
  649. .flags = IORESOURCE_IRQ,
  650. },
  651. };
  652. static struct platform_device fsi_device = {
  653. .name = "sh_fsi2",
  654. .id = -1,
  655. .num_resources = ARRAY_SIZE(fsi_resources),
  656. .resource = fsi_resources,
  657. .dev = {
  658. .platform_data = &fsi_info,
  659. },
  660. };
  661. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  662. .clock_source = LCDC_CLK_EXTERNAL,
  663. .ch[0] = {
  664. .chan = LCDC_CHAN_MAINLCD,
  665. .bpp = 16,
  666. .interface_type = RGB24,
  667. .clock_divider = 1,
  668. .flags = LCDC_FLAGS_DWPOL,
  669. }
  670. };
  671. static struct resource lcdc1_resources[] = {
  672. [0] = {
  673. .name = "LCDC1",
  674. .start = 0xfe944000,
  675. .end = 0xfe947fff,
  676. .flags = IORESOURCE_MEM,
  677. },
  678. [1] = {
  679. .start = intcs_evt2irq(0x1780),
  680. .flags = IORESOURCE_IRQ,
  681. },
  682. };
  683. static struct platform_device lcdc1_device = {
  684. .name = "sh_mobile_lcdc_fb",
  685. .num_resources = ARRAY_SIZE(lcdc1_resources),
  686. .resource = lcdc1_resources,
  687. .id = 1,
  688. .dev = {
  689. .platform_data = &sh_mobile_lcdc1_info,
  690. .coherent_dma_mask = ~0,
  691. },
  692. };
  693. static struct sh_mobile_hdmi_info hdmi_info = {
  694. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  695. .lcd_dev = &lcdc1_device.dev,
  696. .flags = HDMI_SND_SRC_SPDIF,
  697. };
  698. static struct resource hdmi_resources[] = {
  699. [0] = {
  700. .name = "HDMI",
  701. .start = 0xe6be0000,
  702. .end = 0xe6be00ff,
  703. .flags = IORESOURCE_MEM,
  704. },
  705. [1] = {
  706. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  707. .start = evt2irq(0x17e0),
  708. .flags = IORESOURCE_IRQ,
  709. },
  710. };
  711. static struct platform_device hdmi_device = {
  712. .name = "sh-mobile-hdmi",
  713. .num_resources = ARRAY_SIZE(hdmi_resources),
  714. .resource = hdmi_resources,
  715. .id = -1,
  716. .dev = {
  717. .platform_data = &hdmi_info,
  718. },
  719. };
  720. static struct gpio_led ap4evb_leds[] = {
  721. {
  722. .name = "led4",
  723. .gpio = GPIO_PORT185,
  724. .default_state = LEDS_GPIO_DEFSTATE_ON,
  725. },
  726. {
  727. .name = "led2",
  728. .gpio = GPIO_PORT186,
  729. .default_state = LEDS_GPIO_DEFSTATE_ON,
  730. },
  731. {
  732. .name = "led3",
  733. .gpio = GPIO_PORT187,
  734. .default_state = LEDS_GPIO_DEFSTATE_ON,
  735. },
  736. {
  737. .name = "led1",
  738. .gpio = GPIO_PORT188,
  739. .default_state = LEDS_GPIO_DEFSTATE_ON,
  740. }
  741. };
  742. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  743. .num_leds = ARRAY_SIZE(ap4evb_leds),
  744. .leds = ap4evb_leds,
  745. };
  746. static struct platform_device leds_device = {
  747. .name = "leds-gpio",
  748. .id = 0,
  749. .dev = {
  750. .platform_data = &ap4evb_leds_pdata,
  751. },
  752. };
  753. static struct i2c_board_info imx074_info = {
  754. I2C_BOARD_INFO("imx074", 0x1a),
  755. };
  756. struct soc_camera_link imx074_link = {
  757. .bus_id = 0,
  758. .board_info = &imx074_info,
  759. .i2c_adapter_id = 0,
  760. .module_name = "imx074",
  761. };
  762. static struct platform_device ap4evb_camera = {
  763. .name = "soc-camera-pdrv",
  764. .id = 0,
  765. .dev = {
  766. .platform_data = &imx074_link,
  767. },
  768. };
  769. static struct sh_csi2_client_config csi2_clients[] = {
  770. {
  771. .phy = SH_CSI2_PHY_MAIN,
  772. .lanes = 3,
  773. .channel = 0,
  774. .pdev = &ap4evb_camera,
  775. },
  776. };
  777. static struct sh_csi2_pdata csi2_info = {
  778. .type = SH_CSI2C,
  779. .clients = csi2_clients,
  780. .num_clients = ARRAY_SIZE(csi2_clients),
  781. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  782. };
  783. static struct resource csi2_resources[] = {
  784. [0] = {
  785. .name = "CSI2",
  786. .start = 0xffc90000,
  787. .end = 0xffc90fff,
  788. .flags = IORESOURCE_MEM,
  789. },
  790. [1] = {
  791. .start = intcs_evt2irq(0x17a0),
  792. .flags = IORESOURCE_IRQ,
  793. },
  794. };
  795. static struct platform_device csi2_device = {
  796. .name = "sh-mobile-csi2",
  797. .id = 0,
  798. .num_resources = ARRAY_SIZE(csi2_resources),
  799. .resource = csi2_resources,
  800. .dev = {
  801. .platform_data = &csi2_info,
  802. },
  803. };
  804. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  805. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  806. .csi2_dev = &csi2_device.dev,
  807. };
  808. static struct resource ceu_resources[] = {
  809. [0] = {
  810. .name = "CEU",
  811. .start = 0xfe910000,
  812. .end = 0xfe91009f,
  813. .flags = IORESOURCE_MEM,
  814. },
  815. [1] = {
  816. .start = intcs_evt2irq(0x880),
  817. .flags = IORESOURCE_IRQ,
  818. },
  819. [2] = {
  820. /* place holder for contiguous memory */
  821. },
  822. };
  823. static struct platform_device ceu_device = {
  824. .name = "sh_mobile_ceu",
  825. .id = 0, /* "ceu0" clock */
  826. .num_resources = ARRAY_SIZE(ceu_resources),
  827. .resource = ceu_resources,
  828. .dev = {
  829. .platform_data = &sh_mobile_ceu_info,
  830. },
  831. };
  832. static struct platform_device *ap4evb_devices[] __initdata = {
  833. &leds_device,
  834. &nor_flash_device,
  835. &smc911x_device,
  836. &sdhi0_device,
  837. &sdhi1_device,
  838. &usb1_host_device,
  839. &fsi_device,
  840. &sh_mmcif_device,
  841. &lcdc1_device,
  842. &lcdc_device,
  843. &hdmi_device,
  844. &csi2_device,
  845. &ceu_device,
  846. &ap4evb_camera,
  847. };
  848. static int __init hdmi_init_pm_clock(void)
  849. {
  850. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  851. int ret;
  852. long rate;
  853. if (IS_ERR(hdmi_ick)) {
  854. ret = PTR_ERR(hdmi_ick);
  855. pr_err("Cannot get HDMI ICK: %d\n", ret);
  856. goto out;
  857. }
  858. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  859. if (ret < 0) {
  860. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  861. goto out;
  862. }
  863. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  864. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  865. if (rate < 0) {
  866. pr_err("Cannot get suitable rate: %ld\n", rate);
  867. ret = rate;
  868. goto out;
  869. }
  870. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  871. if (ret < 0) {
  872. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  873. goto out;
  874. }
  875. ret = clk_enable(&sh7372_pllc2_clk);
  876. if (ret < 0) {
  877. pr_err("Cannot enable pllc2 clock\n");
  878. goto out;
  879. }
  880. pr_debug("PLLC2 set frequency %lu\n", rate);
  881. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  882. if (ret < 0) {
  883. pr_err("Cannot set HDMI parent: %d\n", ret);
  884. goto out;
  885. }
  886. out:
  887. if (!IS_ERR(hdmi_ick))
  888. clk_put(hdmi_ick);
  889. return ret;
  890. }
  891. device_initcall(hdmi_init_pm_clock);
  892. static int __init fsi_init_pm_clock(void)
  893. {
  894. struct clk *fsia_ick;
  895. int ret;
  896. fsia_ick = clk_get(&fsi_device.dev, "icka");
  897. if (IS_ERR(fsia_ick)) {
  898. ret = PTR_ERR(fsia_ick);
  899. pr_err("Cannot get FSI ICK: %d\n", ret);
  900. return ret;
  901. }
  902. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  903. if (ret < 0)
  904. pr_err("Cannot set FSI-A parent: %d\n", ret);
  905. clk_put(fsia_ick);
  906. return ret;
  907. }
  908. device_initcall(fsi_init_pm_clock);
  909. /*
  910. * FIXME !!
  911. *
  912. * gpio_no_direction
  913. * are quick_hack.
  914. *
  915. * current gpio frame work doesn't have
  916. * the method to control only pull up/down/free.
  917. * this function should be replaced by correct gpio function
  918. */
  919. static void __init gpio_no_direction(u32 addr)
  920. {
  921. __raw_writeb(0x00, addr);
  922. }
  923. /* TouchScreen */
  924. #ifdef CONFIG_AP4EVB_QHD
  925. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  926. # define GPIO_TSC_PORT GPIO_PORT123
  927. #else /* WVGA */
  928. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  929. # define GPIO_TSC_PORT GPIO_PORT40
  930. #endif
  931. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  932. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  933. static int ts_get_pendown_state(void)
  934. {
  935. int val;
  936. gpio_free(GPIO_TSC_IRQ);
  937. gpio_request(GPIO_TSC_PORT, NULL);
  938. gpio_direction_input(GPIO_TSC_PORT);
  939. val = gpio_get_value(GPIO_TSC_PORT);
  940. gpio_request(GPIO_TSC_IRQ, NULL);
  941. return !val;
  942. }
  943. static int ts_init(void)
  944. {
  945. gpio_request(GPIO_TSC_IRQ, NULL);
  946. return 0;
  947. }
  948. static struct tsc2007_platform_data tsc2007_info = {
  949. .model = 2007,
  950. .x_plate_ohms = 180,
  951. .get_pendown_state = ts_get_pendown_state,
  952. .init_platform_hw = ts_init,
  953. };
  954. static struct i2c_board_info tsc_device = {
  955. I2C_BOARD_INFO("tsc2007", 0x48),
  956. .type = "tsc2007",
  957. .platform_data = &tsc2007_info,
  958. /*.irq is selected on ap4evb_init */
  959. };
  960. /* I2C */
  961. static struct i2c_board_info i2c0_devices[] = {
  962. {
  963. I2C_BOARD_INFO("ak4643", 0x13),
  964. },
  965. };
  966. static struct i2c_board_info i2c1_devices[] = {
  967. {
  968. I2C_BOARD_INFO("r2025sd", 0x32),
  969. },
  970. };
  971. static struct map_desc ap4evb_io_desc[] __initdata = {
  972. /* create a 1:1 entity map for 0xe6xxxxxx
  973. * used by CPGA, INTC and PFC.
  974. */
  975. {
  976. .virtual = 0xe6000000,
  977. .pfn = __phys_to_pfn(0xe6000000),
  978. .length = 256 << 20,
  979. .type = MT_DEVICE_NONSHARED
  980. },
  981. };
  982. static void __init ap4evb_map_io(void)
  983. {
  984. iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
  985. /* setup early devices and console here as well */
  986. sh7372_add_early_devices();
  987. shmobile_setup_console();
  988. }
  989. #define GPIO_PORT9CR 0xE6051009
  990. #define GPIO_PORT10CR 0xE605100A
  991. #define USCCR1 0xE6058144
  992. static void __init ap4evb_init(void)
  993. {
  994. u32 srcr4;
  995. struct clk *clk;
  996. sh7372_pinmux_init();
  997. /* enable SCIFA0 */
  998. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  999. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1000. /* enable SMSC911X */
  1001. gpio_request(GPIO_FN_CS5A, NULL);
  1002. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1003. /* enable Debug switch (S6) */
  1004. gpio_request(GPIO_PORT32, NULL);
  1005. gpio_request(GPIO_PORT33, NULL);
  1006. gpio_request(GPIO_PORT34, NULL);
  1007. gpio_request(GPIO_PORT35, NULL);
  1008. gpio_direction_input(GPIO_PORT32);
  1009. gpio_direction_input(GPIO_PORT33);
  1010. gpio_direction_input(GPIO_PORT34);
  1011. gpio_direction_input(GPIO_PORT35);
  1012. gpio_export(GPIO_PORT32, 0);
  1013. gpio_export(GPIO_PORT33, 0);
  1014. gpio_export(GPIO_PORT34, 0);
  1015. gpio_export(GPIO_PORT35, 0);
  1016. /* SDHI0 */
  1017. gpio_request(GPIO_FN_SDHICD0, NULL);
  1018. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1019. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1020. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1021. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1022. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1023. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1024. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1025. /* SDHI1 */
  1026. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1027. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1028. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1029. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1030. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1031. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1032. /* MMCIF */
  1033. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1034. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1035. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1036. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1037. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1038. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1039. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1040. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1041. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1042. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1043. /* USB enable */
  1044. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1045. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1046. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1047. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1048. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1049. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1050. /* setup USB phy */
  1051. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1052. /* enable FSI2 port A (ak4643) */
  1053. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1054. gpio_request(GPIO_FN_FSIAILR, NULL);
  1055. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1056. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1057. gpio_request(GPIO_PORT161, NULL);
  1058. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1059. gpio_request(GPIO_PORT9, NULL);
  1060. gpio_request(GPIO_PORT10, NULL);
  1061. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1062. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1063. /* card detect pin for MMC slot (CN7) */
  1064. gpio_request(GPIO_PORT41, NULL);
  1065. gpio_direction_input(GPIO_PORT41);
  1066. /* setup FSI2 port B (HDMI) */
  1067. gpio_request(GPIO_FN_FSIBCK, NULL);
  1068. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1069. /* set SPU2 clock to 119.6 MHz */
  1070. clk = clk_get(NULL, "spu_clk");
  1071. if (!IS_ERR(clk)) {
  1072. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1073. clk_put(clk);
  1074. }
  1075. /*
  1076. * set irq priority, to avoid sound chopping
  1077. * when NFS rootfs is used
  1078. * FSI(3) > SMSC911X(2)
  1079. */
  1080. intc_set_priority(IRQ_FSI, 3);
  1081. i2c_register_board_info(0, i2c0_devices,
  1082. ARRAY_SIZE(i2c0_devices));
  1083. i2c_register_board_info(1, i2c1_devices,
  1084. ARRAY_SIZE(i2c1_devices));
  1085. #ifdef CONFIG_AP4EVB_QHD
  1086. /*
  1087. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1088. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1089. */
  1090. /* enable KEYSC */
  1091. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1092. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1093. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1094. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1095. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1096. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1097. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1098. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1099. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1100. gpio_request(GPIO_FN_KEYIN4, NULL);
  1101. /* enable TouchScreen */
  1102. set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1103. tsc_device.irq = IRQ28;
  1104. i2c_register_board_info(1, &tsc_device, 1);
  1105. /* LCDC0 */
  1106. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1107. lcdc_info.ch[0].interface_type = RGB24;
  1108. lcdc_info.ch[0].clock_divider = 1;
  1109. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1110. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  1111. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  1112. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1113. #else
  1114. /*
  1115. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1116. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1117. */
  1118. gpio_request(GPIO_FN_LCDD17, NULL);
  1119. gpio_request(GPIO_FN_LCDD16, NULL);
  1120. gpio_request(GPIO_FN_LCDD15, NULL);
  1121. gpio_request(GPIO_FN_LCDD14, NULL);
  1122. gpio_request(GPIO_FN_LCDD13, NULL);
  1123. gpio_request(GPIO_FN_LCDD12, NULL);
  1124. gpio_request(GPIO_FN_LCDD11, NULL);
  1125. gpio_request(GPIO_FN_LCDD10, NULL);
  1126. gpio_request(GPIO_FN_LCDD9, NULL);
  1127. gpio_request(GPIO_FN_LCDD8, NULL);
  1128. gpio_request(GPIO_FN_LCDD7, NULL);
  1129. gpio_request(GPIO_FN_LCDD6, NULL);
  1130. gpio_request(GPIO_FN_LCDD5, NULL);
  1131. gpio_request(GPIO_FN_LCDD4, NULL);
  1132. gpio_request(GPIO_FN_LCDD3, NULL);
  1133. gpio_request(GPIO_FN_LCDD2, NULL);
  1134. gpio_request(GPIO_FN_LCDD1, NULL);
  1135. gpio_request(GPIO_FN_LCDD0, NULL);
  1136. gpio_request(GPIO_FN_LCDDISP, NULL);
  1137. gpio_request(GPIO_FN_LCDDCK, NULL);
  1138. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1139. gpio_direction_output(GPIO_PORT189, 1);
  1140. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1141. gpio_direction_output(GPIO_PORT151, 1);
  1142. lcdc_info.clock_source = LCDC_CLK_BUS;
  1143. lcdc_info.ch[0].interface_type = RGB18;
  1144. lcdc_info.ch[0].clock_divider = 2;
  1145. lcdc_info.ch[0].flags = 0;
  1146. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  1147. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  1148. /* enable TouchScreen */
  1149. set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1150. tsc_device.irq = IRQ7;
  1151. i2c_register_board_info(0, &tsc_device, 1);
  1152. #endif /* CONFIG_AP4EVB_QHD */
  1153. /* CEU */
  1154. /*
  1155. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1156. * becomes available
  1157. */
  1158. /* MIPI-CSI stuff */
  1159. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1160. clk = clk_get(NULL, "vck1_clk");
  1161. if (!IS_ERR(clk)) {
  1162. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1163. clk_enable(clk);
  1164. clk_put(clk);
  1165. }
  1166. sh7372_add_standard_devices();
  1167. /* HDMI */
  1168. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1169. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1170. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1171. #define SRCR4 0xe61580bc
  1172. srcr4 = __raw_readl(SRCR4);
  1173. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1174. udelay(50);
  1175. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1176. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1177. }
  1178. static void __init ap4evb_timer_init(void)
  1179. {
  1180. sh7372_clock_init();
  1181. shmobile_timer.init();
  1182. /* External clock source */
  1183. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1184. }
  1185. static struct sys_timer ap4evb_timer = {
  1186. .init = ap4evb_timer_init,
  1187. };
  1188. MACHINE_START(AP4EVB, "ap4evb")
  1189. .map_io = ap4evb_map_io,
  1190. .init_irq = sh7372_init_irq,
  1191. .init_machine = ap4evb_init,
  1192. .timer = &ap4evb_timer,
  1193. MACHINE_END