e1000_main.c 133 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.2.1 7/21/05
  82. * o Performance tweaks, including copybreak and prefetch
  83. * 6.1.2 4/13/05
  84. * o Fixed ethtool diagnostics
  85. * o Enabled flow control to take default eeprom settings
  86. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  87. * calls, one from mii_ioctl and other from within update_stats while
  88. * processing MIIREG ioctl.
  89. */
  90. char e1000_driver_name[] = "e1000";
  91. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  92. #ifndef CONFIG_E1000_NAPI
  93. #define DRIVERNAPI
  94. #else
  95. #define DRIVERNAPI "-NAPI"
  96. #endif
  97. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  98. char e1000_driver_version[] = DRV_VERSION;
  99. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  100. /* e1000_pci_tbl - PCI Device ID Table
  101. *
  102. * Last entry must be all 0s
  103. *
  104. * Macro expands to...
  105. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  106. */
  107. static struct pci_device_id e1000_pci_tbl[] = {
  108. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  111. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  112. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  115. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  116. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  125. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  126. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  128. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  129. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  131. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  132. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  133. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  134. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  139. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  140. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  145. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  146. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  148. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  149. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  150. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  151. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  152. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  153. /* required last entry */
  154. {0,}
  155. };
  156. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  157. int e1000_up(struct e1000_adapter *adapter);
  158. void e1000_down(struct e1000_adapter *adapter);
  159. void e1000_reset(struct e1000_adapter *adapter);
  160. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  161. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  162. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  163. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  164. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  165. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  166. struct e1000_tx_ring *txdr);
  167. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  168. struct e1000_rx_ring *rxdr);
  169. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  170. struct e1000_tx_ring *tx_ring);
  171. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  172. struct e1000_rx_ring *rx_ring);
  173. void e1000_update_stats(struct e1000_adapter *adapter);
  174. /* Local Function Prototypes */
  175. static int e1000_init_module(void);
  176. static void e1000_exit_module(void);
  177. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  178. static void __devexit e1000_remove(struct pci_dev *pdev);
  179. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  180. #ifdef CONFIG_E1000_MQ
  181. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  182. #endif
  183. static int e1000_sw_init(struct e1000_adapter *adapter);
  184. static int e1000_open(struct net_device *netdev);
  185. static int e1000_close(struct net_device *netdev);
  186. static void e1000_configure_tx(struct e1000_adapter *adapter);
  187. static void e1000_configure_rx(struct e1000_adapter *adapter);
  188. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  189. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  190. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  191. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  192. struct e1000_tx_ring *tx_ring);
  193. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  194. struct e1000_rx_ring *rx_ring);
  195. static void e1000_set_multi(struct net_device *netdev);
  196. static void e1000_update_phy_info(unsigned long data);
  197. static void e1000_watchdog(unsigned long data);
  198. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  199. static void e1000_82547_tx_fifo_stall(unsigned long data);
  200. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  201. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  202. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  203. static int e1000_set_mac(struct net_device *netdev, void *p);
  204. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  205. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  206. struct e1000_tx_ring *tx_ring);
  207. #ifdef CONFIG_E1000_NAPI
  208. static int e1000_clean(struct net_device *poll_dev, int *budget);
  209. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  210. struct e1000_rx_ring *rx_ring,
  211. int *work_done, int work_to_do);
  212. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  213. struct e1000_rx_ring *rx_ring,
  214. int *work_done, int work_to_do);
  215. #else
  216. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring);
  218. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  219. struct e1000_rx_ring *rx_ring);
  220. #endif
  221. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  222. struct e1000_rx_ring *rx_ring,
  223. int cleaned_count);
  224. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  225. struct e1000_rx_ring *rx_ring,
  226. int cleaned_count);
  227. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  228. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  229. int cmd);
  230. void e1000_set_ethtool_ops(struct net_device *netdev);
  231. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  232. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  233. static void e1000_tx_timeout(struct net_device *dev);
  234. static void e1000_tx_timeout_task(struct net_device *dev);
  235. static void e1000_smartspeed(struct e1000_adapter *adapter);
  236. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  237. struct sk_buff *skb);
  238. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  239. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  240. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  241. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  242. #ifdef CONFIG_PM
  243. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  244. static int e1000_resume(struct pci_dev *pdev);
  245. #endif
  246. #ifdef CONFIG_NET_POLL_CONTROLLER
  247. /* for netdump / net console */
  248. static void e1000_netpoll (struct net_device *netdev);
  249. #endif
  250. #ifdef CONFIG_E1000_MQ
  251. /* for multiple Rx queues */
  252. void e1000_rx_schedule(void *data);
  253. #endif
  254. /* Exported from other modules */
  255. extern void e1000_check_options(struct e1000_adapter *adapter);
  256. static struct pci_driver e1000_driver = {
  257. .name = e1000_driver_name,
  258. .id_table = e1000_pci_tbl,
  259. .probe = e1000_probe,
  260. .remove = __devexit_p(e1000_remove),
  261. /* Power Managment Hooks */
  262. #ifdef CONFIG_PM
  263. .suspend = e1000_suspend,
  264. .resume = e1000_resume
  265. #endif
  266. };
  267. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  268. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  269. MODULE_LICENSE("GPL");
  270. MODULE_VERSION(DRV_VERSION);
  271. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  272. module_param(debug, int, 0);
  273. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  274. /**
  275. * e1000_init_module - Driver Registration Routine
  276. *
  277. * e1000_init_module is the first routine called when the driver is
  278. * loaded. All it does is register with the PCI subsystem.
  279. **/
  280. static int __init
  281. e1000_init_module(void)
  282. {
  283. int ret;
  284. printk(KERN_INFO "%s - version %s\n",
  285. e1000_driver_string, e1000_driver_version);
  286. printk(KERN_INFO "%s\n", e1000_copyright);
  287. ret = pci_module_init(&e1000_driver);
  288. return ret;
  289. }
  290. module_init(e1000_init_module);
  291. /**
  292. * e1000_exit_module - Driver Exit Cleanup Routine
  293. *
  294. * e1000_exit_module is called just before the driver is removed
  295. * from memory.
  296. **/
  297. static void __exit
  298. e1000_exit_module(void)
  299. {
  300. pci_unregister_driver(&e1000_driver);
  301. }
  302. module_exit(e1000_exit_module);
  303. /**
  304. * e1000_irq_disable - Mask off interrupt generation on the NIC
  305. * @adapter: board private structure
  306. **/
  307. static inline void
  308. e1000_irq_disable(struct e1000_adapter *adapter)
  309. {
  310. atomic_inc(&adapter->irq_sem);
  311. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  312. E1000_WRITE_FLUSH(&adapter->hw);
  313. synchronize_irq(adapter->pdev->irq);
  314. }
  315. /**
  316. * e1000_irq_enable - Enable default interrupt generation settings
  317. * @adapter: board private structure
  318. **/
  319. static inline void
  320. e1000_irq_enable(struct e1000_adapter *adapter)
  321. {
  322. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  323. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  324. E1000_WRITE_FLUSH(&adapter->hw);
  325. }
  326. }
  327. static void
  328. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  329. {
  330. struct net_device *netdev = adapter->netdev;
  331. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  332. uint16_t old_vid = adapter->mng_vlan_id;
  333. if (adapter->vlgrp) {
  334. if (!adapter->vlgrp->vlan_devices[vid]) {
  335. if (adapter->hw.mng_cookie.status &
  336. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  337. e1000_vlan_rx_add_vid(netdev, vid);
  338. adapter->mng_vlan_id = vid;
  339. } else
  340. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  341. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  342. (vid != old_vid) &&
  343. !adapter->vlgrp->vlan_devices[old_vid])
  344. e1000_vlan_rx_kill_vid(netdev, old_vid);
  345. }
  346. }
  347. }
  348. /**
  349. * e1000_release_hw_control - release control of the h/w to f/w
  350. * @adapter: address of board private structure
  351. *
  352. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  353. * For ASF and Pass Through versions of f/w this means that the
  354. * driver is no longer loaded. For AMT version (only with 82573) i
  355. * of the f/w this means that the netowrk i/f is closed.
  356. *
  357. **/
  358. static inline void
  359. e1000_release_hw_control(struct e1000_adapter *adapter)
  360. {
  361. uint32_t ctrl_ext;
  362. uint32_t swsm;
  363. /* Let firmware taken over control of h/w */
  364. switch (adapter->hw.mac_type) {
  365. case e1000_82571:
  366. case e1000_82572:
  367. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  368. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  369. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  370. break;
  371. case e1000_82573:
  372. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  373. E1000_WRITE_REG(&adapter->hw, SWSM,
  374. swsm & ~E1000_SWSM_DRV_LOAD);
  375. default:
  376. break;
  377. }
  378. }
  379. /**
  380. * e1000_get_hw_control - get control of the h/w from f/w
  381. * @adapter: address of board private structure
  382. *
  383. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  384. * For ASF and Pass Through versions of f/w this means that
  385. * the driver is loaded. For AMT version (only with 82573)
  386. * of the f/w this means that the netowrk i/f is open.
  387. *
  388. **/
  389. static inline void
  390. e1000_get_hw_control(struct e1000_adapter *adapter)
  391. {
  392. uint32_t ctrl_ext;
  393. uint32_t swsm;
  394. /* Let firmware know the driver has taken over */
  395. switch (adapter->hw.mac_type) {
  396. case e1000_82571:
  397. case e1000_82572:
  398. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  399. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  400. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  401. break;
  402. case e1000_82573:
  403. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  404. E1000_WRITE_REG(&adapter->hw, SWSM,
  405. swsm | E1000_SWSM_DRV_LOAD);
  406. break;
  407. default:
  408. break;
  409. }
  410. }
  411. int
  412. e1000_up(struct e1000_adapter *adapter)
  413. {
  414. struct net_device *netdev = adapter->netdev;
  415. int i, err;
  416. /* hardware has been reset, we need to reload some things */
  417. /* Reset the PHY if it was previously powered down */
  418. if (adapter->hw.media_type == e1000_media_type_copper) {
  419. uint16_t mii_reg;
  420. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  421. if (mii_reg & MII_CR_POWER_DOWN)
  422. e1000_phy_reset(&adapter->hw);
  423. }
  424. e1000_set_multi(netdev);
  425. e1000_restore_vlan(adapter);
  426. e1000_configure_tx(adapter);
  427. e1000_setup_rctl(adapter);
  428. e1000_configure_rx(adapter);
  429. /* call E1000_DESC_UNUSED which always leaves
  430. * at least 1 descriptor unused to make sure
  431. * next_to_use != next_to_clean */
  432. for (i = 0; i < adapter->num_rx_queues; i++) {
  433. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  434. adapter->alloc_rx_buf(adapter, ring,
  435. E1000_DESC_UNUSED(ring));
  436. }
  437. #ifdef CONFIG_PCI_MSI
  438. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  439. adapter->have_msi = TRUE;
  440. if ((err = pci_enable_msi(adapter->pdev))) {
  441. DPRINTK(PROBE, ERR,
  442. "Unable to allocate MSI interrupt Error: %d\n", err);
  443. adapter->have_msi = FALSE;
  444. }
  445. }
  446. #endif
  447. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  448. SA_SHIRQ | SA_SAMPLE_RANDOM,
  449. netdev->name, netdev))) {
  450. DPRINTK(PROBE, ERR,
  451. "Unable to allocate interrupt Error: %d\n", err);
  452. return err;
  453. }
  454. #ifdef CONFIG_E1000_MQ
  455. e1000_setup_queue_mapping(adapter);
  456. #endif
  457. adapter->tx_queue_len = netdev->tx_queue_len;
  458. mod_timer(&adapter->watchdog_timer, jiffies);
  459. #ifdef CONFIG_E1000_NAPI
  460. netif_poll_enable(netdev);
  461. #endif
  462. e1000_irq_enable(adapter);
  463. return 0;
  464. }
  465. void
  466. e1000_down(struct e1000_adapter *adapter)
  467. {
  468. struct net_device *netdev = adapter->netdev;
  469. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  470. e1000_check_mng_mode(&adapter->hw);
  471. e1000_irq_disable(adapter);
  472. #ifdef CONFIG_E1000_MQ
  473. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  474. #endif
  475. free_irq(adapter->pdev->irq, netdev);
  476. #ifdef CONFIG_PCI_MSI
  477. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  478. adapter->have_msi == TRUE)
  479. pci_disable_msi(adapter->pdev);
  480. #endif
  481. del_timer_sync(&adapter->tx_fifo_stall_timer);
  482. del_timer_sync(&adapter->watchdog_timer);
  483. del_timer_sync(&adapter->phy_info_timer);
  484. #ifdef CONFIG_E1000_NAPI
  485. netif_poll_disable(netdev);
  486. #endif
  487. netdev->tx_queue_len = adapter->tx_queue_len;
  488. adapter->link_speed = 0;
  489. adapter->link_duplex = 0;
  490. netif_carrier_off(netdev);
  491. netif_stop_queue(netdev);
  492. e1000_reset(adapter);
  493. e1000_clean_all_tx_rings(adapter);
  494. e1000_clean_all_rx_rings(adapter);
  495. /* Power down the PHY so no link is implied when interface is down *
  496. * The PHY cannot be powered down if any of the following is TRUE *
  497. * (a) WoL is enabled
  498. * (b) AMT is active
  499. * (c) SoL/IDER session is active */
  500. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  501. adapter->hw.media_type == e1000_media_type_copper &&
  502. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  503. !mng_mode_enabled &&
  504. !e1000_check_phy_reset_block(&adapter->hw)) {
  505. uint16_t mii_reg;
  506. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  507. mii_reg |= MII_CR_POWER_DOWN;
  508. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  509. mdelay(1);
  510. }
  511. }
  512. void
  513. e1000_reset(struct e1000_adapter *adapter)
  514. {
  515. uint32_t pba, manc;
  516. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  517. /* Repartition Pba for greater than 9k mtu
  518. * To take effect CTRL.RST is required.
  519. */
  520. switch (adapter->hw.mac_type) {
  521. case e1000_82547:
  522. case e1000_82547_rev_2:
  523. pba = E1000_PBA_30K;
  524. break;
  525. case e1000_82571:
  526. case e1000_82572:
  527. pba = E1000_PBA_38K;
  528. break;
  529. case e1000_82573:
  530. pba = E1000_PBA_12K;
  531. break;
  532. default:
  533. pba = E1000_PBA_48K;
  534. break;
  535. }
  536. if ((adapter->hw.mac_type != e1000_82573) &&
  537. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  538. pba -= 8; /* allocate more FIFO for Tx */
  539. if (adapter->hw.mac_type == e1000_82547) {
  540. adapter->tx_fifo_head = 0;
  541. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  542. adapter->tx_fifo_size =
  543. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  544. atomic_set(&adapter->tx_fifo_stall, 0);
  545. }
  546. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  547. /* flow control settings */
  548. /* Set the FC high water mark to 90% of the FIFO size.
  549. * Required to clear last 3 LSB */
  550. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  551. adapter->hw.fc_high_water = fc_high_water_mark;
  552. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  553. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  554. adapter->hw.fc_send_xon = 1;
  555. adapter->hw.fc = adapter->hw.original_fc;
  556. /* Allow time for pending master requests to run */
  557. e1000_reset_hw(&adapter->hw);
  558. if (adapter->hw.mac_type >= e1000_82544)
  559. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  560. if (e1000_init_hw(&adapter->hw))
  561. DPRINTK(PROBE, ERR, "Hardware Error\n");
  562. e1000_update_mng_vlan(adapter);
  563. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  564. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  565. e1000_reset_adaptive(&adapter->hw);
  566. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  567. if (adapter->en_mng_pt) {
  568. manc = E1000_READ_REG(&adapter->hw, MANC);
  569. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  570. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  571. }
  572. }
  573. /**
  574. * e1000_probe - Device Initialization Routine
  575. * @pdev: PCI device information struct
  576. * @ent: entry in e1000_pci_tbl
  577. *
  578. * Returns 0 on success, negative on failure
  579. *
  580. * e1000_probe initializes an adapter identified by a pci_dev structure.
  581. * The OS initialization, configuring of the adapter private structure,
  582. * and a hardware reset occur.
  583. **/
  584. static int __devinit
  585. e1000_probe(struct pci_dev *pdev,
  586. const struct pci_device_id *ent)
  587. {
  588. struct net_device *netdev;
  589. struct e1000_adapter *adapter;
  590. unsigned long mmio_start, mmio_len;
  591. static int cards_found = 0;
  592. int i, err, pci_using_dac;
  593. uint16_t eeprom_data;
  594. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  595. if ((err = pci_enable_device(pdev)))
  596. return err;
  597. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  598. pci_using_dac = 1;
  599. } else {
  600. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  601. E1000_ERR("No usable DMA configuration, aborting\n");
  602. return err;
  603. }
  604. pci_using_dac = 0;
  605. }
  606. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  607. return err;
  608. pci_set_master(pdev);
  609. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  610. if (!netdev) {
  611. err = -ENOMEM;
  612. goto err_alloc_etherdev;
  613. }
  614. SET_MODULE_OWNER(netdev);
  615. SET_NETDEV_DEV(netdev, &pdev->dev);
  616. pci_set_drvdata(pdev, netdev);
  617. adapter = netdev_priv(netdev);
  618. adapter->netdev = netdev;
  619. adapter->pdev = pdev;
  620. adapter->hw.back = adapter;
  621. adapter->msg_enable = (1 << debug) - 1;
  622. mmio_start = pci_resource_start(pdev, BAR_0);
  623. mmio_len = pci_resource_len(pdev, BAR_0);
  624. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  625. if (!adapter->hw.hw_addr) {
  626. err = -EIO;
  627. goto err_ioremap;
  628. }
  629. for (i = BAR_1; i <= BAR_5; i++) {
  630. if (pci_resource_len(pdev, i) == 0)
  631. continue;
  632. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  633. adapter->hw.io_base = pci_resource_start(pdev, i);
  634. break;
  635. }
  636. }
  637. netdev->open = &e1000_open;
  638. netdev->stop = &e1000_close;
  639. netdev->hard_start_xmit = &e1000_xmit_frame;
  640. netdev->get_stats = &e1000_get_stats;
  641. netdev->set_multicast_list = &e1000_set_multi;
  642. netdev->set_mac_address = &e1000_set_mac;
  643. netdev->change_mtu = &e1000_change_mtu;
  644. netdev->do_ioctl = &e1000_ioctl;
  645. e1000_set_ethtool_ops(netdev);
  646. netdev->tx_timeout = &e1000_tx_timeout;
  647. netdev->watchdog_timeo = 5 * HZ;
  648. #ifdef CONFIG_E1000_NAPI
  649. netdev->poll = &e1000_clean;
  650. netdev->weight = 64;
  651. #endif
  652. netdev->vlan_rx_register = e1000_vlan_rx_register;
  653. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  654. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  655. #ifdef CONFIG_NET_POLL_CONTROLLER
  656. netdev->poll_controller = e1000_netpoll;
  657. #endif
  658. strcpy(netdev->name, pci_name(pdev));
  659. netdev->mem_start = mmio_start;
  660. netdev->mem_end = mmio_start + mmio_len;
  661. netdev->base_addr = adapter->hw.io_base;
  662. adapter->bd_number = cards_found;
  663. /* setup the private structure */
  664. if ((err = e1000_sw_init(adapter)))
  665. goto err_sw_init;
  666. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  667. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  668. if (adapter->hw.mac_type >= e1000_82543) {
  669. netdev->features = NETIF_F_SG |
  670. NETIF_F_HW_CSUM |
  671. NETIF_F_HW_VLAN_TX |
  672. NETIF_F_HW_VLAN_RX |
  673. NETIF_F_HW_VLAN_FILTER;
  674. }
  675. #ifdef NETIF_F_TSO
  676. if ((adapter->hw.mac_type >= e1000_82544) &&
  677. (adapter->hw.mac_type != e1000_82547))
  678. netdev->features |= NETIF_F_TSO;
  679. #ifdef NETIF_F_TSO_IPV6
  680. if (adapter->hw.mac_type > e1000_82547_rev_2)
  681. netdev->features |= NETIF_F_TSO_IPV6;
  682. #endif
  683. #endif
  684. if (pci_using_dac)
  685. netdev->features |= NETIF_F_HIGHDMA;
  686. /* hard_start_xmit is safe against parallel locking */
  687. netdev->features |= NETIF_F_LLTX;
  688. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  689. /* before reading the EEPROM, reset the controller to
  690. * put the device in a known good starting state */
  691. e1000_reset_hw(&adapter->hw);
  692. /* make sure the EEPROM is good */
  693. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  694. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  695. err = -EIO;
  696. goto err_eeprom;
  697. }
  698. /* copy the MAC address out of the EEPROM */
  699. if (e1000_read_mac_addr(&adapter->hw))
  700. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  701. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  702. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  703. if (!is_valid_ether_addr(netdev->perm_addr)) {
  704. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  705. err = -EIO;
  706. goto err_eeprom;
  707. }
  708. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  709. e1000_get_bus_info(&adapter->hw);
  710. init_timer(&adapter->tx_fifo_stall_timer);
  711. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  712. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  713. init_timer(&adapter->watchdog_timer);
  714. adapter->watchdog_timer.function = &e1000_watchdog;
  715. adapter->watchdog_timer.data = (unsigned long) adapter;
  716. INIT_WORK(&adapter->watchdog_task,
  717. (void (*)(void *))e1000_watchdog_task, adapter);
  718. init_timer(&adapter->phy_info_timer);
  719. adapter->phy_info_timer.function = &e1000_update_phy_info;
  720. adapter->phy_info_timer.data = (unsigned long) adapter;
  721. INIT_WORK(&adapter->tx_timeout_task,
  722. (void (*)(void *))e1000_tx_timeout_task, netdev);
  723. /* we're going to reset, so assume we have no link for now */
  724. netif_carrier_off(netdev);
  725. netif_stop_queue(netdev);
  726. e1000_check_options(adapter);
  727. /* Initial Wake on LAN setting
  728. * If APM wake is enabled in the EEPROM,
  729. * enable the ACPI Magic Packet filter
  730. */
  731. switch (adapter->hw.mac_type) {
  732. case e1000_82542_rev2_0:
  733. case e1000_82542_rev2_1:
  734. case e1000_82543:
  735. break;
  736. case e1000_82544:
  737. e1000_read_eeprom(&adapter->hw,
  738. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  739. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  740. break;
  741. case e1000_82546:
  742. case e1000_82546_rev_3:
  743. case e1000_82571:
  744. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  745. e1000_read_eeprom(&adapter->hw,
  746. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  747. break;
  748. }
  749. /* Fall Through */
  750. default:
  751. e1000_read_eeprom(&adapter->hw,
  752. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  753. break;
  754. }
  755. if (eeprom_data & eeprom_apme_mask)
  756. adapter->wol |= E1000_WUFC_MAG;
  757. /* print bus type/speed/width info */
  758. {
  759. struct e1000_hw *hw = &adapter->hw;
  760. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  761. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  762. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  763. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  764. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  765. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  766. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  767. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  768. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  769. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  770. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  771. "32-bit"));
  772. }
  773. for (i = 0; i < 6; i++)
  774. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  775. /* reset the hardware with the new settings */
  776. e1000_reset(adapter);
  777. /* If the controller is 82573 and f/w is AMT, do not set
  778. * DRV_LOAD until the interface is up. For all other cases,
  779. * let the f/w know that the h/w is now under the control
  780. * of the driver. */
  781. if (adapter->hw.mac_type != e1000_82573 ||
  782. !e1000_check_mng_mode(&adapter->hw))
  783. e1000_get_hw_control(adapter);
  784. strcpy(netdev->name, "eth%d");
  785. if ((err = register_netdev(netdev)))
  786. goto err_register;
  787. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  788. cards_found++;
  789. return 0;
  790. err_register:
  791. err_sw_init:
  792. err_eeprom:
  793. iounmap(adapter->hw.hw_addr);
  794. err_ioremap:
  795. free_netdev(netdev);
  796. err_alloc_etherdev:
  797. pci_release_regions(pdev);
  798. return err;
  799. }
  800. /**
  801. * e1000_remove - Device Removal Routine
  802. * @pdev: PCI device information struct
  803. *
  804. * e1000_remove is called by the PCI subsystem to alert the driver
  805. * that it should release a PCI device. The could be caused by a
  806. * Hot-Plug event, or because the driver is going to be removed from
  807. * memory.
  808. **/
  809. static void __devexit
  810. e1000_remove(struct pci_dev *pdev)
  811. {
  812. struct net_device *netdev = pci_get_drvdata(pdev);
  813. struct e1000_adapter *adapter = netdev_priv(netdev);
  814. uint32_t manc;
  815. #ifdef CONFIG_E1000_NAPI
  816. int i;
  817. #endif
  818. flush_scheduled_work();
  819. if (adapter->hw.mac_type >= e1000_82540 &&
  820. adapter->hw.media_type == e1000_media_type_copper) {
  821. manc = E1000_READ_REG(&adapter->hw, MANC);
  822. if (manc & E1000_MANC_SMBUS_EN) {
  823. manc |= E1000_MANC_ARP_EN;
  824. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  825. }
  826. }
  827. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  828. * would have already happened in close and is redundant. */
  829. e1000_release_hw_control(adapter);
  830. unregister_netdev(netdev);
  831. #ifdef CONFIG_E1000_NAPI
  832. for (i = 0; i < adapter->num_rx_queues; i++)
  833. __dev_put(&adapter->polling_netdev[i]);
  834. #endif
  835. if (!e1000_check_phy_reset_block(&adapter->hw))
  836. e1000_phy_hw_reset(&adapter->hw);
  837. kfree(adapter->tx_ring);
  838. kfree(adapter->rx_ring);
  839. #ifdef CONFIG_E1000_NAPI
  840. kfree(adapter->polling_netdev);
  841. #endif
  842. iounmap(adapter->hw.hw_addr);
  843. pci_release_regions(pdev);
  844. #ifdef CONFIG_E1000_MQ
  845. free_percpu(adapter->cpu_netdev);
  846. free_percpu(adapter->cpu_tx_ring);
  847. #endif
  848. free_netdev(netdev);
  849. pci_disable_device(pdev);
  850. }
  851. /**
  852. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  853. * @adapter: board private structure to initialize
  854. *
  855. * e1000_sw_init initializes the Adapter private data structure.
  856. * Fields are initialized based on PCI device information and
  857. * OS network device settings (MTU size).
  858. **/
  859. static int __devinit
  860. e1000_sw_init(struct e1000_adapter *adapter)
  861. {
  862. struct e1000_hw *hw = &adapter->hw;
  863. struct net_device *netdev = adapter->netdev;
  864. struct pci_dev *pdev = adapter->pdev;
  865. #ifdef CONFIG_E1000_NAPI
  866. int i;
  867. #endif
  868. /* PCI config space info */
  869. hw->vendor_id = pdev->vendor;
  870. hw->device_id = pdev->device;
  871. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  872. hw->subsystem_id = pdev->subsystem_device;
  873. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  874. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  875. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  876. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  877. hw->max_frame_size = netdev->mtu +
  878. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  879. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  880. /* identify the MAC */
  881. if (e1000_set_mac_type(hw)) {
  882. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  883. return -EIO;
  884. }
  885. /* initialize eeprom parameters */
  886. if (e1000_init_eeprom_params(hw)) {
  887. E1000_ERR("EEPROM initialization failed\n");
  888. return -EIO;
  889. }
  890. switch (hw->mac_type) {
  891. default:
  892. break;
  893. case e1000_82541:
  894. case e1000_82547:
  895. case e1000_82541_rev_2:
  896. case e1000_82547_rev_2:
  897. hw->phy_init_script = 1;
  898. break;
  899. }
  900. e1000_set_media_type(hw);
  901. hw->wait_autoneg_complete = FALSE;
  902. hw->tbi_compatibility_en = TRUE;
  903. hw->adaptive_ifs = TRUE;
  904. /* Copper options */
  905. if (hw->media_type == e1000_media_type_copper) {
  906. hw->mdix = AUTO_ALL_MODES;
  907. hw->disable_polarity_correction = FALSE;
  908. hw->master_slave = E1000_MASTER_SLAVE;
  909. }
  910. #ifdef CONFIG_E1000_MQ
  911. /* Number of supported queues */
  912. switch (hw->mac_type) {
  913. case e1000_82571:
  914. case e1000_82572:
  915. /* These controllers support 2 tx queues, but with a single
  916. * qdisc implementation, multiple tx queues aren't quite as
  917. * interesting. If we can find a logical way of mapping
  918. * flows to a queue, then perhaps we can up the num_tx_queue
  919. * count back to its default. Until then, we run the risk of
  920. * terrible performance due to SACK overload. */
  921. adapter->num_tx_queues = 1;
  922. adapter->num_rx_queues = 2;
  923. break;
  924. default:
  925. adapter->num_tx_queues = 1;
  926. adapter->num_rx_queues = 1;
  927. break;
  928. }
  929. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  930. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  931. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  932. adapter->num_rx_queues,
  933. ((adapter->num_rx_queues == 1)
  934. ? ((num_online_cpus() > 1)
  935. ? "(due to unsupported feature in current adapter)"
  936. : "(due to unsupported system configuration)")
  937. : ""));
  938. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  939. adapter->num_tx_queues);
  940. #else
  941. adapter->num_tx_queues = 1;
  942. adapter->num_rx_queues = 1;
  943. #endif
  944. if (e1000_alloc_queues(adapter)) {
  945. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  946. return -ENOMEM;
  947. }
  948. #ifdef CONFIG_E1000_NAPI
  949. for (i = 0; i < adapter->num_rx_queues; i++) {
  950. adapter->polling_netdev[i].priv = adapter;
  951. adapter->polling_netdev[i].poll = &e1000_clean;
  952. adapter->polling_netdev[i].weight = 64;
  953. dev_hold(&adapter->polling_netdev[i]);
  954. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  955. }
  956. spin_lock_init(&adapter->tx_queue_lock);
  957. #endif
  958. atomic_set(&adapter->irq_sem, 1);
  959. spin_lock_init(&adapter->stats_lock);
  960. return 0;
  961. }
  962. /**
  963. * e1000_alloc_queues - Allocate memory for all rings
  964. * @adapter: board private structure to initialize
  965. *
  966. * We allocate one ring per queue at run-time since we don't know the
  967. * number of queues at compile-time. The polling_netdev array is
  968. * intended for Multiqueue, but should work fine with a single queue.
  969. **/
  970. static int __devinit
  971. e1000_alloc_queues(struct e1000_adapter *adapter)
  972. {
  973. int size;
  974. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  975. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  976. if (!adapter->tx_ring)
  977. return -ENOMEM;
  978. memset(adapter->tx_ring, 0, size);
  979. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  980. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  981. if (!adapter->rx_ring) {
  982. kfree(adapter->tx_ring);
  983. return -ENOMEM;
  984. }
  985. memset(adapter->rx_ring, 0, size);
  986. #ifdef CONFIG_E1000_NAPI
  987. size = sizeof(struct net_device) * adapter->num_rx_queues;
  988. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  989. if (!adapter->polling_netdev) {
  990. kfree(adapter->tx_ring);
  991. kfree(adapter->rx_ring);
  992. return -ENOMEM;
  993. }
  994. memset(adapter->polling_netdev, 0, size);
  995. #endif
  996. #ifdef CONFIG_E1000_MQ
  997. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  998. adapter->rx_sched_call_data.info = adapter->netdev;
  999. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  1000. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  1001. #endif
  1002. return E1000_SUCCESS;
  1003. }
  1004. #ifdef CONFIG_E1000_MQ
  1005. static void __devinit
  1006. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  1007. {
  1008. int i, cpu;
  1009. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  1010. adapter->rx_sched_call_data.info = adapter->netdev;
  1011. cpus_clear(adapter->rx_sched_call_data.cpumask);
  1012. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  1013. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  1014. lock_cpu_hotplug();
  1015. i = 0;
  1016. for_each_online_cpu(cpu) {
  1017. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  1018. /* This is incomplete because we'd like to assign separate
  1019. * physical cpus to these netdev polling structures and
  1020. * avoid saturating a subset of cpus.
  1021. */
  1022. if (i < adapter->num_rx_queues) {
  1023. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  1024. adapter->rx_ring[i].cpu = cpu;
  1025. cpu_set(cpu, adapter->cpumask);
  1026. } else
  1027. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  1028. i++;
  1029. }
  1030. unlock_cpu_hotplug();
  1031. }
  1032. #endif
  1033. /**
  1034. * e1000_open - Called when a network interface is made active
  1035. * @netdev: network interface device structure
  1036. *
  1037. * Returns 0 on success, negative value on failure
  1038. *
  1039. * The open entry point is called when a network interface is made
  1040. * active by the system (IFF_UP). At this point all resources needed
  1041. * for transmit and receive operations are allocated, the interrupt
  1042. * handler is registered with the OS, the watchdog timer is started,
  1043. * and the stack is notified that the interface is ready.
  1044. **/
  1045. static int
  1046. e1000_open(struct net_device *netdev)
  1047. {
  1048. struct e1000_adapter *adapter = netdev_priv(netdev);
  1049. int err;
  1050. /* allocate transmit descriptors */
  1051. if ((err = e1000_setup_all_tx_resources(adapter)))
  1052. goto err_setup_tx;
  1053. /* allocate receive descriptors */
  1054. if ((err = e1000_setup_all_rx_resources(adapter)))
  1055. goto err_setup_rx;
  1056. if ((err = e1000_up(adapter)))
  1057. goto err_up;
  1058. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1059. if ((adapter->hw.mng_cookie.status &
  1060. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1061. e1000_update_mng_vlan(adapter);
  1062. }
  1063. /* If AMT is enabled, let the firmware know that the network
  1064. * interface is now open */
  1065. if (adapter->hw.mac_type == e1000_82573 &&
  1066. e1000_check_mng_mode(&adapter->hw))
  1067. e1000_get_hw_control(adapter);
  1068. return E1000_SUCCESS;
  1069. err_up:
  1070. e1000_free_all_rx_resources(adapter);
  1071. err_setup_rx:
  1072. e1000_free_all_tx_resources(adapter);
  1073. err_setup_tx:
  1074. e1000_reset(adapter);
  1075. return err;
  1076. }
  1077. /**
  1078. * e1000_close - Disables a network interface
  1079. * @netdev: network interface device structure
  1080. *
  1081. * Returns 0, this is not allowed to fail
  1082. *
  1083. * The close entry point is called when an interface is de-activated
  1084. * by the OS. The hardware is still under the drivers control, but
  1085. * needs to be disabled. A global MAC reset is issued to stop the
  1086. * hardware, and all transmit and receive resources are freed.
  1087. **/
  1088. static int
  1089. e1000_close(struct net_device *netdev)
  1090. {
  1091. struct e1000_adapter *adapter = netdev_priv(netdev);
  1092. e1000_down(adapter);
  1093. e1000_free_all_tx_resources(adapter);
  1094. e1000_free_all_rx_resources(adapter);
  1095. if ((adapter->hw.mng_cookie.status &
  1096. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1097. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1098. }
  1099. /* If AMT is enabled, let the firmware know that the network
  1100. * interface is now closed */
  1101. if (adapter->hw.mac_type == e1000_82573 &&
  1102. e1000_check_mng_mode(&adapter->hw))
  1103. e1000_release_hw_control(adapter);
  1104. return 0;
  1105. }
  1106. /**
  1107. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1108. * @adapter: address of board private structure
  1109. * @start: address of beginning of memory
  1110. * @len: length of memory
  1111. **/
  1112. static inline boolean_t
  1113. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1114. void *start, unsigned long len)
  1115. {
  1116. unsigned long begin = (unsigned long) start;
  1117. unsigned long end = begin + len;
  1118. /* First rev 82545 and 82546 need to not allow any memory
  1119. * write location to cross 64k boundary due to errata 23 */
  1120. if (adapter->hw.mac_type == e1000_82545 ||
  1121. adapter->hw.mac_type == e1000_82546) {
  1122. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1123. }
  1124. return TRUE;
  1125. }
  1126. /**
  1127. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1128. * @adapter: board private structure
  1129. * @txdr: tx descriptor ring (for a specific queue) to setup
  1130. *
  1131. * Return 0 on success, negative on failure
  1132. **/
  1133. static int
  1134. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1135. struct e1000_tx_ring *txdr)
  1136. {
  1137. struct pci_dev *pdev = adapter->pdev;
  1138. int size;
  1139. size = sizeof(struct e1000_buffer) * txdr->count;
  1140. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1141. if (!txdr->buffer_info) {
  1142. DPRINTK(PROBE, ERR,
  1143. "Unable to allocate memory for the transmit descriptor ring\n");
  1144. return -ENOMEM;
  1145. }
  1146. memset(txdr->buffer_info, 0, size);
  1147. /* round up to nearest 4K */
  1148. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1149. E1000_ROUNDUP(txdr->size, 4096);
  1150. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1151. if (!txdr->desc) {
  1152. setup_tx_desc_die:
  1153. vfree(txdr->buffer_info);
  1154. DPRINTK(PROBE, ERR,
  1155. "Unable to allocate memory for the transmit descriptor ring\n");
  1156. return -ENOMEM;
  1157. }
  1158. /* Fix for errata 23, can't cross 64kB boundary */
  1159. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1160. void *olddesc = txdr->desc;
  1161. dma_addr_t olddma = txdr->dma;
  1162. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1163. "at %p\n", txdr->size, txdr->desc);
  1164. /* Try again, without freeing the previous */
  1165. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1166. /* Failed allocation, critical failure */
  1167. if (!txdr->desc) {
  1168. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1169. goto setup_tx_desc_die;
  1170. }
  1171. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1172. /* give up */
  1173. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1174. txdr->dma);
  1175. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1176. DPRINTK(PROBE, ERR,
  1177. "Unable to allocate aligned memory "
  1178. "for the transmit descriptor ring\n");
  1179. vfree(txdr->buffer_info);
  1180. return -ENOMEM;
  1181. } else {
  1182. /* Free old allocation, new allocation was successful */
  1183. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1184. }
  1185. }
  1186. memset(txdr->desc, 0, txdr->size);
  1187. txdr->next_to_use = 0;
  1188. txdr->next_to_clean = 0;
  1189. spin_lock_init(&txdr->tx_lock);
  1190. return 0;
  1191. }
  1192. /**
  1193. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1194. * (Descriptors) for all queues
  1195. * @adapter: board private structure
  1196. *
  1197. * If this function returns with an error, then it's possible one or
  1198. * more of the rings is populated (while the rest are not). It is the
  1199. * callers duty to clean those orphaned rings.
  1200. *
  1201. * Return 0 on success, negative on failure
  1202. **/
  1203. int
  1204. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1205. {
  1206. int i, err = 0;
  1207. for (i = 0; i < adapter->num_tx_queues; i++) {
  1208. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1209. if (err) {
  1210. DPRINTK(PROBE, ERR,
  1211. "Allocation for Tx Queue %u failed\n", i);
  1212. break;
  1213. }
  1214. }
  1215. return err;
  1216. }
  1217. /**
  1218. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1219. * @adapter: board private structure
  1220. *
  1221. * Configure the Tx unit of the MAC after a reset.
  1222. **/
  1223. static void
  1224. e1000_configure_tx(struct e1000_adapter *adapter)
  1225. {
  1226. uint64_t tdba;
  1227. struct e1000_hw *hw = &adapter->hw;
  1228. uint32_t tdlen, tctl, tipg, tarc;
  1229. uint32_t ipgr1, ipgr2;
  1230. /* Setup the HW Tx Head and Tail descriptor pointers */
  1231. switch (adapter->num_tx_queues) {
  1232. case 2:
  1233. tdba = adapter->tx_ring[1].dma;
  1234. tdlen = adapter->tx_ring[1].count *
  1235. sizeof(struct e1000_tx_desc);
  1236. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1237. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1238. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1239. E1000_WRITE_REG(hw, TDH1, 0);
  1240. E1000_WRITE_REG(hw, TDT1, 0);
  1241. adapter->tx_ring[1].tdh = E1000_TDH1;
  1242. adapter->tx_ring[1].tdt = E1000_TDT1;
  1243. /* Fall Through */
  1244. case 1:
  1245. default:
  1246. tdba = adapter->tx_ring[0].dma;
  1247. tdlen = adapter->tx_ring[0].count *
  1248. sizeof(struct e1000_tx_desc);
  1249. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1250. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1251. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1252. E1000_WRITE_REG(hw, TDH, 0);
  1253. E1000_WRITE_REG(hw, TDT, 0);
  1254. adapter->tx_ring[0].tdh = E1000_TDH;
  1255. adapter->tx_ring[0].tdt = E1000_TDT;
  1256. break;
  1257. }
  1258. /* Set the default values for the Tx Inter Packet Gap timer */
  1259. if (hw->media_type == e1000_media_type_fiber ||
  1260. hw->media_type == e1000_media_type_internal_serdes)
  1261. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1262. else
  1263. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1264. switch (hw->mac_type) {
  1265. case e1000_82542_rev2_0:
  1266. case e1000_82542_rev2_1:
  1267. tipg = DEFAULT_82542_TIPG_IPGT;
  1268. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1269. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1270. break;
  1271. default:
  1272. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1273. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1274. break;
  1275. }
  1276. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1277. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1278. E1000_WRITE_REG(hw, TIPG, tipg);
  1279. /* Set the Tx Interrupt Delay register */
  1280. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1281. if (hw->mac_type >= e1000_82540)
  1282. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1283. /* Program the Transmit Control Register */
  1284. tctl = E1000_READ_REG(hw, TCTL);
  1285. tctl &= ~E1000_TCTL_CT;
  1286. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1287. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1288. E1000_WRITE_REG(hw, TCTL, tctl);
  1289. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1290. tarc = E1000_READ_REG(hw, TARC0);
  1291. tarc |= ((1 << 25) | (1 << 21));
  1292. E1000_WRITE_REG(hw, TARC0, tarc);
  1293. tarc = E1000_READ_REG(hw, TARC1);
  1294. tarc |= (1 << 25);
  1295. if (tctl & E1000_TCTL_MULR)
  1296. tarc &= ~(1 << 28);
  1297. else
  1298. tarc |= (1 << 28);
  1299. E1000_WRITE_REG(hw, TARC1, tarc);
  1300. }
  1301. e1000_config_collision_dist(hw);
  1302. /* Setup Transmit Descriptor Settings for eop descriptor */
  1303. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1304. E1000_TXD_CMD_IFCS;
  1305. if (hw->mac_type < e1000_82543)
  1306. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1307. else
  1308. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1309. /* Cache if we're 82544 running in PCI-X because we'll
  1310. * need this to apply a workaround later in the send path. */
  1311. if (hw->mac_type == e1000_82544 &&
  1312. hw->bus_type == e1000_bus_type_pcix)
  1313. adapter->pcix_82544 = 1;
  1314. }
  1315. /**
  1316. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1317. * @adapter: board private structure
  1318. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1319. *
  1320. * Returns 0 on success, negative on failure
  1321. **/
  1322. static int
  1323. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1324. struct e1000_rx_ring *rxdr)
  1325. {
  1326. struct pci_dev *pdev = adapter->pdev;
  1327. int size, desc_len;
  1328. size = sizeof(struct e1000_buffer) * rxdr->count;
  1329. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1330. if (!rxdr->buffer_info) {
  1331. DPRINTK(PROBE, ERR,
  1332. "Unable to allocate memory for the receive descriptor ring\n");
  1333. return -ENOMEM;
  1334. }
  1335. memset(rxdr->buffer_info, 0, size);
  1336. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1337. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1338. if (!rxdr->ps_page) {
  1339. vfree(rxdr->buffer_info);
  1340. DPRINTK(PROBE, ERR,
  1341. "Unable to allocate memory for the receive descriptor ring\n");
  1342. return -ENOMEM;
  1343. }
  1344. memset(rxdr->ps_page, 0, size);
  1345. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1346. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1347. if (!rxdr->ps_page_dma) {
  1348. vfree(rxdr->buffer_info);
  1349. kfree(rxdr->ps_page);
  1350. DPRINTK(PROBE, ERR,
  1351. "Unable to allocate memory for the receive descriptor ring\n");
  1352. return -ENOMEM;
  1353. }
  1354. memset(rxdr->ps_page_dma, 0, size);
  1355. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1356. desc_len = sizeof(struct e1000_rx_desc);
  1357. else
  1358. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1359. /* Round up to nearest 4K */
  1360. rxdr->size = rxdr->count * desc_len;
  1361. E1000_ROUNDUP(rxdr->size, 4096);
  1362. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1363. if (!rxdr->desc) {
  1364. DPRINTK(PROBE, ERR,
  1365. "Unable to allocate memory for the receive descriptor ring\n");
  1366. setup_rx_desc_die:
  1367. vfree(rxdr->buffer_info);
  1368. kfree(rxdr->ps_page);
  1369. kfree(rxdr->ps_page_dma);
  1370. return -ENOMEM;
  1371. }
  1372. /* Fix for errata 23, can't cross 64kB boundary */
  1373. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1374. void *olddesc = rxdr->desc;
  1375. dma_addr_t olddma = rxdr->dma;
  1376. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1377. "at %p\n", rxdr->size, rxdr->desc);
  1378. /* Try again, without freeing the previous */
  1379. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1380. /* Failed allocation, critical failure */
  1381. if (!rxdr->desc) {
  1382. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1383. DPRINTK(PROBE, ERR,
  1384. "Unable to allocate memory "
  1385. "for the receive descriptor ring\n");
  1386. goto setup_rx_desc_die;
  1387. }
  1388. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1389. /* give up */
  1390. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1391. rxdr->dma);
  1392. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1393. DPRINTK(PROBE, ERR,
  1394. "Unable to allocate aligned memory "
  1395. "for the receive descriptor ring\n");
  1396. goto setup_rx_desc_die;
  1397. } else {
  1398. /* Free old allocation, new allocation was successful */
  1399. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1400. }
  1401. }
  1402. memset(rxdr->desc, 0, rxdr->size);
  1403. rxdr->next_to_clean = 0;
  1404. rxdr->next_to_use = 0;
  1405. rxdr->rx_skb_top = NULL;
  1406. rxdr->rx_skb_prev = NULL;
  1407. return 0;
  1408. }
  1409. /**
  1410. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1411. * (Descriptors) for all queues
  1412. * @adapter: board private structure
  1413. *
  1414. * If this function returns with an error, then it's possible one or
  1415. * more of the rings is populated (while the rest are not). It is the
  1416. * callers duty to clean those orphaned rings.
  1417. *
  1418. * Return 0 on success, negative on failure
  1419. **/
  1420. int
  1421. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1422. {
  1423. int i, err = 0;
  1424. for (i = 0; i < adapter->num_rx_queues; i++) {
  1425. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1426. if (err) {
  1427. DPRINTK(PROBE, ERR,
  1428. "Allocation for Rx Queue %u failed\n", i);
  1429. break;
  1430. }
  1431. }
  1432. return err;
  1433. }
  1434. /**
  1435. * e1000_setup_rctl - configure the receive control registers
  1436. * @adapter: Board private structure
  1437. **/
  1438. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1439. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1440. static void
  1441. e1000_setup_rctl(struct e1000_adapter *adapter)
  1442. {
  1443. uint32_t rctl, rfctl;
  1444. uint32_t psrctl = 0;
  1445. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1446. uint32_t pages = 0;
  1447. #endif
  1448. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1449. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1450. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1451. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1452. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1453. if (adapter->hw.mac_type > e1000_82543)
  1454. rctl |= E1000_RCTL_SECRC;
  1455. if (adapter->hw.tbi_compatibility_on == 1)
  1456. rctl |= E1000_RCTL_SBP;
  1457. else
  1458. rctl &= ~E1000_RCTL_SBP;
  1459. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1460. rctl &= ~E1000_RCTL_LPE;
  1461. else
  1462. rctl |= E1000_RCTL_LPE;
  1463. /* Setup buffer sizes */
  1464. if (adapter->hw.mac_type >= e1000_82571) {
  1465. /* We can now specify buffers in 1K increments.
  1466. * BSIZE and BSEX are ignored in this case. */
  1467. rctl |= adapter->rx_buffer_len << 0x11;
  1468. } else {
  1469. rctl &= ~E1000_RCTL_SZ_4096;
  1470. rctl &= ~E1000_RCTL_BSEX;
  1471. rctl |= E1000_RCTL_SZ_2048;
  1472. }
  1473. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1474. /* 82571 and greater support packet-split where the protocol
  1475. * header is placed in skb->data and the packet data is
  1476. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1477. * In the case of a non-split, skb->data is linearly filled,
  1478. * followed by the page buffers. Therefore, skb->data is
  1479. * sized to hold the largest protocol header.
  1480. */
  1481. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1482. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1483. PAGE_SIZE <= 16384)
  1484. adapter->rx_ps_pages = pages;
  1485. else
  1486. adapter->rx_ps_pages = 0;
  1487. #endif
  1488. if (adapter->rx_ps_pages) {
  1489. /* Configure extra packet-split registers */
  1490. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1491. rfctl |= E1000_RFCTL_EXTEN;
  1492. /* disable IPv6 packet split support */
  1493. rfctl |= E1000_RFCTL_IPV6_DIS;
  1494. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1495. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1496. psrctl |= adapter->rx_ps_bsize0 >>
  1497. E1000_PSRCTL_BSIZE0_SHIFT;
  1498. switch (adapter->rx_ps_pages) {
  1499. case 3:
  1500. psrctl |= PAGE_SIZE <<
  1501. E1000_PSRCTL_BSIZE3_SHIFT;
  1502. case 2:
  1503. psrctl |= PAGE_SIZE <<
  1504. E1000_PSRCTL_BSIZE2_SHIFT;
  1505. case 1:
  1506. psrctl |= PAGE_SIZE >>
  1507. E1000_PSRCTL_BSIZE1_SHIFT;
  1508. break;
  1509. }
  1510. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1511. }
  1512. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1513. }
  1514. /**
  1515. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1516. * @adapter: board private structure
  1517. *
  1518. * Configure the Rx unit of the MAC after a reset.
  1519. **/
  1520. static void
  1521. e1000_configure_rx(struct e1000_adapter *adapter)
  1522. {
  1523. uint64_t rdba;
  1524. struct e1000_hw *hw = &adapter->hw;
  1525. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1526. #ifdef CONFIG_E1000_MQ
  1527. uint32_t reta, mrqc;
  1528. int i;
  1529. #endif
  1530. if (adapter->rx_ps_pages) {
  1531. rdlen = adapter->rx_ring[0].count *
  1532. sizeof(union e1000_rx_desc_packet_split);
  1533. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1534. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1535. } else {
  1536. rdlen = adapter->rx_ring[0].count *
  1537. sizeof(struct e1000_rx_desc);
  1538. adapter->clean_rx = e1000_clean_rx_irq;
  1539. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1540. }
  1541. /* disable receives while setting up the descriptors */
  1542. rctl = E1000_READ_REG(hw, RCTL);
  1543. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1544. /* set the Receive Delay Timer Register */
  1545. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1546. if (hw->mac_type >= e1000_82540) {
  1547. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1548. if (adapter->itr > 1)
  1549. E1000_WRITE_REG(hw, ITR,
  1550. 1000000000 / (adapter->itr * 256));
  1551. }
  1552. if (hw->mac_type >= e1000_82571) {
  1553. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1554. /* Reset delay timers after every interrupt */
  1555. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1556. #ifdef CONFIG_E1000_NAPI
  1557. /* Auto-Mask interrupts upon ICR read. */
  1558. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1559. #endif
  1560. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1561. E1000_WRITE_REG(hw, IAM, ~0);
  1562. E1000_WRITE_FLUSH(hw);
  1563. }
  1564. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1565. * the Base and Length of the Rx Descriptor Ring */
  1566. switch (adapter->num_rx_queues) {
  1567. #ifdef CONFIG_E1000_MQ
  1568. case 2:
  1569. rdba = adapter->rx_ring[1].dma;
  1570. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1571. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1572. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1573. E1000_WRITE_REG(hw, RDH1, 0);
  1574. E1000_WRITE_REG(hw, RDT1, 0);
  1575. adapter->rx_ring[1].rdh = E1000_RDH1;
  1576. adapter->rx_ring[1].rdt = E1000_RDT1;
  1577. /* Fall Through */
  1578. #endif
  1579. case 1:
  1580. default:
  1581. rdba = adapter->rx_ring[0].dma;
  1582. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1583. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1584. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1585. E1000_WRITE_REG(hw, RDH, 0);
  1586. E1000_WRITE_REG(hw, RDT, 0);
  1587. adapter->rx_ring[0].rdh = E1000_RDH;
  1588. adapter->rx_ring[0].rdt = E1000_RDT;
  1589. break;
  1590. }
  1591. #ifdef CONFIG_E1000_MQ
  1592. if (adapter->num_rx_queues > 1) {
  1593. uint32_t random[10];
  1594. get_random_bytes(&random[0], 40);
  1595. if (hw->mac_type <= e1000_82572) {
  1596. E1000_WRITE_REG(hw, RSSIR, 0);
  1597. E1000_WRITE_REG(hw, RSSIM, 0);
  1598. }
  1599. switch (adapter->num_rx_queues) {
  1600. case 2:
  1601. default:
  1602. reta = 0x00800080;
  1603. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1604. break;
  1605. }
  1606. /* Fill out redirection table */
  1607. for (i = 0; i < 32; i++)
  1608. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1609. /* Fill out hash function seeds */
  1610. for (i = 0; i < 10; i++)
  1611. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1612. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1613. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1614. E1000_WRITE_REG(hw, MRQC, mrqc);
  1615. }
  1616. /* Multiqueue and packet checksumming are mutually exclusive. */
  1617. if (hw->mac_type >= e1000_82571) {
  1618. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1619. rxcsum |= E1000_RXCSUM_PCSD;
  1620. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1621. }
  1622. #else
  1623. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1624. if (hw->mac_type >= e1000_82543) {
  1625. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1626. if (adapter->rx_csum == TRUE) {
  1627. rxcsum |= E1000_RXCSUM_TUOFL;
  1628. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1629. * Must be used in conjunction with packet-split. */
  1630. if ((hw->mac_type >= e1000_82571) &&
  1631. (adapter->rx_ps_pages)) {
  1632. rxcsum |= E1000_RXCSUM_IPPCSE;
  1633. }
  1634. } else {
  1635. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1636. /* don't need to clear IPPCSE as it defaults to 0 */
  1637. }
  1638. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1639. }
  1640. #endif /* CONFIG_E1000_MQ */
  1641. if (hw->mac_type == e1000_82573)
  1642. E1000_WRITE_REG(hw, ERT, 0x0100);
  1643. /* Enable Receives */
  1644. E1000_WRITE_REG(hw, RCTL, rctl);
  1645. }
  1646. /**
  1647. * e1000_free_tx_resources - Free Tx Resources per Queue
  1648. * @adapter: board private structure
  1649. * @tx_ring: Tx descriptor ring for a specific queue
  1650. *
  1651. * Free all transmit software resources
  1652. **/
  1653. static void
  1654. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1655. struct e1000_tx_ring *tx_ring)
  1656. {
  1657. struct pci_dev *pdev = adapter->pdev;
  1658. e1000_clean_tx_ring(adapter, tx_ring);
  1659. vfree(tx_ring->buffer_info);
  1660. tx_ring->buffer_info = NULL;
  1661. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1662. tx_ring->desc = NULL;
  1663. }
  1664. /**
  1665. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1666. * @adapter: board private structure
  1667. *
  1668. * Free all transmit software resources
  1669. **/
  1670. void
  1671. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1672. {
  1673. int i;
  1674. for (i = 0; i < adapter->num_tx_queues; i++)
  1675. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1676. }
  1677. static inline void
  1678. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1679. struct e1000_buffer *buffer_info)
  1680. {
  1681. if (buffer_info->dma) {
  1682. pci_unmap_page(adapter->pdev,
  1683. buffer_info->dma,
  1684. buffer_info->length,
  1685. PCI_DMA_TODEVICE);
  1686. }
  1687. if (buffer_info->skb)
  1688. dev_kfree_skb_any(buffer_info->skb);
  1689. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1690. }
  1691. /**
  1692. * e1000_clean_tx_ring - Free Tx Buffers
  1693. * @adapter: board private structure
  1694. * @tx_ring: ring to be cleaned
  1695. **/
  1696. static void
  1697. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1698. struct e1000_tx_ring *tx_ring)
  1699. {
  1700. struct e1000_buffer *buffer_info;
  1701. unsigned long size;
  1702. unsigned int i;
  1703. /* Free all the Tx ring sk_buffs */
  1704. for (i = 0; i < tx_ring->count; i++) {
  1705. buffer_info = &tx_ring->buffer_info[i];
  1706. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1707. }
  1708. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1709. memset(tx_ring->buffer_info, 0, size);
  1710. /* Zero out the descriptor ring */
  1711. memset(tx_ring->desc, 0, tx_ring->size);
  1712. tx_ring->next_to_use = 0;
  1713. tx_ring->next_to_clean = 0;
  1714. tx_ring->last_tx_tso = 0;
  1715. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1716. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1717. }
  1718. /**
  1719. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1720. * @adapter: board private structure
  1721. **/
  1722. static void
  1723. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1724. {
  1725. int i;
  1726. for (i = 0; i < adapter->num_tx_queues; i++)
  1727. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1728. }
  1729. /**
  1730. * e1000_free_rx_resources - Free Rx Resources
  1731. * @adapter: board private structure
  1732. * @rx_ring: ring to clean the resources from
  1733. *
  1734. * Free all receive software resources
  1735. **/
  1736. static void
  1737. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1738. struct e1000_rx_ring *rx_ring)
  1739. {
  1740. struct pci_dev *pdev = adapter->pdev;
  1741. e1000_clean_rx_ring(adapter, rx_ring);
  1742. vfree(rx_ring->buffer_info);
  1743. rx_ring->buffer_info = NULL;
  1744. kfree(rx_ring->ps_page);
  1745. rx_ring->ps_page = NULL;
  1746. kfree(rx_ring->ps_page_dma);
  1747. rx_ring->ps_page_dma = NULL;
  1748. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1749. rx_ring->desc = NULL;
  1750. }
  1751. /**
  1752. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1753. * @adapter: board private structure
  1754. *
  1755. * Free all receive software resources
  1756. **/
  1757. void
  1758. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1759. {
  1760. int i;
  1761. for (i = 0; i < adapter->num_rx_queues; i++)
  1762. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1763. }
  1764. /**
  1765. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1766. * @adapter: board private structure
  1767. * @rx_ring: ring to free buffers from
  1768. **/
  1769. static void
  1770. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1771. struct e1000_rx_ring *rx_ring)
  1772. {
  1773. struct e1000_buffer *buffer_info;
  1774. struct e1000_ps_page *ps_page;
  1775. struct e1000_ps_page_dma *ps_page_dma;
  1776. struct pci_dev *pdev = adapter->pdev;
  1777. unsigned long size;
  1778. unsigned int i, j;
  1779. /* Free all the Rx ring sk_buffs */
  1780. for (i = 0; i < rx_ring->count; i++) {
  1781. buffer_info = &rx_ring->buffer_info[i];
  1782. if (buffer_info->skb) {
  1783. pci_unmap_single(pdev,
  1784. buffer_info->dma,
  1785. buffer_info->length,
  1786. PCI_DMA_FROMDEVICE);
  1787. dev_kfree_skb(buffer_info->skb);
  1788. buffer_info->skb = NULL;
  1789. }
  1790. ps_page = &rx_ring->ps_page[i];
  1791. ps_page_dma = &rx_ring->ps_page_dma[i];
  1792. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1793. if (!ps_page->ps_page[j]) break;
  1794. pci_unmap_page(pdev,
  1795. ps_page_dma->ps_page_dma[j],
  1796. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1797. ps_page_dma->ps_page_dma[j] = 0;
  1798. put_page(ps_page->ps_page[j]);
  1799. ps_page->ps_page[j] = NULL;
  1800. }
  1801. }
  1802. /* there also may be some cached data in our adapter */
  1803. if (rx_ring->rx_skb_top) {
  1804. dev_kfree_skb(rx_ring->rx_skb_top);
  1805. /* rx_skb_prev will be wiped out by rx_skb_top */
  1806. rx_ring->rx_skb_top = NULL;
  1807. rx_ring->rx_skb_prev = NULL;
  1808. }
  1809. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1810. memset(rx_ring->buffer_info, 0, size);
  1811. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1812. memset(rx_ring->ps_page, 0, size);
  1813. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1814. memset(rx_ring->ps_page_dma, 0, size);
  1815. /* Zero out the descriptor ring */
  1816. memset(rx_ring->desc, 0, rx_ring->size);
  1817. rx_ring->next_to_clean = 0;
  1818. rx_ring->next_to_use = 0;
  1819. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1820. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1821. }
  1822. /**
  1823. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1824. * @adapter: board private structure
  1825. **/
  1826. static void
  1827. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1828. {
  1829. int i;
  1830. for (i = 0; i < adapter->num_rx_queues; i++)
  1831. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1832. }
  1833. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1834. * and memory write and invalidate disabled for certain operations
  1835. */
  1836. static void
  1837. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1838. {
  1839. struct net_device *netdev = adapter->netdev;
  1840. uint32_t rctl;
  1841. e1000_pci_clear_mwi(&adapter->hw);
  1842. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1843. rctl |= E1000_RCTL_RST;
  1844. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1845. E1000_WRITE_FLUSH(&adapter->hw);
  1846. mdelay(5);
  1847. if (netif_running(netdev))
  1848. e1000_clean_all_rx_rings(adapter);
  1849. }
  1850. static void
  1851. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1852. {
  1853. struct net_device *netdev = adapter->netdev;
  1854. uint32_t rctl;
  1855. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1856. rctl &= ~E1000_RCTL_RST;
  1857. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1858. E1000_WRITE_FLUSH(&adapter->hw);
  1859. mdelay(5);
  1860. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1861. e1000_pci_set_mwi(&adapter->hw);
  1862. if (netif_running(netdev)) {
  1863. e1000_configure_rx(adapter);
  1864. /* No need to loop, because 82542 supports only 1 queue */
  1865. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1866. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1867. }
  1868. }
  1869. /**
  1870. * e1000_set_mac - Change the Ethernet Address of the NIC
  1871. * @netdev: network interface device structure
  1872. * @p: pointer to an address structure
  1873. *
  1874. * Returns 0 on success, negative on failure
  1875. **/
  1876. static int
  1877. e1000_set_mac(struct net_device *netdev, void *p)
  1878. {
  1879. struct e1000_adapter *adapter = netdev_priv(netdev);
  1880. struct sockaddr *addr = p;
  1881. if (!is_valid_ether_addr(addr->sa_data))
  1882. return -EADDRNOTAVAIL;
  1883. /* 82542 2.0 needs to be in reset to write receive address registers */
  1884. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1885. e1000_enter_82542_rst(adapter);
  1886. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1887. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1888. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1889. /* With 82571 controllers, LAA may be overwritten (with the default)
  1890. * due to controller reset from the other port. */
  1891. if (adapter->hw.mac_type == e1000_82571) {
  1892. /* activate the work around */
  1893. adapter->hw.laa_is_present = 1;
  1894. /* Hold a copy of the LAA in RAR[14] This is done so that
  1895. * between the time RAR[0] gets clobbered and the time it
  1896. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1897. * of the RARs and no incoming packets directed to this port
  1898. * are dropped. Eventaully the LAA will be in RAR[0] and
  1899. * RAR[14] */
  1900. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1901. E1000_RAR_ENTRIES - 1);
  1902. }
  1903. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1904. e1000_leave_82542_rst(adapter);
  1905. return 0;
  1906. }
  1907. /**
  1908. * e1000_set_multi - Multicast and Promiscuous mode set
  1909. * @netdev: network interface device structure
  1910. *
  1911. * The set_multi entry point is called whenever the multicast address
  1912. * list or the network interface flags are updated. This routine is
  1913. * responsible for configuring the hardware for proper multicast,
  1914. * promiscuous mode, and all-multi behavior.
  1915. **/
  1916. static void
  1917. e1000_set_multi(struct net_device *netdev)
  1918. {
  1919. struct e1000_adapter *adapter = netdev_priv(netdev);
  1920. struct e1000_hw *hw = &adapter->hw;
  1921. struct dev_mc_list *mc_ptr;
  1922. uint32_t rctl;
  1923. uint32_t hash_value;
  1924. int i, rar_entries = E1000_RAR_ENTRIES;
  1925. /* reserve RAR[14] for LAA over-write work-around */
  1926. if (adapter->hw.mac_type == e1000_82571)
  1927. rar_entries--;
  1928. /* Check for Promiscuous and All Multicast modes */
  1929. rctl = E1000_READ_REG(hw, RCTL);
  1930. if (netdev->flags & IFF_PROMISC) {
  1931. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1932. } else if (netdev->flags & IFF_ALLMULTI) {
  1933. rctl |= E1000_RCTL_MPE;
  1934. rctl &= ~E1000_RCTL_UPE;
  1935. } else {
  1936. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1937. }
  1938. E1000_WRITE_REG(hw, RCTL, rctl);
  1939. /* 82542 2.0 needs to be in reset to write receive address registers */
  1940. if (hw->mac_type == e1000_82542_rev2_0)
  1941. e1000_enter_82542_rst(adapter);
  1942. /* load the first 14 multicast address into the exact filters 1-14
  1943. * RAR 0 is used for the station MAC adddress
  1944. * if there are not 14 addresses, go ahead and clear the filters
  1945. * -- with 82571 controllers only 0-13 entries are filled here
  1946. */
  1947. mc_ptr = netdev->mc_list;
  1948. for (i = 1; i < rar_entries; i++) {
  1949. if (mc_ptr) {
  1950. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1951. mc_ptr = mc_ptr->next;
  1952. } else {
  1953. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1954. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1955. }
  1956. }
  1957. /* clear the old settings from the multicast hash table */
  1958. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1959. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1960. /* load any remaining addresses into the hash table */
  1961. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1962. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1963. e1000_mta_set(hw, hash_value);
  1964. }
  1965. if (hw->mac_type == e1000_82542_rev2_0)
  1966. e1000_leave_82542_rst(adapter);
  1967. }
  1968. /* Need to wait a few seconds after link up to get diagnostic information from
  1969. * the phy */
  1970. static void
  1971. e1000_update_phy_info(unsigned long data)
  1972. {
  1973. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1974. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1975. }
  1976. /**
  1977. * e1000_82547_tx_fifo_stall - Timer Call-back
  1978. * @data: pointer to adapter cast into an unsigned long
  1979. **/
  1980. static void
  1981. e1000_82547_tx_fifo_stall(unsigned long data)
  1982. {
  1983. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1984. struct net_device *netdev = adapter->netdev;
  1985. uint32_t tctl;
  1986. if (atomic_read(&adapter->tx_fifo_stall)) {
  1987. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1988. E1000_READ_REG(&adapter->hw, TDH)) &&
  1989. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1990. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1991. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1992. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1993. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1994. E1000_WRITE_REG(&adapter->hw, TCTL,
  1995. tctl & ~E1000_TCTL_EN);
  1996. E1000_WRITE_REG(&adapter->hw, TDFT,
  1997. adapter->tx_head_addr);
  1998. E1000_WRITE_REG(&adapter->hw, TDFH,
  1999. adapter->tx_head_addr);
  2000. E1000_WRITE_REG(&adapter->hw, TDFTS,
  2001. adapter->tx_head_addr);
  2002. E1000_WRITE_REG(&adapter->hw, TDFHS,
  2003. adapter->tx_head_addr);
  2004. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  2005. E1000_WRITE_FLUSH(&adapter->hw);
  2006. adapter->tx_fifo_head = 0;
  2007. atomic_set(&adapter->tx_fifo_stall, 0);
  2008. netif_wake_queue(netdev);
  2009. } else {
  2010. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2011. }
  2012. }
  2013. }
  2014. /**
  2015. * e1000_watchdog - Timer Call-back
  2016. * @data: pointer to adapter cast into an unsigned long
  2017. **/
  2018. static void
  2019. e1000_watchdog(unsigned long data)
  2020. {
  2021. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  2022. /* Do the rest outside of interrupt context */
  2023. schedule_work(&adapter->watchdog_task);
  2024. }
  2025. static void
  2026. e1000_watchdog_task(struct e1000_adapter *adapter)
  2027. {
  2028. struct net_device *netdev = adapter->netdev;
  2029. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2030. uint32_t link;
  2031. e1000_check_for_link(&adapter->hw);
  2032. if (adapter->hw.mac_type == e1000_82573) {
  2033. e1000_enable_tx_pkt_filtering(&adapter->hw);
  2034. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  2035. e1000_update_mng_vlan(adapter);
  2036. }
  2037. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  2038. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  2039. link = !adapter->hw.serdes_link_down;
  2040. else
  2041. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  2042. if (link) {
  2043. if (!netif_carrier_ok(netdev)) {
  2044. e1000_get_speed_and_duplex(&adapter->hw,
  2045. &adapter->link_speed,
  2046. &adapter->link_duplex);
  2047. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2048. adapter->link_speed,
  2049. adapter->link_duplex == FULL_DUPLEX ?
  2050. "Full Duplex" : "Half Duplex");
  2051. /* tweak tx_queue_len according to speed/duplex */
  2052. netdev->tx_queue_len = adapter->tx_queue_len;
  2053. adapter->tx_timeout_factor = 1;
  2054. if (adapter->link_duplex == HALF_DUPLEX) {
  2055. switch (adapter->link_speed) {
  2056. case SPEED_10:
  2057. netdev->tx_queue_len = 10;
  2058. adapter->tx_timeout_factor = 8;
  2059. break;
  2060. case SPEED_100:
  2061. netdev->tx_queue_len = 100;
  2062. break;
  2063. }
  2064. }
  2065. netif_carrier_on(netdev);
  2066. netif_wake_queue(netdev);
  2067. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2068. adapter->smartspeed = 0;
  2069. }
  2070. } else {
  2071. if (netif_carrier_ok(netdev)) {
  2072. adapter->link_speed = 0;
  2073. adapter->link_duplex = 0;
  2074. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2075. netif_carrier_off(netdev);
  2076. netif_stop_queue(netdev);
  2077. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2078. }
  2079. e1000_smartspeed(adapter);
  2080. }
  2081. e1000_update_stats(adapter);
  2082. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2083. adapter->tpt_old = adapter->stats.tpt;
  2084. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2085. adapter->colc_old = adapter->stats.colc;
  2086. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2087. adapter->gorcl_old = adapter->stats.gorcl;
  2088. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2089. adapter->gotcl_old = adapter->stats.gotcl;
  2090. e1000_update_adaptive(&adapter->hw);
  2091. #ifdef CONFIG_E1000_MQ
  2092. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2093. #endif
  2094. if (!netif_carrier_ok(netdev)) {
  2095. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2096. /* We've lost link, so the controller stops DMA,
  2097. * but we've got queued Tx work that's never going
  2098. * to get done, so reset controller to flush Tx.
  2099. * (Do the reset outside of interrupt context). */
  2100. schedule_work(&adapter->tx_timeout_task);
  2101. }
  2102. }
  2103. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2104. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2105. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2106. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2107. * else is between 2000-8000. */
  2108. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2109. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2110. adapter->gotcl - adapter->gorcl :
  2111. adapter->gorcl - adapter->gotcl) / 10000;
  2112. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2113. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2114. }
  2115. /* Cause software interrupt to ensure rx ring is cleaned */
  2116. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2117. /* Force detection of hung controller every watchdog period */
  2118. adapter->detect_tx_hung = TRUE;
  2119. /* With 82571 controllers, LAA may be overwritten due to controller
  2120. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2121. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2122. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2123. /* Reset the timer */
  2124. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2125. }
  2126. #define E1000_TX_FLAGS_CSUM 0x00000001
  2127. #define E1000_TX_FLAGS_VLAN 0x00000002
  2128. #define E1000_TX_FLAGS_TSO 0x00000004
  2129. #define E1000_TX_FLAGS_IPV4 0x00000008
  2130. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2131. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2132. static inline int
  2133. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2134. struct sk_buff *skb)
  2135. {
  2136. #ifdef NETIF_F_TSO
  2137. struct e1000_context_desc *context_desc;
  2138. struct e1000_buffer *buffer_info;
  2139. unsigned int i;
  2140. uint32_t cmd_length = 0;
  2141. uint16_t ipcse = 0, tucse, mss;
  2142. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2143. int err;
  2144. if (skb_shinfo(skb)->tso_size) {
  2145. if (skb_header_cloned(skb)) {
  2146. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2147. if (err)
  2148. return err;
  2149. }
  2150. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2151. mss = skb_shinfo(skb)->tso_size;
  2152. if (skb->protocol == ntohs(ETH_P_IP)) {
  2153. skb->nh.iph->tot_len = 0;
  2154. skb->nh.iph->check = 0;
  2155. skb->h.th->check =
  2156. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2157. skb->nh.iph->daddr,
  2158. 0,
  2159. IPPROTO_TCP,
  2160. 0);
  2161. cmd_length = E1000_TXD_CMD_IP;
  2162. ipcse = skb->h.raw - skb->data - 1;
  2163. #ifdef NETIF_F_TSO_IPV6
  2164. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2165. skb->nh.ipv6h->payload_len = 0;
  2166. skb->h.th->check =
  2167. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2168. &skb->nh.ipv6h->daddr,
  2169. 0,
  2170. IPPROTO_TCP,
  2171. 0);
  2172. ipcse = 0;
  2173. #endif
  2174. }
  2175. ipcss = skb->nh.raw - skb->data;
  2176. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2177. tucss = skb->h.raw - skb->data;
  2178. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2179. tucse = 0;
  2180. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2181. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2182. i = tx_ring->next_to_use;
  2183. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2184. buffer_info = &tx_ring->buffer_info[i];
  2185. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2186. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2187. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2188. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2189. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2190. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2191. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2192. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2193. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2194. buffer_info->time_stamp = jiffies;
  2195. if (++i == tx_ring->count) i = 0;
  2196. tx_ring->next_to_use = i;
  2197. return TRUE;
  2198. }
  2199. #endif
  2200. return FALSE;
  2201. }
  2202. static inline boolean_t
  2203. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2204. struct sk_buff *skb)
  2205. {
  2206. struct e1000_context_desc *context_desc;
  2207. struct e1000_buffer *buffer_info;
  2208. unsigned int i;
  2209. uint8_t css;
  2210. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2211. css = skb->h.raw - skb->data;
  2212. i = tx_ring->next_to_use;
  2213. buffer_info = &tx_ring->buffer_info[i];
  2214. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2215. context_desc->upper_setup.tcp_fields.tucss = css;
  2216. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2217. context_desc->upper_setup.tcp_fields.tucse = 0;
  2218. context_desc->tcp_seg_setup.data = 0;
  2219. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2220. buffer_info->time_stamp = jiffies;
  2221. if (unlikely(++i == tx_ring->count)) i = 0;
  2222. tx_ring->next_to_use = i;
  2223. return TRUE;
  2224. }
  2225. return FALSE;
  2226. }
  2227. #define E1000_MAX_TXD_PWR 12
  2228. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2229. static inline int
  2230. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2231. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2232. unsigned int nr_frags, unsigned int mss)
  2233. {
  2234. struct e1000_buffer *buffer_info;
  2235. unsigned int len = skb->len;
  2236. unsigned int offset = 0, size, count = 0, i;
  2237. unsigned int f;
  2238. len -= skb->data_len;
  2239. i = tx_ring->next_to_use;
  2240. while (len) {
  2241. buffer_info = &tx_ring->buffer_info[i];
  2242. size = min(len, max_per_txd);
  2243. #ifdef NETIF_F_TSO
  2244. /* Workaround for Controller erratum --
  2245. * descriptor for non-tso packet in a linear SKB that follows a
  2246. * tso gets written back prematurely before the data is fully
  2247. * DMAd to the controller */
  2248. if (!skb->data_len && tx_ring->last_tx_tso &&
  2249. !skb_shinfo(skb)->tso_size) {
  2250. tx_ring->last_tx_tso = 0;
  2251. size -= 4;
  2252. }
  2253. /* Workaround for premature desc write-backs
  2254. * in TSO mode. Append 4-byte sentinel desc */
  2255. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2256. size -= 4;
  2257. #endif
  2258. /* work-around for errata 10 and it applies
  2259. * to all controllers in PCI-X mode
  2260. * The fix is to make sure that the first descriptor of a
  2261. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2262. */
  2263. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2264. (size > 2015) && count == 0))
  2265. size = 2015;
  2266. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2267. * terminating buffers within evenly-aligned dwords. */
  2268. if (unlikely(adapter->pcix_82544 &&
  2269. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2270. size > 4))
  2271. size -= 4;
  2272. buffer_info->length = size;
  2273. buffer_info->dma =
  2274. pci_map_single(adapter->pdev,
  2275. skb->data + offset,
  2276. size,
  2277. PCI_DMA_TODEVICE);
  2278. buffer_info->time_stamp = jiffies;
  2279. len -= size;
  2280. offset += size;
  2281. count++;
  2282. if (unlikely(++i == tx_ring->count)) i = 0;
  2283. }
  2284. for (f = 0; f < nr_frags; f++) {
  2285. struct skb_frag_struct *frag;
  2286. frag = &skb_shinfo(skb)->frags[f];
  2287. len = frag->size;
  2288. offset = frag->page_offset;
  2289. while (len) {
  2290. buffer_info = &tx_ring->buffer_info[i];
  2291. size = min(len, max_per_txd);
  2292. #ifdef NETIF_F_TSO
  2293. /* Workaround for premature desc write-backs
  2294. * in TSO mode. Append 4-byte sentinel desc */
  2295. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2296. size -= 4;
  2297. #endif
  2298. /* Workaround for potential 82544 hang in PCI-X.
  2299. * Avoid terminating buffers within evenly-aligned
  2300. * dwords. */
  2301. if (unlikely(adapter->pcix_82544 &&
  2302. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2303. size > 4))
  2304. size -= 4;
  2305. buffer_info->length = size;
  2306. buffer_info->dma =
  2307. pci_map_page(adapter->pdev,
  2308. frag->page,
  2309. offset,
  2310. size,
  2311. PCI_DMA_TODEVICE);
  2312. buffer_info->time_stamp = jiffies;
  2313. len -= size;
  2314. offset += size;
  2315. count++;
  2316. if (unlikely(++i == tx_ring->count)) i = 0;
  2317. }
  2318. }
  2319. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2320. tx_ring->buffer_info[i].skb = skb;
  2321. tx_ring->buffer_info[first].next_to_watch = i;
  2322. return count;
  2323. }
  2324. static inline void
  2325. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2326. int tx_flags, int count)
  2327. {
  2328. struct e1000_tx_desc *tx_desc = NULL;
  2329. struct e1000_buffer *buffer_info;
  2330. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2331. unsigned int i;
  2332. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2333. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2334. E1000_TXD_CMD_TSE;
  2335. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2336. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2337. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2338. }
  2339. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2340. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2341. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2342. }
  2343. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2344. txd_lower |= E1000_TXD_CMD_VLE;
  2345. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2346. }
  2347. i = tx_ring->next_to_use;
  2348. while (count--) {
  2349. buffer_info = &tx_ring->buffer_info[i];
  2350. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2351. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2352. tx_desc->lower.data =
  2353. cpu_to_le32(txd_lower | buffer_info->length);
  2354. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2355. if (unlikely(++i == tx_ring->count)) i = 0;
  2356. }
  2357. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2358. /* Force memory writes to complete before letting h/w
  2359. * know there are new descriptors to fetch. (Only
  2360. * applicable for weak-ordered memory model archs,
  2361. * such as IA-64). */
  2362. wmb();
  2363. tx_ring->next_to_use = i;
  2364. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2365. }
  2366. /**
  2367. * 82547 workaround to avoid controller hang in half-duplex environment.
  2368. * The workaround is to avoid queuing a large packet that would span
  2369. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2370. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2371. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2372. * to the beginning of the Tx FIFO.
  2373. **/
  2374. #define E1000_FIFO_HDR 0x10
  2375. #define E1000_82547_PAD_LEN 0x3E0
  2376. static inline int
  2377. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2378. {
  2379. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2380. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2381. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2382. if (adapter->link_duplex != HALF_DUPLEX)
  2383. goto no_fifo_stall_required;
  2384. if (atomic_read(&adapter->tx_fifo_stall))
  2385. return 1;
  2386. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2387. atomic_set(&adapter->tx_fifo_stall, 1);
  2388. return 1;
  2389. }
  2390. no_fifo_stall_required:
  2391. adapter->tx_fifo_head += skb_fifo_len;
  2392. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2393. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2394. return 0;
  2395. }
  2396. #define MINIMUM_DHCP_PACKET_SIZE 282
  2397. static inline int
  2398. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2399. {
  2400. struct e1000_hw *hw = &adapter->hw;
  2401. uint16_t length, offset;
  2402. if (vlan_tx_tag_present(skb)) {
  2403. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2404. ( adapter->hw.mng_cookie.status &
  2405. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2406. return 0;
  2407. }
  2408. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2409. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2410. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2411. const struct iphdr *ip =
  2412. (struct iphdr *)((uint8_t *)skb->data+14);
  2413. if (IPPROTO_UDP == ip->protocol) {
  2414. struct udphdr *udp =
  2415. (struct udphdr *)((uint8_t *)ip +
  2416. (ip->ihl << 2));
  2417. if (ntohs(udp->dest) == 67) {
  2418. offset = (uint8_t *)udp + 8 - skb->data;
  2419. length = skb->len - offset;
  2420. return e1000_mng_write_dhcp_info(hw,
  2421. (uint8_t *)udp + 8,
  2422. length);
  2423. }
  2424. }
  2425. }
  2426. }
  2427. return 0;
  2428. }
  2429. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2430. static int
  2431. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2432. {
  2433. struct e1000_adapter *adapter = netdev_priv(netdev);
  2434. struct e1000_tx_ring *tx_ring;
  2435. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2436. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2437. unsigned int tx_flags = 0;
  2438. unsigned int len = skb->len;
  2439. unsigned long flags;
  2440. unsigned int nr_frags = 0;
  2441. unsigned int mss = 0;
  2442. int count = 0;
  2443. int tso;
  2444. unsigned int f;
  2445. len -= skb->data_len;
  2446. #ifdef CONFIG_E1000_MQ
  2447. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2448. #else
  2449. tx_ring = adapter->tx_ring;
  2450. #endif
  2451. if (unlikely(skb->len <= 0)) {
  2452. dev_kfree_skb_any(skb);
  2453. return NETDEV_TX_OK;
  2454. }
  2455. #ifdef NETIF_F_TSO
  2456. mss = skb_shinfo(skb)->tso_size;
  2457. /* The controller does a simple calculation to
  2458. * make sure there is enough room in the FIFO before
  2459. * initiating the DMA for each buffer. The calc is:
  2460. * 4 = ceil(buffer len/mss). To make sure we don't
  2461. * overrun the FIFO, adjust the max buffer len if mss
  2462. * drops. */
  2463. if (mss) {
  2464. uint8_t hdr_len;
  2465. max_per_txd = min(mss << 2, max_per_txd);
  2466. max_txd_pwr = fls(max_per_txd) - 1;
  2467. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2468. * points to just header, pull a few bytes of payload from
  2469. * frags into skb->data */
  2470. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2471. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2472. (adapter->hw.mac_type == e1000_82571 ||
  2473. adapter->hw.mac_type == e1000_82572)) {
  2474. unsigned int pull_size;
  2475. pull_size = min((unsigned int)4, skb->data_len);
  2476. if (!__pskb_pull_tail(skb, pull_size)) {
  2477. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2478. dev_kfree_skb_any(skb);
  2479. return -EFAULT;
  2480. }
  2481. len = skb->len - skb->data_len;
  2482. }
  2483. }
  2484. /* reserve a descriptor for the offload context */
  2485. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2486. count++;
  2487. count++;
  2488. #else
  2489. if (skb->ip_summed == CHECKSUM_HW)
  2490. count++;
  2491. #endif
  2492. #ifdef NETIF_F_TSO
  2493. /* Controller Erratum workaround */
  2494. if (!skb->data_len && tx_ring->last_tx_tso &&
  2495. !skb_shinfo(skb)->tso_size)
  2496. count++;
  2497. #endif
  2498. count += TXD_USE_COUNT(len, max_txd_pwr);
  2499. if (adapter->pcix_82544)
  2500. count++;
  2501. /* work-around for errata 10 and it applies to all controllers
  2502. * in PCI-X mode, so add one more descriptor to the count
  2503. */
  2504. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2505. (len > 2015)))
  2506. count++;
  2507. nr_frags = skb_shinfo(skb)->nr_frags;
  2508. for (f = 0; f < nr_frags; f++)
  2509. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2510. max_txd_pwr);
  2511. if (adapter->pcix_82544)
  2512. count += nr_frags;
  2513. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2514. e1000_transfer_dhcp_info(adapter, skb);
  2515. local_irq_save(flags);
  2516. if (!spin_trylock(&tx_ring->tx_lock)) {
  2517. /* Collision - tell upper layer to requeue */
  2518. local_irq_restore(flags);
  2519. return NETDEV_TX_LOCKED;
  2520. }
  2521. /* need: count + 2 desc gap to keep tail from touching
  2522. * head, otherwise try next time */
  2523. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2524. netif_stop_queue(netdev);
  2525. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2526. return NETDEV_TX_BUSY;
  2527. }
  2528. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2529. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2530. netif_stop_queue(netdev);
  2531. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2532. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2533. return NETDEV_TX_BUSY;
  2534. }
  2535. }
  2536. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2537. tx_flags |= E1000_TX_FLAGS_VLAN;
  2538. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2539. }
  2540. first = tx_ring->next_to_use;
  2541. tso = e1000_tso(adapter, tx_ring, skb);
  2542. if (tso < 0) {
  2543. dev_kfree_skb_any(skb);
  2544. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2545. return NETDEV_TX_OK;
  2546. }
  2547. if (likely(tso)) {
  2548. tx_ring->last_tx_tso = 1;
  2549. tx_flags |= E1000_TX_FLAGS_TSO;
  2550. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2551. tx_flags |= E1000_TX_FLAGS_CSUM;
  2552. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2553. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2554. * no longer assume, we must. */
  2555. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2556. tx_flags |= E1000_TX_FLAGS_IPV4;
  2557. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2558. e1000_tx_map(adapter, tx_ring, skb, first,
  2559. max_per_txd, nr_frags, mss));
  2560. netdev->trans_start = jiffies;
  2561. /* Make sure there is space in the ring for the next send. */
  2562. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2563. netif_stop_queue(netdev);
  2564. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2565. return NETDEV_TX_OK;
  2566. }
  2567. /**
  2568. * e1000_tx_timeout - Respond to a Tx Hang
  2569. * @netdev: network interface device structure
  2570. **/
  2571. static void
  2572. e1000_tx_timeout(struct net_device *netdev)
  2573. {
  2574. struct e1000_adapter *adapter = netdev_priv(netdev);
  2575. /* Do the reset outside of interrupt context */
  2576. schedule_work(&adapter->tx_timeout_task);
  2577. }
  2578. static void
  2579. e1000_tx_timeout_task(struct net_device *netdev)
  2580. {
  2581. struct e1000_adapter *adapter = netdev_priv(netdev);
  2582. adapter->tx_timeout_count++;
  2583. e1000_down(adapter);
  2584. e1000_up(adapter);
  2585. }
  2586. /**
  2587. * e1000_get_stats - Get System Network Statistics
  2588. * @netdev: network interface device structure
  2589. *
  2590. * Returns the address of the device statistics structure.
  2591. * The statistics are actually updated from the timer callback.
  2592. **/
  2593. static struct net_device_stats *
  2594. e1000_get_stats(struct net_device *netdev)
  2595. {
  2596. struct e1000_adapter *adapter = netdev_priv(netdev);
  2597. /* only return the current stats */
  2598. return &adapter->net_stats;
  2599. }
  2600. /**
  2601. * e1000_change_mtu - Change the Maximum Transfer Unit
  2602. * @netdev: network interface device structure
  2603. * @new_mtu: new value for maximum frame size
  2604. *
  2605. * Returns 0 on success, negative on failure
  2606. **/
  2607. static int
  2608. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2609. {
  2610. struct e1000_adapter *adapter = netdev_priv(netdev);
  2611. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2612. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2613. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2614. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2615. return -EINVAL;
  2616. }
  2617. /* Adapter-specific max frame size limits. */
  2618. switch (adapter->hw.mac_type) {
  2619. case e1000_82542_rev2_0:
  2620. case e1000_82542_rev2_1:
  2621. case e1000_82573:
  2622. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2623. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2624. return -EINVAL;
  2625. }
  2626. break;
  2627. case e1000_82571:
  2628. case e1000_82572:
  2629. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2630. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2631. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2632. return -EINVAL;
  2633. }
  2634. break;
  2635. default:
  2636. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2637. break;
  2638. }
  2639. /* since the driver code now supports splitting a packet across
  2640. * multiple descriptors, most of the fifo related limitations on
  2641. * jumbo frame traffic have gone away.
  2642. * simply use 2k descriptors for everything.
  2643. *
  2644. * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2645. * means we reserve 2 more, this pushes us to allocate from the next
  2646. * larger slab size
  2647. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2648. /* recent hardware supports 1KB granularity */
  2649. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2650. adapter->rx_buffer_len =
  2651. ((max_frame < E1000_RXBUFFER_2048) ?
  2652. max_frame : E1000_RXBUFFER_2048);
  2653. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2654. } else
  2655. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2656. netdev->mtu = new_mtu;
  2657. if (netif_running(netdev)) {
  2658. e1000_down(adapter);
  2659. e1000_up(adapter);
  2660. }
  2661. adapter->hw.max_frame_size = max_frame;
  2662. return 0;
  2663. }
  2664. /**
  2665. * e1000_update_stats - Update the board statistics counters
  2666. * @adapter: board private structure
  2667. **/
  2668. void
  2669. e1000_update_stats(struct e1000_adapter *adapter)
  2670. {
  2671. struct e1000_hw *hw = &adapter->hw;
  2672. unsigned long flags;
  2673. uint16_t phy_tmp;
  2674. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2675. spin_lock_irqsave(&adapter->stats_lock, flags);
  2676. /* these counters are modified from e1000_adjust_tbi_stats,
  2677. * called from the interrupt context, so they must only
  2678. * be written while holding adapter->stats_lock
  2679. */
  2680. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2681. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2682. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2683. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2684. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2685. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2686. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2687. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2688. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2689. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2690. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2691. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2692. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2693. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2694. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2695. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2696. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2697. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2698. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2699. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2700. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2701. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2702. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2703. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2704. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2705. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2706. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2707. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2708. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2709. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2710. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2711. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2712. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2713. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2714. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2715. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2716. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2717. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2718. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2719. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2720. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2721. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2722. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2723. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2724. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2725. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2726. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2727. /* used for adaptive IFS */
  2728. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2729. adapter->stats.tpt += hw->tx_packet_delta;
  2730. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2731. adapter->stats.colc += hw->collision_delta;
  2732. if (hw->mac_type >= e1000_82543) {
  2733. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2734. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2735. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2736. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2737. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2738. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2739. }
  2740. if (hw->mac_type > e1000_82547_rev_2) {
  2741. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2742. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2743. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2744. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2745. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2746. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2747. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2748. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2749. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2750. }
  2751. /* Fill out the OS statistics structure */
  2752. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2753. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2754. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2755. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2756. adapter->net_stats.multicast = adapter->stats.mprc;
  2757. adapter->net_stats.collisions = adapter->stats.colc;
  2758. /* Rx Errors */
  2759. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2760. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2761. adapter->stats.rlec + adapter->stats.cexterr;
  2762. adapter->net_stats.rx_dropped = 0;
  2763. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2764. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2765. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2766. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2767. /* Tx Errors */
  2768. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2769. adapter->stats.latecol;
  2770. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2771. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2772. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2773. /* Tx Dropped needs to be maintained elsewhere */
  2774. /* Phy Stats */
  2775. if (hw->media_type == e1000_media_type_copper) {
  2776. if ((adapter->link_speed == SPEED_1000) &&
  2777. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2778. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2779. adapter->phy_stats.idle_errors += phy_tmp;
  2780. }
  2781. if ((hw->mac_type <= e1000_82546) &&
  2782. (hw->phy_type == e1000_phy_m88) &&
  2783. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2784. adapter->phy_stats.receive_errors += phy_tmp;
  2785. }
  2786. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2787. }
  2788. #ifdef CONFIG_E1000_MQ
  2789. void
  2790. e1000_rx_schedule(void *data)
  2791. {
  2792. struct net_device *poll_dev, *netdev = data;
  2793. struct e1000_adapter *adapter = netdev->priv;
  2794. int this_cpu = get_cpu();
  2795. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2796. if (poll_dev == NULL) {
  2797. put_cpu();
  2798. return;
  2799. }
  2800. if (likely(netif_rx_schedule_prep(poll_dev)))
  2801. __netif_rx_schedule(poll_dev);
  2802. else
  2803. e1000_irq_enable(adapter);
  2804. put_cpu();
  2805. }
  2806. #endif
  2807. /**
  2808. * e1000_intr - Interrupt Handler
  2809. * @irq: interrupt number
  2810. * @data: pointer to a network interface device structure
  2811. * @pt_regs: CPU registers structure
  2812. **/
  2813. static irqreturn_t
  2814. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2815. {
  2816. struct net_device *netdev = data;
  2817. struct e1000_adapter *adapter = netdev_priv(netdev);
  2818. struct e1000_hw *hw = &adapter->hw;
  2819. uint32_t icr = E1000_READ_REG(hw, ICR);
  2820. #ifndef CONFIG_E1000_NAPI
  2821. int i;
  2822. #else
  2823. /* Interrupt Auto-Mask...upon reading ICR,
  2824. * interrupts are masked. No need for the
  2825. * IMC write, but it does mean we should
  2826. * account for it ASAP. */
  2827. if (likely(hw->mac_type >= e1000_82571))
  2828. atomic_inc(&adapter->irq_sem);
  2829. #endif
  2830. if (unlikely(!icr)) {
  2831. #ifdef CONFIG_E1000_NAPI
  2832. if (hw->mac_type >= e1000_82571)
  2833. e1000_irq_enable(adapter);
  2834. #endif
  2835. return IRQ_NONE; /* Not our interrupt */
  2836. }
  2837. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2838. hw->get_link_status = 1;
  2839. mod_timer(&adapter->watchdog_timer, jiffies);
  2840. }
  2841. #ifdef CONFIG_E1000_NAPI
  2842. if (unlikely(hw->mac_type < e1000_82571)) {
  2843. atomic_inc(&adapter->irq_sem);
  2844. E1000_WRITE_REG(hw, IMC, ~0);
  2845. E1000_WRITE_FLUSH(hw);
  2846. }
  2847. #ifdef CONFIG_E1000_MQ
  2848. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2849. /* We must setup the cpumask once count == 0 since
  2850. * each cpu bit is cleared when the work is done. */
  2851. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2852. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2853. atomic_set(&adapter->rx_sched_call_data.count,
  2854. adapter->num_rx_queues);
  2855. smp_call_async_mask(&adapter->rx_sched_call_data);
  2856. } else {
  2857. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2858. }
  2859. #else /* if !CONFIG_E1000_MQ */
  2860. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2861. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2862. else
  2863. e1000_irq_enable(adapter);
  2864. #endif /* CONFIG_E1000_MQ */
  2865. #else /* if !CONFIG_E1000_NAPI */
  2866. /* Writing IMC and IMS is needed for 82547.
  2867. * Due to Hub Link bus being occupied, an interrupt
  2868. * de-assertion message is not able to be sent.
  2869. * When an interrupt assertion message is generated later,
  2870. * two messages are re-ordered and sent out.
  2871. * That causes APIC to think 82547 is in de-assertion
  2872. * state, while 82547 is in assertion state, resulting
  2873. * in dead lock. Writing IMC forces 82547 into
  2874. * de-assertion state.
  2875. */
  2876. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2877. atomic_inc(&adapter->irq_sem);
  2878. E1000_WRITE_REG(hw, IMC, ~0);
  2879. }
  2880. for (i = 0; i < E1000_MAX_INTR; i++)
  2881. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2882. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2883. break;
  2884. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2885. e1000_irq_enable(adapter);
  2886. #endif /* CONFIG_E1000_NAPI */
  2887. return IRQ_HANDLED;
  2888. }
  2889. #ifdef CONFIG_E1000_NAPI
  2890. /**
  2891. * e1000_clean - NAPI Rx polling callback
  2892. * @adapter: board private structure
  2893. **/
  2894. static int
  2895. e1000_clean(struct net_device *poll_dev, int *budget)
  2896. {
  2897. struct e1000_adapter *adapter;
  2898. int work_to_do = min(*budget, poll_dev->quota);
  2899. int tx_cleaned = 0, i = 0, work_done = 0;
  2900. /* Must NOT use netdev_priv macro here. */
  2901. adapter = poll_dev->priv;
  2902. /* Keep link state information with original netdev */
  2903. if (!netif_carrier_ok(adapter->netdev))
  2904. goto quit_polling;
  2905. while (poll_dev != &adapter->polling_netdev[i]) {
  2906. i++;
  2907. if (unlikely(i == adapter->num_rx_queues))
  2908. BUG();
  2909. }
  2910. if (likely(adapter->num_tx_queues == 1)) {
  2911. /* e1000_clean is called per-cpu. This lock protects
  2912. * tx_ring[0] from being cleaned by multiple cpus
  2913. * simultaneously. A failure obtaining the lock means
  2914. * tx_ring[0] is currently being cleaned anyway. */
  2915. if (spin_trylock(&adapter->tx_queue_lock)) {
  2916. tx_cleaned = e1000_clean_tx_irq(adapter,
  2917. &adapter->tx_ring[0]);
  2918. spin_unlock(&adapter->tx_queue_lock);
  2919. }
  2920. } else
  2921. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2922. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2923. &work_done, work_to_do);
  2924. *budget -= work_done;
  2925. poll_dev->quota -= work_done;
  2926. /* If no Tx and not enough Rx work done, exit the polling mode */
  2927. if ((!tx_cleaned && (work_done == 0)) ||
  2928. !netif_running(adapter->netdev)) {
  2929. quit_polling:
  2930. netif_rx_complete(poll_dev);
  2931. e1000_irq_enable(adapter);
  2932. return 0;
  2933. }
  2934. return 1;
  2935. }
  2936. #endif
  2937. /**
  2938. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2939. * @adapter: board private structure
  2940. **/
  2941. static boolean_t
  2942. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2943. struct e1000_tx_ring *tx_ring)
  2944. {
  2945. struct net_device *netdev = adapter->netdev;
  2946. struct e1000_tx_desc *tx_desc, *eop_desc;
  2947. struct e1000_buffer *buffer_info;
  2948. unsigned int i, eop;
  2949. boolean_t cleaned = FALSE;
  2950. i = tx_ring->next_to_clean;
  2951. eop = tx_ring->buffer_info[i].next_to_watch;
  2952. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2953. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2954. for (cleaned = FALSE; !cleaned; ) {
  2955. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2956. buffer_info = &tx_ring->buffer_info[i];
  2957. cleaned = (i == eop);
  2958. #ifdef CONFIG_E1000_MQ
  2959. tx_ring->tx_stats.bytes += buffer_info->length;
  2960. #endif
  2961. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2962. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2963. if (unlikely(++i == tx_ring->count)) i = 0;
  2964. }
  2965. #ifdef CONFIG_E1000_MQ
  2966. tx_ring->tx_stats.packets++;
  2967. #endif
  2968. eop = tx_ring->buffer_info[i].next_to_watch;
  2969. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2970. }
  2971. tx_ring->next_to_clean = i;
  2972. spin_lock(&tx_ring->tx_lock);
  2973. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2974. netif_carrier_ok(netdev)))
  2975. netif_wake_queue(netdev);
  2976. spin_unlock(&tx_ring->tx_lock);
  2977. if (adapter->detect_tx_hung) {
  2978. /* Detect a transmit hang in hardware, this serializes the
  2979. * check with the clearing of time_stamp and movement of i */
  2980. adapter->detect_tx_hung = FALSE;
  2981. if (tx_ring->buffer_info[eop].dma &&
  2982. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2983. adapter->tx_timeout_factor * HZ)
  2984. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2985. E1000_STATUS_TXOFF)) {
  2986. /* detected Tx unit hang */
  2987. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2988. " Tx Queue <%lu>\n"
  2989. " TDH <%x>\n"
  2990. " TDT <%x>\n"
  2991. " next_to_use <%x>\n"
  2992. " next_to_clean <%x>\n"
  2993. "buffer_info[next_to_clean]\n"
  2994. " time_stamp <%lx>\n"
  2995. " next_to_watch <%x>\n"
  2996. " jiffies <%lx>\n"
  2997. " next_to_watch.status <%x>\n",
  2998. (unsigned long)((tx_ring - adapter->tx_ring) /
  2999. sizeof(struct e1000_tx_ring)),
  3000. readl(adapter->hw.hw_addr + tx_ring->tdh),
  3001. readl(adapter->hw.hw_addr + tx_ring->tdt),
  3002. tx_ring->next_to_use,
  3003. tx_ring->next_to_clean,
  3004. tx_ring->buffer_info[eop].time_stamp,
  3005. eop,
  3006. jiffies,
  3007. eop_desc->upper.fields.status);
  3008. netif_stop_queue(netdev);
  3009. }
  3010. }
  3011. return cleaned;
  3012. }
  3013. /**
  3014. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3015. * @adapter: board private structure
  3016. * @status_err: receive descriptor status and error fields
  3017. * @csum: receive descriptor csum field
  3018. * @sk_buff: socket buffer with received data
  3019. **/
  3020. static inline void
  3021. e1000_rx_checksum(struct e1000_adapter *adapter,
  3022. uint32_t status_err, uint32_t csum,
  3023. struct sk_buff *skb)
  3024. {
  3025. uint16_t status = (uint16_t)status_err;
  3026. uint8_t errors = (uint8_t)(status_err >> 24);
  3027. skb->ip_summed = CHECKSUM_NONE;
  3028. /* 82543 or newer only */
  3029. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  3030. /* Ignore Checksum bit is set */
  3031. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  3032. /* TCP/UDP checksum error bit is set */
  3033. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3034. /* let the stack verify checksum errors */
  3035. adapter->hw_csum_err++;
  3036. return;
  3037. }
  3038. /* TCP/UDP Checksum has not been calculated */
  3039. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  3040. if (!(status & E1000_RXD_STAT_TCPCS))
  3041. return;
  3042. } else {
  3043. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  3044. return;
  3045. }
  3046. /* It must be a TCP or UDP packet with a valid checksum */
  3047. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3048. /* TCP checksum is good */
  3049. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3050. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3051. /* IP fragment with UDP payload */
  3052. /* Hardware complements the payload checksum, so we undo it
  3053. * and then put the value in host order for further stack use.
  3054. */
  3055. csum = ntohl(csum ^ 0xFFFF);
  3056. skb->csum = csum;
  3057. skb->ip_summed = CHECKSUM_HW;
  3058. }
  3059. adapter->hw_csum_good++;
  3060. }
  3061. /**
  3062. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3063. * @adapter: board private structure
  3064. **/
  3065. static boolean_t
  3066. #ifdef CONFIG_E1000_NAPI
  3067. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3068. struct e1000_rx_ring *rx_ring,
  3069. int *work_done, int work_to_do)
  3070. #else
  3071. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3072. struct e1000_rx_ring *rx_ring)
  3073. #endif
  3074. {
  3075. struct net_device *netdev = adapter->netdev;
  3076. struct pci_dev *pdev = adapter->pdev;
  3077. struct e1000_rx_desc *rx_desc;
  3078. struct e1000_buffer *buffer_info;
  3079. unsigned long flags;
  3080. uint32_t length;
  3081. uint8_t last_byte;
  3082. unsigned int i;
  3083. int cleaned_count = 0;
  3084. boolean_t cleaned = FALSE, multi_descriptor = FALSE;
  3085. i = rx_ring->next_to_clean;
  3086. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3087. buffer_info = &rx_ring->buffer_info[i];
  3088. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3089. struct sk_buff *skb;
  3090. u8 status;
  3091. #ifdef CONFIG_E1000_NAPI
  3092. if (*work_done >= work_to_do)
  3093. break;
  3094. (*work_done)++;
  3095. #endif
  3096. status = rx_desc->status;
  3097. skb = buffer_info->skb;
  3098. cleaned = TRUE;
  3099. cleaned_count++;
  3100. pci_unmap_single(pdev,
  3101. buffer_info->dma,
  3102. buffer_info->length,
  3103. PCI_DMA_FROMDEVICE);
  3104. length = le16_to_cpu(rx_desc->length);
  3105. skb_put(skb, length);
  3106. if (!(status & E1000_RXD_STAT_EOP)) {
  3107. if (!rx_ring->rx_skb_top) {
  3108. rx_ring->rx_skb_top = skb;
  3109. rx_ring->rx_skb_top->len = length;
  3110. rx_ring->rx_skb_prev = skb;
  3111. } else {
  3112. if (skb_shinfo(rx_ring->rx_skb_top)->frag_list) {
  3113. rx_ring->rx_skb_prev->next = skb;
  3114. skb->prev = rx_ring->rx_skb_prev;
  3115. } else {
  3116. skb_shinfo(rx_ring->rx_skb_top)->frag_list = skb;
  3117. }
  3118. rx_ring->rx_skb_prev = skb;
  3119. rx_ring->rx_skb_top->data_len += length;
  3120. }
  3121. goto next_desc;
  3122. } else {
  3123. if (rx_ring->rx_skb_top) {
  3124. if (skb_shinfo(rx_ring->rx_skb_top)
  3125. ->frag_list) {
  3126. rx_ring->rx_skb_prev->next = skb;
  3127. skb->prev = rx_ring->rx_skb_prev;
  3128. } else
  3129. skb_shinfo(rx_ring->rx_skb_top)
  3130. ->frag_list = skb;
  3131. rx_ring->rx_skb_top->data_len += length;
  3132. rx_ring->rx_skb_top->len +=
  3133. rx_ring->rx_skb_top->data_len;
  3134. skb = rx_ring->rx_skb_top;
  3135. multi_descriptor = TRUE;
  3136. rx_ring->rx_skb_top = NULL;
  3137. rx_ring->rx_skb_prev = NULL;
  3138. }
  3139. }
  3140. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3141. last_byte = *(skb->data + length - 1);
  3142. if (TBI_ACCEPT(&adapter->hw, status,
  3143. rx_desc->errors, length, last_byte)) {
  3144. spin_lock_irqsave(&adapter->stats_lock, flags);
  3145. e1000_tbi_adjust_stats(&adapter->hw,
  3146. &adapter->stats,
  3147. length, skb->data);
  3148. spin_unlock_irqrestore(&adapter->stats_lock,
  3149. flags);
  3150. length--;
  3151. } else {
  3152. dev_kfree_skb_irq(skb);
  3153. goto next_desc;
  3154. }
  3155. }
  3156. /* code added for copybreak, this should improve
  3157. * performance for small packets with large amounts
  3158. * of reassembly being done in the stack */
  3159. #define E1000_CB_LENGTH 256
  3160. if ((length < E1000_CB_LENGTH) &&
  3161. !rx_ring->rx_skb_top &&
  3162. /* or maybe (status & E1000_RXD_STAT_EOP) && */
  3163. !multi_descriptor) {
  3164. struct sk_buff *new_skb =
  3165. dev_alloc_skb(length + NET_IP_ALIGN);
  3166. if (new_skb) {
  3167. skb_reserve(new_skb, NET_IP_ALIGN);
  3168. new_skb->dev = netdev;
  3169. memcpy(new_skb->data - NET_IP_ALIGN,
  3170. skb->data - NET_IP_ALIGN,
  3171. length + NET_IP_ALIGN);
  3172. /* save the skb in buffer_info as good */
  3173. buffer_info->skb = skb;
  3174. skb = new_skb;
  3175. skb_put(skb, length);
  3176. }
  3177. }
  3178. /* end copybreak code */
  3179. /* Receive Checksum Offload */
  3180. e1000_rx_checksum(adapter,
  3181. (uint32_t)(status) |
  3182. ((uint32_t)(rx_desc->errors) << 24),
  3183. rx_desc->csum, skb);
  3184. skb->protocol = eth_type_trans(skb, netdev);
  3185. #ifdef CONFIG_E1000_NAPI
  3186. if (unlikely(adapter->vlgrp &&
  3187. (status & E1000_RXD_STAT_VP))) {
  3188. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3189. le16_to_cpu(rx_desc->special) &
  3190. E1000_RXD_SPC_VLAN_MASK);
  3191. } else {
  3192. netif_receive_skb(skb);
  3193. }
  3194. #else /* CONFIG_E1000_NAPI */
  3195. if (unlikely(adapter->vlgrp &&
  3196. (status & E1000_RXD_STAT_VP))) {
  3197. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3198. le16_to_cpu(rx_desc->special) &
  3199. E1000_RXD_SPC_VLAN_MASK);
  3200. } else {
  3201. netif_rx(skb);
  3202. }
  3203. #endif /* CONFIG_E1000_NAPI */
  3204. netdev->last_rx = jiffies;
  3205. #ifdef CONFIG_E1000_MQ
  3206. rx_ring->rx_stats.packets++;
  3207. rx_ring->rx_stats.bytes += length;
  3208. #endif
  3209. next_desc:
  3210. rx_desc->status = 0;
  3211. /* return some buffers to hardware, one at a time is too slow */
  3212. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3213. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3214. cleaned_count = 0;
  3215. }
  3216. }
  3217. rx_ring->next_to_clean = i;
  3218. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3219. if (cleaned_count)
  3220. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3221. return cleaned;
  3222. }
  3223. /**
  3224. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3225. * @adapter: board private structure
  3226. **/
  3227. static boolean_t
  3228. #ifdef CONFIG_E1000_NAPI
  3229. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3230. struct e1000_rx_ring *rx_ring,
  3231. int *work_done, int work_to_do)
  3232. #else
  3233. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3234. struct e1000_rx_ring *rx_ring)
  3235. #endif
  3236. {
  3237. union e1000_rx_desc_packet_split *rx_desc;
  3238. struct net_device *netdev = adapter->netdev;
  3239. struct pci_dev *pdev = adapter->pdev;
  3240. struct e1000_buffer *buffer_info;
  3241. struct e1000_ps_page *ps_page;
  3242. struct e1000_ps_page_dma *ps_page_dma;
  3243. struct sk_buff *skb;
  3244. unsigned int i, j;
  3245. uint32_t length, staterr;
  3246. int cleaned_count = 0;
  3247. boolean_t cleaned = FALSE;
  3248. i = rx_ring->next_to_clean;
  3249. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3250. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3251. while (staterr & E1000_RXD_STAT_DD) {
  3252. buffer_info = &rx_ring->buffer_info[i];
  3253. ps_page = &rx_ring->ps_page[i];
  3254. ps_page_dma = &rx_ring->ps_page_dma[i];
  3255. #ifdef CONFIG_E1000_NAPI
  3256. if (unlikely(*work_done >= work_to_do))
  3257. break;
  3258. (*work_done)++;
  3259. #endif
  3260. cleaned = TRUE;
  3261. cleaned_count++;
  3262. pci_unmap_single(pdev, buffer_info->dma,
  3263. buffer_info->length,
  3264. PCI_DMA_FROMDEVICE);
  3265. skb = buffer_info->skb;
  3266. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3267. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3268. " the full packet\n", netdev->name);
  3269. dev_kfree_skb_irq(skb);
  3270. goto next_desc;
  3271. }
  3272. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3273. dev_kfree_skb_irq(skb);
  3274. goto next_desc;
  3275. }
  3276. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3277. if (unlikely(!length)) {
  3278. E1000_DBG("%s: Last part of the packet spanning"
  3279. " multiple descriptors\n", netdev->name);
  3280. dev_kfree_skb_irq(skb);
  3281. goto next_desc;
  3282. }
  3283. /* Good Receive */
  3284. skb_put(skb, length);
  3285. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3286. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3287. break;
  3288. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3289. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3290. ps_page_dma->ps_page_dma[j] = 0;
  3291. skb_shinfo(skb)->frags[j].page =
  3292. ps_page->ps_page[j];
  3293. ps_page->ps_page[j] = NULL;
  3294. skb_shinfo(skb)->frags[j].page_offset = 0;
  3295. skb_shinfo(skb)->frags[j].size = length;
  3296. skb_shinfo(skb)->nr_frags++;
  3297. skb->len += length;
  3298. skb->data_len += length;
  3299. }
  3300. e1000_rx_checksum(adapter, staterr,
  3301. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3302. skb->protocol = eth_type_trans(skb, netdev);
  3303. if (likely(rx_desc->wb.upper.header_status &
  3304. E1000_RXDPS_HDRSTAT_HDRSP))
  3305. adapter->rx_hdr_split++;
  3306. #ifdef CONFIG_E1000_NAPI
  3307. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3308. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3309. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3310. E1000_RXD_SPC_VLAN_MASK);
  3311. } else {
  3312. netif_receive_skb(skb);
  3313. }
  3314. #else /* CONFIG_E1000_NAPI */
  3315. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3316. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3317. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3318. E1000_RXD_SPC_VLAN_MASK);
  3319. } else {
  3320. netif_rx(skb);
  3321. }
  3322. #endif /* CONFIG_E1000_NAPI */
  3323. netdev->last_rx = jiffies;
  3324. #ifdef CONFIG_E1000_MQ
  3325. rx_ring->rx_stats.packets++;
  3326. rx_ring->rx_stats.bytes += length;
  3327. #endif
  3328. next_desc:
  3329. rx_desc->wb.middle.status_error &= ~0xFF;
  3330. buffer_info->skb = NULL;
  3331. /* return some buffers to hardware, one at a time is too slow */
  3332. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3333. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3334. cleaned_count = 0;
  3335. }
  3336. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3337. }
  3338. rx_ring->next_to_clean = i;
  3339. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3340. if (cleaned_count)
  3341. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3342. return cleaned;
  3343. }
  3344. /**
  3345. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3346. * @adapter: address of board private structure
  3347. **/
  3348. static void
  3349. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3350. struct e1000_rx_ring *rx_ring,
  3351. int cleaned_count)
  3352. {
  3353. struct net_device *netdev = adapter->netdev;
  3354. struct pci_dev *pdev = adapter->pdev;
  3355. struct e1000_rx_desc *rx_desc;
  3356. struct e1000_buffer *buffer_info;
  3357. struct sk_buff *skb;
  3358. unsigned int i;
  3359. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3360. i = rx_ring->next_to_use;
  3361. buffer_info = &rx_ring->buffer_info[i];
  3362. while (cleaned_count--) {
  3363. if (!(skb = buffer_info->skb))
  3364. skb = dev_alloc_skb(bufsz);
  3365. else {
  3366. skb_trim(skb, 0);
  3367. goto map_skb;
  3368. }
  3369. if (unlikely(!skb)) {
  3370. /* Better luck next round */
  3371. adapter->alloc_rx_buff_failed++;
  3372. break;
  3373. }
  3374. /* Fix for errata 23, can't cross 64kB boundary */
  3375. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3376. struct sk_buff *oldskb = skb;
  3377. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3378. "at %p\n", bufsz, skb->data);
  3379. /* Try again, without freeing the previous */
  3380. skb = dev_alloc_skb(bufsz);
  3381. /* Failed allocation, critical failure */
  3382. if (!skb) {
  3383. dev_kfree_skb(oldskb);
  3384. break;
  3385. }
  3386. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3387. /* give up */
  3388. dev_kfree_skb(skb);
  3389. dev_kfree_skb(oldskb);
  3390. break; /* while !buffer_info->skb */
  3391. } else {
  3392. /* Use new allocation */
  3393. dev_kfree_skb(oldskb);
  3394. }
  3395. }
  3396. /* Make buffer alignment 2 beyond a 16 byte boundary
  3397. * this will result in a 16 byte aligned IP header after
  3398. * the 14 byte MAC header is removed
  3399. */
  3400. skb_reserve(skb, NET_IP_ALIGN);
  3401. skb->dev = netdev;
  3402. buffer_info->skb = skb;
  3403. buffer_info->length = adapter->rx_buffer_len;
  3404. map_skb:
  3405. buffer_info->dma = pci_map_single(pdev,
  3406. skb->data,
  3407. adapter->rx_buffer_len,
  3408. PCI_DMA_FROMDEVICE);
  3409. /* Fix for errata 23, can't cross 64kB boundary */
  3410. if (!e1000_check_64k_bound(adapter,
  3411. (void *)(unsigned long)buffer_info->dma,
  3412. adapter->rx_buffer_len)) {
  3413. DPRINTK(RX_ERR, ERR,
  3414. "dma align check failed: %u bytes at %p\n",
  3415. adapter->rx_buffer_len,
  3416. (void *)(unsigned long)buffer_info->dma);
  3417. dev_kfree_skb(skb);
  3418. buffer_info->skb = NULL;
  3419. pci_unmap_single(pdev, buffer_info->dma,
  3420. adapter->rx_buffer_len,
  3421. PCI_DMA_FROMDEVICE);
  3422. break; /* while !buffer_info->skb */
  3423. }
  3424. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3425. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3426. if (unlikely(++i == rx_ring->count))
  3427. i = 0;
  3428. buffer_info = &rx_ring->buffer_info[i];
  3429. }
  3430. if (likely(rx_ring->next_to_use != i)) {
  3431. rx_ring->next_to_use = i;
  3432. if (unlikely(i-- == 0))
  3433. i = (rx_ring->count - 1);
  3434. /* Force memory writes to complete before letting h/w
  3435. * know there are new descriptors to fetch. (Only
  3436. * applicable for weak-ordered memory model archs,
  3437. * such as IA-64). */
  3438. wmb();
  3439. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3440. }
  3441. }
  3442. /**
  3443. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3444. * @adapter: address of board private structure
  3445. **/
  3446. static void
  3447. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3448. struct e1000_rx_ring *rx_ring,
  3449. int cleaned_count)
  3450. {
  3451. struct net_device *netdev = adapter->netdev;
  3452. struct pci_dev *pdev = adapter->pdev;
  3453. union e1000_rx_desc_packet_split *rx_desc;
  3454. struct e1000_buffer *buffer_info;
  3455. struct e1000_ps_page *ps_page;
  3456. struct e1000_ps_page_dma *ps_page_dma;
  3457. struct sk_buff *skb;
  3458. unsigned int i, j;
  3459. i = rx_ring->next_to_use;
  3460. buffer_info = &rx_ring->buffer_info[i];
  3461. ps_page = &rx_ring->ps_page[i];
  3462. ps_page_dma = &rx_ring->ps_page_dma[i];
  3463. while (cleaned_count--) {
  3464. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3465. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3466. if (j < adapter->rx_ps_pages) {
  3467. if (likely(!ps_page->ps_page[j])) {
  3468. ps_page->ps_page[j] =
  3469. alloc_page(GFP_ATOMIC);
  3470. if (unlikely(!ps_page->ps_page[j])) {
  3471. adapter->alloc_rx_buff_failed++;
  3472. goto no_buffers;
  3473. }
  3474. ps_page_dma->ps_page_dma[j] =
  3475. pci_map_page(pdev,
  3476. ps_page->ps_page[j],
  3477. 0, PAGE_SIZE,
  3478. PCI_DMA_FROMDEVICE);
  3479. }
  3480. /* Refresh the desc even if buffer_addrs didn't
  3481. * change because each write-back erases
  3482. * this info.
  3483. */
  3484. rx_desc->read.buffer_addr[j+1] =
  3485. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3486. } else
  3487. rx_desc->read.buffer_addr[j+1] = ~0;
  3488. }
  3489. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3490. if (unlikely(!skb)) {
  3491. adapter->alloc_rx_buff_failed++;
  3492. break;
  3493. }
  3494. /* Make buffer alignment 2 beyond a 16 byte boundary
  3495. * this will result in a 16 byte aligned IP header after
  3496. * the 14 byte MAC header is removed
  3497. */
  3498. skb_reserve(skb, NET_IP_ALIGN);
  3499. skb->dev = netdev;
  3500. buffer_info->skb = skb;
  3501. buffer_info->length = adapter->rx_ps_bsize0;
  3502. buffer_info->dma = pci_map_single(pdev, skb->data,
  3503. adapter->rx_ps_bsize0,
  3504. PCI_DMA_FROMDEVICE);
  3505. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3506. if (unlikely(++i == rx_ring->count)) i = 0;
  3507. buffer_info = &rx_ring->buffer_info[i];
  3508. ps_page = &rx_ring->ps_page[i];
  3509. ps_page_dma = &rx_ring->ps_page_dma[i];
  3510. }
  3511. no_buffers:
  3512. if (likely(rx_ring->next_to_use != i)) {
  3513. rx_ring->next_to_use = i;
  3514. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3515. /* Force memory writes to complete before letting h/w
  3516. * know there are new descriptors to fetch. (Only
  3517. * applicable for weak-ordered memory model archs,
  3518. * such as IA-64). */
  3519. wmb();
  3520. /* Hardware increments by 16 bytes, but packet split
  3521. * descriptors are 32 bytes...so we increment tail
  3522. * twice as much.
  3523. */
  3524. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3525. }
  3526. }
  3527. /**
  3528. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3529. * @adapter:
  3530. **/
  3531. static void
  3532. e1000_smartspeed(struct e1000_adapter *adapter)
  3533. {
  3534. uint16_t phy_status;
  3535. uint16_t phy_ctrl;
  3536. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3537. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3538. return;
  3539. if (adapter->smartspeed == 0) {
  3540. /* If Master/Slave config fault is asserted twice,
  3541. * we assume back-to-back */
  3542. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3543. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3544. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3545. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3546. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3547. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3548. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3549. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3550. phy_ctrl);
  3551. adapter->smartspeed++;
  3552. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3553. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3554. &phy_ctrl)) {
  3555. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3556. MII_CR_RESTART_AUTO_NEG);
  3557. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3558. phy_ctrl);
  3559. }
  3560. }
  3561. return;
  3562. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3563. /* If still no link, perhaps using 2/3 pair cable */
  3564. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3565. phy_ctrl |= CR_1000T_MS_ENABLE;
  3566. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3567. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3568. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3569. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3570. MII_CR_RESTART_AUTO_NEG);
  3571. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3572. }
  3573. }
  3574. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3575. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3576. adapter->smartspeed = 0;
  3577. }
  3578. /**
  3579. * e1000_ioctl -
  3580. * @netdev:
  3581. * @ifreq:
  3582. * @cmd:
  3583. **/
  3584. static int
  3585. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3586. {
  3587. switch (cmd) {
  3588. case SIOCGMIIPHY:
  3589. case SIOCGMIIREG:
  3590. case SIOCSMIIREG:
  3591. return e1000_mii_ioctl(netdev, ifr, cmd);
  3592. default:
  3593. return -EOPNOTSUPP;
  3594. }
  3595. }
  3596. /**
  3597. * e1000_mii_ioctl -
  3598. * @netdev:
  3599. * @ifreq:
  3600. * @cmd:
  3601. **/
  3602. static int
  3603. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3604. {
  3605. struct e1000_adapter *adapter = netdev_priv(netdev);
  3606. struct mii_ioctl_data *data = if_mii(ifr);
  3607. int retval;
  3608. uint16_t mii_reg;
  3609. uint16_t spddplx;
  3610. unsigned long flags;
  3611. if (adapter->hw.media_type != e1000_media_type_copper)
  3612. return -EOPNOTSUPP;
  3613. switch (cmd) {
  3614. case SIOCGMIIPHY:
  3615. data->phy_id = adapter->hw.phy_addr;
  3616. break;
  3617. case SIOCGMIIREG:
  3618. if (!capable(CAP_NET_ADMIN))
  3619. return -EPERM;
  3620. spin_lock_irqsave(&adapter->stats_lock, flags);
  3621. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3622. &data->val_out)) {
  3623. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3624. return -EIO;
  3625. }
  3626. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3627. break;
  3628. case SIOCSMIIREG:
  3629. if (!capable(CAP_NET_ADMIN))
  3630. return -EPERM;
  3631. if (data->reg_num & ~(0x1F))
  3632. return -EFAULT;
  3633. mii_reg = data->val_in;
  3634. spin_lock_irqsave(&adapter->stats_lock, flags);
  3635. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3636. mii_reg)) {
  3637. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3638. return -EIO;
  3639. }
  3640. if (adapter->hw.phy_type == e1000_phy_m88) {
  3641. switch (data->reg_num) {
  3642. case PHY_CTRL:
  3643. if (mii_reg & MII_CR_POWER_DOWN)
  3644. break;
  3645. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3646. adapter->hw.autoneg = 1;
  3647. adapter->hw.autoneg_advertised = 0x2F;
  3648. } else {
  3649. if (mii_reg & 0x40)
  3650. spddplx = SPEED_1000;
  3651. else if (mii_reg & 0x2000)
  3652. spddplx = SPEED_100;
  3653. else
  3654. spddplx = SPEED_10;
  3655. spddplx += (mii_reg & 0x100)
  3656. ? FULL_DUPLEX :
  3657. HALF_DUPLEX;
  3658. retval = e1000_set_spd_dplx(adapter,
  3659. spddplx);
  3660. if (retval) {
  3661. spin_unlock_irqrestore(
  3662. &adapter->stats_lock,
  3663. flags);
  3664. return retval;
  3665. }
  3666. }
  3667. if (netif_running(adapter->netdev)) {
  3668. e1000_down(adapter);
  3669. e1000_up(adapter);
  3670. } else
  3671. e1000_reset(adapter);
  3672. break;
  3673. case M88E1000_PHY_SPEC_CTRL:
  3674. case M88E1000_EXT_PHY_SPEC_CTRL:
  3675. if (e1000_phy_reset(&adapter->hw)) {
  3676. spin_unlock_irqrestore(
  3677. &adapter->stats_lock, flags);
  3678. return -EIO;
  3679. }
  3680. break;
  3681. }
  3682. } else {
  3683. switch (data->reg_num) {
  3684. case PHY_CTRL:
  3685. if (mii_reg & MII_CR_POWER_DOWN)
  3686. break;
  3687. if (netif_running(adapter->netdev)) {
  3688. e1000_down(adapter);
  3689. e1000_up(adapter);
  3690. } else
  3691. e1000_reset(adapter);
  3692. break;
  3693. }
  3694. }
  3695. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3696. break;
  3697. default:
  3698. return -EOPNOTSUPP;
  3699. }
  3700. return E1000_SUCCESS;
  3701. }
  3702. void
  3703. e1000_pci_set_mwi(struct e1000_hw *hw)
  3704. {
  3705. struct e1000_adapter *adapter = hw->back;
  3706. int ret_val = pci_set_mwi(adapter->pdev);
  3707. if (ret_val)
  3708. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3709. }
  3710. void
  3711. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3712. {
  3713. struct e1000_adapter *adapter = hw->back;
  3714. pci_clear_mwi(adapter->pdev);
  3715. }
  3716. void
  3717. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3718. {
  3719. struct e1000_adapter *adapter = hw->back;
  3720. pci_read_config_word(adapter->pdev, reg, value);
  3721. }
  3722. void
  3723. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3724. {
  3725. struct e1000_adapter *adapter = hw->back;
  3726. pci_write_config_word(adapter->pdev, reg, *value);
  3727. }
  3728. uint32_t
  3729. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3730. {
  3731. return inl(port);
  3732. }
  3733. void
  3734. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3735. {
  3736. outl(value, port);
  3737. }
  3738. static void
  3739. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3740. {
  3741. struct e1000_adapter *adapter = netdev_priv(netdev);
  3742. uint32_t ctrl, rctl;
  3743. e1000_irq_disable(adapter);
  3744. adapter->vlgrp = grp;
  3745. if (grp) {
  3746. /* enable VLAN tag insert/strip */
  3747. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3748. ctrl |= E1000_CTRL_VME;
  3749. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3750. /* enable VLAN receive filtering */
  3751. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3752. rctl |= E1000_RCTL_VFE;
  3753. rctl &= ~E1000_RCTL_CFIEN;
  3754. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3755. e1000_update_mng_vlan(adapter);
  3756. } else {
  3757. /* disable VLAN tag insert/strip */
  3758. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3759. ctrl &= ~E1000_CTRL_VME;
  3760. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3761. /* disable VLAN filtering */
  3762. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3763. rctl &= ~E1000_RCTL_VFE;
  3764. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3765. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3766. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3767. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3768. }
  3769. }
  3770. e1000_irq_enable(adapter);
  3771. }
  3772. static void
  3773. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3774. {
  3775. struct e1000_adapter *adapter = netdev_priv(netdev);
  3776. uint32_t vfta, index;
  3777. if ((adapter->hw.mng_cookie.status &
  3778. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3779. (vid == adapter->mng_vlan_id))
  3780. return;
  3781. /* add VID to filter table */
  3782. index = (vid >> 5) & 0x7F;
  3783. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3784. vfta |= (1 << (vid & 0x1F));
  3785. e1000_write_vfta(&adapter->hw, index, vfta);
  3786. }
  3787. static void
  3788. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3789. {
  3790. struct e1000_adapter *adapter = netdev_priv(netdev);
  3791. uint32_t vfta, index;
  3792. e1000_irq_disable(adapter);
  3793. if (adapter->vlgrp)
  3794. adapter->vlgrp->vlan_devices[vid] = NULL;
  3795. e1000_irq_enable(adapter);
  3796. if ((adapter->hw.mng_cookie.status &
  3797. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3798. (vid == adapter->mng_vlan_id)) {
  3799. /* release control to f/w */
  3800. e1000_release_hw_control(adapter);
  3801. return;
  3802. }
  3803. /* remove VID from filter table */
  3804. index = (vid >> 5) & 0x7F;
  3805. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3806. vfta &= ~(1 << (vid & 0x1F));
  3807. e1000_write_vfta(&adapter->hw, index, vfta);
  3808. }
  3809. static void
  3810. e1000_restore_vlan(struct e1000_adapter *adapter)
  3811. {
  3812. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3813. if (adapter->vlgrp) {
  3814. uint16_t vid;
  3815. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3816. if (!adapter->vlgrp->vlan_devices[vid])
  3817. continue;
  3818. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3819. }
  3820. }
  3821. }
  3822. int
  3823. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3824. {
  3825. adapter->hw.autoneg = 0;
  3826. /* Fiber NICs only allow 1000 gbps Full duplex */
  3827. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3828. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3829. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3830. return -EINVAL;
  3831. }
  3832. switch (spddplx) {
  3833. case SPEED_10 + DUPLEX_HALF:
  3834. adapter->hw.forced_speed_duplex = e1000_10_half;
  3835. break;
  3836. case SPEED_10 + DUPLEX_FULL:
  3837. adapter->hw.forced_speed_duplex = e1000_10_full;
  3838. break;
  3839. case SPEED_100 + DUPLEX_HALF:
  3840. adapter->hw.forced_speed_duplex = e1000_100_half;
  3841. break;
  3842. case SPEED_100 + DUPLEX_FULL:
  3843. adapter->hw.forced_speed_duplex = e1000_100_full;
  3844. break;
  3845. case SPEED_1000 + DUPLEX_FULL:
  3846. adapter->hw.autoneg = 1;
  3847. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3848. break;
  3849. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3850. default:
  3851. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3852. return -EINVAL;
  3853. }
  3854. return 0;
  3855. }
  3856. #ifdef CONFIG_PM
  3857. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3858. * space versus the 64 bytes that pci_[save|restore]_state handle
  3859. */
  3860. #define PCIE_CONFIG_SPACE_LEN 256
  3861. #define PCI_CONFIG_SPACE_LEN 64
  3862. static int
  3863. e1000_pci_save_state(struct e1000_adapter *adapter)
  3864. {
  3865. struct pci_dev *dev = adapter->pdev;
  3866. int size;
  3867. int i;
  3868. if (adapter->hw.mac_type >= e1000_82571)
  3869. size = PCIE_CONFIG_SPACE_LEN;
  3870. else
  3871. size = PCI_CONFIG_SPACE_LEN;
  3872. WARN_ON(adapter->config_space != NULL);
  3873. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3874. if (!adapter->config_space) {
  3875. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3876. return -ENOMEM;
  3877. }
  3878. for (i = 0; i < (size / 4); i++)
  3879. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3880. return 0;
  3881. }
  3882. static void
  3883. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3884. {
  3885. struct pci_dev *dev = adapter->pdev;
  3886. int size;
  3887. int i;
  3888. if (adapter->config_space == NULL)
  3889. return;
  3890. if (adapter->hw.mac_type >= e1000_82571)
  3891. size = PCIE_CONFIG_SPACE_LEN;
  3892. else
  3893. size = PCI_CONFIG_SPACE_LEN;
  3894. for (i = 0; i < (size / 4); i++)
  3895. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3896. kfree(adapter->config_space);
  3897. adapter->config_space = NULL;
  3898. return;
  3899. }
  3900. #endif /* CONFIG_PM */
  3901. static int
  3902. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3903. {
  3904. struct net_device *netdev = pci_get_drvdata(pdev);
  3905. struct e1000_adapter *adapter = netdev_priv(netdev);
  3906. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3907. uint32_t wufc = adapter->wol;
  3908. int retval = 0;
  3909. netif_device_detach(netdev);
  3910. if (netif_running(netdev))
  3911. e1000_down(adapter);
  3912. #ifdef CONFIG_PM
  3913. /* implement our own version of pci_save_state(pdev) because pci
  3914. * express adapters have larger 256 byte config spaces */
  3915. retval = e1000_pci_save_state(adapter);
  3916. if (retval)
  3917. return retval;
  3918. #endif
  3919. status = E1000_READ_REG(&adapter->hw, STATUS);
  3920. if (status & E1000_STATUS_LU)
  3921. wufc &= ~E1000_WUFC_LNKC;
  3922. if (wufc) {
  3923. e1000_setup_rctl(adapter);
  3924. e1000_set_multi(netdev);
  3925. /* turn on all-multi mode if wake on multicast is enabled */
  3926. if (adapter->wol & E1000_WUFC_MC) {
  3927. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3928. rctl |= E1000_RCTL_MPE;
  3929. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3930. }
  3931. if (adapter->hw.mac_type >= e1000_82540) {
  3932. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3933. /* advertise wake from D3Cold */
  3934. #define E1000_CTRL_ADVD3WUC 0x00100000
  3935. /* phy power management enable */
  3936. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3937. ctrl |= E1000_CTRL_ADVD3WUC |
  3938. E1000_CTRL_EN_PHY_PWR_MGMT;
  3939. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3940. }
  3941. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3942. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3943. /* keep the laser running in D3 */
  3944. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3945. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3946. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3947. }
  3948. /* Allow time for pending master requests to run */
  3949. e1000_disable_pciex_master(&adapter->hw);
  3950. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3951. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3952. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3953. if (retval)
  3954. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3955. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3956. if (retval)
  3957. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3958. } else {
  3959. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3960. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3961. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3962. if (retval)
  3963. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3964. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3965. if (retval)
  3966. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3967. }
  3968. if (adapter->hw.mac_type >= e1000_82540 &&
  3969. adapter->hw.media_type == e1000_media_type_copper) {
  3970. manc = E1000_READ_REG(&adapter->hw, MANC);
  3971. if (manc & E1000_MANC_SMBUS_EN) {
  3972. manc |= E1000_MANC_ARP_EN;
  3973. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3974. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3975. if (retval)
  3976. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3977. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3978. if (retval)
  3979. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3980. }
  3981. }
  3982. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3983. * would have already happened in close and is redundant. */
  3984. e1000_release_hw_control(adapter);
  3985. pci_disable_device(pdev);
  3986. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3987. if (retval)
  3988. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3989. return 0;
  3990. }
  3991. #ifdef CONFIG_PM
  3992. static int
  3993. e1000_resume(struct pci_dev *pdev)
  3994. {
  3995. struct net_device *netdev = pci_get_drvdata(pdev);
  3996. struct e1000_adapter *adapter = netdev_priv(netdev);
  3997. int retval;
  3998. uint32_t manc, ret_val;
  3999. retval = pci_set_power_state(pdev, PCI_D0);
  4000. if (retval)
  4001. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  4002. e1000_pci_restore_state(adapter);
  4003. ret_val = pci_enable_device(pdev);
  4004. pci_set_master(pdev);
  4005. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  4006. if (retval)
  4007. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  4008. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  4009. if (retval)
  4010. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  4011. e1000_reset(adapter);
  4012. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4013. if (netif_running(netdev))
  4014. e1000_up(adapter);
  4015. netif_device_attach(netdev);
  4016. if (adapter->hw.mac_type >= e1000_82540 &&
  4017. adapter->hw.media_type == e1000_media_type_copper) {
  4018. manc = E1000_READ_REG(&adapter->hw, MANC);
  4019. manc &= ~(E1000_MANC_ARP_EN);
  4020. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4021. }
  4022. /* If the controller is 82573 and f/w is AMT, do not set
  4023. * DRV_LOAD until the interface is up. For all other cases,
  4024. * let the f/w know that the h/w is now under the control
  4025. * of the driver. */
  4026. if (adapter->hw.mac_type != e1000_82573 ||
  4027. !e1000_check_mng_mode(&adapter->hw))
  4028. e1000_get_hw_control(adapter);
  4029. return 0;
  4030. }
  4031. #endif
  4032. #ifdef CONFIG_NET_POLL_CONTROLLER
  4033. /*
  4034. * Polling 'interrupt' - used by things like netconsole to send skbs
  4035. * without having to re-enable interrupts. It's not called while
  4036. * the interrupt routine is executing.
  4037. */
  4038. static void
  4039. e1000_netpoll(struct net_device *netdev)
  4040. {
  4041. struct e1000_adapter *adapter = netdev_priv(netdev);
  4042. disable_irq(adapter->pdev->irq);
  4043. e1000_intr(adapter->pdev->irq, netdev, NULL);
  4044. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  4045. #ifndef CONFIG_E1000_NAPI
  4046. adapter->clean_rx(adapter, adapter->rx_ring);
  4047. #endif
  4048. enable_irq(adapter->pdev->irq);
  4049. }
  4050. #endif
  4051. /* e1000_main.c */