qeth_core_main.c 157 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <asm/ebcdic.h>
  22. #include <asm/io.h>
  23. #include <asm/sysinfo.h>
  24. #include <asm/compat.h>
  25. #include "qeth_core.h"
  26. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  27. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  28. /* N P A M L V H */
  29. [QETH_DBF_SETUP] = {"qeth_setup",
  30. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  31. [QETH_DBF_MSG] = {"qeth_msg",
  32. 8, 1, 128, 3, &debug_sprintf_view, NULL},
  33. [QETH_DBF_CTRL] = {"qeth_control",
  34. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  35. };
  36. EXPORT_SYMBOL_GPL(qeth_dbf);
  37. struct qeth_card_list_struct qeth_core_card_list;
  38. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  39. struct kmem_cache *qeth_core_header_cache;
  40. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  41. static struct kmem_cache *qeth_qdio_outbuf_cache;
  42. static struct device *qeth_core_root_dev;
  43. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  44. static struct lock_class_key qdio_out_skb_queue_key;
  45. static struct mutex qeth_mod_mutex;
  46. static void qeth_send_control_data_cb(struct qeth_channel *,
  47. struct qeth_cmd_buffer *);
  48. static int qeth_issue_next_read(struct qeth_card *);
  49. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  50. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  51. static void qeth_free_buffer_pool(struct qeth_card *);
  52. static int qeth_qdio_establish(struct qeth_card *);
  53. static void qeth_free_qdio_buffers(struct qeth_card *);
  54. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  55. struct qeth_qdio_out_buffer *buf,
  56. enum iucv_tx_notify notification);
  57. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  58. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  59. struct qeth_qdio_out_buffer *buf,
  60. enum qeth_qdio_buffer_states newbufstate);
  61. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  62. static struct workqueue_struct *qeth_wq;
  63. static void qeth_close_dev_handler(struct work_struct *work)
  64. {
  65. struct qeth_card *card;
  66. card = container_of(work, struct qeth_card, close_dev_work);
  67. QETH_CARD_TEXT(card, 2, "cldevhdl");
  68. rtnl_lock();
  69. dev_close(card->dev);
  70. rtnl_unlock();
  71. ccwgroup_set_offline(card->gdev);
  72. }
  73. void qeth_close_dev(struct qeth_card *card)
  74. {
  75. QETH_CARD_TEXT(card, 2, "cldevsubm");
  76. queue_work(qeth_wq, &card->close_dev_work);
  77. }
  78. EXPORT_SYMBOL_GPL(qeth_close_dev);
  79. static inline const char *qeth_get_cardname(struct qeth_card *card)
  80. {
  81. if (card->info.guestlan) {
  82. switch (card->info.type) {
  83. case QETH_CARD_TYPE_OSD:
  84. return " Virtual NIC QDIO";
  85. case QETH_CARD_TYPE_IQD:
  86. return " Virtual NIC Hiper";
  87. case QETH_CARD_TYPE_OSM:
  88. return " Virtual NIC QDIO - OSM";
  89. case QETH_CARD_TYPE_OSX:
  90. return " Virtual NIC QDIO - OSX";
  91. default:
  92. return " unknown";
  93. }
  94. } else {
  95. switch (card->info.type) {
  96. case QETH_CARD_TYPE_OSD:
  97. return " OSD Express";
  98. case QETH_CARD_TYPE_IQD:
  99. return " HiperSockets";
  100. case QETH_CARD_TYPE_OSN:
  101. return " OSN QDIO";
  102. case QETH_CARD_TYPE_OSM:
  103. return " OSM QDIO";
  104. case QETH_CARD_TYPE_OSX:
  105. return " OSX QDIO";
  106. default:
  107. return " unknown";
  108. }
  109. }
  110. return " n/a";
  111. }
  112. /* max length to be returned: 14 */
  113. const char *qeth_get_cardname_short(struct qeth_card *card)
  114. {
  115. if (card->info.guestlan) {
  116. switch (card->info.type) {
  117. case QETH_CARD_TYPE_OSD:
  118. return "Virt.NIC QDIO";
  119. case QETH_CARD_TYPE_IQD:
  120. return "Virt.NIC Hiper";
  121. case QETH_CARD_TYPE_OSM:
  122. return "Virt.NIC OSM";
  123. case QETH_CARD_TYPE_OSX:
  124. return "Virt.NIC OSX";
  125. default:
  126. return "unknown";
  127. }
  128. } else {
  129. switch (card->info.type) {
  130. case QETH_CARD_TYPE_OSD:
  131. switch (card->info.link_type) {
  132. case QETH_LINK_TYPE_FAST_ETH:
  133. return "OSD_100";
  134. case QETH_LINK_TYPE_HSTR:
  135. return "HSTR";
  136. case QETH_LINK_TYPE_GBIT_ETH:
  137. return "OSD_1000";
  138. case QETH_LINK_TYPE_10GBIT_ETH:
  139. return "OSD_10GIG";
  140. case QETH_LINK_TYPE_LANE_ETH100:
  141. return "OSD_FE_LANE";
  142. case QETH_LINK_TYPE_LANE_TR:
  143. return "OSD_TR_LANE";
  144. case QETH_LINK_TYPE_LANE_ETH1000:
  145. return "OSD_GbE_LANE";
  146. case QETH_LINK_TYPE_LANE:
  147. return "OSD_ATM_LANE";
  148. default:
  149. return "OSD_Express";
  150. }
  151. case QETH_CARD_TYPE_IQD:
  152. return "HiperSockets";
  153. case QETH_CARD_TYPE_OSN:
  154. return "OSN";
  155. case QETH_CARD_TYPE_OSM:
  156. return "OSM_1000";
  157. case QETH_CARD_TYPE_OSX:
  158. return "OSX_10GIG";
  159. default:
  160. return "unknown";
  161. }
  162. }
  163. return "n/a";
  164. }
  165. void qeth_set_recovery_task(struct qeth_card *card)
  166. {
  167. card->recovery_task = current;
  168. }
  169. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  170. void qeth_clear_recovery_task(struct qeth_card *card)
  171. {
  172. card->recovery_task = NULL;
  173. }
  174. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  175. static bool qeth_is_recovery_task(const struct qeth_card *card)
  176. {
  177. return card->recovery_task == current;
  178. }
  179. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  180. int clear_start_mask)
  181. {
  182. unsigned long flags;
  183. spin_lock_irqsave(&card->thread_mask_lock, flags);
  184. card->thread_allowed_mask = threads;
  185. if (clear_start_mask)
  186. card->thread_start_mask &= threads;
  187. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  188. wake_up(&card->wait_q);
  189. }
  190. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  191. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  192. {
  193. unsigned long flags;
  194. int rc = 0;
  195. spin_lock_irqsave(&card->thread_mask_lock, flags);
  196. rc = (card->thread_running_mask & threads);
  197. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  198. return rc;
  199. }
  200. EXPORT_SYMBOL_GPL(qeth_threads_running);
  201. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  202. {
  203. if (qeth_is_recovery_task(card))
  204. return 0;
  205. return wait_event_interruptible(card->wait_q,
  206. qeth_threads_running(card, threads) == 0);
  207. }
  208. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  209. void qeth_clear_working_pool_list(struct qeth_card *card)
  210. {
  211. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  212. QETH_CARD_TEXT(card, 5, "clwrklst");
  213. list_for_each_entry_safe(pool_entry, tmp,
  214. &card->qdio.in_buf_pool.entry_list, list){
  215. list_del(&pool_entry->list);
  216. }
  217. }
  218. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  219. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  220. {
  221. struct qeth_buffer_pool_entry *pool_entry;
  222. void *ptr;
  223. int i, j;
  224. QETH_CARD_TEXT(card, 5, "alocpool");
  225. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  226. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  227. if (!pool_entry) {
  228. qeth_free_buffer_pool(card);
  229. return -ENOMEM;
  230. }
  231. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  232. ptr = (void *) __get_free_page(GFP_KERNEL);
  233. if (!ptr) {
  234. while (j > 0)
  235. free_page((unsigned long)
  236. pool_entry->elements[--j]);
  237. kfree(pool_entry);
  238. qeth_free_buffer_pool(card);
  239. return -ENOMEM;
  240. }
  241. pool_entry->elements[j] = ptr;
  242. }
  243. list_add(&pool_entry->init_list,
  244. &card->qdio.init_pool.entry_list);
  245. }
  246. return 0;
  247. }
  248. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  249. {
  250. QETH_CARD_TEXT(card, 2, "realcbp");
  251. if ((card->state != CARD_STATE_DOWN) &&
  252. (card->state != CARD_STATE_RECOVER))
  253. return -EPERM;
  254. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  255. qeth_clear_working_pool_list(card);
  256. qeth_free_buffer_pool(card);
  257. card->qdio.in_buf_pool.buf_count = bufcnt;
  258. card->qdio.init_pool.buf_count = bufcnt;
  259. return qeth_alloc_buffer_pool(card);
  260. }
  261. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  262. static inline int qeth_cq_init(struct qeth_card *card)
  263. {
  264. int rc;
  265. if (card->options.cq == QETH_CQ_ENABLED) {
  266. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  267. memset(card->qdio.c_q->qdio_bufs, 0,
  268. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  269. card->qdio.c_q->next_buf_to_init = 127;
  270. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  271. card->qdio.no_in_queues - 1, 0,
  272. 127);
  273. if (rc) {
  274. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  275. goto out;
  276. }
  277. }
  278. rc = 0;
  279. out:
  280. return rc;
  281. }
  282. static inline int qeth_alloc_cq(struct qeth_card *card)
  283. {
  284. int rc;
  285. if (card->options.cq == QETH_CQ_ENABLED) {
  286. int i;
  287. struct qdio_outbuf_state *outbuf_states;
  288. QETH_DBF_TEXT(SETUP, 2, "cqon");
  289. card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
  290. GFP_KERNEL);
  291. if (!card->qdio.c_q) {
  292. rc = -1;
  293. goto kmsg_out;
  294. }
  295. QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
  296. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  297. card->qdio.c_q->bufs[i].buffer =
  298. &card->qdio.c_q->qdio_bufs[i];
  299. }
  300. card->qdio.no_in_queues = 2;
  301. card->qdio.out_bufstates =
  302. kzalloc(card->qdio.no_out_queues *
  303. QDIO_MAX_BUFFERS_PER_Q *
  304. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  305. outbuf_states = card->qdio.out_bufstates;
  306. if (outbuf_states == NULL) {
  307. rc = -1;
  308. goto free_cq_out;
  309. }
  310. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  311. card->qdio.out_qs[i]->bufstates = outbuf_states;
  312. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  313. }
  314. } else {
  315. QETH_DBF_TEXT(SETUP, 2, "nocq");
  316. card->qdio.c_q = NULL;
  317. card->qdio.no_in_queues = 1;
  318. }
  319. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  320. rc = 0;
  321. out:
  322. return rc;
  323. free_cq_out:
  324. kfree(card->qdio.c_q);
  325. card->qdio.c_q = NULL;
  326. kmsg_out:
  327. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  328. goto out;
  329. }
  330. static inline void qeth_free_cq(struct qeth_card *card)
  331. {
  332. if (card->qdio.c_q) {
  333. --card->qdio.no_in_queues;
  334. kfree(card->qdio.c_q);
  335. card->qdio.c_q = NULL;
  336. }
  337. kfree(card->qdio.out_bufstates);
  338. card->qdio.out_bufstates = NULL;
  339. }
  340. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  341. int delayed) {
  342. enum iucv_tx_notify n;
  343. switch (sbalf15) {
  344. case 0:
  345. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  346. break;
  347. case 4:
  348. case 16:
  349. case 17:
  350. case 18:
  351. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  352. TX_NOTIFY_UNREACHABLE;
  353. break;
  354. default:
  355. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  356. TX_NOTIFY_GENERALERROR;
  357. break;
  358. }
  359. return n;
  360. }
  361. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  362. int bidx, int forced_cleanup)
  363. {
  364. if (q->card->options.cq != QETH_CQ_ENABLED)
  365. return;
  366. if (q->bufs[bidx]->next_pending != NULL) {
  367. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  368. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  369. while (c) {
  370. if (forced_cleanup ||
  371. atomic_read(&c->state) ==
  372. QETH_QDIO_BUF_HANDLED_DELAYED) {
  373. struct qeth_qdio_out_buffer *f = c;
  374. QETH_CARD_TEXT(f->q->card, 5, "fp");
  375. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  376. /* release here to avoid interleaving between
  377. outbound tasklet and inbound tasklet
  378. regarding notifications and lifecycle */
  379. qeth_release_skbs(c);
  380. c = f->next_pending;
  381. WARN_ON_ONCE(head->next_pending != f);
  382. head->next_pending = c;
  383. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  384. } else {
  385. head = c;
  386. c = c->next_pending;
  387. }
  388. }
  389. }
  390. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  391. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  392. /* for recovery situations */
  393. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  394. qeth_init_qdio_out_buf(q, bidx);
  395. QETH_CARD_TEXT(q->card, 2, "clprecov");
  396. }
  397. }
  398. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  399. unsigned long phys_aob_addr) {
  400. struct qaob *aob;
  401. struct qeth_qdio_out_buffer *buffer;
  402. enum iucv_tx_notify notification;
  403. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  404. QETH_CARD_TEXT(card, 5, "haob");
  405. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  406. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  407. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  408. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  409. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  410. notification = TX_NOTIFY_OK;
  411. } else {
  412. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  413. QETH_QDIO_BUF_PENDING);
  414. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  415. notification = TX_NOTIFY_DELAYED_OK;
  416. }
  417. if (aob->aorc != 0) {
  418. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  419. notification = qeth_compute_cq_notification(aob->aorc, 1);
  420. }
  421. qeth_notify_skbs(buffer->q, buffer, notification);
  422. buffer->aob = NULL;
  423. qeth_clear_output_buffer(buffer->q, buffer,
  424. QETH_QDIO_BUF_HANDLED_DELAYED);
  425. /* from here on: do not touch buffer anymore */
  426. qdio_release_aob(aob);
  427. }
  428. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  429. {
  430. return card->options.cq == QETH_CQ_ENABLED &&
  431. card->qdio.c_q != NULL &&
  432. queue != 0 &&
  433. queue == card->qdio.no_in_queues - 1;
  434. }
  435. static int qeth_issue_next_read(struct qeth_card *card)
  436. {
  437. int rc;
  438. struct qeth_cmd_buffer *iob;
  439. QETH_CARD_TEXT(card, 5, "issnxrd");
  440. if (card->read.state != CH_STATE_UP)
  441. return -EIO;
  442. iob = qeth_get_buffer(&card->read);
  443. if (!iob) {
  444. dev_warn(&card->gdev->dev, "The qeth device driver "
  445. "failed to recover an error on the device\n");
  446. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  447. "available\n", dev_name(&card->gdev->dev));
  448. return -ENOMEM;
  449. }
  450. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  451. QETH_CARD_TEXT(card, 6, "noirqpnd");
  452. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  453. (addr_t) iob, 0, 0);
  454. if (rc) {
  455. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  456. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  457. atomic_set(&card->read.irq_pending, 0);
  458. card->read_or_write_problem = 1;
  459. qeth_schedule_recovery(card);
  460. wake_up(&card->wait_q);
  461. }
  462. return rc;
  463. }
  464. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  465. {
  466. struct qeth_reply *reply;
  467. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  468. if (reply) {
  469. atomic_set(&reply->refcnt, 1);
  470. atomic_set(&reply->received, 0);
  471. reply->card = card;
  472. }
  473. return reply;
  474. }
  475. static void qeth_get_reply(struct qeth_reply *reply)
  476. {
  477. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  478. atomic_inc(&reply->refcnt);
  479. }
  480. static void qeth_put_reply(struct qeth_reply *reply)
  481. {
  482. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  483. if (atomic_dec_and_test(&reply->refcnt))
  484. kfree(reply);
  485. }
  486. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  487. struct qeth_card *card)
  488. {
  489. char *ipa_name;
  490. int com = cmd->hdr.command;
  491. ipa_name = qeth_get_ipa_cmd_name(com);
  492. if (rc)
  493. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  494. "x%X \"%s\"\n",
  495. ipa_name, com, dev_name(&card->gdev->dev),
  496. QETH_CARD_IFNAME(card), rc,
  497. qeth_get_ipa_msg(rc));
  498. else
  499. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  500. ipa_name, com, dev_name(&card->gdev->dev),
  501. QETH_CARD_IFNAME(card));
  502. }
  503. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  504. struct qeth_cmd_buffer *iob)
  505. {
  506. struct qeth_ipa_cmd *cmd = NULL;
  507. QETH_CARD_TEXT(card, 5, "chkipad");
  508. if (IS_IPA(iob->data)) {
  509. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  510. if (IS_IPA_REPLY(cmd)) {
  511. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  512. cmd->hdr.command != IPA_CMD_DELCCID &&
  513. cmd->hdr.command != IPA_CMD_MODCCID &&
  514. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  515. qeth_issue_ipa_msg(cmd,
  516. cmd->hdr.return_code, card);
  517. return cmd;
  518. } else {
  519. switch (cmd->hdr.command) {
  520. case IPA_CMD_STOPLAN:
  521. if (cmd->hdr.return_code ==
  522. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  523. dev_err(&card->gdev->dev,
  524. "Interface %s is down because the "
  525. "adjacent port is no longer in "
  526. "reflective relay mode\n",
  527. QETH_CARD_IFNAME(card));
  528. qeth_close_dev(card);
  529. } else {
  530. dev_warn(&card->gdev->dev,
  531. "The link for interface %s on CHPID"
  532. " 0x%X failed\n",
  533. QETH_CARD_IFNAME(card),
  534. card->info.chpid);
  535. qeth_issue_ipa_msg(cmd,
  536. cmd->hdr.return_code, card);
  537. }
  538. card->lan_online = 0;
  539. if (card->dev && netif_carrier_ok(card->dev))
  540. netif_carrier_off(card->dev);
  541. return NULL;
  542. case IPA_CMD_STARTLAN:
  543. dev_info(&card->gdev->dev,
  544. "The link for %s on CHPID 0x%X has"
  545. " been restored\n",
  546. QETH_CARD_IFNAME(card),
  547. card->info.chpid);
  548. netif_carrier_on(card->dev);
  549. card->lan_online = 1;
  550. if (card->info.hwtrap)
  551. card->info.hwtrap = 2;
  552. qeth_schedule_recovery(card);
  553. return NULL;
  554. case IPA_CMD_MODCCID:
  555. return cmd;
  556. case IPA_CMD_REGISTER_LOCAL_ADDR:
  557. QETH_CARD_TEXT(card, 3, "irla");
  558. break;
  559. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  560. QETH_CARD_TEXT(card, 3, "urla");
  561. break;
  562. default:
  563. QETH_DBF_MESSAGE(2, "Received data is IPA "
  564. "but not a reply!\n");
  565. break;
  566. }
  567. }
  568. }
  569. return cmd;
  570. }
  571. void qeth_clear_ipacmd_list(struct qeth_card *card)
  572. {
  573. struct qeth_reply *reply, *r;
  574. unsigned long flags;
  575. QETH_CARD_TEXT(card, 4, "clipalst");
  576. spin_lock_irqsave(&card->lock, flags);
  577. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  578. qeth_get_reply(reply);
  579. reply->rc = -EIO;
  580. atomic_inc(&reply->received);
  581. list_del_init(&reply->list);
  582. wake_up(&reply->wait_q);
  583. qeth_put_reply(reply);
  584. }
  585. spin_unlock_irqrestore(&card->lock, flags);
  586. atomic_set(&card->write.irq_pending, 0);
  587. }
  588. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  589. static int qeth_check_idx_response(struct qeth_card *card,
  590. unsigned char *buffer)
  591. {
  592. if (!buffer)
  593. return 0;
  594. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  595. if ((buffer[2] & 0xc0) == 0xc0) {
  596. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  597. "with cause code 0x%02x%s\n",
  598. buffer[4],
  599. ((buffer[4] == 0x22) ?
  600. " -- try another portname" : ""));
  601. QETH_CARD_TEXT(card, 2, "ckidxres");
  602. QETH_CARD_TEXT(card, 2, " idxterm");
  603. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  604. if (buffer[4] == 0xf6) {
  605. dev_err(&card->gdev->dev,
  606. "The qeth device is not configured "
  607. "for the OSI layer required by z/VM\n");
  608. return -EPERM;
  609. }
  610. return -EIO;
  611. }
  612. return 0;
  613. }
  614. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  615. __u32 len)
  616. {
  617. struct qeth_card *card;
  618. card = CARD_FROM_CDEV(channel->ccwdev);
  619. QETH_CARD_TEXT(card, 4, "setupccw");
  620. if (channel == &card->read)
  621. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  622. else
  623. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  624. channel->ccw.count = len;
  625. channel->ccw.cda = (__u32) __pa(iob);
  626. }
  627. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  628. {
  629. __u8 index;
  630. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  631. index = channel->io_buf_no;
  632. do {
  633. if (channel->iob[index].state == BUF_STATE_FREE) {
  634. channel->iob[index].state = BUF_STATE_LOCKED;
  635. channel->io_buf_no = (channel->io_buf_no + 1) %
  636. QETH_CMD_BUFFER_NO;
  637. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  638. return channel->iob + index;
  639. }
  640. index = (index + 1) % QETH_CMD_BUFFER_NO;
  641. } while (index != channel->io_buf_no);
  642. return NULL;
  643. }
  644. void qeth_release_buffer(struct qeth_channel *channel,
  645. struct qeth_cmd_buffer *iob)
  646. {
  647. unsigned long flags;
  648. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  649. spin_lock_irqsave(&channel->iob_lock, flags);
  650. memset(iob->data, 0, QETH_BUFSIZE);
  651. iob->state = BUF_STATE_FREE;
  652. iob->callback = qeth_send_control_data_cb;
  653. iob->rc = 0;
  654. spin_unlock_irqrestore(&channel->iob_lock, flags);
  655. wake_up(&channel->wait_q);
  656. }
  657. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  658. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  659. {
  660. struct qeth_cmd_buffer *buffer = NULL;
  661. unsigned long flags;
  662. spin_lock_irqsave(&channel->iob_lock, flags);
  663. buffer = __qeth_get_buffer(channel);
  664. spin_unlock_irqrestore(&channel->iob_lock, flags);
  665. return buffer;
  666. }
  667. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  668. {
  669. struct qeth_cmd_buffer *buffer;
  670. wait_event(channel->wait_q,
  671. ((buffer = qeth_get_buffer(channel)) != NULL));
  672. return buffer;
  673. }
  674. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  675. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  676. {
  677. int cnt;
  678. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  679. qeth_release_buffer(channel, &channel->iob[cnt]);
  680. channel->buf_no = 0;
  681. channel->io_buf_no = 0;
  682. }
  683. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  684. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  685. struct qeth_cmd_buffer *iob)
  686. {
  687. struct qeth_card *card;
  688. struct qeth_reply *reply, *r;
  689. struct qeth_ipa_cmd *cmd;
  690. unsigned long flags;
  691. int keep_reply;
  692. int rc = 0;
  693. card = CARD_FROM_CDEV(channel->ccwdev);
  694. QETH_CARD_TEXT(card, 4, "sndctlcb");
  695. rc = qeth_check_idx_response(card, iob->data);
  696. switch (rc) {
  697. case 0:
  698. break;
  699. case -EIO:
  700. qeth_clear_ipacmd_list(card);
  701. qeth_schedule_recovery(card);
  702. /* fall through */
  703. default:
  704. goto out;
  705. }
  706. cmd = qeth_check_ipa_data(card, iob);
  707. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  708. goto out;
  709. /*in case of OSN : check if cmd is set */
  710. if (card->info.type == QETH_CARD_TYPE_OSN &&
  711. cmd &&
  712. cmd->hdr.command != IPA_CMD_STARTLAN &&
  713. card->osn_info.assist_cb != NULL) {
  714. card->osn_info.assist_cb(card->dev, cmd);
  715. goto out;
  716. }
  717. spin_lock_irqsave(&card->lock, flags);
  718. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  719. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  720. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  721. qeth_get_reply(reply);
  722. list_del_init(&reply->list);
  723. spin_unlock_irqrestore(&card->lock, flags);
  724. keep_reply = 0;
  725. if (reply->callback != NULL) {
  726. if (cmd) {
  727. reply->offset = (__u16)((char *)cmd -
  728. (char *)iob->data);
  729. keep_reply = reply->callback(card,
  730. reply,
  731. (unsigned long)cmd);
  732. } else
  733. keep_reply = reply->callback(card,
  734. reply,
  735. (unsigned long)iob);
  736. }
  737. if (cmd)
  738. reply->rc = (u16) cmd->hdr.return_code;
  739. else if (iob->rc)
  740. reply->rc = iob->rc;
  741. if (keep_reply) {
  742. spin_lock_irqsave(&card->lock, flags);
  743. list_add_tail(&reply->list,
  744. &card->cmd_waiter_list);
  745. spin_unlock_irqrestore(&card->lock, flags);
  746. } else {
  747. atomic_inc(&reply->received);
  748. wake_up(&reply->wait_q);
  749. }
  750. qeth_put_reply(reply);
  751. goto out;
  752. }
  753. }
  754. spin_unlock_irqrestore(&card->lock, flags);
  755. out:
  756. memcpy(&card->seqno.pdu_hdr_ack,
  757. QETH_PDU_HEADER_SEQ_NO(iob->data),
  758. QETH_SEQ_NO_LENGTH);
  759. qeth_release_buffer(channel, iob);
  760. }
  761. static int qeth_setup_channel(struct qeth_channel *channel)
  762. {
  763. int cnt;
  764. QETH_DBF_TEXT(SETUP, 2, "setupch");
  765. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  766. channel->iob[cnt].data =
  767. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  768. if (channel->iob[cnt].data == NULL)
  769. break;
  770. channel->iob[cnt].state = BUF_STATE_FREE;
  771. channel->iob[cnt].channel = channel;
  772. channel->iob[cnt].callback = qeth_send_control_data_cb;
  773. channel->iob[cnt].rc = 0;
  774. }
  775. if (cnt < QETH_CMD_BUFFER_NO) {
  776. while (cnt-- > 0)
  777. kfree(channel->iob[cnt].data);
  778. return -ENOMEM;
  779. }
  780. channel->buf_no = 0;
  781. channel->io_buf_no = 0;
  782. atomic_set(&channel->irq_pending, 0);
  783. spin_lock_init(&channel->iob_lock);
  784. init_waitqueue_head(&channel->wait_q);
  785. return 0;
  786. }
  787. static int qeth_set_thread_start_bit(struct qeth_card *card,
  788. unsigned long thread)
  789. {
  790. unsigned long flags;
  791. spin_lock_irqsave(&card->thread_mask_lock, flags);
  792. if (!(card->thread_allowed_mask & thread) ||
  793. (card->thread_start_mask & thread)) {
  794. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  795. return -EPERM;
  796. }
  797. card->thread_start_mask |= thread;
  798. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  799. return 0;
  800. }
  801. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  802. {
  803. unsigned long flags;
  804. spin_lock_irqsave(&card->thread_mask_lock, flags);
  805. card->thread_start_mask &= ~thread;
  806. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  807. wake_up(&card->wait_q);
  808. }
  809. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  810. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  811. {
  812. unsigned long flags;
  813. spin_lock_irqsave(&card->thread_mask_lock, flags);
  814. card->thread_running_mask &= ~thread;
  815. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  816. wake_up(&card->wait_q);
  817. }
  818. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  819. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  820. {
  821. unsigned long flags;
  822. int rc = 0;
  823. spin_lock_irqsave(&card->thread_mask_lock, flags);
  824. if (card->thread_start_mask & thread) {
  825. if ((card->thread_allowed_mask & thread) &&
  826. !(card->thread_running_mask & thread)) {
  827. rc = 1;
  828. card->thread_start_mask &= ~thread;
  829. card->thread_running_mask |= thread;
  830. } else
  831. rc = -EPERM;
  832. }
  833. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  834. return rc;
  835. }
  836. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  837. {
  838. int rc = 0;
  839. wait_event(card->wait_q,
  840. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  841. return rc;
  842. }
  843. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  844. void qeth_schedule_recovery(struct qeth_card *card)
  845. {
  846. QETH_CARD_TEXT(card, 2, "startrec");
  847. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  848. schedule_work(&card->kernel_thread_starter);
  849. }
  850. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  851. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  852. {
  853. int dstat, cstat;
  854. char *sense;
  855. struct qeth_card *card;
  856. sense = (char *) irb->ecw;
  857. cstat = irb->scsw.cmd.cstat;
  858. dstat = irb->scsw.cmd.dstat;
  859. card = CARD_FROM_CDEV(cdev);
  860. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  861. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  862. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  863. QETH_CARD_TEXT(card, 2, "CGENCHK");
  864. dev_warn(&cdev->dev, "The qeth device driver "
  865. "failed to recover an error on the device\n");
  866. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  867. dev_name(&cdev->dev), dstat, cstat);
  868. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  869. 16, 1, irb, 64, 1);
  870. return 1;
  871. }
  872. if (dstat & DEV_STAT_UNIT_CHECK) {
  873. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  874. SENSE_RESETTING_EVENT_FLAG) {
  875. QETH_CARD_TEXT(card, 2, "REVIND");
  876. return 1;
  877. }
  878. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  879. SENSE_COMMAND_REJECT_FLAG) {
  880. QETH_CARD_TEXT(card, 2, "CMDREJi");
  881. return 1;
  882. }
  883. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  884. QETH_CARD_TEXT(card, 2, "AFFE");
  885. return 1;
  886. }
  887. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  888. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  889. return 0;
  890. }
  891. QETH_CARD_TEXT(card, 2, "DGENCHK");
  892. return 1;
  893. }
  894. return 0;
  895. }
  896. static long __qeth_check_irb_error(struct ccw_device *cdev,
  897. unsigned long intparm, struct irb *irb)
  898. {
  899. struct qeth_card *card;
  900. card = CARD_FROM_CDEV(cdev);
  901. if (!IS_ERR(irb))
  902. return 0;
  903. switch (PTR_ERR(irb)) {
  904. case -EIO:
  905. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  906. dev_name(&cdev->dev));
  907. QETH_CARD_TEXT(card, 2, "ckirberr");
  908. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  909. break;
  910. case -ETIMEDOUT:
  911. dev_warn(&cdev->dev, "A hardware operation timed out"
  912. " on the device\n");
  913. QETH_CARD_TEXT(card, 2, "ckirberr");
  914. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  915. if (intparm == QETH_RCD_PARM) {
  916. if (card && (card->data.ccwdev == cdev)) {
  917. card->data.state = CH_STATE_DOWN;
  918. wake_up(&card->wait_q);
  919. }
  920. }
  921. break;
  922. default:
  923. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  924. dev_name(&cdev->dev), PTR_ERR(irb));
  925. QETH_CARD_TEXT(card, 2, "ckirberr");
  926. QETH_CARD_TEXT(card, 2, " rc???");
  927. }
  928. return PTR_ERR(irb);
  929. }
  930. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  931. struct irb *irb)
  932. {
  933. int rc;
  934. int cstat, dstat;
  935. struct qeth_cmd_buffer *buffer;
  936. struct qeth_channel *channel;
  937. struct qeth_card *card;
  938. struct qeth_cmd_buffer *iob;
  939. __u8 index;
  940. if (__qeth_check_irb_error(cdev, intparm, irb))
  941. return;
  942. cstat = irb->scsw.cmd.cstat;
  943. dstat = irb->scsw.cmd.dstat;
  944. card = CARD_FROM_CDEV(cdev);
  945. if (!card)
  946. return;
  947. QETH_CARD_TEXT(card, 5, "irq");
  948. if (card->read.ccwdev == cdev) {
  949. channel = &card->read;
  950. QETH_CARD_TEXT(card, 5, "read");
  951. } else if (card->write.ccwdev == cdev) {
  952. channel = &card->write;
  953. QETH_CARD_TEXT(card, 5, "write");
  954. } else {
  955. channel = &card->data;
  956. QETH_CARD_TEXT(card, 5, "data");
  957. }
  958. atomic_set(&channel->irq_pending, 0);
  959. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  960. channel->state = CH_STATE_STOPPED;
  961. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  962. channel->state = CH_STATE_HALTED;
  963. /*let's wake up immediately on data channel*/
  964. if ((channel == &card->data) && (intparm != 0) &&
  965. (intparm != QETH_RCD_PARM))
  966. goto out;
  967. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  968. QETH_CARD_TEXT(card, 6, "clrchpar");
  969. /* we don't have to handle this further */
  970. intparm = 0;
  971. }
  972. if (intparm == QETH_HALT_CHANNEL_PARM) {
  973. QETH_CARD_TEXT(card, 6, "hltchpar");
  974. /* we don't have to handle this further */
  975. intparm = 0;
  976. }
  977. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  978. (dstat & DEV_STAT_UNIT_CHECK) ||
  979. (cstat)) {
  980. if (irb->esw.esw0.erw.cons) {
  981. dev_warn(&channel->ccwdev->dev,
  982. "The qeth device driver failed to recover "
  983. "an error on the device\n");
  984. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  985. "0x%X dstat 0x%X\n",
  986. dev_name(&channel->ccwdev->dev), cstat, dstat);
  987. print_hex_dump(KERN_WARNING, "qeth: irb ",
  988. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  989. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  990. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  991. }
  992. if (intparm == QETH_RCD_PARM) {
  993. channel->state = CH_STATE_DOWN;
  994. goto out;
  995. }
  996. rc = qeth_get_problem(cdev, irb);
  997. if (rc) {
  998. qeth_clear_ipacmd_list(card);
  999. qeth_schedule_recovery(card);
  1000. goto out;
  1001. }
  1002. }
  1003. if (intparm == QETH_RCD_PARM) {
  1004. channel->state = CH_STATE_RCD_DONE;
  1005. goto out;
  1006. }
  1007. if (intparm) {
  1008. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1009. buffer->state = BUF_STATE_PROCESSED;
  1010. }
  1011. if (channel == &card->data)
  1012. return;
  1013. if (channel == &card->read &&
  1014. channel->state == CH_STATE_UP)
  1015. qeth_issue_next_read(card);
  1016. iob = channel->iob;
  1017. index = channel->buf_no;
  1018. while (iob[index].state == BUF_STATE_PROCESSED) {
  1019. if (iob[index].callback != NULL)
  1020. iob[index].callback(channel, iob + index);
  1021. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1022. }
  1023. channel->buf_no = index;
  1024. out:
  1025. wake_up(&card->wait_q);
  1026. return;
  1027. }
  1028. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1029. struct qeth_qdio_out_buffer *buf,
  1030. enum iucv_tx_notify notification)
  1031. {
  1032. struct sk_buff *skb;
  1033. if (skb_queue_empty(&buf->skb_list))
  1034. goto out;
  1035. skb = skb_peek(&buf->skb_list);
  1036. while (skb) {
  1037. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1038. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1039. if (skb->protocol == ETH_P_AF_IUCV) {
  1040. if (skb->sk) {
  1041. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1042. iucv->sk_txnotify(skb, notification);
  1043. }
  1044. }
  1045. if (skb_queue_is_last(&buf->skb_list, skb))
  1046. skb = NULL;
  1047. else
  1048. skb = skb_queue_next(&buf->skb_list, skb);
  1049. }
  1050. out:
  1051. return;
  1052. }
  1053. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1054. {
  1055. struct sk_buff *skb;
  1056. struct iucv_sock *iucv;
  1057. int notify_general_error = 0;
  1058. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1059. notify_general_error = 1;
  1060. /* release may never happen from within CQ tasklet scope */
  1061. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1062. skb = skb_dequeue(&buf->skb_list);
  1063. while (skb) {
  1064. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1065. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1066. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1067. if (skb->sk) {
  1068. iucv = iucv_sk(skb->sk);
  1069. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1070. }
  1071. }
  1072. atomic_dec(&skb->users);
  1073. dev_kfree_skb_any(skb);
  1074. skb = skb_dequeue(&buf->skb_list);
  1075. }
  1076. }
  1077. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1078. struct qeth_qdio_out_buffer *buf,
  1079. enum qeth_qdio_buffer_states newbufstate)
  1080. {
  1081. int i;
  1082. /* is PCI flag set on buffer? */
  1083. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1084. atomic_dec(&queue->set_pci_flags_count);
  1085. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1086. qeth_release_skbs(buf);
  1087. }
  1088. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1089. if (buf->buffer->element[i].addr && buf->is_header[i])
  1090. kmem_cache_free(qeth_core_header_cache,
  1091. buf->buffer->element[i].addr);
  1092. buf->is_header[i] = 0;
  1093. buf->buffer->element[i].length = 0;
  1094. buf->buffer->element[i].addr = NULL;
  1095. buf->buffer->element[i].eflags = 0;
  1096. buf->buffer->element[i].sflags = 0;
  1097. }
  1098. buf->buffer->element[15].eflags = 0;
  1099. buf->buffer->element[15].sflags = 0;
  1100. buf->next_element_to_fill = 0;
  1101. atomic_set(&buf->state, newbufstate);
  1102. }
  1103. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1104. {
  1105. int j;
  1106. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1107. if (!q->bufs[j])
  1108. continue;
  1109. qeth_cleanup_handled_pending(q, j, 1);
  1110. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1111. if (free) {
  1112. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1113. q->bufs[j] = NULL;
  1114. }
  1115. }
  1116. }
  1117. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1118. {
  1119. int i;
  1120. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1121. /* clear outbound buffers to free skbs */
  1122. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1123. if (card->qdio.out_qs[i]) {
  1124. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1125. }
  1126. }
  1127. }
  1128. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1129. static void qeth_free_buffer_pool(struct qeth_card *card)
  1130. {
  1131. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1132. int i = 0;
  1133. list_for_each_entry_safe(pool_entry, tmp,
  1134. &card->qdio.init_pool.entry_list, init_list){
  1135. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1136. free_page((unsigned long)pool_entry->elements[i]);
  1137. list_del(&pool_entry->init_list);
  1138. kfree(pool_entry);
  1139. }
  1140. }
  1141. static void qeth_free_qdio_buffers(struct qeth_card *card)
  1142. {
  1143. int i, j;
  1144. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  1145. QETH_QDIO_UNINITIALIZED)
  1146. return;
  1147. qeth_free_cq(card);
  1148. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  1149. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
  1150. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  1151. kfree(card->qdio.in_q);
  1152. card->qdio.in_q = NULL;
  1153. /* inbound buffer pool */
  1154. qeth_free_buffer_pool(card);
  1155. /* free outbound qdio_qs */
  1156. if (card->qdio.out_qs) {
  1157. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1158. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  1159. kfree(card->qdio.out_qs[i]);
  1160. }
  1161. kfree(card->qdio.out_qs);
  1162. card->qdio.out_qs = NULL;
  1163. }
  1164. }
  1165. static void qeth_clean_channel(struct qeth_channel *channel)
  1166. {
  1167. int cnt;
  1168. QETH_DBF_TEXT(SETUP, 2, "freech");
  1169. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1170. kfree(channel->iob[cnt].data);
  1171. }
  1172. static void qeth_set_single_write_queues(struct qeth_card *card)
  1173. {
  1174. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1175. (card->qdio.no_out_queues == 4))
  1176. qeth_free_qdio_buffers(card);
  1177. card->qdio.no_out_queues = 1;
  1178. if (card->qdio.default_out_queue != 0)
  1179. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1180. card->qdio.default_out_queue = 0;
  1181. }
  1182. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1183. {
  1184. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1185. (card->qdio.no_out_queues == 1)) {
  1186. qeth_free_qdio_buffers(card);
  1187. card->qdio.default_out_queue = 2;
  1188. }
  1189. card->qdio.no_out_queues = 4;
  1190. }
  1191. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1192. {
  1193. struct ccw_device *ccwdev;
  1194. struct channelPath_dsc {
  1195. u8 flags;
  1196. u8 lsn;
  1197. u8 desc;
  1198. u8 chpid;
  1199. u8 swla;
  1200. u8 zeroes;
  1201. u8 chla;
  1202. u8 chpp;
  1203. } *chp_dsc;
  1204. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1205. ccwdev = card->data.ccwdev;
  1206. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1207. if (!chp_dsc)
  1208. goto out;
  1209. card->info.func_level = 0x4100 + chp_dsc->desc;
  1210. if (card->info.type == QETH_CARD_TYPE_IQD)
  1211. goto out;
  1212. /* CHPP field bit 6 == 1 -> single queue */
  1213. if ((chp_dsc->chpp & 0x02) == 0x02)
  1214. qeth_set_single_write_queues(card);
  1215. else
  1216. qeth_set_multiple_write_queues(card);
  1217. out:
  1218. kfree(chp_dsc);
  1219. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1220. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1221. }
  1222. static void qeth_init_qdio_info(struct qeth_card *card)
  1223. {
  1224. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1225. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1226. /* inbound */
  1227. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1228. if (card->info.type == QETH_CARD_TYPE_IQD)
  1229. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1230. else
  1231. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1232. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1233. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1234. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1235. }
  1236. static void qeth_set_intial_options(struct qeth_card *card)
  1237. {
  1238. card->options.route4.type = NO_ROUTER;
  1239. card->options.route6.type = NO_ROUTER;
  1240. card->options.fake_broadcast = 0;
  1241. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1242. card->options.performance_stats = 0;
  1243. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1244. card->options.isolation = ISOLATION_MODE_NONE;
  1245. card->options.cq = QETH_CQ_DISABLED;
  1246. }
  1247. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1248. {
  1249. unsigned long flags;
  1250. int rc = 0;
  1251. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1252. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1253. (u8) card->thread_start_mask,
  1254. (u8) card->thread_allowed_mask,
  1255. (u8) card->thread_running_mask);
  1256. rc = (card->thread_start_mask & thread);
  1257. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1258. return rc;
  1259. }
  1260. static void qeth_start_kernel_thread(struct work_struct *work)
  1261. {
  1262. struct task_struct *ts;
  1263. struct qeth_card *card = container_of(work, struct qeth_card,
  1264. kernel_thread_starter);
  1265. QETH_CARD_TEXT(card , 2, "strthrd");
  1266. if (card->read.state != CH_STATE_UP &&
  1267. card->write.state != CH_STATE_UP)
  1268. return;
  1269. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1270. ts = kthread_run(card->discipline->recover, (void *)card,
  1271. "qeth_recover");
  1272. if (IS_ERR(ts)) {
  1273. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1274. qeth_clear_thread_running_bit(card,
  1275. QETH_RECOVER_THREAD);
  1276. }
  1277. }
  1278. }
  1279. static int qeth_setup_card(struct qeth_card *card)
  1280. {
  1281. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1282. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1283. card->read.state = CH_STATE_DOWN;
  1284. card->write.state = CH_STATE_DOWN;
  1285. card->data.state = CH_STATE_DOWN;
  1286. card->state = CARD_STATE_DOWN;
  1287. card->lan_online = 0;
  1288. card->read_or_write_problem = 0;
  1289. card->dev = NULL;
  1290. spin_lock_init(&card->vlanlock);
  1291. spin_lock_init(&card->mclock);
  1292. spin_lock_init(&card->lock);
  1293. spin_lock_init(&card->ip_lock);
  1294. spin_lock_init(&card->thread_mask_lock);
  1295. mutex_init(&card->conf_mutex);
  1296. mutex_init(&card->discipline_mutex);
  1297. card->thread_start_mask = 0;
  1298. card->thread_allowed_mask = 0;
  1299. card->thread_running_mask = 0;
  1300. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1301. INIT_LIST_HEAD(&card->ip_list);
  1302. INIT_LIST_HEAD(card->ip_tbd_list);
  1303. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1304. init_waitqueue_head(&card->wait_q);
  1305. /* initial options */
  1306. qeth_set_intial_options(card);
  1307. /* IP address takeover */
  1308. INIT_LIST_HEAD(&card->ipato.entries);
  1309. card->ipato.enabled = 0;
  1310. card->ipato.invert4 = 0;
  1311. card->ipato.invert6 = 0;
  1312. /* init QDIO stuff */
  1313. qeth_init_qdio_info(card);
  1314. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1315. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1316. return 0;
  1317. }
  1318. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1319. {
  1320. struct qeth_card *card = container_of(slr, struct qeth_card,
  1321. qeth_service_level);
  1322. if (card->info.mcl_level[0])
  1323. seq_printf(m, "qeth: %s firmware level %s\n",
  1324. CARD_BUS_ID(card), card->info.mcl_level);
  1325. }
  1326. static struct qeth_card *qeth_alloc_card(void)
  1327. {
  1328. struct qeth_card *card;
  1329. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1330. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1331. if (!card)
  1332. goto out;
  1333. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1334. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1335. if (!card->ip_tbd_list) {
  1336. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1337. goto out_card;
  1338. }
  1339. if (qeth_setup_channel(&card->read))
  1340. goto out_ip;
  1341. if (qeth_setup_channel(&card->write))
  1342. goto out_channel;
  1343. card->options.layer2 = -1;
  1344. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1345. register_service_level(&card->qeth_service_level);
  1346. return card;
  1347. out_channel:
  1348. qeth_clean_channel(&card->read);
  1349. out_ip:
  1350. kfree(card->ip_tbd_list);
  1351. out_card:
  1352. kfree(card);
  1353. out:
  1354. return NULL;
  1355. }
  1356. static int qeth_determine_card_type(struct qeth_card *card)
  1357. {
  1358. int i = 0;
  1359. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1360. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1361. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1362. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1363. if ((CARD_RDEV(card)->id.dev_type ==
  1364. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1365. (CARD_RDEV(card)->id.dev_model ==
  1366. known_devices[i][QETH_DEV_MODEL_IND])) {
  1367. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1368. card->qdio.no_out_queues =
  1369. known_devices[i][QETH_QUEUE_NO_IND];
  1370. card->qdio.no_in_queues = 1;
  1371. card->info.is_multicast_different =
  1372. known_devices[i][QETH_MULTICAST_IND];
  1373. qeth_update_from_chp_desc(card);
  1374. return 0;
  1375. }
  1376. i++;
  1377. }
  1378. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1379. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1380. "unknown type\n");
  1381. return -ENOENT;
  1382. }
  1383. static int qeth_clear_channel(struct qeth_channel *channel)
  1384. {
  1385. unsigned long flags;
  1386. struct qeth_card *card;
  1387. int rc;
  1388. card = CARD_FROM_CDEV(channel->ccwdev);
  1389. QETH_CARD_TEXT(card, 3, "clearch");
  1390. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1391. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1392. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1393. if (rc)
  1394. return rc;
  1395. rc = wait_event_interruptible_timeout(card->wait_q,
  1396. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1397. if (rc == -ERESTARTSYS)
  1398. return rc;
  1399. if (channel->state != CH_STATE_STOPPED)
  1400. return -ETIME;
  1401. channel->state = CH_STATE_DOWN;
  1402. return 0;
  1403. }
  1404. static int qeth_halt_channel(struct qeth_channel *channel)
  1405. {
  1406. unsigned long flags;
  1407. struct qeth_card *card;
  1408. int rc;
  1409. card = CARD_FROM_CDEV(channel->ccwdev);
  1410. QETH_CARD_TEXT(card, 3, "haltch");
  1411. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1412. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1413. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1414. if (rc)
  1415. return rc;
  1416. rc = wait_event_interruptible_timeout(card->wait_q,
  1417. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1418. if (rc == -ERESTARTSYS)
  1419. return rc;
  1420. if (channel->state != CH_STATE_HALTED)
  1421. return -ETIME;
  1422. return 0;
  1423. }
  1424. static int qeth_halt_channels(struct qeth_card *card)
  1425. {
  1426. int rc1 = 0, rc2 = 0, rc3 = 0;
  1427. QETH_CARD_TEXT(card, 3, "haltchs");
  1428. rc1 = qeth_halt_channel(&card->read);
  1429. rc2 = qeth_halt_channel(&card->write);
  1430. rc3 = qeth_halt_channel(&card->data);
  1431. if (rc1)
  1432. return rc1;
  1433. if (rc2)
  1434. return rc2;
  1435. return rc3;
  1436. }
  1437. static int qeth_clear_channels(struct qeth_card *card)
  1438. {
  1439. int rc1 = 0, rc2 = 0, rc3 = 0;
  1440. QETH_CARD_TEXT(card, 3, "clearchs");
  1441. rc1 = qeth_clear_channel(&card->read);
  1442. rc2 = qeth_clear_channel(&card->write);
  1443. rc3 = qeth_clear_channel(&card->data);
  1444. if (rc1)
  1445. return rc1;
  1446. if (rc2)
  1447. return rc2;
  1448. return rc3;
  1449. }
  1450. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1451. {
  1452. int rc = 0;
  1453. QETH_CARD_TEXT(card, 3, "clhacrd");
  1454. if (halt)
  1455. rc = qeth_halt_channels(card);
  1456. if (rc)
  1457. return rc;
  1458. return qeth_clear_channels(card);
  1459. }
  1460. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1461. {
  1462. int rc = 0;
  1463. QETH_CARD_TEXT(card, 3, "qdioclr");
  1464. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1465. QETH_QDIO_CLEANING)) {
  1466. case QETH_QDIO_ESTABLISHED:
  1467. if (card->info.type == QETH_CARD_TYPE_IQD)
  1468. rc = qdio_shutdown(CARD_DDEV(card),
  1469. QDIO_FLAG_CLEANUP_USING_HALT);
  1470. else
  1471. rc = qdio_shutdown(CARD_DDEV(card),
  1472. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1473. if (rc)
  1474. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1475. qdio_free(CARD_DDEV(card));
  1476. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1477. break;
  1478. case QETH_QDIO_CLEANING:
  1479. return rc;
  1480. default:
  1481. break;
  1482. }
  1483. rc = qeth_clear_halt_card(card, use_halt);
  1484. if (rc)
  1485. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1486. card->state = CARD_STATE_DOWN;
  1487. return rc;
  1488. }
  1489. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1490. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1491. int *length)
  1492. {
  1493. struct ciw *ciw;
  1494. char *rcd_buf;
  1495. int ret;
  1496. struct qeth_channel *channel = &card->data;
  1497. unsigned long flags;
  1498. /*
  1499. * scan for RCD command in extended SenseID data
  1500. */
  1501. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1502. if (!ciw || ciw->cmd == 0)
  1503. return -EOPNOTSUPP;
  1504. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1505. if (!rcd_buf)
  1506. return -ENOMEM;
  1507. channel->ccw.cmd_code = ciw->cmd;
  1508. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1509. channel->ccw.count = ciw->count;
  1510. channel->ccw.flags = CCW_FLAG_SLI;
  1511. channel->state = CH_STATE_RCD;
  1512. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1513. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1514. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1515. QETH_RCD_TIMEOUT);
  1516. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1517. if (!ret)
  1518. wait_event(card->wait_q,
  1519. (channel->state == CH_STATE_RCD_DONE ||
  1520. channel->state == CH_STATE_DOWN));
  1521. if (channel->state == CH_STATE_DOWN)
  1522. ret = -EIO;
  1523. else
  1524. channel->state = CH_STATE_DOWN;
  1525. if (ret) {
  1526. kfree(rcd_buf);
  1527. *buffer = NULL;
  1528. *length = 0;
  1529. } else {
  1530. *length = ciw->count;
  1531. *buffer = rcd_buf;
  1532. }
  1533. return ret;
  1534. }
  1535. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1536. {
  1537. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1538. card->info.chpid = prcd[30];
  1539. card->info.unit_addr2 = prcd[31];
  1540. card->info.cula = prcd[63];
  1541. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1542. (prcd[0x11] == _ascebc['M']));
  1543. }
  1544. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1545. {
  1546. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1547. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1548. (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
  1549. card->info.blkt.time_total = 250;
  1550. card->info.blkt.inter_packet = 5;
  1551. card->info.blkt.inter_packet_jumbo = 15;
  1552. } else {
  1553. card->info.blkt.time_total = 0;
  1554. card->info.blkt.inter_packet = 0;
  1555. card->info.blkt.inter_packet_jumbo = 0;
  1556. }
  1557. }
  1558. static void qeth_init_tokens(struct qeth_card *card)
  1559. {
  1560. card->token.issuer_rm_w = 0x00010103UL;
  1561. card->token.cm_filter_w = 0x00010108UL;
  1562. card->token.cm_connection_w = 0x0001010aUL;
  1563. card->token.ulp_filter_w = 0x0001010bUL;
  1564. card->token.ulp_connection_w = 0x0001010dUL;
  1565. }
  1566. static void qeth_init_func_level(struct qeth_card *card)
  1567. {
  1568. switch (card->info.type) {
  1569. case QETH_CARD_TYPE_IQD:
  1570. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1571. break;
  1572. case QETH_CARD_TYPE_OSD:
  1573. case QETH_CARD_TYPE_OSN:
  1574. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1575. break;
  1576. default:
  1577. break;
  1578. }
  1579. }
  1580. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1581. void (*idx_reply_cb)(struct qeth_channel *,
  1582. struct qeth_cmd_buffer *))
  1583. {
  1584. struct qeth_cmd_buffer *iob;
  1585. unsigned long flags;
  1586. int rc;
  1587. struct qeth_card *card;
  1588. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1589. card = CARD_FROM_CDEV(channel->ccwdev);
  1590. iob = qeth_get_buffer(channel);
  1591. iob->callback = idx_reply_cb;
  1592. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1593. channel->ccw.count = QETH_BUFSIZE;
  1594. channel->ccw.cda = (__u32) __pa(iob->data);
  1595. wait_event(card->wait_q,
  1596. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1597. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1598. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1599. rc = ccw_device_start(channel->ccwdev,
  1600. &channel->ccw, (addr_t) iob, 0, 0);
  1601. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1602. if (rc) {
  1603. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1604. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1605. atomic_set(&channel->irq_pending, 0);
  1606. wake_up(&card->wait_q);
  1607. return rc;
  1608. }
  1609. rc = wait_event_interruptible_timeout(card->wait_q,
  1610. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1611. if (rc == -ERESTARTSYS)
  1612. return rc;
  1613. if (channel->state != CH_STATE_UP) {
  1614. rc = -ETIME;
  1615. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1616. qeth_clear_cmd_buffers(channel);
  1617. } else
  1618. rc = 0;
  1619. return rc;
  1620. }
  1621. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1622. void (*idx_reply_cb)(struct qeth_channel *,
  1623. struct qeth_cmd_buffer *))
  1624. {
  1625. struct qeth_card *card;
  1626. struct qeth_cmd_buffer *iob;
  1627. unsigned long flags;
  1628. __u16 temp;
  1629. __u8 tmp;
  1630. int rc;
  1631. struct ccw_dev_id temp_devid;
  1632. card = CARD_FROM_CDEV(channel->ccwdev);
  1633. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1634. iob = qeth_get_buffer(channel);
  1635. iob->callback = idx_reply_cb;
  1636. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1637. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1638. channel->ccw.cda = (__u32) __pa(iob->data);
  1639. if (channel == &card->write) {
  1640. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1641. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1642. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1643. card->seqno.trans_hdr++;
  1644. } else {
  1645. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1646. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1647. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1648. }
  1649. tmp = ((__u8)card->info.portno) | 0x80;
  1650. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1651. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1652. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1653. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1654. &card->info.func_level, sizeof(__u16));
  1655. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1656. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1657. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1658. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1659. wait_event(card->wait_q,
  1660. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1661. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1662. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1663. rc = ccw_device_start(channel->ccwdev,
  1664. &channel->ccw, (addr_t) iob, 0, 0);
  1665. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1666. if (rc) {
  1667. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1668. rc);
  1669. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1670. atomic_set(&channel->irq_pending, 0);
  1671. wake_up(&card->wait_q);
  1672. return rc;
  1673. }
  1674. rc = wait_event_interruptible_timeout(card->wait_q,
  1675. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1676. if (rc == -ERESTARTSYS)
  1677. return rc;
  1678. if (channel->state != CH_STATE_ACTIVATING) {
  1679. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1680. " failed to recover an error on the device\n");
  1681. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1682. dev_name(&channel->ccwdev->dev));
  1683. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1684. qeth_clear_cmd_buffers(channel);
  1685. return -ETIME;
  1686. }
  1687. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1688. }
  1689. static int qeth_peer_func_level(int level)
  1690. {
  1691. if ((level & 0xff) == 8)
  1692. return (level & 0xff) + 0x400;
  1693. if (((level >> 8) & 3) == 1)
  1694. return (level & 0xff) + 0x200;
  1695. return level;
  1696. }
  1697. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1698. struct qeth_cmd_buffer *iob)
  1699. {
  1700. struct qeth_card *card;
  1701. __u16 temp;
  1702. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1703. if (channel->state == CH_STATE_DOWN) {
  1704. channel->state = CH_STATE_ACTIVATING;
  1705. goto out;
  1706. }
  1707. card = CARD_FROM_CDEV(channel->ccwdev);
  1708. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1709. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1710. dev_err(&card->write.ccwdev->dev,
  1711. "The adapter is used exclusively by another "
  1712. "host\n");
  1713. else
  1714. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1715. " negative reply\n",
  1716. dev_name(&card->write.ccwdev->dev));
  1717. goto out;
  1718. }
  1719. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1720. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1721. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1722. "function level mismatch (sent: 0x%x, received: "
  1723. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1724. card->info.func_level, temp);
  1725. goto out;
  1726. }
  1727. channel->state = CH_STATE_UP;
  1728. out:
  1729. qeth_release_buffer(channel, iob);
  1730. }
  1731. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1732. struct qeth_cmd_buffer *iob)
  1733. {
  1734. struct qeth_card *card;
  1735. __u16 temp;
  1736. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1737. if (channel->state == CH_STATE_DOWN) {
  1738. channel->state = CH_STATE_ACTIVATING;
  1739. goto out;
  1740. }
  1741. card = CARD_FROM_CDEV(channel->ccwdev);
  1742. if (qeth_check_idx_response(card, iob->data))
  1743. goto out;
  1744. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1745. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1746. case QETH_IDX_ACT_ERR_EXCL:
  1747. dev_err(&card->write.ccwdev->dev,
  1748. "The adapter is used exclusively by another "
  1749. "host\n");
  1750. break;
  1751. case QETH_IDX_ACT_ERR_AUTH:
  1752. case QETH_IDX_ACT_ERR_AUTH_USER:
  1753. dev_err(&card->read.ccwdev->dev,
  1754. "Setting the device online failed because of "
  1755. "insufficient authorization\n");
  1756. break;
  1757. default:
  1758. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1759. " negative reply\n",
  1760. dev_name(&card->read.ccwdev->dev));
  1761. }
  1762. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1763. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1764. goto out;
  1765. }
  1766. /**
  1767. * * temporary fix for microcode bug
  1768. * * to revert it,replace OR by AND
  1769. * */
  1770. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1771. (card->info.type == QETH_CARD_TYPE_OSD))
  1772. card->info.portname_required = 1;
  1773. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1774. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1775. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1776. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1777. dev_name(&card->read.ccwdev->dev),
  1778. card->info.func_level, temp);
  1779. goto out;
  1780. }
  1781. memcpy(&card->token.issuer_rm_r,
  1782. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1783. QETH_MPC_TOKEN_LENGTH);
  1784. memcpy(&card->info.mcl_level[0],
  1785. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1786. channel->state = CH_STATE_UP;
  1787. out:
  1788. qeth_release_buffer(channel, iob);
  1789. }
  1790. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1791. struct qeth_cmd_buffer *iob)
  1792. {
  1793. qeth_setup_ccw(&card->write, iob->data, len);
  1794. iob->callback = qeth_release_buffer;
  1795. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1796. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1797. card->seqno.trans_hdr++;
  1798. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1799. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1800. card->seqno.pdu_hdr++;
  1801. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1802. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1803. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1804. }
  1805. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1806. int qeth_send_control_data(struct qeth_card *card, int len,
  1807. struct qeth_cmd_buffer *iob,
  1808. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  1809. unsigned long),
  1810. void *reply_param)
  1811. {
  1812. int rc;
  1813. unsigned long flags;
  1814. struct qeth_reply *reply = NULL;
  1815. unsigned long timeout, event_timeout;
  1816. struct qeth_ipa_cmd *cmd;
  1817. QETH_CARD_TEXT(card, 2, "sendctl");
  1818. if (card->read_or_write_problem) {
  1819. qeth_release_buffer(iob->channel, iob);
  1820. return -EIO;
  1821. }
  1822. reply = qeth_alloc_reply(card);
  1823. if (!reply) {
  1824. return -ENOMEM;
  1825. }
  1826. reply->callback = reply_cb;
  1827. reply->param = reply_param;
  1828. if (card->state == CARD_STATE_DOWN)
  1829. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1830. else
  1831. reply->seqno = card->seqno.ipa++;
  1832. init_waitqueue_head(&reply->wait_q);
  1833. spin_lock_irqsave(&card->lock, flags);
  1834. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1835. spin_unlock_irqrestore(&card->lock, flags);
  1836. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1837. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1838. qeth_prepare_control_data(card, len, iob);
  1839. if (IS_IPA(iob->data))
  1840. event_timeout = QETH_IPA_TIMEOUT;
  1841. else
  1842. event_timeout = QETH_TIMEOUT;
  1843. timeout = jiffies + event_timeout;
  1844. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1845. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1846. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1847. (addr_t) iob, 0, 0);
  1848. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1849. if (rc) {
  1850. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1851. "ccw_device_start rc = %i\n",
  1852. dev_name(&card->write.ccwdev->dev), rc);
  1853. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1854. spin_lock_irqsave(&card->lock, flags);
  1855. list_del_init(&reply->list);
  1856. qeth_put_reply(reply);
  1857. spin_unlock_irqrestore(&card->lock, flags);
  1858. qeth_release_buffer(iob->channel, iob);
  1859. atomic_set(&card->write.irq_pending, 0);
  1860. wake_up(&card->wait_q);
  1861. return rc;
  1862. }
  1863. /* we have only one long running ipassist, since we can ensure
  1864. process context of this command we can sleep */
  1865. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1866. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1867. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1868. if (!wait_event_timeout(reply->wait_q,
  1869. atomic_read(&reply->received), event_timeout))
  1870. goto time_err;
  1871. } else {
  1872. while (!atomic_read(&reply->received)) {
  1873. if (time_after(jiffies, timeout))
  1874. goto time_err;
  1875. cpu_relax();
  1876. }
  1877. }
  1878. if (reply->rc == -EIO)
  1879. goto error;
  1880. rc = reply->rc;
  1881. qeth_put_reply(reply);
  1882. return rc;
  1883. time_err:
  1884. reply->rc = -ETIME;
  1885. spin_lock_irqsave(&reply->card->lock, flags);
  1886. list_del_init(&reply->list);
  1887. spin_unlock_irqrestore(&reply->card->lock, flags);
  1888. atomic_inc(&reply->received);
  1889. error:
  1890. atomic_set(&card->write.irq_pending, 0);
  1891. qeth_release_buffer(iob->channel, iob);
  1892. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1893. rc = reply->rc;
  1894. qeth_put_reply(reply);
  1895. return rc;
  1896. }
  1897. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1898. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1899. unsigned long data)
  1900. {
  1901. struct qeth_cmd_buffer *iob;
  1902. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1903. iob = (struct qeth_cmd_buffer *) data;
  1904. memcpy(&card->token.cm_filter_r,
  1905. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1906. QETH_MPC_TOKEN_LENGTH);
  1907. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1908. return 0;
  1909. }
  1910. static int qeth_cm_enable(struct qeth_card *card)
  1911. {
  1912. int rc;
  1913. struct qeth_cmd_buffer *iob;
  1914. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1915. iob = qeth_wait_for_buffer(&card->write);
  1916. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1917. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1918. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1919. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1920. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1921. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1922. qeth_cm_enable_cb, NULL);
  1923. return rc;
  1924. }
  1925. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1926. unsigned long data)
  1927. {
  1928. struct qeth_cmd_buffer *iob;
  1929. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1930. iob = (struct qeth_cmd_buffer *) data;
  1931. memcpy(&card->token.cm_connection_r,
  1932. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1933. QETH_MPC_TOKEN_LENGTH);
  1934. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1935. return 0;
  1936. }
  1937. static int qeth_cm_setup(struct qeth_card *card)
  1938. {
  1939. int rc;
  1940. struct qeth_cmd_buffer *iob;
  1941. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1942. iob = qeth_wait_for_buffer(&card->write);
  1943. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1944. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1945. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1946. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1947. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1948. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1949. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1950. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1951. qeth_cm_setup_cb, NULL);
  1952. return rc;
  1953. }
  1954. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1955. {
  1956. switch (card->info.type) {
  1957. case QETH_CARD_TYPE_UNKNOWN:
  1958. return 1500;
  1959. case QETH_CARD_TYPE_IQD:
  1960. return card->info.max_mtu;
  1961. case QETH_CARD_TYPE_OSD:
  1962. switch (card->info.link_type) {
  1963. case QETH_LINK_TYPE_HSTR:
  1964. case QETH_LINK_TYPE_LANE_TR:
  1965. return 2000;
  1966. default:
  1967. return 1492;
  1968. }
  1969. case QETH_CARD_TYPE_OSM:
  1970. case QETH_CARD_TYPE_OSX:
  1971. return 1492;
  1972. default:
  1973. return 1500;
  1974. }
  1975. }
  1976. static inline int qeth_get_mtu_outof_framesize(int framesize)
  1977. {
  1978. switch (framesize) {
  1979. case 0x4000:
  1980. return 8192;
  1981. case 0x6000:
  1982. return 16384;
  1983. case 0xa000:
  1984. return 32768;
  1985. case 0xffff:
  1986. return 57344;
  1987. default:
  1988. return 0;
  1989. }
  1990. }
  1991. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  1992. {
  1993. switch (card->info.type) {
  1994. case QETH_CARD_TYPE_OSD:
  1995. case QETH_CARD_TYPE_OSM:
  1996. case QETH_CARD_TYPE_OSX:
  1997. case QETH_CARD_TYPE_IQD:
  1998. return ((mtu >= 576) &&
  1999. (mtu <= card->info.max_mtu));
  2000. case QETH_CARD_TYPE_OSN:
  2001. case QETH_CARD_TYPE_UNKNOWN:
  2002. default:
  2003. return 1;
  2004. }
  2005. }
  2006. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2007. unsigned long data)
  2008. {
  2009. __u16 mtu, framesize;
  2010. __u16 len;
  2011. __u8 link_type;
  2012. struct qeth_cmd_buffer *iob;
  2013. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2014. iob = (struct qeth_cmd_buffer *) data;
  2015. memcpy(&card->token.ulp_filter_r,
  2016. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2017. QETH_MPC_TOKEN_LENGTH);
  2018. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2019. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2020. mtu = qeth_get_mtu_outof_framesize(framesize);
  2021. if (!mtu) {
  2022. iob->rc = -EINVAL;
  2023. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2024. return 0;
  2025. }
  2026. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2027. /* frame size has changed */
  2028. if (card->dev &&
  2029. ((card->dev->mtu == card->info.initial_mtu) ||
  2030. (card->dev->mtu > mtu)))
  2031. card->dev->mtu = mtu;
  2032. qeth_free_qdio_buffers(card);
  2033. }
  2034. card->info.initial_mtu = mtu;
  2035. card->info.max_mtu = mtu;
  2036. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2037. } else {
  2038. card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
  2039. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2040. iob->data);
  2041. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2042. }
  2043. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2044. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2045. memcpy(&link_type,
  2046. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2047. card->info.link_type = link_type;
  2048. } else
  2049. card->info.link_type = 0;
  2050. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2051. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2052. return 0;
  2053. }
  2054. static int qeth_ulp_enable(struct qeth_card *card)
  2055. {
  2056. int rc;
  2057. char prot_type;
  2058. struct qeth_cmd_buffer *iob;
  2059. /*FIXME: trace view callbacks*/
  2060. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2061. iob = qeth_wait_for_buffer(&card->write);
  2062. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2063. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2064. (__u8) card->info.portno;
  2065. if (card->options.layer2)
  2066. if (card->info.type == QETH_CARD_TYPE_OSN)
  2067. prot_type = QETH_PROT_OSN2;
  2068. else
  2069. prot_type = QETH_PROT_LAYER2;
  2070. else
  2071. prot_type = QETH_PROT_TCPIP;
  2072. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2073. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2074. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2075. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2076. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2077. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2078. card->info.portname, 9);
  2079. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2080. qeth_ulp_enable_cb, NULL);
  2081. return rc;
  2082. }
  2083. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2084. unsigned long data)
  2085. {
  2086. struct qeth_cmd_buffer *iob;
  2087. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2088. iob = (struct qeth_cmd_buffer *) data;
  2089. memcpy(&card->token.ulp_connection_r,
  2090. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2091. QETH_MPC_TOKEN_LENGTH);
  2092. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2093. 3)) {
  2094. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2095. dev_err(&card->gdev->dev, "A connection could not be "
  2096. "established because of an OLM limit\n");
  2097. iob->rc = -EMLINK;
  2098. }
  2099. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2100. return 0;
  2101. }
  2102. static int qeth_ulp_setup(struct qeth_card *card)
  2103. {
  2104. int rc;
  2105. __u16 temp;
  2106. struct qeth_cmd_buffer *iob;
  2107. struct ccw_dev_id dev_id;
  2108. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2109. iob = qeth_wait_for_buffer(&card->write);
  2110. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2111. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2112. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2113. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2114. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2115. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2116. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2117. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2118. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2119. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2120. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2121. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2122. qeth_ulp_setup_cb, NULL);
  2123. return rc;
  2124. }
  2125. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2126. {
  2127. int rc;
  2128. struct qeth_qdio_out_buffer *newbuf;
  2129. rc = 0;
  2130. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2131. if (!newbuf) {
  2132. rc = -ENOMEM;
  2133. goto out;
  2134. }
  2135. newbuf->buffer = &q->qdio_bufs[bidx];
  2136. skb_queue_head_init(&newbuf->skb_list);
  2137. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2138. newbuf->q = q;
  2139. newbuf->aob = NULL;
  2140. newbuf->next_pending = q->bufs[bidx];
  2141. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2142. q->bufs[bidx] = newbuf;
  2143. if (q->bufstates) {
  2144. q->bufstates[bidx].user = newbuf;
  2145. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2146. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2147. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2148. (long) newbuf->next_pending);
  2149. }
  2150. out:
  2151. return rc;
  2152. }
  2153. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2154. {
  2155. int i, j;
  2156. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2157. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2158. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2159. return 0;
  2160. card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
  2161. GFP_KERNEL);
  2162. if (!card->qdio.in_q)
  2163. goto out_nomem;
  2164. QETH_DBF_TEXT(SETUP, 2, "inq");
  2165. QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
  2166. memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
  2167. /* give inbound qeth_qdio_buffers their qdio_buffers */
  2168. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  2169. card->qdio.in_q->bufs[i].buffer =
  2170. &card->qdio.in_q->qdio_bufs[i];
  2171. card->qdio.in_q->bufs[i].rx_skb = NULL;
  2172. }
  2173. /* inbound buffer pool */
  2174. if (qeth_alloc_buffer_pool(card))
  2175. goto out_freeinq;
  2176. /* outbound */
  2177. card->qdio.out_qs =
  2178. kzalloc(card->qdio.no_out_queues *
  2179. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2180. if (!card->qdio.out_qs)
  2181. goto out_freepool;
  2182. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2183. card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
  2184. GFP_KERNEL);
  2185. if (!card->qdio.out_qs[i])
  2186. goto out_freeoutq;
  2187. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2188. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2189. card->qdio.out_qs[i]->queue_no = i;
  2190. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2191. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2192. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2193. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2194. goto out_freeoutqbufs;
  2195. }
  2196. }
  2197. /* completion */
  2198. if (qeth_alloc_cq(card))
  2199. goto out_freeoutq;
  2200. return 0;
  2201. out_freeoutqbufs:
  2202. while (j > 0) {
  2203. --j;
  2204. kmem_cache_free(qeth_qdio_outbuf_cache,
  2205. card->qdio.out_qs[i]->bufs[j]);
  2206. card->qdio.out_qs[i]->bufs[j] = NULL;
  2207. }
  2208. out_freeoutq:
  2209. while (i > 0) {
  2210. kfree(card->qdio.out_qs[--i]);
  2211. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2212. }
  2213. kfree(card->qdio.out_qs);
  2214. card->qdio.out_qs = NULL;
  2215. out_freepool:
  2216. qeth_free_buffer_pool(card);
  2217. out_freeinq:
  2218. kfree(card->qdio.in_q);
  2219. card->qdio.in_q = NULL;
  2220. out_nomem:
  2221. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2222. return -ENOMEM;
  2223. }
  2224. static void qeth_create_qib_param_field(struct qeth_card *card,
  2225. char *param_field)
  2226. {
  2227. param_field[0] = _ascebc['P'];
  2228. param_field[1] = _ascebc['C'];
  2229. param_field[2] = _ascebc['I'];
  2230. param_field[3] = _ascebc['T'];
  2231. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2232. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2233. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2234. }
  2235. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2236. char *param_field)
  2237. {
  2238. param_field[16] = _ascebc['B'];
  2239. param_field[17] = _ascebc['L'];
  2240. param_field[18] = _ascebc['K'];
  2241. param_field[19] = _ascebc['T'];
  2242. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2243. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2244. *((unsigned int *) (&param_field[28])) =
  2245. card->info.blkt.inter_packet_jumbo;
  2246. }
  2247. static int qeth_qdio_activate(struct qeth_card *card)
  2248. {
  2249. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2250. return qdio_activate(CARD_DDEV(card));
  2251. }
  2252. static int qeth_dm_act(struct qeth_card *card)
  2253. {
  2254. int rc;
  2255. struct qeth_cmd_buffer *iob;
  2256. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2257. iob = qeth_wait_for_buffer(&card->write);
  2258. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2259. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2260. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2261. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2262. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2263. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2264. return rc;
  2265. }
  2266. static int qeth_mpc_initialize(struct qeth_card *card)
  2267. {
  2268. int rc;
  2269. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2270. rc = qeth_issue_next_read(card);
  2271. if (rc) {
  2272. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2273. return rc;
  2274. }
  2275. rc = qeth_cm_enable(card);
  2276. if (rc) {
  2277. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2278. goto out_qdio;
  2279. }
  2280. rc = qeth_cm_setup(card);
  2281. if (rc) {
  2282. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2283. goto out_qdio;
  2284. }
  2285. rc = qeth_ulp_enable(card);
  2286. if (rc) {
  2287. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2288. goto out_qdio;
  2289. }
  2290. rc = qeth_ulp_setup(card);
  2291. if (rc) {
  2292. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2293. goto out_qdio;
  2294. }
  2295. rc = qeth_alloc_qdio_buffers(card);
  2296. if (rc) {
  2297. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2298. goto out_qdio;
  2299. }
  2300. rc = qeth_qdio_establish(card);
  2301. if (rc) {
  2302. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2303. qeth_free_qdio_buffers(card);
  2304. goto out_qdio;
  2305. }
  2306. rc = qeth_qdio_activate(card);
  2307. if (rc) {
  2308. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2309. goto out_qdio;
  2310. }
  2311. rc = qeth_dm_act(card);
  2312. if (rc) {
  2313. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2314. goto out_qdio;
  2315. }
  2316. return 0;
  2317. out_qdio:
  2318. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2319. return rc;
  2320. }
  2321. static void qeth_print_status_with_portname(struct qeth_card *card)
  2322. {
  2323. char dbf_text[15];
  2324. int i;
  2325. sprintf(dbf_text, "%s", card->info.portname + 1);
  2326. for (i = 0; i < 8; i++)
  2327. dbf_text[i] =
  2328. (char) _ebcasc[(__u8) dbf_text[i]];
  2329. dbf_text[8] = 0;
  2330. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2331. "with link type %s (portname: %s)\n",
  2332. qeth_get_cardname(card),
  2333. (card->info.mcl_level[0]) ? " (level: " : "",
  2334. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2335. (card->info.mcl_level[0]) ? ")" : "",
  2336. qeth_get_cardname_short(card),
  2337. dbf_text);
  2338. }
  2339. static void qeth_print_status_no_portname(struct qeth_card *card)
  2340. {
  2341. if (card->info.portname[0])
  2342. dev_info(&card->gdev->dev, "Device is a%s "
  2343. "card%s%s%s\nwith link type %s "
  2344. "(no portname needed by interface).\n",
  2345. qeth_get_cardname(card),
  2346. (card->info.mcl_level[0]) ? " (level: " : "",
  2347. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2348. (card->info.mcl_level[0]) ? ")" : "",
  2349. qeth_get_cardname_short(card));
  2350. else
  2351. dev_info(&card->gdev->dev, "Device is a%s "
  2352. "card%s%s%s\nwith link type %s.\n",
  2353. qeth_get_cardname(card),
  2354. (card->info.mcl_level[0]) ? " (level: " : "",
  2355. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2356. (card->info.mcl_level[0]) ? ")" : "",
  2357. qeth_get_cardname_short(card));
  2358. }
  2359. void qeth_print_status_message(struct qeth_card *card)
  2360. {
  2361. switch (card->info.type) {
  2362. case QETH_CARD_TYPE_OSD:
  2363. case QETH_CARD_TYPE_OSM:
  2364. case QETH_CARD_TYPE_OSX:
  2365. /* VM will use a non-zero first character
  2366. * to indicate a HiperSockets like reporting
  2367. * of the level OSA sets the first character to zero
  2368. * */
  2369. if (!card->info.mcl_level[0]) {
  2370. sprintf(card->info.mcl_level, "%02x%02x",
  2371. card->info.mcl_level[2],
  2372. card->info.mcl_level[3]);
  2373. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2374. break;
  2375. }
  2376. /* fallthrough */
  2377. case QETH_CARD_TYPE_IQD:
  2378. if ((card->info.guestlan) ||
  2379. (card->info.mcl_level[0] & 0x80)) {
  2380. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2381. card->info.mcl_level[0]];
  2382. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2383. card->info.mcl_level[1]];
  2384. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2385. card->info.mcl_level[2]];
  2386. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2387. card->info.mcl_level[3]];
  2388. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2389. }
  2390. break;
  2391. default:
  2392. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2393. }
  2394. if (card->info.portname_required)
  2395. qeth_print_status_with_portname(card);
  2396. else
  2397. qeth_print_status_no_portname(card);
  2398. }
  2399. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2400. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2401. {
  2402. struct qeth_buffer_pool_entry *entry;
  2403. QETH_CARD_TEXT(card, 5, "inwrklst");
  2404. list_for_each_entry(entry,
  2405. &card->qdio.init_pool.entry_list, init_list) {
  2406. qeth_put_buffer_pool_entry(card, entry);
  2407. }
  2408. }
  2409. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2410. struct qeth_card *card)
  2411. {
  2412. struct list_head *plh;
  2413. struct qeth_buffer_pool_entry *entry;
  2414. int i, free;
  2415. struct page *page;
  2416. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2417. return NULL;
  2418. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2419. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2420. free = 1;
  2421. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2422. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2423. free = 0;
  2424. break;
  2425. }
  2426. }
  2427. if (free) {
  2428. list_del_init(&entry->list);
  2429. return entry;
  2430. }
  2431. }
  2432. /* no free buffer in pool so take first one and swap pages */
  2433. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2434. struct qeth_buffer_pool_entry, list);
  2435. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2436. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2437. page = alloc_page(GFP_ATOMIC);
  2438. if (!page) {
  2439. return NULL;
  2440. } else {
  2441. free_page((unsigned long)entry->elements[i]);
  2442. entry->elements[i] = page_address(page);
  2443. if (card->options.performance_stats)
  2444. card->perf_stats.sg_alloc_page_rx++;
  2445. }
  2446. }
  2447. }
  2448. list_del_init(&entry->list);
  2449. return entry;
  2450. }
  2451. static int qeth_init_input_buffer(struct qeth_card *card,
  2452. struct qeth_qdio_buffer *buf)
  2453. {
  2454. struct qeth_buffer_pool_entry *pool_entry;
  2455. int i;
  2456. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2457. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2458. if (!buf->rx_skb)
  2459. return 1;
  2460. }
  2461. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2462. if (!pool_entry)
  2463. return 1;
  2464. /*
  2465. * since the buffer is accessed only from the input_tasklet
  2466. * there shouldn't be a need to synchronize; also, since we use
  2467. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2468. * buffers
  2469. */
  2470. buf->pool_entry = pool_entry;
  2471. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2472. buf->buffer->element[i].length = PAGE_SIZE;
  2473. buf->buffer->element[i].addr = pool_entry->elements[i];
  2474. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2475. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2476. else
  2477. buf->buffer->element[i].eflags = 0;
  2478. buf->buffer->element[i].sflags = 0;
  2479. }
  2480. return 0;
  2481. }
  2482. int qeth_init_qdio_queues(struct qeth_card *card)
  2483. {
  2484. int i, j;
  2485. int rc;
  2486. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2487. /* inbound queue */
  2488. memset(card->qdio.in_q->qdio_bufs, 0,
  2489. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  2490. qeth_initialize_working_pool_list(card);
  2491. /*give only as many buffers to hardware as we have buffer pool entries*/
  2492. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2493. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2494. card->qdio.in_q->next_buf_to_init =
  2495. card->qdio.in_buf_pool.buf_count - 1;
  2496. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2497. card->qdio.in_buf_pool.buf_count - 1);
  2498. if (rc) {
  2499. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2500. return rc;
  2501. }
  2502. /* completion */
  2503. rc = qeth_cq_init(card);
  2504. if (rc) {
  2505. return rc;
  2506. }
  2507. /* outbound queue */
  2508. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2509. memset(card->qdio.out_qs[i]->qdio_bufs, 0,
  2510. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  2511. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2512. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2513. card->qdio.out_qs[i]->bufs[j],
  2514. QETH_QDIO_BUF_EMPTY);
  2515. }
  2516. card->qdio.out_qs[i]->card = card;
  2517. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2518. card->qdio.out_qs[i]->do_pack = 0;
  2519. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2520. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2521. atomic_set(&card->qdio.out_qs[i]->state,
  2522. QETH_OUT_Q_UNLOCKED);
  2523. }
  2524. return 0;
  2525. }
  2526. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2527. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2528. {
  2529. switch (link_type) {
  2530. case QETH_LINK_TYPE_HSTR:
  2531. return 2;
  2532. default:
  2533. return 1;
  2534. }
  2535. }
  2536. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2537. struct qeth_ipa_cmd *cmd, __u8 command,
  2538. enum qeth_prot_versions prot)
  2539. {
  2540. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2541. cmd->hdr.command = command;
  2542. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2543. cmd->hdr.seqno = card->seqno.ipa;
  2544. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2545. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2546. if (card->options.layer2)
  2547. cmd->hdr.prim_version_no = 2;
  2548. else
  2549. cmd->hdr.prim_version_no = 1;
  2550. cmd->hdr.param_count = 1;
  2551. cmd->hdr.prot_version = prot;
  2552. cmd->hdr.ipa_supported = 0;
  2553. cmd->hdr.ipa_enabled = 0;
  2554. }
  2555. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2556. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2557. {
  2558. struct qeth_cmd_buffer *iob;
  2559. struct qeth_ipa_cmd *cmd;
  2560. iob = qeth_wait_for_buffer(&card->write);
  2561. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2562. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2563. return iob;
  2564. }
  2565. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2566. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2567. char prot_type)
  2568. {
  2569. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2570. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2571. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2572. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2573. }
  2574. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2575. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2576. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2577. unsigned long),
  2578. void *reply_param)
  2579. {
  2580. int rc;
  2581. char prot_type;
  2582. QETH_CARD_TEXT(card, 4, "sendipa");
  2583. if (card->options.layer2)
  2584. if (card->info.type == QETH_CARD_TYPE_OSN)
  2585. prot_type = QETH_PROT_OSN2;
  2586. else
  2587. prot_type = QETH_PROT_LAYER2;
  2588. else
  2589. prot_type = QETH_PROT_TCPIP;
  2590. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2591. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2592. iob, reply_cb, reply_param);
  2593. if (rc == -ETIME) {
  2594. qeth_clear_ipacmd_list(card);
  2595. qeth_schedule_recovery(card);
  2596. }
  2597. return rc;
  2598. }
  2599. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2600. int qeth_send_startlan(struct qeth_card *card)
  2601. {
  2602. int rc;
  2603. struct qeth_cmd_buffer *iob;
  2604. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2605. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2606. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2607. return rc;
  2608. }
  2609. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2610. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2611. struct qeth_reply *reply, unsigned long data)
  2612. {
  2613. struct qeth_ipa_cmd *cmd;
  2614. QETH_CARD_TEXT(card, 4, "defadpcb");
  2615. cmd = (struct qeth_ipa_cmd *) data;
  2616. if (cmd->hdr.return_code == 0)
  2617. cmd->hdr.return_code =
  2618. cmd->data.setadapterparms.hdr.return_code;
  2619. return 0;
  2620. }
  2621. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2622. struct qeth_reply *reply, unsigned long data)
  2623. {
  2624. struct qeth_ipa_cmd *cmd;
  2625. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2626. cmd = (struct qeth_ipa_cmd *) data;
  2627. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2628. card->info.link_type =
  2629. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2630. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2631. }
  2632. card->options.adp.supported_funcs =
  2633. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2634. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2635. }
  2636. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2637. __u32 command, __u32 cmdlen)
  2638. {
  2639. struct qeth_cmd_buffer *iob;
  2640. struct qeth_ipa_cmd *cmd;
  2641. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2642. QETH_PROT_IPV4);
  2643. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2644. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2645. cmd->data.setadapterparms.hdr.command_code = command;
  2646. cmd->data.setadapterparms.hdr.used_total = 1;
  2647. cmd->data.setadapterparms.hdr.seq_no = 1;
  2648. return iob;
  2649. }
  2650. int qeth_query_setadapterparms(struct qeth_card *card)
  2651. {
  2652. int rc;
  2653. struct qeth_cmd_buffer *iob;
  2654. QETH_CARD_TEXT(card, 3, "queryadp");
  2655. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2656. sizeof(struct qeth_ipacmd_setadpparms));
  2657. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2658. return rc;
  2659. }
  2660. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2661. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2662. struct qeth_reply *reply, unsigned long data)
  2663. {
  2664. struct qeth_ipa_cmd *cmd;
  2665. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2666. cmd = (struct qeth_ipa_cmd *) data;
  2667. switch (cmd->hdr.return_code) {
  2668. case IPA_RC_NOTSUPP:
  2669. case IPA_RC_L2_UNSUPPORTED_CMD:
  2670. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2671. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2672. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2673. return -0;
  2674. default:
  2675. if (cmd->hdr.return_code) {
  2676. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2677. "rc=%d\n",
  2678. dev_name(&card->gdev->dev),
  2679. cmd->hdr.return_code);
  2680. return 0;
  2681. }
  2682. }
  2683. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2684. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2685. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2686. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2687. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2688. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2689. } else
  2690. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2691. "\n", dev_name(&card->gdev->dev));
  2692. return 0;
  2693. }
  2694. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2695. {
  2696. int rc;
  2697. struct qeth_cmd_buffer *iob;
  2698. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2699. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2700. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2701. return rc;
  2702. }
  2703. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2704. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2705. struct qeth_reply *reply, unsigned long data)
  2706. {
  2707. struct qeth_ipa_cmd *cmd;
  2708. __u16 rc;
  2709. cmd = (struct qeth_ipa_cmd *)data;
  2710. rc = cmd->hdr.return_code;
  2711. if (rc)
  2712. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2713. else
  2714. card->info.diagass_support = cmd->data.diagass.ext;
  2715. return 0;
  2716. }
  2717. static int qeth_query_setdiagass(struct qeth_card *card)
  2718. {
  2719. struct qeth_cmd_buffer *iob;
  2720. struct qeth_ipa_cmd *cmd;
  2721. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2722. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2723. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2724. cmd->data.diagass.subcmd_len = 16;
  2725. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2726. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2727. }
  2728. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2729. {
  2730. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2731. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2732. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2733. struct ccw_dev_id ccwid;
  2734. int level;
  2735. tid->chpid = card->info.chpid;
  2736. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2737. tid->ssid = ccwid.ssid;
  2738. tid->devno = ccwid.devno;
  2739. if (!info)
  2740. return;
  2741. level = stsi(NULL, 0, 0, 0);
  2742. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2743. tid->lparnr = info222->lpar_number;
  2744. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2745. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2746. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2747. }
  2748. free_page(info);
  2749. return;
  2750. }
  2751. static int qeth_hw_trap_cb(struct qeth_card *card,
  2752. struct qeth_reply *reply, unsigned long data)
  2753. {
  2754. struct qeth_ipa_cmd *cmd;
  2755. __u16 rc;
  2756. cmd = (struct qeth_ipa_cmd *)data;
  2757. rc = cmd->hdr.return_code;
  2758. if (rc)
  2759. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2760. return 0;
  2761. }
  2762. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2763. {
  2764. struct qeth_cmd_buffer *iob;
  2765. struct qeth_ipa_cmd *cmd;
  2766. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2767. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2768. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2769. cmd->data.diagass.subcmd_len = 80;
  2770. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2771. cmd->data.diagass.type = 1;
  2772. cmd->data.diagass.action = action;
  2773. switch (action) {
  2774. case QETH_DIAGS_TRAP_ARM:
  2775. cmd->data.diagass.options = 0x0003;
  2776. cmd->data.diagass.ext = 0x00010000 +
  2777. sizeof(struct qeth_trap_id);
  2778. qeth_get_trap_id(card,
  2779. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2780. break;
  2781. case QETH_DIAGS_TRAP_DISARM:
  2782. cmd->data.diagass.options = 0x0001;
  2783. break;
  2784. case QETH_DIAGS_TRAP_CAPTURE:
  2785. break;
  2786. }
  2787. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2788. }
  2789. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2790. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2791. unsigned int qdio_error, const char *dbftext)
  2792. {
  2793. if (qdio_error) {
  2794. QETH_CARD_TEXT(card, 2, dbftext);
  2795. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2796. buf->element[15].sflags);
  2797. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2798. buf->element[14].sflags);
  2799. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2800. if ((buf->element[15].sflags) == 0x12) {
  2801. card->stats.rx_dropped++;
  2802. return 0;
  2803. } else
  2804. return 1;
  2805. }
  2806. return 0;
  2807. }
  2808. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2809. void qeth_buffer_reclaim_work(struct work_struct *work)
  2810. {
  2811. struct qeth_card *card = container_of(work, struct qeth_card,
  2812. buffer_reclaim_work.work);
  2813. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2814. qeth_queue_input_buffer(card, card->reclaim_index);
  2815. }
  2816. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2817. {
  2818. struct qeth_qdio_q *queue = card->qdio.in_q;
  2819. struct list_head *lh;
  2820. int count;
  2821. int i;
  2822. int rc;
  2823. int newcount = 0;
  2824. count = (index < queue->next_buf_to_init)?
  2825. card->qdio.in_buf_pool.buf_count -
  2826. (queue->next_buf_to_init - index) :
  2827. card->qdio.in_buf_pool.buf_count -
  2828. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2829. /* only requeue at a certain threshold to avoid SIGAs */
  2830. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2831. for (i = queue->next_buf_to_init;
  2832. i < queue->next_buf_to_init + count; ++i) {
  2833. if (qeth_init_input_buffer(card,
  2834. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2835. break;
  2836. } else {
  2837. newcount++;
  2838. }
  2839. }
  2840. if (newcount < count) {
  2841. /* we are in memory shortage so we switch back to
  2842. traditional skb allocation and drop packages */
  2843. atomic_set(&card->force_alloc_skb, 3);
  2844. count = newcount;
  2845. } else {
  2846. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2847. }
  2848. if (!count) {
  2849. i = 0;
  2850. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2851. i++;
  2852. if (i == card->qdio.in_buf_pool.buf_count) {
  2853. QETH_CARD_TEXT(card, 2, "qsarbw");
  2854. card->reclaim_index = index;
  2855. schedule_delayed_work(
  2856. &card->buffer_reclaim_work,
  2857. QETH_RECLAIM_WORK_TIME);
  2858. }
  2859. return;
  2860. }
  2861. /*
  2862. * according to old code it should be avoided to requeue all
  2863. * 128 buffers in order to benefit from PCI avoidance.
  2864. * this function keeps at least one buffer (the buffer at
  2865. * 'index') un-requeued -> this buffer is the first buffer that
  2866. * will be requeued the next time
  2867. */
  2868. if (card->options.performance_stats) {
  2869. card->perf_stats.inbound_do_qdio_cnt++;
  2870. card->perf_stats.inbound_do_qdio_start_time =
  2871. qeth_get_micros();
  2872. }
  2873. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2874. queue->next_buf_to_init, count);
  2875. if (card->options.performance_stats)
  2876. card->perf_stats.inbound_do_qdio_time +=
  2877. qeth_get_micros() -
  2878. card->perf_stats.inbound_do_qdio_start_time;
  2879. if (rc) {
  2880. QETH_CARD_TEXT(card, 2, "qinberr");
  2881. }
  2882. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2883. QDIO_MAX_BUFFERS_PER_Q;
  2884. }
  2885. }
  2886. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  2887. static int qeth_handle_send_error(struct qeth_card *card,
  2888. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2889. {
  2890. int sbalf15 = buffer->buffer->element[15].sflags;
  2891. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2892. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2893. if (sbalf15 == 0) {
  2894. qdio_err = 0;
  2895. } else {
  2896. qdio_err = 1;
  2897. }
  2898. }
  2899. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2900. if (!qdio_err)
  2901. return QETH_SEND_ERROR_NONE;
  2902. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2903. return QETH_SEND_ERROR_RETRY;
  2904. QETH_CARD_TEXT(card, 1, "lnkfail");
  2905. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2906. (u16)qdio_err, (u8)sbalf15);
  2907. return QETH_SEND_ERROR_LINK_FAILURE;
  2908. }
  2909. /*
  2910. * Switched to packing state if the number of used buffers on a queue
  2911. * reaches a certain limit.
  2912. */
  2913. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2914. {
  2915. if (!queue->do_pack) {
  2916. if (atomic_read(&queue->used_buffers)
  2917. >= QETH_HIGH_WATERMARK_PACK){
  2918. /* switch non-PACKING -> PACKING */
  2919. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2920. if (queue->card->options.performance_stats)
  2921. queue->card->perf_stats.sc_dp_p++;
  2922. queue->do_pack = 1;
  2923. }
  2924. }
  2925. }
  2926. /*
  2927. * Switches from packing to non-packing mode. If there is a packing
  2928. * buffer on the queue this buffer will be prepared to be flushed.
  2929. * In that case 1 is returned to inform the caller. If no buffer
  2930. * has to be flushed, zero is returned.
  2931. */
  2932. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  2933. {
  2934. struct qeth_qdio_out_buffer *buffer;
  2935. int flush_count = 0;
  2936. if (queue->do_pack) {
  2937. if (atomic_read(&queue->used_buffers)
  2938. <= QETH_LOW_WATERMARK_PACK) {
  2939. /* switch PACKING -> non-PACKING */
  2940. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  2941. if (queue->card->options.performance_stats)
  2942. queue->card->perf_stats.sc_p_dp++;
  2943. queue->do_pack = 0;
  2944. /* flush packing buffers */
  2945. buffer = queue->bufs[queue->next_buf_to_fill];
  2946. if ((atomic_read(&buffer->state) ==
  2947. QETH_QDIO_BUF_EMPTY) &&
  2948. (buffer->next_element_to_fill > 0)) {
  2949. atomic_set(&buffer->state,
  2950. QETH_QDIO_BUF_PRIMED);
  2951. flush_count++;
  2952. queue->next_buf_to_fill =
  2953. (queue->next_buf_to_fill + 1) %
  2954. QDIO_MAX_BUFFERS_PER_Q;
  2955. }
  2956. }
  2957. }
  2958. return flush_count;
  2959. }
  2960. /*
  2961. * Called to flush a packing buffer if no more pci flags are on the queue.
  2962. * Checks if there is a packing buffer and prepares it to be flushed.
  2963. * In that case returns 1, otherwise zero.
  2964. */
  2965. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  2966. {
  2967. struct qeth_qdio_out_buffer *buffer;
  2968. buffer = queue->bufs[queue->next_buf_to_fill];
  2969. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  2970. (buffer->next_element_to_fill > 0)) {
  2971. /* it's a packing buffer */
  2972. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  2973. queue->next_buf_to_fill =
  2974. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  2975. return 1;
  2976. }
  2977. return 0;
  2978. }
  2979. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  2980. int count)
  2981. {
  2982. struct qeth_qdio_out_buffer *buf;
  2983. int rc;
  2984. int i;
  2985. unsigned int qdio_flags;
  2986. for (i = index; i < index + count; ++i) {
  2987. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  2988. buf = queue->bufs[bidx];
  2989. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  2990. SBAL_EFLAGS_LAST_ENTRY;
  2991. if (queue->bufstates)
  2992. queue->bufstates[bidx].user = buf;
  2993. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  2994. continue;
  2995. if (!queue->do_pack) {
  2996. if ((atomic_read(&queue->used_buffers) >=
  2997. (QETH_HIGH_WATERMARK_PACK -
  2998. QETH_WATERMARK_PACK_FUZZ)) &&
  2999. !atomic_read(&queue->set_pci_flags_count)) {
  3000. /* it's likely that we'll go to packing
  3001. * mode soon */
  3002. atomic_inc(&queue->set_pci_flags_count);
  3003. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3004. }
  3005. } else {
  3006. if (!atomic_read(&queue->set_pci_flags_count)) {
  3007. /*
  3008. * there's no outstanding PCI any more, so we
  3009. * have to request a PCI to be sure the the PCI
  3010. * will wake at some time in the future then we
  3011. * can flush packed buffers that might still be
  3012. * hanging around, which can happen if no
  3013. * further send was requested by the stack
  3014. */
  3015. atomic_inc(&queue->set_pci_flags_count);
  3016. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3017. }
  3018. }
  3019. }
  3020. queue->card->dev->trans_start = jiffies;
  3021. if (queue->card->options.performance_stats) {
  3022. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3023. queue->card->perf_stats.outbound_do_qdio_start_time =
  3024. qeth_get_micros();
  3025. }
  3026. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3027. if (atomic_read(&queue->set_pci_flags_count))
  3028. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3029. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3030. queue->queue_no, index, count);
  3031. if (queue->card->options.performance_stats)
  3032. queue->card->perf_stats.outbound_do_qdio_time +=
  3033. qeth_get_micros() -
  3034. queue->card->perf_stats.outbound_do_qdio_start_time;
  3035. atomic_add(count, &queue->used_buffers);
  3036. if (rc) {
  3037. queue->card->stats.tx_errors += count;
  3038. /* ignore temporary SIGA errors without busy condition */
  3039. if (rc == -ENOBUFS)
  3040. return;
  3041. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3042. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3043. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3044. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3045. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3046. /* this must not happen under normal circumstances. if it
  3047. * happens something is really wrong -> recover */
  3048. qeth_schedule_recovery(queue->card);
  3049. return;
  3050. }
  3051. if (queue->card->options.performance_stats)
  3052. queue->card->perf_stats.bufs_sent += count;
  3053. }
  3054. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3055. {
  3056. int index;
  3057. int flush_cnt = 0;
  3058. int q_was_packing = 0;
  3059. /*
  3060. * check if weed have to switch to non-packing mode or if
  3061. * we have to get a pci flag out on the queue
  3062. */
  3063. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3064. !atomic_read(&queue->set_pci_flags_count)) {
  3065. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3066. QETH_OUT_Q_UNLOCKED) {
  3067. /*
  3068. * If we get in here, there was no action in
  3069. * do_send_packet. So, we check if there is a
  3070. * packing buffer to be flushed here.
  3071. */
  3072. netif_stop_queue(queue->card->dev);
  3073. index = queue->next_buf_to_fill;
  3074. q_was_packing = queue->do_pack;
  3075. /* queue->do_pack may change */
  3076. barrier();
  3077. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3078. if (!flush_cnt &&
  3079. !atomic_read(&queue->set_pci_flags_count))
  3080. flush_cnt +=
  3081. qeth_flush_buffers_on_no_pci(queue);
  3082. if (queue->card->options.performance_stats &&
  3083. q_was_packing)
  3084. queue->card->perf_stats.bufs_sent_pack +=
  3085. flush_cnt;
  3086. if (flush_cnt)
  3087. qeth_flush_buffers(queue, index, flush_cnt);
  3088. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3089. }
  3090. }
  3091. }
  3092. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3093. unsigned long card_ptr)
  3094. {
  3095. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3096. if (card->dev && (card->dev->flags & IFF_UP))
  3097. napi_schedule(&card->napi);
  3098. }
  3099. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3100. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3101. {
  3102. int rc;
  3103. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3104. rc = -1;
  3105. goto out;
  3106. } else {
  3107. if (card->options.cq == cq) {
  3108. rc = 0;
  3109. goto out;
  3110. }
  3111. if (card->state != CARD_STATE_DOWN &&
  3112. card->state != CARD_STATE_RECOVER) {
  3113. rc = -1;
  3114. goto out;
  3115. }
  3116. qeth_free_qdio_buffers(card);
  3117. card->options.cq = cq;
  3118. rc = 0;
  3119. }
  3120. out:
  3121. return rc;
  3122. }
  3123. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3124. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3125. unsigned int qdio_err,
  3126. unsigned int queue, int first_element, int count) {
  3127. struct qeth_qdio_q *cq = card->qdio.c_q;
  3128. int i;
  3129. int rc;
  3130. if (!qeth_is_cq(card, queue))
  3131. goto out;
  3132. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3133. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3134. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3135. if (qdio_err) {
  3136. netif_stop_queue(card->dev);
  3137. qeth_schedule_recovery(card);
  3138. goto out;
  3139. }
  3140. if (card->options.performance_stats) {
  3141. card->perf_stats.cq_cnt++;
  3142. card->perf_stats.cq_start_time = qeth_get_micros();
  3143. }
  3144. for (i = first_element; i < first_element + count; ++i) {
  3145. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3146. struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
  3147. int e;
  3148. e = 0;
  3149. while (buffer->element[e].addr) {
  3150. unsigned long phys_aob_addr;
  3151. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3152. qeth_qdio_handle_aob(card, phys_aob_addr);
  3153. buffer->element[e].addr = NULL;
  3154. buffer->element[e].eflags = 0;
  3155. buffer->element[e].sflags = 0;
  3156. buffer->element[e].length = 0;
  3157. ++e;
  3158. }
  3159. buffer->element[15].eflags = 0;
  3160. buffer->element[15].sflags = 0;
  3161. }
  3162. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3163. card->qdio.c_q->next_buf_to_init,
  3164. count);
  3165. if (rc) {
  3166. dev_warn(&card->gdev->dev,
  3167. "QDIO reported an error, rc=%i\n", rc);
  3168. QETH_CARD_TEXT(card, 2, "qcqherr");
  3169. }
  3170. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3171. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3172. netif_wake_queue(card->dev);
  3173. if (card->options.performance_stats) {
  3174. int delta_t = qeth_get_micros();
  3175. delta_t -= card->perf_stats.cq_start_time;
  3176. card->perf_stats.cq_time += delta_t;
  3177. }
  3178. out:
  3179. return;
  3180. }
  3181. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3182. unsigned int queue, int first_elem, int count,
  3183. unsigned long card_ptr)
  3184. {
  3185. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3186. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3187. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3188. if (qeth_is_cq(card, queue))
  3189. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3190. else if (qdio_err)
  3191. qeth_schedule_recovery(card);
  3192. }
  3193. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3194. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3195. unsigned int qdio_error, int __queue, int first_element,
  3196. int count, unsigned long card_ptr)
  3197. {
  3198. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3199. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3200. struct qeth_qdio_out_buffer *buffer;
  3201. int i;
  3202. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3203. if (qdio_error & QDIO_ERROR_FATAL) {
  3204. QETH_CARD_TEXT(card, 2, "achkcond");
  3205. netif_stop_queue(card->dev);
  3206. qeth_schedule_recovery(card);
  3207. return;
  3208. }
  3209. if (card->options.performance_stats) {
  3210. card->perf_stats.outbound_handler_cnt++;
  3211. card->perf_stats.outbound_handler_start_time =
  3212. qeth_get_micros();
  3213. }
  3214. for (i = first_element; i < (first_element + count); ++i) {
  3215. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3216. buffer = queue->bufs[bidx];
  3217. qeth_handle_send_error(card, buffer, qdio_error);
  3218. if (queue->bufstates &&
  3219. (queue->bufstates[bidx].flags &
  3220. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3221. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3222. if (atomic_cmpxchg(&buffer->state,
  3223. QETH_QDIO_BUF_PRIMED,
  3224. QETH_QDIO_BUF_PENDING) ==
  3225. QETH_QDIO_BUF_PRIMED) {
  3226. qeth_notify_skbs(queue, buffer,
  3227. TX_NOTIFY_PENDING);
  3228. }
  3229. buffer->aob = queue->bufstates[bidx].aob;
  3230. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3231. QETH_CARD_TEXT(queue->card, 5, "aob");
  3232. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3233. virt_to_phys(buffer->aob));
  3234. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3235. QETH_CARD_TEXT(card, 2, "outofbuf");
  3236. qeth_schedule_recovery(card);
  3237. }
  3238. } else {
  3239. if (card->options.cq == QETH_CQ_ENABLED) {
  3240. enum iucv_tx_notify n;
  3241. n = qeth_compute_cq_notification(
  3242. buffer->buffer->element[15].sflags, 0);
  3243. qeth_notify_skbs(queue, buffer, n);
  3244. }
  3245. qeth_clear_output_buffer(queue, buffer,
  3246. QETH_QDIO_BUF_EMPTY);
  3247. }
  3248. qeth_cleanup_handled_pending(queue, bidx, 0);
  3249. }
  3250. atomic_sub(count, &queue->used_buffers);
  3251. /* check if we need to do something on this outbound queue */
  3252. if (card->info.type != QETH_CARD_TYPE_IQD)
  3253. qeth_check_outbound_queue(queue);
  3254. netif_wake_queue(queue->card->dev);
  3255. if (card->options.performance_stats)
  3256. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3257. card->perf_stats.outbound_handler_start_time;
  3258. }
  3259. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3260. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3261. int ipv, int cast_type)
  3262. {
  3263. if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
  3264. card->info.type == QETH_CARD_TYPE_OSX))
  3265. return card->qdio.default_out_queue;
  3266. switch (card->qdio.no_out_queues) {
  3267. case 4:
  3268. if (cast_type && card->info.is_multicast_different)
  3269. return card->info.is_multicast_different &
  3270. (card->qdio.no_out_queues - 1);
  3271. if (card->qdio.do_prio_queueing && (ipv == 4)) {
  3272. const u8 tos = ip_hdr(skb)->tos;
  3273. if (card->qdio.do_prio_queueing ==
  3274. QETH_PRIO_Q_ING_TOS) {
  3275. if (tos & IP_TOS_NOTIMPORTANT)
  3276. return 3;
  3277. if (tos & IP_TOS_HIGHRELIABILITY)
  3278. return 2;
  3279. if (tos & IP_TOS_HIGHTHROUGHPUT)
  3280. return 1;
  3281. if (tos & IP_TOS_LOWDELAY)
  3282. return 0;
  3283. }
  3284. if (card->qdio.do_prio_queueing ==
  3285. QETH_PRIO_Q_ING_PREC)
  3286. return 3 - (tos >> 6);
  3287. } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
  3288. /* TODO: IPv6!!! */
  3289. }
  3290. return card->qdio.default_out_queue;
  3291. case 1: /* fallthrough for single-out-queue 1920-device */
  3292. default:
  3293. return card->qdio.default_out_queue;
  3294. }
  3295. }
  3296. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3297. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3298. {
  3299. int cnt, length, e, elements = 0;
  3300. struct skb_frag_struct *frag;
  3301. char *data;
  3302. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3303. frag = &skb_shinfo(skb)->frags[cnt];
  3304. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3305. frag->page_offset;
  3306. length = frag->size;
  3307. e = PFN_UP((unsigned long)data + length - 1) -
  3308. PFN_DOWN((unsigned long)data);
  3309. elements += e;
  3310. }
  3311. return elements;
  3312. }
  3313. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3314. int qeth_get_elements_no(struct qeth_card *card,
  3315. struct sk_buff *skb, int elems)
  3316. {
  3317. int dlen = skb->len - skb->data_len;
  3318. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3319. PFN_DOWN((unsigned long)skb->data);
  3320. elements_needed += qeth_get_elements_for_frags(skb);
  3321. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3322. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3323. "(Number=%d / Length=%d). Discarded.\n",
  3324. (elements_needed+elems), skb->len);
  3325. return 0;
  3326. }
  3327. return elements_needed;
  3328. }
  3329. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3330. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3331. {
  3332. int hroom, inpage, rest;
  3333. if (((unsigned long)skb->data & PAGE_MASK) !=
  3334. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3335. hroom = skb_headroom(skb);
  3336. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3337. rest = len - inpage;
  3338. if (rest > hroom)
  3339. return 1;
  3340. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3341. skb->data -= rest;
  3342. skb->tail -= rest;
  3343. *hdr = (struct qeth_hdr *)skb->data;
  3344. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3345. }
  3346. return 0;
  3347. }
  3348. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3349. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3350. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3351. int offset)
  3352. {
  3353. int length = skb->len - skb->data_len;
  3354. int length_here;
  3355. int element;
  3356. char *data;
  3357. int first_lap, cnt;
  3358. struct skb_frag_struct *frag;
  3359. element = *next_element_to_fill;
  3360. data = skb->data;
  3361. first_lap = (is_tso == 0 ? 1 : 0);
  3362. if (offset >= 0) {
  3363. data = skb->data + offset;
  3364. length -= offset;
  3365. first_lap = 0;
  3366. }
  3367. while (length > 0) {
  3368. /* length_here is the remaining amount of data in this page */
  3369. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3370. if (length < length_here)
  3371. length_here = length;
  3372. buffer->element[element].addr = data;
  3373. buffer->element[element].length = length_here;
  3374. length -= length_here;
  3375. if (!length) {
  3376. if (first_lap)
  3377. if (skb_shinfo(skb)->nr_frags)
  3378. buffer->element[element].eflags =
  3379. SBAL_EFLAGS_FIRST_FRAG;
  3380. else
  3381. buffer->element[element].eflags = 0;
  3382. else
  3383. buffer->element[element].eflags =
  3384. SBAL_EFLAGS_MIDDLE_FRAG;
  3385. } else {
  3386. if (first_lap)
  3387. buffer->element[element].eflags =
  3388. SBAL_EFLAGS_FIRST_FRAG;
  3389. else
  3390. buffer->element[element].eflags =
  3391. SBAL_EFLAGS_MIDDLE_FRAG;
  3392. }
  3393. data += length_here;
  3394. element++;
  3395. first_lap = 0;
  3396. }
  3397. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3398. frag = &skb_shinfo(skb)->frags[cnt];
  3399. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3400. frag->page_offset;
  3401. length = frag->size;
  3402. while (length > 0) {
  3403. length_here = PAGE_SIZE -
  3404. ((unsigned long) data % PAGE_SIZE);
  3405. if (length < length_here)
  3406. length_here = length;
  3407. buffer->element[element].addr = data;
  3408. buffer->element[element].length = length_here;
  3409. buffer->element[element].eflags =
  3410. SBAL_EFLAGS_MIDDLE_FRAG;
  3411. length -= length_here;
  3412. data += length_here;
  3413. element++;
  3414. }
  3415. }
  3416. if (buffer->element[element - 1].eflags)
  3417. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3418. *next_element_to_fill = element;
  3419. }
  3420. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3421. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3422. struct qeth_hdr *hdr, int offset, int hd_len)
  3423. {
  3424. struct qdio_buffer *buffer;
  3425. int flush_cnt = 0, hdr_len, large_send = 0;
  3426. buffer = buf->buffer;
  3427. atomic_inc(&skb->users);
  3428. skb_queue_tail(&buf->skb_list, skb);
  3429. /*check first on TSO ....*/
  3430. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3431. int element = buf->next_element_to_fill;
  3432. hdr_len = sizeof(struct qeth_hdr_tso) +
  3433. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3434. /*fill first buffer entry only with header information */
  3435. buffer->element[element].addr = skb->data;
  3436. buffer->element[element].length = hdr_len;
  3437. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3438. buf->next_element_to_fill++;
  3439. skb->data += hdr_len;
  3440. skb->len -= hdr_len;
  3441. large_send = 1;
  3442. }
  3443. if (offset >= 0) {
  3444. int element = buf->next_element_to_fill;
  3445. buffer->element[element].addr = hdr;
  3446. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3447. hd_len;
  3448. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3449. buf->is_header[element] = 1;
  3450. buf->next_element_to_fill++;
  3451. }
  3452. __qeth_fill_buffer(skb, buffer, large_send,
  3453. (int *)&buf->next_element_to_fill, offset);
  3454. if (!queue->do_pack) {
  3455. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3456. /* set state to PRIMED -> will be flushed */
  3457. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3458. flush_cnt = 1;
  3459. } else {
  3460. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3461. if (queue->card->options.performance_stats)
  3462. queue->card->perf_stats.skbs_sent_pack++;
  3463. if (buf->next_element_to_fill >=
  3464. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3465. /*
  3466. * packed buffer if full -> set state PRIMED
  3467. * -> will be flushed
  3468. */
  3469. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3470. flush_cnt = 1;
  3471. }
  3472. }
  3473. return flush_cnt;
  3474. }
  3475. int qeth_do_send_packet_fast(struct qeth_card *card,
  3476. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3477. struct qeth_hdr *hdr, int elements_needed,
  3478. int offset, int hd_len)
  3479. {
  3480. struct qeth_qdio_out_buffer *buffer;
  3481. int index;
  3482. /* spin until we get the queue ... */
  3483. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3484. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3485. /* ... now we've got the queue */
  3486. index = queue->next_buf_to_fill;
  3487. buffer = queue->bufs[queue->next_buf_to_fill];
  3488. /*
  3489. * check if buffer is empty to make sure that we do not 'overtake'
  3490. * ourselves and try to fill a buffer that is already primed
  3491. */
  3492. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3493. goto out;
  3494. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3495. QDIO_MAX_BUFFERS_PER_Q;
  3496. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3497. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3498. qeth_flush_buffers(queue, index, 1);
  3499. return 0;
  3500. out:
  3501. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3502. return -EBUSY;
  3503. }
  3504. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3505. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3506. struct sk_buff *skb, struct qeth_hdr *hdr,
  3507. int elements_needed)
  3508. {
  3509. struct qeth_qdio_out_buffer *buffer;
  3510. int start_index;
  3511. int flush_count = 0;
  3512. int do_pack = 0;
  3513. int tmp;
  3514. int rc = 0;
  3515. /* spin until we get the queue ... */
  3516. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3517. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3518. start_index = queue->next_buf_to_fill;
  3519. buffer = queue->bufs[queue->next_buf_to_fill];
  3520. /*
  3521. * check if buffer is empty to make sure that we do not 'overtake'
  3522. * ourselves and try to fill a buffer that is already primed
  3523. */
  3524. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3525. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3526. return -EBUSY;
  3527. }
  3528. /* check if we need to switch packing state of this queue */
  3529. qeth_switch_to_packing_if_needed(queue);
  3530. if (queue->do_pack) {
  3531. do_pack = 1;
  3532. /* does packet fit in current buffer? */
  3533. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3534. buffer->next_element_to_fill) < elements_needed) {
  3535. /* ... no -> set state PRIMED */
  3536. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3537. flush_count++;
  3538. queue->next_buf_to_fill =
  3539. (queue->next_buf_to_fill + 1) %
  3540. QDIO_MAX_BUFFERS_PER_Q;
  3541. buffer = queue->bufs[queue->next_buf_to_fill];
  3542. /* we did a step forward, so check buffer state
  3543. * again */
  3544. if (atomic_read(&buffer->state) !=
  3545. QETH_QDIO_BUF_EMPTY) {
  3546. qeth_flush_buffers(queue, start_index,
  3547. flush_count);
  3548. atomic_set(&queue->state,
  3549. QETH_OUT_Q_UNLOCKED);
  3550. return -EBUSY;
  3551. }
  3552. }
  3553. }
  3554. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3555. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3556. QDIO_MAX_BUFFERS_PER_Q;
  3557. flush_count += tmp;
  3558. if (flush_count)
  3559. qeth_flush_buffers(queue, start_index, flush_count);
  3560. else if (!atomic_read(&queue->set_pci_flags_count))
  3561. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3562. /*
  3563. * queue->state will go from LOCKED -> UNLOCKED or from
  3564. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3565. * (switch packing state or flush buffer to get another pci flag out).
  3566. * In that case we will enter this loop
  3567. */
  3568. while (atomic_dec_return(&queue->state)) {
  3569. flush_count = 0;
  3570. start_index = queue->next_buf_to_fill;
  3571. /* check if we can go back to non-packing state */
  3572. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3573. /*
  3574. * check if we need to flush a packing buffer to get a pci
  3575. * flag out on the queue
  3576. */
  3577. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3578. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3579. if (flush_count)
  3580. qeth_flush_buffers(queue, start_index, flush_count);
  3581. }
  3582. /* at this point the queue is UNLOCKED again */
  3583. if (queue->card->options.performance_stats && do_pack)
  3584. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3585. return rc;
  3586. }
  3587. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3588. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3589. struct qeth_reply *reply, unsigned long data)
  3590. {
  3591. struct qeth_ipa_cmd *cmd;
  3592. struct qeth_ipacmd_setadpparms *setparms;
  3593. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3594. cmd = (struct qeth_ipa_cmd *) data;
  3595. setparms = &(cmd->data.setadapterparms);
  3596. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3597. if (cmd->hdr.return_code) {
  3598. QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
  3599. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3600. }
  3601. card->info.promisc_mode = setparms->data.mode;
  3602. return 0;
  3603. }
  3604. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3605. {
  3606. enum qeth_ipa_promisc_modes mode;
  3607. struct net_device *dev = card->dev;
  3608. struct qeth_cmd_buffer *iob;
  3609. struct qeth_ipa_cmd *cmd;
  3610. QETH_CARD_TEXT(card, 4, "setprom");
  3611. if (((dev->flags & IFF_PROMISC) &&
  3612. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3613. (!(dev->flags & IFF_PROMISC) &&
  3614. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3615. return;
  3616. mode = SET_PROMISC_MODE_OFF;
  3617. if (dev->flags & IFF_PROMISC)
  3618. mode = SET_PROMISC_MODE_ON;
  3619. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3620. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3621. sizeof(struct qeth_ipacmd_setadpparms));
  3622. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3623. cmd->data.setadapterparms.data.mode = mode;
  3624. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3625. }
  3626. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3627. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3628. {
  3629. struct qeth_card *card;
  3630. char dbf_text[15];
  3631. card = dev->ml_priv;
  3632. QETH_CARD_TEXT(card, 4, "chgmtu");
  3633. sprintf(dbf_text, "%8x", new_mtu);
  3634. QETH_CARD_TEXT(card, 4, dbf_text);
  3635. if (new_mtu < 64)
  3636. return -EINVAL;
  3637. if (new_mtu > 65535)
  3638. return -EINVAL;
  3639. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3640. (!qeth_mtu_is_valid(card, new_mtu)))
  3641. return -EINVAL;
  3642. dev->mtu = new_mtu;
  3643. return 0;
  3644. }
  3645. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3646. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3647. {
  3648. struct qeth_card *card;
  3649. card = dev->ml_priv;
  3650. QETH_CARD_TEXT(card, 5, "getstat");
  3651. return &card->stats;
  3652. }
  3653. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3654. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3655. struct qeth_reply *reply, unsigned long data)
  3656. {
  3657. struct qeth_ipa_cmd *cmd;
  3658. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3659. cmd = (struct qeth_ipa_cmd *) data;
  3660. if (!card->options.layer2 ||
  3661. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3662. memcpy(card->dev->dev_addr,
  3663. &cmd->data.setadapterparms.data.change_addr.addr,
  3664. OSA_ADDR_LEN);
  3665. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3666. }
  3667. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3668. return 0;
  3669. }
  3670. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3671. {
  3672. int rc;
  3673. struct qeth_cmd_buffer *iob;
  3674. struct qeth_ipa_cmd *cmd;
  3675. QETH_CARD_TEXT(card, 4, "chgmac");
  3676. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3677. sizeof(struct qeth_ipacmd_setadpparms));
  3678. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3679. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3680. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3681. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3682. card->dev->dev_addr, OSA_ADDR_LEN);
  3683. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3684. NULL);
  3685. return rc;
  3686. }
  3687. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3688. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3689. struct qeth_reply *reply, unsigned long data)
  3690. {
  3691. struct qeth_ipa_cmd *cmd;
  3692. struct qeth_set_access_ctrl *access_ctrl_req;
  3693. int fallback = *(int *)reply->param;
  3694. QETH_CARD_TEXT(card, 4, "setaccb");
  3695. cmd = (struct qeth_ipa_cmd *) data;
  3696. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3697. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3698. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3699. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3700. cmd->data.setadapterparms.hdr.return_code);
  3701. if (cmd->data.setadapterparms.hdr.return_code !=
  3702. SET_ACCESS_CTRL_RC_SUCCESS)
  3703. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3704. card->gdev->dev.kobj.name,
  3705. access_ctrl_req->subcmd_code,
  3706. cmd->data.setadapterparms.hdr.return_code);
  3707. switch (cmd->data.setadapterparms.hdr.return_code) {
  3708. case SET_ACCESS_CTRL_RC_SUCCESS:
  3709. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3710. dev_info(&card->gdev->dev,
  3711. "QDIO data connection isolation is deactivated\n");
  3712. } else {
  3713. dev_info(&card->gdev->dev,
  3714. "QDIO data connection isolation is activated\n");
  3715. }
  3716. break;
  3717. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3718. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3719. "deactivated\n", dev_name(&card->gdev->dev));
  3720. if (fallback)
  3721. card->options.isolation = card->options.prev_isolation;
  3722. break;
  3723. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3724. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3725. " activated\n", dev_name(&card->gdev->dev));
  3726. if (fallback)
  3727. card->options.isolation = card->options.prev_isolation;
  3728. break;
  3729. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3730. dev_err(&card->gdev->dev, "Adapter does not "
  3731. "support QDIO data connection isolation\n");
  3732. break;
  3733. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3734. dev_err(&card->gdev->dev,
  3735. "Adapter is dedicated. "
  3736. "QDIO data connection isolation not supported\n");
  3737. if (fallback)
  3738. card->options.isolation = card->options.prev_isolation;
  3739. break;
  3740. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3741. dev_err(&card->gdev->dev,
  3742. "TSO does not permit QDIO data connection isolation\n");
  3743. if (fallback)
  3744. card->options.isolation = card->options.prev_isolation;
  3745. break;
  3746. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3747. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3748. "support reflective relay mode\n");
  3749. if (fallback)
  3750. card->options.isolation = card->options.prev_isolation;
  3751. break;
  3752. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3753. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3754. "enabled at the adjacent switch port");
  3755. if (fallback)
  3756. card->options.isolation = card->options.prev_isolation;
  3757. break;
  3758. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3759. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3760. "at the adjacent switch failed\n");
  3761. break;
  3762. default:
  3763. /* this should never happen */
  3764. if (fallback)
  3765. card->options.isolation = card->options.prev_isolation;
  3766. break;
  3767. }
  3768. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3769. return 0;
  3770. }
  3771. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3772. enum qeth_ipa_isolation_modes isolation, int fallback)
  3773. {
  3774. int rc;
  3775. struct qeth_cmd_buffer *iob;
  3776. struct qeth_ipa_cmd *cmd;
  3777. struct qeth_set_access_ctrl *access_ctrl_req;
  3778. QETH_CARD_TEXT(card, 4, "setacctl");
  3779. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3780. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3781. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3782. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3783. sizeof(struct qeth_set_access_ctrl));
  3784. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3785. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3786. access_ctrl_req->subcmd_code = isolation;
  3787. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3788. &fallback);
  3789. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3790. return rc;
  3791. }
  3792. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3793. {
  3794. int rc = 0;
  3795. QETH_CARD_TEXT(card, 4, "setactlo");
  3796. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3797. card->info.type == QETH_CARD_TYPE_OSX) &&
  3798. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3799. rc = qeth_setadpparms_set_access_ctrl(card,
  3800. card->options.isolation, fallback);
  3801. if (rc) {
  3802. QETH_DBF_MESSAGE(3,
  3803. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3804. card->gdev->dev.kobj.name,
  3805. rc);
  3806. rc = -EOPNOTSUPP;
  3807. }
  3808. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3809. card->options.isolation = ISOLATION_MODE_NONE;
  3810. dev_err(&card->gdev->dev, "Adapter does not "
  3811. "support QDIO data connection isolation\n");
  3812. rc = -EOPNOTSUPP;
  3813. }
  3814. return rc;
  3815. }
  3816. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3817. void qeth_tx_timeout(struct net_device *dev)
  3818. {
  3819. struct qeth_card *card;
  3820. card = dev->ml_priv;
  3821. QETH_CARD_TEXT(card, 4, "txtimeo");
  3822. card->stats.tx_errors++;
  3823. qeth_schedule_recovery(card);
  3824. }
  3825. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3826. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3827. {
  3828. struct qeth_card *card = dev->ml_priv;
  3829. int rc = 0;
  3830. switch (regnum) {
  3831. case MII_BMCR: /* Basic mode control register */
  3832. rc = BMCR_FULLDPLX;
  3833. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3834. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3835. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3836. rc |= BMCR_SPEED100;
  3837. break;
  3838. case MII_BMSR: /* Basic mode status register */
  3839. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3840. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3841. BMSR_100BASE4;
  3842. break;
  3843. case MII_PHYSID1: /* PHYS ID 1 */
  3844. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3845. dev->dev_addr[2];
  3846. rc = (rc >> 5) & 0xFFFF;
  3847. break;
  3848. case MII_PHYSID2: /* PHYS ID 2 */
  3849. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3850. break;
  3851. case MII_ADVERTISE: /* Advertisement control reg */
  3852. rc = ADVERTISE_ALL;
  3853. break;
  3854. case MII_LPA: /* Link partner ability reg */
  3855. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3856. LPA_100BASE4 | LPA_LPACK;
  3857. break;
  3858. case MII_EXPANSION: /* Expansion register */
  3859. break;
  3860. case MII_DCOUNTER: /* disconnect counter */
  3861. break;
  3862. case MII_FCSCOUNTER: /* false carrier counter */
  3863. break;
  3864. case MII_NWAYTEST: /* N-way auto-neg test register */
  3865. break;
  3866. case MII_RERRCOUNTER: /* rx error counter */
  3867. rc = card->stats.rx_errors;
  3868. break;
  3869. case MII_SREVISION: /* silicon revision */
  3870. break;
  3871. case MII_RESV1: /* reserved 1 */
  3872. break;
  3873. case MII_LBRERROR: /* loopback, rx, bypass error */
  3874. break;
  3875. case MII_PHYADDR: /* physical address */
  3876. break;
  3877. case MII_RESV2: /* reserved 2 */
  3878. break;
  3879. case MII_TPISTATUS: /* TPI status for 10mbps */
  3880. break;
  3881. case MII_NCONFIG: /* network interface config */
  3882. break;
  3883. default:
  3884. break;
  3885. }
  3886. return rc;
  3887. }
  3888. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  3889. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  3890. struct qeth_cmd_buffer *iob, int len,
  3891. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  3892. unsigned long),
  3893. void *reply_param)
  3894. {
  3895. u16 s1, s2;
  3896. QETH_CARD_TEXT(card, 4, "sendsnmp");
  3897. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  3898. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  3899. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3900. /* adjust PDU length fields in IPA_PDU_HEADER */
  3901. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  3902. s2 = (u32) len;
  3903. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  3904. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  3905. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  3906. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  3907. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  3908. reply_cb, reply_param);
  3909. }
  3910. static int qeth_snmp_command_cb(struct qeth_card *card,
  3911. struct qeth_reply *reply, unsigned long sdata)
  3912. {
  3913. struct qeth_ipa_cmd *cmd;
  3914. struct qeth_arp_query_info *qinfo;
  3915. struct qeth_snmp_cmd *snmp;
  3916. unsigned char *data;
  3917. __u16 data_len;
  3918. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  3919. cmd = (struct qeth_ipa_cmd *) sdata;
  3920. data = (unsigned char *)((char *)cmd - reply->offset);
  3921. qinfo = (struct qeth_arp_query_info *) reply->param;
  3922. snmp = &cmd->data.setadapterparms.data.snmp;
  3923. if (cmd->hdr.return_code) {
  3924. QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
  3925. return 0;
  3926. }
  3927. if (cmd->data.setadapterparms.hdr.return_code) {
  3928. cmd->hdr.return_code =
  3929. cmd->data.setadapterparms.hdr.return_code;
  3930. QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
  3931. return 0;
  3932. }
  3933. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  3934. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  3935. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  3936. else
  3937. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  3938. /* check if there is enough room in userspace */
  3939. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  3940. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  3941. cmd->hdr.return_code = IPA_RC_ENOMEM;
  3942. return 0;
  3943. }
  3944. QETH_CARD_TEXT_(card, 4, "snore%i",
  3945. cmd->data.setadapterparms.hdr.used_total);
  3946. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  3947. cmd->data.setadapterparms.hdr.seq_no);
  3948. /*copy entries to user buffer*/
  3949. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  3950. memcpy(qinfo->udata + qinfo->udata_offset,
  3951. (char *)snmp,
  3952. data_len + offsetof(struct qeth_snmp_cmd, data));
  3953. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  3954. } else {
  3955. memcpy(qinfo->udata + qinfo->udata_offset,
  3956. (char *)&snmp->request, data_len);
  3957. }
  3958. qinfo->udata_offset += data_len;
  3959. /* check if all replies received ... */
  3960. QETH_CARD_TEXT_(card, 4, "srtot%i",
  3961. cmd->data.setadapterparms.hdr.used_total);
  3962. QETH_CARD_TEXT_(card, 4, "srseq%i",
  3963. cmd->data.setadapterparms.hdr.seq_no);
  3964. if (cmd->data.setadapterparms.hdr.seq_no <
  3965. cmd->data.setadapterparms.hdr.used_total)
  3966. return 1;
  3967. return 0;
  3968. }
  3969. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  3970. {
  3971. struct qeth_cmd_buffer *iob;
  3972. struct qeth_ipa_cmd *cmd;
  3973. struct qeth_snmp_ureq *ureq;
  3974. int req_len;
  3975. struct qeth_arp_query_info qinfo = {0, };
  3976. int rc = 0;
  3977. QETH_CARD_TEXT(card, 3, "snmpcmd");
  3978. if (card->info.guestlan)
  3979. return -EOPNOTSUPP;
  3980. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  3981. (!card->options.layer2)) {
  3982. return -EOPNOTSUPP;
  3983. }
  3984. /* skip 4 bytes (data_len struct member) to get req_len */
  3985. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  3986. return -EFAULT;
  3987. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  3988. if (IS_ERR(ureq)) {
  3989. QETH_CARD_TEXT(card, 2, "snmpnome");
  3990. return PTR_ERR(ureq);
  3991. }
  3992. qinfo.udata_len = ureq->hdr.data_len;
  3993. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  3994. if (!qinfo.udata) {
  3995. kfree(ureq);
  3996. return -ENOMEM;
  3997. }
  3998. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  3999. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4000. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4001. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4002. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4003. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4004. qeth_snmp_command_cb, (void *)&qinfo);
  4005. if (rc)
  4006. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4007. QETH_CARD_IFNAME(card), rc);
  4008. else {
  4009. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4010. rc = -EFAULT;
  4011. }
  4012. kfree(ureq);
  4013. kfree(qinfo.udata);
  4014. return rc;
  4015. }
  4016. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4017. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4018. struct qeth_reply *reply, unsigned long data)
  4019. {
  4020. struct qeth_ipa_cmd *cmd;
  4021. struct qeth_qoat_priv *priv;
  4022. char *resdata;
  4023. int resdatalen;
  4024. QETH_CARD_TEXT(card, 3, "qoatcb");
  4025. cmd = (struct qeth_ipa_cmd *)data;
  4026. priv = (struct qeth_qoat_priv *)reply->param;
  4027. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4028. resdata = (char *)data + 28;
  4029. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4030. cmd->hdr.return_code = IPA_RC_FFFF;
  4031. return 0;
  4032. }
  4033. memcpy((priv->buffer + priv->response_len), resdata,
  4034. resdatalen);
  4035. priv->response_len += resdatalen;
  4036. if (cmd->data.setadapterparms.hdr.seq_no <
  4037. cmd->data.setadapterparms.hdr.used_total)
  4038. return 1;
  4039. return 0;
  4040. }
  4041. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4042. {
  4043. int rc = 0;
  4044. struct qeth_cmd_buffer *iob;
  4045. struct qeth_ipa_cmd *cmd;
  4046. struct qeth_query_oat *oat_req;
  4047. struct qeth_query_oat_data oat_data;
  4048. struct qeth_qoat_priv priv;
  4049. void __user *tmp;
  4050. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4051. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4052. rc = -EOPNOTSUPP;
  4053. goto out;
  4054. }
  4055. if (copy_from_user(&oat_data, udata,
  4056. sizeof(struct qeth_query_oat_data))) {
  4057. rc = -EFAULT;
  4058. goto out;
  4059. }
  4060. priv.buffer_len = oat_data.buffer_len;
  4061. priv.response_len = 0;
  4062. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4063. if (!priv.buffer) {
  4064. rc = -ENOMEM;
  4065. goto out;
  4066. }
  4067. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4068. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4069. sizeof(struct qeth_query_oat));
  4070. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4071. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4072. oat_req->subcmd_code = oat_data.command;
  4073. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4074. &priv);
  4075. if (!rc) {
  4076. if (is_compat_task())
  4077. tmp = compat_ptr(oat_data.ptr);
  4078. else
  4079. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4080. if (copy_to_user(tmp, priv.buffer,
  4081. priv.response_len)) {
  4082. rc = -EFAULT;
  4083. goto out_free;
  4084. }
  4085. oat_data.response_len = priv.response_len;
  4086. if (copy_to_user(udata, &oat_data,
  4087. sizeof(struct qeth_query_oat_data)))
  4088. rc = -EFAULT;
  4089. } else
  4090. if (rc == IPA_RC_FFFF)
  4091. rc = -EFAULT;
  4092. out_free:
  4093. kfree(priv.buffer);
  4094. out:
  4095. return rc;
  4096. }
  4097. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4098. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4099. {
  4100. switch (card->info.type) {
  4101. case QETH_CARD_TYPE_IQD:
  4102. return 2;
  4103. default:
  4104. return 0;
  4105. }
  4106. }
  4107. static void qeth_determine_capabilities(struct qeth_card *card)
  4108. {
  4109. int rc;
  4110. int length;
  4111. char *prcd;
  4112. struct ccw_device *ddev;
  4113. int ddev_offline = 0;
  4114. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4115. ddev = CARD_DDEV(card);
  4116. if (!ddev->online) {
  4117. ddev_offline = 1;
  4118. rc = ccw_device_set_online(ddev);
  4119. if (rc) {
  4120. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4121. goto out;
  4122. }
  4123. }
  4124. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4125. if (rc) {
  4126. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4127. dev_name(&card->gdev->dev), rc);
  4128. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4129. goto out_offline;
  4130. }
  4131. qeth_configure_unitaddr(card, prcd);
  4132. if (ddev_offline)
  4133. qeth_configure_blkt_default(card, prcd);
  4134. kfree(prcd);
  4135. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4136. if (rc)
  4137. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4138. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4139. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4140. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4141. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4142. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4143. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4144. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4145. dev_info(&card->gdev->dev,
  4146. "Completion Queueing supported\n");
  4147. } else {
  4148. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4149. }
  4150. out_offline:
  4151. if (ddev_offline == 1)
  4152. ccw_device_set_offline(ddev);
  4153. out:
  4154. return;
  4155. }
  4156. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4157. struct qdio_buffer **in_sbal_ptrs,
  4158. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4159. int i;
  4160. if (card->options.cq == QETH_CQ_ENABLED) {
  4161. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4162. (card->qdio.no_in_queues - 1);
  4163. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4164. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4165. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4166. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4167. }
  4168. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4169. }
  4170. }
  4171. static int qeth_qdio_establish(struct qeth_card *card)
  4172. {
  4173. struct qdio_initialize init_data;
  4174. char *qib_param_field;
  4175. struct qdio_buffer **in_sbal_ptrs;
  4176. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4177. struct qdio_buffer **out_sbal_ptrs;
  4178. int i, j, k;
  4179. int rc = 0;
  4180. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4181. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4182. GFP_KERNEL);
  4183. if (!qib_param_field) {
  4184. rc = -ENOMEM;
  4185. goto out_free_nothing;
  4186. }
  4187. qeth_create_qib_param_field(card, qib_param_field);
  4188. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4189. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4190. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4191. GFP_KERNEL);
  4192. if (!in_sbal_ptrs) {
  4193. rc = -ENOMEM;
  4194. goto out_free_qib_param;
  4195. }
  4196. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4197. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4198. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4199. }
  4200. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4201. GFP_KERNEL);
  4202. if (!queue_start_poll) {
  4203. rc = -ENOMEM;
  4204. goto out_free_in_sbals;
  4205. }
  4206. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4207. queue_start_poll[i] = card->discipline->start_poll;
  4208. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4209. out_sbal_ptrs =
  4210. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4211. sizeof(void *), GFP_KERNEL);
  4212. if (!out_sbal_ptrs) {
  4213. rc = -ENOMEM;
  4214. goto out_free_queue_start_poll;
  4215. }
  4216. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4217. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4218. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4219. card->qdio.out_qs[i]->bufs[j]->buffer);
  4220. }
  4221. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4222. init_data.cdev = CARD_DDEV(card);
  4223. init_data.q_format = qeth_get_qdio_q_format(card);
  4224. init_data.qib_param_field_format = 0;
  4225. init_data.qib_param_field = qib_param_field;
  4226. init_data.no_input_qs = card->qdio.no_in_queues;
  4227. init_data.no_output_qs = card->qdio.no_out_queues;
  4228. init_data.input_handler = card->discipline->input_handler;
  4229. init_data.output_handler = card->discipline->output_handler;
  4230. init_data.queue_start_poll_array = queue_start_poll;
  4231. init_data.int_parm = (unsigned long) card;
  4232. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4233. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4234. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4235. init_data.scan_threshold =
  4236. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4237. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4238. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4239. rc = qdio_allocate(&init_data);
  4240. if (rc) {
  4241. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4242. goto out;
  4243. }
  4244. rc = qdio_establish(&init_data);
  4245. if (rc) {
  4246. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4247. qdio_free(CARD_DDEV(card));
  4248. }
  4249. }
  4250. switch (card->options.cq) {
  4251. case QETH_CQ_ENABLED:
  4252. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4253. break;
  4254. case QETH_CQ_DISABLED:
  4255. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4256. break;
  4257. default:
  4258. break;
  4259. }
  4260. out:
  4261. kfree(out_sbal_ptrs);
  4262. out_free_queue_start_poll:
  4263. kfree(queue_start_poll);
  4264. out_free_in_sbals:
  4265. kfree(in_sbal_ptrs);
  4266. out_free_qib_param:
  4267. kfree(qib_param_field);
  4268. out_free_nothing:
  4269. return rc;
  4270. }
  4271. static void qeth_core_free_card(struct qeth_card *card)
  4272. {
  4273. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4274. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4275. qeth_clean_channel(&card->read);
  4276. qeth_clean_channel(&card->write);
  4277. if (card->dev)
  4278. free_netdev(card->dev);
  4279. kfree(card->ip_tbd_list);
  4280. qeth_free_qdio_buffers(card);
  4281. unregister_service_level(&card->qeth_service_level);
  4282. kfree(card);
  4283. }
  4284. void qeth_trace_features(struct qeth_card *card)
  4285. {
  4286. QETH_CARD_TEXT(card, 2, "features");
  4287. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4288. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4289. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4290. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4291. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4292. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4293. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4294. }
  4295. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4296. static struct ccw_device_id qeth_ids[] = {
  4297. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4298. .driver_info = QETH_CARD_TYPE_OSD},
  4299. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4300. .driver_info = QETH_CARD_TYPE_IQD},
  4301. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4302. .driver_info = QETH_CARD_TYPE_OSN},
  4303. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4304. .driver_info = QETH_CARD_TYPE_OSM},
  4305. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4306. .driver_info = QETH_CARD_TYPE_OSX},
  4307. {},
  4308. };
  4309. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4310. static struct ccw_driver qeth_ccw_driver = {
  4311. .driver = {
  4312. .owner = THIS_MODULE,
  4313. .name = "qeth",
  4314. },
  4315. .ids = qeth_ids,
  4316. .probe = ccwgroup_probe_ccwdev,
  4317. .remove = ccwgroup_remove_ccwdev,
  4318. };
  4319. int qeth_core_hardsetup_card(struct qeth_card *card)
  4320. {
  4321. int retries = 3;
  4322. int rc;
  4323. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4324. atomic_set(&card->force_alloc_skb, 0);
  4325. qeth_update_from_chp_desc(card);
  4326. retry:
  4327. if (retries < 3)
  4328. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4329. dev_name(&card->gdev->dev));
  4330. ccw_device_set_offline(CARD_DDEV(card));
  4331. ccw_device_set_offline(CARD_WDEV(card));
  4332. ccw_device_set_offline(CARD_RDEV(card));
  4333. rc = ccw_device_set_online(CARD_RDEV(card));
  4334. if (rc)
  4335. goto retriable;
  4336. rc = ccw_device_set_online(CARD_WDEV(card));
  4337. if (rc)
  4338. goto retriable;
  4339. rc = ccw_device_set_online(CARD_DDEV(card));
  4340. if (rc)
  4341. goto retriable;
  4342. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4343. retriable:
  4344. if (rc == -ERESTARTSYS) {
  4345. QETH_DBF_TEXT(SETUP, 2, "break1");
  4346. return rc;
  4347. } else if (rc) {
  4348. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4349. if (--retries < 0)
  4350. goto out;
  4351. else
  4352. goto retry;
  4353. }
  4354. qeth_determine_capabilities(card);
  4355. qeth_init_tokens(card);
  4356. qeth_init_func_level(card);
  4357. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4358. if (rc == -ERESTARTSYS) {
  4359. QETH_DBF_TEXT(SETUP, 2, "break2");
  4360. return rc;
  4361. } else if (rc) {
  4362. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4363. if (--retries < 0)
  4364. goto out;
  4365. else
  4366. goto retry;
  4367. }
  4368. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4369. if (rc == -ERESTARTSYS) {
  4370. QETH_DBF_TEXT(SETUP, 2, "break3");
  4371. return rc;
  4372. } else if (rc) {
  4373. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4374. if (--retries < 0)
  4375. goto out;
  4376. else
  4377. goto retry;
  4378. }
  4379. card->read_or_write_problem = 0;
  4380. rc = qeth_mpc_initialize(card);
  4381. if (rc) {
  4382. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4383. goto out;
  4384. }
  4385. card->options.ipa4.supported_funcs = 0;
  4386. card->options.adp.supported_funcs = 0;
  4387. card->info.diagass_support = 0;
  4388. qeth_query_ipassists(card, QETH_PROT_IPV4);
  4389. if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
  4390. qeth_query_setadapterparms(card);
  4391. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
  4392. qeth_query_setdiagass(card);
  4393. return 0;
  4394. out:
  4395. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4396. "an error on the device\n");
  4397. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4398. dev_name(&card->gdev->dev), rc);
  4399. return rc;
  4400. }
  4401. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4402. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4403. struct qdio_buffer_element *element,
  4404. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4405. {
  4406. struct page *page = virt_to_page(element->addr);
  4407. if (*pskb == NULL) {
  4408. if (qethbuffer->rx_skb) {
  4409. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4410. *pskb = qethbuffer->rx_skb;
  4411. qethbuffer->rx_skb = NULL;
  4412. } else {
  4413. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4414. if (!(*pskb))
  4415. return -ENOMEM;
  4416. }
  4417. skb_reserve(*pskb, ETH_HLEN);
  4418. if (data_len <= QETH_RX_PULL_LEN) {
  4419. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4420. data_len);
  4421. } else {
  4422. get_page(page);
  4423. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4424. element->addr + offset, QETH_RX_PULL_LEN);
  4425. skb_fill_page_desc(*pskb, *pfrag, page,
  4426. offset + QETH_RX_PULL_LEN,
  4427. data_len - QETH_RX_PULL_LEN);
  4428. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4429. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4430. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4431. (*pfrag)++;
  4432. }
  4433. } else {
  4434. get_page(page);
  4435. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4436. (*pskb)->data_len += data_len;
  4437. (*pskb)->len += data_len;
  4438. (*pskb)->truesize += data_len;
  4439. (*pfrag)++;
  4440. }
  4441. return 0;
  4442. }
  4443. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4444. struct qeth_qdio_buffer *qethbuffer,
  4445. struct qdio_buffer_element **__element, int *__offset,
  4446. struct qeth_hdr **hdr)
  4447. {
  4448. struct qdio_buffer_element *element = *__element;
  4449. struct qdio_buffer *buffer = qethbuffer->buffer;
  4450. int offset = *__offset;
  4451. struct sk_buff *skb = NULL;
  4452. int skb_len = 0;
  4453. void *data_ptr;
  4454. int data_len;
  4455. int headroom = 0;
  4456. int use_rx_sg = 0;
  4457. int frag = 0;
  4458. /* qeth_hdr must not cross element boundaries */
  4459. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4460. if (qeth_is_last_sbale(element))
  4461. return NULL;
  4462. element++;
  4463. offset = 0;
  4464. if (element->length < sizeof(struct qeth_hdr))
  4465. return NULL;
  4466. }
  4467. *hdr = element->addr + offset;
  4468. offset += sizeof(struct qeth_hdr);
  4469. switch ((*hdr)->hdr.l2.id) {
  4470. case QETH_HEADER_TYPE_LAYER2:
  4471. skb_len = (*hdr)->hdr.l2.pkt_length;
  4472. break;
  4473. case QETH_HEADER_TYPE_LAYER3:
  4474. skb_len = (*hdr)->hdr.l3.length;
  4475. headroom = ETH_HLEN;
  4476. break;
  4477. case QETH_HEADER_TYPE_OSN:
  4478. skb_len = (*hdr)->hdr.osn.pdu_length;
  4479. headroom = sizeof(struct qeth_hdr);
  4480. break;
  4481. default:
  4482. break;
  4483. }
  4484. if (!skb_len)
  4485. return NULL;
  4486. if (((skb_len >= card->options.rx_sg_cb) &&
  4487. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4488. (!atomic_read(&card->force_alloc_skb))) ||
  4489. (card->options.cq == QETH_CQ_ENABLED)) {
  4490. use_rx_sg = 1;
  4491. } else {
  4492. skb = dev_alloc_skb(skb_len + headroom);
  4493. if (!skb)
  4494. goto no_mem;
  4495. if (headroom)
  4496. skb_reserve(skb, headroom);
  4497. }
  4498. data_ptr = element->addr + offset;
  4499. while (skb_len) {
  4500. data_len = min(skb_len, (int)(element->length - offset));
  4501. if (data_len) {
  4502. if (use_rx_sg) {
  4503. if (qeth_create_skb_frag(qethbuffer, element,
  4504. &skb, offset, &frag, data_len))
  4505. goto no_mem;
  4506. } else {
  4507. memcpy(skb_put(skb, data_len), data_ptr,
  4508. data_len);
  4509. }
  4510. }
  4511. skb_len -= data_len;
  4512. if (skb_len) {
  4513. if (qeth_is_last_sbale(element)) {
  4514. QETH_CARD_TEXT(card, 4, "unexeob");
  4515. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4516. dev_kfree_skb_any(skb);
  4517. card->stats.rx_errors++;
  4518. return NULL;
  4519. }
  4520. element++;
  4521. offset = 0;
  4522. data_ptr = element->addr;
  4523. } else {
  4524. offset += data_len;
  4525. }
  4526. }
  4527. *__element = element;
  4528. *__offset = offset;
  4529. if (use_rx_sg && card->options.performance_stats) {
  4530. card->perf_stats.sg_skbs_rx++;
  4531. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4532. }
  4533. return skb;
  4534. no_mem:
  4535. if (net_ratelimit()) {
  4536. QETH_CARD_TEXT(card, 2, "noskbmem");
  4537. }
  4538. card->stats.rx_dropped++;
  4539. return NULL;
  4540. }
  4541. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4542. static void qeth_unregister_dbf_views(void)
  4543. {
  4544. int x;
  4545. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4546. debug_unregister(qeth_dbf[x].id);
  4547. qeth_dbf[x].id = NULL;
  4548. }
  4549. }
  4550. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4551. {
  4552. char dbf_txt_buf[32];
  4553. va_list args;
  4554. if (level > id->level)
  4555. return;
  4556. va_start(args, fmt);
  4557. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4558. va_end(args);
  4559. debug_text_event(id, level, dbf_txt_buf);
  4560. }
  4561. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4562. static int qeth_register_dbf_views(void)
  4563. {
  4564. int ret;
  4565. int x;
  4566. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4567. /* register the areas */
  4568. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4569. qeth_dbf[x].pages,
  4570. qeth_dbf[x].areas,
  4571. qeth_dbf[x].len);
  4572. if (qeth_dbf[x].id == NULL) {
  4573. qeth_unregister_dbf_views();
  4574. return -ENOMEM;
  4575. }
  4576. /* register a view */
  4577. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4578. if (ret) {
  4579. qeth_unregister_dbf_views();
  4580. return ret;
  4581. }
  4582. /* set a passing level */
  4583. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4584. }
  4585. return 0;
  4586. }
  4587. int qeth_core_load_discipline(struct qeth_card *card,
  4588. enum qeth_discipline_id discipline)
  4589. {
  4590. int rc = 0;
  4591. mutex_lock(&qeth_mod_mutex);
  4592. switch (discipline) {
  4593. case QETH_DISCIPLINE_LAYER3:
  4594. card->discipline = try_then_request_module(
  4595. symbol_get(qeth_l3_discipline), "qeth_l3");
  4596. break;
  4597. case QETH_DISCIPLINE_LAYER2:
  4598. card->discipline = try_then_request_module(
  4599. symbol_get(qeth_l2_discipline), "qeth_l2");
  4600. break;
  4601. }
  4602. if (!card->discipline) {
  4603. dev_err(&card->gdev->dev, "There is no kernel module to "
  4604. "support discipline %d\n", discipline);
  4605. rc = -EINVAL;
  4606. }
  4607. mutex_unlock(&qeth_mod_mutex);
  4608. return rc;
  4609. }
  4610. void qeth_core_free_discipline(struct qeth_card *card)
  4611. {
  4612. if (card->options.layer2)
  4613. symbol_put(qeth_l2_discipline);
  4614. else
  4615. symbol_put(qeth_l3_discipline);
  4616. card->discipline = NULL;
  4617. }
  4618. static const struct device_type qeth_generic_devtype = {
  4619. .name = "qeth_generic",
  4620. .groups = qeth_generic_attr_groups,
  4621. };
  4622. static const struct device_type qeth_osn_devtype = {
  4623. .name = "qeth_osn",
  4624. .groups = qeth_osn_attr_groups,
  4625. };
  4626. #define DBF_NAME_LEN 20
  4627. struct qeth_dbf_entry {
  4628. char dbf_name[DBF_NAME_LEN];
  4629. debug_info_t *dbf_info;
  4630. struct list_head dbf_list;
  4631. };
  4632. static LIST_HEAD(qeth_dbf_list);
  4633. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4634. static debug_info_t *qeth_get_dbf_entry(char *name)
  4635. {
  4636. struct qeth_dbf_entry *entry;
  4637. debug_info_t *rc = NULL;
  4638. mutex_lock(&qeth_dbf_list_mutex);
  4639. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4640. if (strcmp(entry->dbf_name, name) == 0) {
  4641. rc = entry->dbf_info;
  4642. break;
  4643. }
  4644. }
  4645. mutex_unlock(&qeth_dbf_list_mutex);
  4646. return rc;
  4647. }
  4648. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4649. {
  4650. struct qeth_dbf_entry *new_entry;
  4651. card->debug = debug_register(name, 2, 1, 8);
  4652. if (!card->debug) {
  4653. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4654. goto err;
  4655. }
  4656. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4657. goto err_dbg;
  4658. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4659. if (!new_entry)
  4660. goto err_dbg;
  4661. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4662. new_entry->dbf_info = card->debug;
  4663. mutex_lock(&qeth_dbf_list_mutex);
  4664. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4665. mutex_unlock(&qeth_dbf_list_mutex);
  4666. return 0;
  4667. err_dbg:
  4668. debug_unregister(card->debug);
  4669. err:
  4670. return -ENOMEM;
  4671. }
  4672. static void qeth_clear_dbf_list(void)
  4673. {
  4674. struct qeth_dbf_entry *entry, *tmp;
  4675. mutex_lock(&qeth_dbf_list_mutex);
  4676. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4677. list_del(&entry->dbf_list);
  4678. debug_unregister(entry->dbf_info);
  4679. kfree(entry);
  4680. }
  4681. mutex_unlock(&qeth_dbf_list_mutex);
  4682. }
  4683. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4684. {
  4685. struct qeth_card *card;
  4686. struct device *dev;
  4687. int rc;
  4688. unsigned long flags;
  4689. char dbf_name[DBF_NAME_LEN];
  4690. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4691. dev = &gdev->dev;
  4692. if (!get_device(dev))
  4693. return -ENODEV;
  4694. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4695. card = qeth_alloc_card();
  4696. if (!card) {
  4697. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4698. rc = -ENOMEM;
  4699. goto err_dev;
  4700. }
  4701. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4702. dev_name(&gdev->dev));
  4703. card->debug = qeth_get_dbf_entry(dbf_name);
  4704. if (!card->debug) {
  4705. rc = qeth_add_dbf_entry(card, dbf_name);
  4706. if (rc)
  4707. goto err_card;
  4708. }
  4709. card->read.ccwdev = gdev->cdev[0];
  4710. card->write.ccwdev = gdev->cdev[1];
  4711. card->data.ccwdev = gdev->cdev[2];
  4712. dev_set_drvdata(&gdev->dev, card);
  4713. card->gdev = gdev;
  4714. gdev->cdev[0]->handler = qeth_irq;
  4715. gdev->cdev[1]->handler = qeth_irq;
  4716. gdev->cdev[2]->handler = qeth_irq;
  4717. rc = qeth_determine_card_type(card);
  4718. if (rc) {
  4719. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4720. goto err_card;
  4721. }
  4722. rc = qeth_setup_card(card);
  4723. if (rc) {
  4724. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4725. goto err_card;
  4726. }
  4727. if (card->info.type == QETH_CARD_TYPE_OSN)
  4728. gdev->dev.type = &qeth_osn_devtype;
  4729. else
  4730. gdev->dev.type = &qeth_generic_devtype;
  4731. switch (card->info.type) {
  4732. case QETH_CARD_TYPE_OSN:
  4733. case QETH_CARD_TYPE_OSM:
  4734. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4735. if (rc)
  4736. goto err_card;
  4737. rc = card->discipline->setup(card->gdev);
  4738. if (rc)
  4739. goto err_disc;
  4740. case QETH_CARD_TYPE_OSD:
  4741. case QETH_CARD_TYPE_OSX:
  4742. default:
  4743. break;
  4744. }
  4745. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4746. list_add_tail(&card->list, &qeth_core_card_list.list);
  4747. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4748. qeth_determine_capabilities(card);
  4749. return 0;
  4750. err_disc:
  4751. qeth_core_free_discipline(card);
  4752. err_card:
  4753. qeth_core_free_card(card);
  4754. err_dev:
  4755. put_device(dev);
  4756. return rc;
  4757. }
  4758. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4759. {
  4760. unsigned long flags;
  4761. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4762. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4763. if (card->discipline) {
  4764. card->discipline->remove(gdev);
  4765. qeth_core_free_discipline(card);
  4766. }
  4767. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4768. list_del(&card->list);
  4769. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4770. qeth_core_free_card(card);
  4771. dev_set_drvdata(&gdev->dev, NULL);
  4772. put_device(&gdev->dev);
  4773. return;
  4774. }
  4775. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4776. {
  4777. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4778. int rc = 0;
  4779. int def_discipline;
  4780. if (!card->discipline) {
  4781. if (card->info.type == QETH_CARD_TYPE_IQD)
  4782. def_discipline = QETH_DISCIPLINE_LAYER3;
  4783. else
  4784. def_discipline = QETH_DISCIPLINE_LAYER2;
  4785. rc = qeth_core_load_discipline(card, def_discipline);
  4786. if (rc)
  4787. goto err;
  4788. rc = card->discipline->setup(card->gdev);
  4789. if (rc)
  4790. goto err;
  4791. }
  4792. rc = card->discipline->set_online(gdev);
  4793. err:
  4794. return rc;
  4795. }
  4796. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  4797. {
  4798. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4799. return card->discipline->set_offline(gdev);
  4800. }
  4801. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  4802. {
  4803. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4804. if (card->discipline && card->discipline->shutdown)
  4805. card->discipline->shutdown(gdev);
  4806. }
  4807. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  4808. {
  4809. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4810. if (card->discipline && card->discipline->prepare)
  4811. return card->discipline->prepare(gdev);
  4812. return 0;
  4813. }
  4814. static void qeth_core_complete(struct ccwgroup_device *gdev)
  4815. {
  4816. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4817. if (card->discipline && card->discipline->complete)
  4818. card->discipline->complete(gdev);
  4819. }
  4820. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  4821. {
  4822. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4823. if (card->discipline && card->discipline->freeze)
  4824. return card->discipline->freeze(gdev);
  4825. return 0;
  4826. }
  4827. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  4828. {
  4829. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4830. if (card->discipline && card->discipline->thaw)
  4831. return card->discipline->thaw(gdev);
  4832. return 0;
  4833. }
  4834. static int qeth_core_restore(struct ccwgroup_device *gdev)
  4835. {
  4836. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4837. if (card->discipline && card->discipline->restore)
  4838. return card->discipline->restore(gdev);
  4839. return 0;
  4840. }
  4841. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  4842. .driver = {
  4843. .owner = THIS_MODULE,
  4844. .name = "qeth",
  4845. },
  4846. .setup = qeth_core_probe_device,
  4847. .remove = qeth_core_remove_device,
  4848. .set_online = qeth_core_set_online,
  4849. .set_offline = qeth_core_set_offline,
  4850. .shutdown = qeth_core_shutdown,
  4851. .prepare = qeth_core_prepare,
  4852. .complete = qeth_core_complete,
  4853. .freeze = qeth_core_freeze,
  4854. .thaw = qeth_core_thaw,
  4855. .restore = qeth_core_restore,
  4856. };
  4857. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  4858. const char *buf, size_t count)
  4859. {
  4860. int err;
  4861. err = ccwgroup_create_dev(qeth_core_root_dev,
  4862. &qeth_core_ccwgroup_driver, 3, buf);
  4863. return err ? err : count;
  4864. }
  4865. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  4866. static struct attribute *qeth_drv_attrs[] = {
  4867. &driver_attr_group.attr,
  4868. NULL,
  4869. };
  4870. static struct attribute_group qeth_drv_attr_group = {
  4871. .attrs = qeth_drv_attrs,
  4872. };
  4873. static const struct attribute_group *qeth_drv_attr_groups[] = {
  4874. &qeth_drv_attr_group,
  4875. NULL,
  4876. };
  4877. static struct {
  4878. const char str[ETH_GSTRING_LEN];
  4879. } qeth_ethtool_stats_keys[] = {
  4880. /* 0 */{"rx skbs"},
  4881. {"rx buffers"},
  4882. {"tx skbs"},
  4883. {"tx buffers"},
  4884. {"tx skbs no packing"},
  4885. {"tx buffers no packing"},
  4886. {"tx skbs packing"},
  4887. {"tx buffers packing"},
  4888. {"tx sg skbs"},
  4889. {"tx sg frags"},
  4890. /* 10 */{"rx sg skbs"},
  4891. {"rx sg frags"},
  4892. {"rx sg page allocs"},
  4893. {"tx large kbytes"},
  4894. {"tx large count"},
  4895. {"tx pk state ch n->p"},
  4896. {"tx pk state ch p->n"},
  4897. {"tx pk watermark low"},
  4898. {"tx pk watermark high"},
  4899. {"queue 0 buffer usage"},
  4900. /* 20 */{"queue 1 buffer usage"},
  4901. {"queue 2 buffer usage"},
  4902. {"queue 3 buffer usage"},
  4903. {"rx poll time"},
  4904. {"rx poll count"},
  4905. {"rx do_QDIO time"},
  4906. {"rx do_QDIO count"},
  4907. {"tx handler time"},
  4908. {"tx handler count"},
  4909. {"tx time"},
  4910. /* 30 */{"tx count"},
  4911. {"tx do_QDIO time"},
  4912. {"tx do_QDIO count"},
  4913. {"tx csum"},
  4914. {"tx lin"},
  4915. {"cq handler count"},
  4916. {"cq handler time"}
  4917. };
  4918. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  4919. {
  4920. switch (stringset) {
  4921. case ETH_SS_STATS:
  4922. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  4923. default:
  4924. return -EINVAL;
  4925. }
  4926. }
  4927. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  4928. void qeth_core_get_ethtool_stats(struct net_device *dev,
  4929. struct ethtool_stats *stats, u64 *data)
  4930. {
  4931. struct qeth_card *card = dev->ml_priv;
  4932. data[0] = card->stats.rx_packets -
  4933. card->perf_stats.initial_rx_packets;
  4934. data[1] = card->perf_stats.bufs_rec;
  4935. data[2] = card->stats.tx_packets -
  4936. card->perf_stats.initial_tx_packets;
  4937. data[3] = card->perf_stats.bufs_sent;
  4938. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  4939. - card->perf_stats.skbs_sent_pack;
  4940. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  4941. data[6] = card->perf_stats.skbs_sent_pack;
  4942. data[7] = card->perf_stats.bufs_sent_pack;
  4943. data[8] = card->perf_stats.sg_skbs_sent;
  4944. data[9] = card->perf_stats.sg_frags_sent;
  4945. data[10] = card->perf_stats.sg_skbs_rx;
  4946. data[11] = card->perf_stats.sg_frags_rx;
  4947. data[12] = card->perf_stats.sg_alloc_page_rx;
  4948. data[13] = (card->perf_stats.large_send_bytes >> 10);
  4949. data[14] = card->perf_stats.large_send_cnt;
  4950. data[15] = card->perf_stats.sc_dp_p;
  4951. data[16] = card->perf_stats.sc_p_dp;
  4952. data[17] = QETH_LOW_WATERMARK_PACK;
  4953. data[18] = QETH_HIGH_WATERMARK_PACK;
  4954. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  4955. data[20] = (card->qdio.no_out_queues > 1) ?
  4956. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  4957. data[21] = (card->qdio.no_out_queues > 2) ?
  4958. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  4959. data[22] = (card->qdio.no_out_queues > 3) ?
  4960. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  4961. data[23] = card->perf_stats.inbound_time;
  4962. data[24] = card->perf_stats.inbound_cnt;
  4963. data[25] = card->perf_stats.inbound_do_qdio_time;
  4964. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  4965. data[27] = card->perf_stats.outbound_handler_time;
  4966. data[28] = card->perf_stats.outbound_handler_cnt;
  4967. data[29] = card->perf_stats.outbound_time;
  4968. data[30] = card->perf_stats.outbound_cnt;
  4969. data[31] = card->perf_stats.outbound_do_qdio_time;
  4970. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  4971. data[33] = card->perf_stats.tx_csum;
  4972. data[34] = card->perf_stats.tx_lin;
  4973. data[35] = card->perf_stats.cq_cnt;
  4974. data[36] = card->perf_stats.cq_time;
  4975. }
  4976. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  4977. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  4978. {
  4979. switch (stringset) {
  4980. case ETH_SS_STATS:
  4981. memcpy(data, &qeth_ethtool_stats_keys,
  4982. sizeof(qeth_ethtool_stats_keys));
  4983. break;
  4984. default:
  4985. WARN_ON(1);
  4986. break;
  4987. }
  4988. }
  4989. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  4990. void qeth_core_get_drvinfo(struct net_device *dev,
  4991. struct ethtool_drvinfo *info)
  4992. {
  4993. struct qeth_card *card = dev->ml_priv;
  4994. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  4995. sizeof(info->driver));
  4996. strlcpy(info->version, "1.0", sizeof(info->version));
  4997. strlcpy(info->fw_version, card->info.mcl_level,
  4998. sizeof(info->fw_version));
  4999. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5000. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5001. }
  5002. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5003. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5004. struct ethtool_cmd *ecmd)
  5005. {
  5006. struct qeth_card *card = netdev->ml_priv;
  5007. enum qeth_link_types link_type;
  5008. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5009. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5010. else
  5011. link_type = card->info.link_type;
  5012. ecmd->transceiver = XCVR_INTERNAL;
  5013. ecmd->supported = SUPPORTED_Autoneg;
  5014. ecmd->advertising = ADVERTISED_Autoneg;
  5015. ecmd->duplex = DUPLEX_FULL;
  5016. ecmd->autoneg = AUTONEG_ENABLE;
  5017. switch (link_type) {
  5018. case QETH_LINK_TYPE_FAST_ETH:
  5019. case QETH_LINK_TYPE_LANE_ETH100:
  5020. ecmd->supported |= SUPPORTED_10baseT_Half |
  5021. SUPPORTED_10baseT_Full |
  5022. SUPPORTED_100baseT_Half |
  5023. SUPPORTED_100baseT_Full |
  5024. SUPPORTED_TP;
  5025. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5026. ADVERTISED_10baseT_Full |
  5027. ADVERTISED_100baseT_Half |
  5028. ADVERTISED_100baseT_Full |
  5029. ADVERTISED_TP;
  5030. ecmd->speed = SPEED_100;
  5031. ecmd->port = PORT_TP;
  5032. break;
  5033. case QETH_LINK_TYPE_GBIT_ETH:
  5034. case QETH_LINK_TYPE_LANE_ETH1000:
  5035. ecmd->supported |= SUPPORTED_10baseT_Half |
  5036. SUPPORTED_10baseT_Full |
  5037. SUPPORTED_100baseT_Half |
  5038. SUPPORTED_100baseT_Full |
  5039. SUPPORTED_1000baseT_Half |
  5040. SUPPORTED_1000baseT_Full |
  5041. SUPPORTED_FIBRE;
  5042. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5043. ADVERTISED_10baseT_Full |
  5044. ADVERTISED_100baseT_Half |
  5045. ADVERTISED_100baseT_Full |
  5046. ADVERTISED_1000baseT_Half |
  5047. ADVERTISED_1000baseT_Full |
  5048. ADVERTISED_FIBRE;
  5049. ecmd->speed = SPEED_1000;
  5050. ecmd->port = PORT_FIBRE;
  5051. break;
  5052. case QETH_LINK_TYPE_10GBIT_ETH:
  5053. ecmd->supported |= SUPPORTED_10baseT_Half |
  5054. SUPPORTED_10baseT_Full |
  5055. SUPPORTED_100baseT_Half |
  5056. SUPPORTED_100baseT_Full |
  5057. SUPPORTED_1000baseT_Half |
  5058. SUPPORTED_1000baseT_Full |
  5059. SUPPORTED_10000baseT_Full |
  5060. SUPPORTED_FIBRE;
  5061. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5062. ADVERTISED_10baseT_Full |
  5063. ADVERTISED_100baseT_Half |
  5064. ADVERTISED_100baseT_Full |
  5065. ADVERTISED_1000baseT_Half |
  5066. ADVERTISED_1000baseT_Full |
  5067. ADVERTISED_10000baseT_Full |
  5068. ADVERTISED_FIBRE;
  5069. ecmd->speed = SPEED_10000;
  5070. ecmd->port = PORT_FIBRE;
  5071. break;
  5072. default:
  5073. ecmd->supported |= SUPPORTED_10baseT_Half |
  5074. SUPPORTED_10baseT_Full |
  5075. SUPPORTED_TP;
  5076. ecmd->advertising |= ADVERTISED_10baseT_Half |
  5077. ADVERTISED_10baseT_Full |
  5078. ADVERTISED_TP;
  5079. ecmd->speed = SPEED_10;
  5080. ecmd->port = PORT_TP;
  5081. }
  5082. return 0;
  5083. }
  5084. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5085. static int __init qeth_core_init(void)
  5086. {
  5087. int rc;
  5088. pr_info("loading core functions\n");
  5089. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5090. INIT_LIST_HEAD(&qeth_dbf_list);
  5091. rwlock_init(&qeth_core_card_list.rwlock);
  5092. mutex_init(&qeth_mod_mutex);
  5093. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5094. rc = qeth_register_dbf_views();
  5095. if (rc)
  5096. goto out_err;
  5097. qeth_core_root_dev = root_device_register("qeth");
  5098. rc = PTR_RET(qeth_core_root_dev);
  5099. if (rc)
  5100. goto register_err;
  5101. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5102. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5103. if (!qeth_core_header_cache) {
  5104. rc = -ENOMEM;
  5105. goto slab_err;
  5106. }
  5107. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5108. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5109. if (!qeth_qdio_outbuf_cache) {
  5110. rc = -ENOMEM;
  5111. goto cqslab_err;
  5112. }
  5113. rc = ccw_driver_register(&qeth_ccw_driver);
  5114. if (rc)
  5115. goto ccw_err;
  5116. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5117. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5118. if (rc)
  5119. goto ccwgroup_err;
  5120. return 0;
  5121. ccwgroup_err:
  5122. ccw_driver_unregister(&qeth_ccw_driver);
  5123. ccw_err:
  5124. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5125. cqslab_err:
  5126. kmem_cache_destroy(qeth_core_header_cache);
  5127. slab_err:
  5128. root_device_unregister(qeth_core_root_dev);
  5129. register_err:
  5130. qeth_unregister_dbf_views();
  5131. out_err:
  5132. pr_err("Initializing the qeth device driver failed\n");
  5133. return rc;
  5134. }
  5135. static void __exit qeth_core_exit(void)
  5136. {
  5137. qeth_clear_dbf_list();
  5138. destroy_workqueue(qeth_wq);
  5139. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5140. ccw_driver_unregister(&qeth_ccw_driver);
  5141. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5142. kmem_cache_destroy(qeth_core_header_cache);
  5143. root_device_unregister(qeth_core_root_dev);
  5144. qeth_unregister_dbf_views();
  5145. pr_info("core functions removed\n");
  5146. }
  5147. module_init(qeth_core_init);
  5148. module_exit(qeth_core_exit);
  5149. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5150. MODULE_DESCRIPTION("qeth core functions");
  5151. MODULE_LICENSE("GPL");