intel_lvds.c 36 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool pfit_dirty;
  50. bool is_dual_link;
  51. u32 reg;
  52. struct intel_lvds_connector *attached_connector;
  53. };
  54. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  55. {
  56. return container_of(encoder, struct intel_lvds_encoder, base.base);
  57. }
  58. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  59. {
  60. return container_of(connector, struct intel_lvds_connector, base.base);
  61. }
  62. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  63. enum pipe *pipe)
  64. {
  65. struct drm_device *dev = encoder->base.dev;
  66. struct drm_i915_private *dev_priv = dev->dev_private;
  67. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  68. u32 tmp;
  69. tmp = I915_READ(lvds_encoder->reg);
  70. if (!(tmp & LVDS_PORT_EN))
  71. return false;
  72. if (HAS_PCH_CPT(dev))
  73. *pipe = PORT_TO_PIPE_CPT(tmp);
  74. else
  75. *pipe = PORT_TO_PIPE(tmp);
  76. return true;
  77. }
  78. /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  79. * This is an exception to the general rule that mode_set doesn't turn
  80. * things on.
  81. */
  82. static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  83. {
  84. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  85. struct drm_device *dev = encoder->base.dev;
  86. struct drm_i915_private *dev_priv = dev->dev_private;
  87. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  88. struct drm_display_mode *fixed_mode =
  89. lvds_encoder->attached_connector->base.panel.fixed_mode;
  90. int pipe = intel_crtc->pipe;
  91. u32 temp;
  92. temp = I915_READ(lvds_encoder->reg);
  93. temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
  94. if (HAS_PCH_CPT(dev)) {
  95. temp &= ~PORT_TRANS_SEL_MASK;
  96. temp |= PORT_TRANS_SEL_CPT(pipe);
  97. } else {
  98. if (pipe == 1) {
  99. temp |= LVDS_PIPEB_SELECT;
  100. } else {
  101. temp &= ~LVDS_PIPEB_SELECT;
  102. }
  103. }
  104. /* set the corresponsding LVDS_BORDER bit */
  105. temp |= dev_priv->lvds_border_bits;
  106. /* Set the B0-B3 data pairs corresponding to whether we're going to
  107. * set the DPLLs for dual-channel mode or not.
  108. */
  109. if (lvds_encoder->is_dual_link)
  110. temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
  111. else
  112. temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
  113. /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
  114. * appropriately here, but we need to look more thoroughly into how
  115. * panels behave in the two modes.
  116. */
  117. /* Set the dithering flag on LVDS as needed, note that there is no
  118. * special lvds dither control bit on pch-split platforms, dithering is
  119. * only controlled through the PIPECONF reg. */
  120. if (INTEL_INFO(dev)->gen == 4) {
  121. if (dev_priv->lvds_dither)
  122. temp |= LVDS_ENABLE_DITHER;
  123. else
  124. temp &= ~LVDS_ENABLE_DITHER;
  125. }
  126. temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
  127. if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
  128. temp |= LVDS_HSYNC_POLARITY;
  129. if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
  130. temp |= LVDS_VSYNC_POLARITY;
  131. I915_WRITE(lvds_encoder->reg, temp);
  132. }
  133. /**
  134. * Sets the power state for the panel.
  135. */
  136. static void intel_enable_lvds(struct intel_encoder *encoder)
  137. {
  138. struct drm_device *dev = encoder->base.dev;
  139. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  140. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  141. struct drm_i915_private *dev_priv = dev->dev_private;
  142. u32 ctl_reg, stat_reg;
  143. if (HAS_PCH_SPLIT(dev)) {
  144. ctl_reg = PCH_PP_CONTROL;
  145. stat_reg = PCH_PP_STATUS;
  146. } else {
  147. ctl_reg = PP_CONTROL;
  148. stat_reg = PP_STATUS;
  149. }
  150. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
  151. if (lvds_encoder->pfit_dirty) {
  152. /*
  153. * Enable automatic panel scaling so that non-native modes
  154. * fill the screen. The panel fitter should only be
  155. * adjusted whilst the pipe is disabled, according to
  156. * register description and PRM.
  157. */
  158. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  159. lvds_encoder->pfit_control,
  160. lvds_encoder->pfit_pgm_ratios);
  161. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  162. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  163. lvds_encoder->pfit_dirty = false;
  164. }
  165. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  166. POSTING_READ(lvds_encoder->reg);
  167. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  168. DRM_ERROR("timed out waiting for panel to power on\n");
  169. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  170. }
  171. static void intel_disable_lvds(struct intel_encoder *encoder)
  172. {
  173. struct drm_device *dev = encoder->base.dev;
  174. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  175. struct drm_i915_private *dev_priv = dev->dev_private;
  176. u32 ctl_reg, stat_reg;
  177. if (HAS_PCH_SPLIT(dev)) {
  178. ctl_reg = PCH_PP_CONTROL;
  179. stat_reg = PCH_PP_STATUS;
  180. } else {
  181. ctl_reg = PP_CONTROL;
  182. stat_reg = PP_STATUS;
  183. }
  184. intel_panel_disable_backlight(dev);
  185. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  186. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  187. DRM_ERROR("timed out waiting for panel to power off\n");
  188. if (lvds_encoder->pfit_control) {
  189. I915_WRITE(PFIT_CONTROL, 0);
  190. lvds_encoder->pfit_dirty = true;
  191. }
  192. I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
  193. POSTING_READ(lvds_encoder->reg);
  194. }
  195. static int intel_lvds_mode_valid(struct drm_connector *connector,
  196. struct drm_display_mode *mode)
  197. {
  198. struct intel_connector *intel_connector = to_intel_connector(connector);
  199. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  200. if (mode->hdisplay > fixed_mode->hdisplay)
  201. return MODE_PANEL;
  202. if (mode->vdisplay > fixed_mode->vdisplay)
  203. return MODE_PANEL;
  204. return MODE_OK;
  205. }
  206. static void
  207. centre_horizontally(struct drm_display_mode *mode,
  208. int width)
  209. {
  210. u32 border, sync_pos, blank_width, sync_width;
  211. /* keep the hsync and hblank widths constant */
  212. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  213. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  214. sync_pos = (blank_width - sync_width + 1) / 2;
  215. border = (mode->hdisplay - width + 1) / 2;
  216. border += border & 1; /* make the border even */
  217. mode->crtc_hdisplay = width;
  218. mode->crtc_hblank_start = width + border;
  219. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  220. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  221. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  222. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  223. }
  224. static void
  225. centre_vertically(struct drm_display_mode *mode,
  226. int height)
  227. {
  228. u32 border, sync_pos, blank_width, sync_width;
  229. /* keep the vsync and vblank widths constant */
  230. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  231. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  232. sync_pos = (blank_width - sync_width + 1) / 2;
  233. border = (mode->vdisplay - height + 1) / 2;
  234. mode->crtc_vdisplay = height;
  235. mode->crtc_vblank_start = height + border;
  236. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  237. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  238. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  239. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  240. }
  241. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  242. {
  243. /*
  244. * Floating point operation is not supported. So the FACTOR
  245. * is defined, which can avoid the floating point computation
  246. * when calculating the panel ratio.
  247. */
  248. #define ACCURACY 12
  249. #define FACTOR (1 << ACCURACY)
  250. u32 ratio = source * FACTOR / target;
  251. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  252. }
  253. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  254. const struct drm_display_mode *mode,
  255. struct drm_display_mode *adjusted_mode)
  256. {
  257. struct drm_device *dev = encoder->dev;
  258. struct drm_i915_private *dev_priv = dev->dev_private;
  259. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  260. struct intel_connector *intel_connector =
  261. &lvds_encoder->attached_connector->base;
  262. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  263. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  264. int pipe;
  265. /* Should never happen!! */
  266. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  267. DRM_ERROR("Can't support LVDS on pipe A\n");
  268. return false;
  269. }
  270. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  271. return false;
  272. /*
  273. * We have timings from the BIOS for the panel, put them in
  274. * to the adjusted mode. The CRTC will be set up for this mode,
  275. * with the panel scaling set up to source from the H/VDisplay
  276. * of the original mode.
  277. */
  278. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  279. adjusted_mode);
  280. if (HAS_PCH_SPLIT(dev)) {
  281. intel_pch_panel_fitting(dev,
  282. intel_connector->panel.fitting_mode,
  283. mode, adjusted_mode);
  284. return true;
  285. }
  286. /* Native modes don't need fitting */
  287. if (adjusted_mode->hdisplay == mode->hdisplay &&
  288. adjusted_mode->vdisplay == mode->vdisplay)
  289. goto out;
  290. /* 965+ wants fuzzy fitting */
  291. if (INTEL_INFO(dev)->gen >= 4)
  292. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  293. PFIT_FILTER_FUZZY);
  294. /*
  295. * Enable automatic panel scaling for non-native modes so that they fill
  296. * the screen. Should be enabled before the pipe is enabled, according
  297. * to register description and PRM.
  298. * Change the value here to see the borders for debugging
  299. */
  300. for_each_pipe(pipe)
  301. I915_WRITE(BCLRPAT(pipe), 0);
  302. drm_mode_set_crtcinfo(adjusted_mode, 0);
  303. switch (intel_connector->panel.fitting_mode) {
  304. case DRM_MODE_SCALE_CENTER:
  305. /*
  306. * For centered modes, we have to calculate border widths &
  307. * heights and modify the values programmed into the CRTC.
  308. */
  309. centre_horizontally(adjusted_mode, mode->hdisplay);
  310. centre_vertically(adjusted_mode, mode->vdisplay);
  311. border = LVDS_BORDER_ENABLE;
  312. break;
  313. case DRM_MODE_SCALE_ASPECT:
  314. /* Scale but preserve the aspect ratio */
  315. if (INTEL_INFO(dev)->gen >= 4) {
  316. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  317. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  318. /* 965+ is easy, it does everything in hw */
  319. if (scaled_width > scaled_height)
  320. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  321. else if (scaled_width < scaled_height)
  322. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  323. else if (adjusted_mode->hdisplay != mode->hdisplay)
  324. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  325. } else {
  326. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  327. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  328. /*
  329. * For earlier chips we have to calculate the scaling
  330. * ratio by hand and program it into the
  331. * PFIT_PGM_RATIO register
  332. */
  333. if (scaled_width > scaled_height) { /* pillar */
  334. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  335. border = LVDS_BORDER_ENABLE;
  336. if (mode->vdisplay != adjusted_mode->vdisplay) {
  337. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  338. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  339. bits << PFIT_VERT_SCALE_SHIFT);
  340. pfit_control |= (PFIT_ENABLE |
  341. VERT_INTERP_BILINEAR |
  342. HORIZ_INTERP_BILINEAR);
  343. }
  344. } else if (scaled_width < scaled_height) { /* letter */
  345. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  346. border = LVDS_BORDER_ENABLE;
  347. if (mode->hdisplay != adjusted_mode->hdisplay) {
  348. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  349. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  350. bits << PFIT_VERT_SCALE_SHIFT);
  351. pfit_control |= (PFIT_ENABLE |
  352. VERT_INTERP_BILINEAR |
  353. HORIZ_INTERP_BILINEAR);
  354. }
  355. } else
  356. /* Aspects match, Let hw scale both directions */
  357. pfit_control |= (PFIT_ENABLE |
  358. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  359. VERT_INTERP_BILINEAR |
  360. HORIZ_INTERP_BILINEAR);
  361. }
  362. break;
  363. case DRM_MODE_SCALE_FULLSCREEN:
  364. /*
  365. * Full scaling, even if it changes the aspect ratio.
  366. * Fortunately this is all done for us in hw.
  367. */
  368. if (mode->vdisplay != adjusted_mode->vdisplay ||
  369. mode->hdisplay != adjusted_mode->hdisplay) {
  370. pfit_control |= PFIT_ENABLE;
  371. if (INTEL_INFO(dev)->gen >= 4)
  372. pfit_control |= PFIT_SCALING_AUTO;
  373. else
  374. pfit_control |= (VERT_AUTO_SCALE |
  375. VERT_INTERP_BILINEAR |
  376. HORIZ_AUTO_SCALE |
  377. HORIZ_INTERP_BILINEAR);
  378. }
  379. break;
  380. default:
  381. break;
  382. }
  383. out:
  384. /* If not enabling scaling, be consistent and always use 0. */
  385. if ((pfit_control & PFIT_ENABLE) == 0) {
  386. pfit_control = 0;
  387. pfit_pgm_ratios = 0;
  388. }
  389. /* Make sure pre-965 set dither correctly */
  390. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  391. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  392. if (pfit_control != lvds_encoder->pfit_control ||
  393. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  394. lvds_encoder->pfit_control = pfit_control;
  395. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  396. lvds_encoder->pfit_dirty = true;
  397. }
  398. dev_priv->lvds_border_bits = border;
  399. /*
  400. * XXX: It would be nice to support lower refresh rates on the
  401. * panels to reduce power consumption, and perhaps match the
  402. * user's requested refresh rate.
  403. */
  404. return true;
  405. }
  406. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  407. struct drm_display_mode *mode,
  408. struct drm_display_mode *adjusted_mode)
  409. {
  410. /*
  411. * The LVDS pin pair will already have been turned on in the
  412. * intel_crtc_mode_set since it has a large impact on the DPLL
  413. * settings.
  414. */
  415. }
  416. /**
  417. * Detect the LVDS connection.
  418. *
  419. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  420. * connected and closed means disconnected. We also send hotplug events as
  421. * needed, using lid status notification from the input layer.
  422. */
  423. static enum drm_connector_status
  424. intel_lvds_detect(struct drm_connector *connector, bool force)
  425. {
  426. struct drm_device *dev = connector->dev;
  427. enum drm_connector_status status;
  428. status = intel_panel_detect(dev);
  429. if (status != connector_status_unknown)
  430. return status;
  431. return connector_status_connected;
  432. }
  433. /**
  434. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  435. */
  436. static int intel_lvds_get_modes(struct drm_connector *connector)
  437. {
  438. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  439. struct drm_device *dev = connector->dev;
  440. struct drm_display_mode *mode;
  441. /* use cached edid if we have one */
  442. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  443. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  444. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  445. if (mode == NULL)
  446. return 0;
  447. drm_mode_probed_add(connector, mode);
  448. return 1;
  449. }
  450. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  451. {
  452. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  453. return 1;
  454. }
  455. /* The GPU hangs up on these systems if modeset is performed on LID open */
  456. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  457. {
  458. .callback = intel_no_modeset_on_lid_dmi_callback,
  459. .ident = "Toshiba Tecra A11",
  460. .matches = {
  461. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  462. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  463. },
  464. },
  465. { } /* terminating entry */
  466. };
  467. /*
  468. * Lid events. Note the use of 'modeset_on_lid':
  469. * - we set it on lid close, and reset it on open
  470. * - we use it as a "only once" bit (ie we ignore
  471. * duplicate events where it was already properly
  472. * set/reset)
  473. * - the suspend/resume paths will also set it to
  474. * zero, since they restore the mode ("lid open").
  475. */
  476. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  477. void *unused)
  478. {
  479. struct intel_lvds_connector *lvds_connector =
  480. container_of(nb, struct intel_lvds_connector, lid_notifier);
  481. struct drm_connector *connector = &lvds_connector->base.base;
  482. struct drm_device *dev = connector->dev;
  483. struct drm_i915_private *dev_priv = dev->dev_private;
  484. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  485. return NOTIFY_OK;
  486. /*
  487. * check and update the status of LVDS connector after receiving
  488. * the LID nofication event.
  489. */
  490. connector->status = connector->funcs->detect(connector, false);
  491. /* Don't force modeset on machines where it causes a GPU lockup */
  492. if (dmi_check_system(intel_no_modeset_on_lid))
  493. return NOTIFY_OK;
  494. if (!acpi_lid_open()) {
  495. dev_priv->modeset_on_lid = 1;
  496. return NOTIFY_OK;
  497. }
  498. if (!dev_priv->modeset_on_lid)
  499. return NOTIFY_OK;
  500. dev_priv->modeset_on_lid = 0;
  501. drm_modeset_lock_all(dev);
  502. intel_modeset_setup_hw_state(dev, true);
  503. drm_modeset_unlock_all(dev);
  504. return NOTIFY_OK;
  505. }
  506. /**
  507. * intel_lvds_destroy - unregister and free LVDS structures
  508. * @connector: connector to free
  509. *
  510. * Unregister the DDC bus for this connector then free the driver private
  511. * structure.
  512. */
  513. static void intel_lvds_destroy(struct drm_connector *connector)
  514. {
  515. struct intel_lvds_connector *lvds_connector =
  516. to_lvds_connector(connector);
  517. if (lvds_connector->lid_notifier.notifier_call)
  518. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  519. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  520. kfree(lvds_connector->base.edid);
  521. intel_panel_destroy_backlight(connector->dev);
  522. intel_panel_fini(&lvds_connector->base.panel);
  523. drm_sysfs_connector_remove(connector);
  524. drm_connector_cleanup(connector);
  525. kfree(connector);
  526. }
  527. static int intel_lvds_set_property(struct drm_connector *connector,
  528. struct drm_property *property,
  529. uint64_t value)
  530. {
  531. struct intel_connector *intel_connector = to_intel_connector(connector);
  532. struct drm_device *dev = connector->dev;
  533. if (property == dev->mode_config.scaling_mode_property) {
  534. struct drm_crtc *crtc;
  535. if (value == DRM_MODE_SCALE_NONE) {
  536. DRM_DEBUG_KMS("no scaling not supported\n");
  537. return -EINVAL;
  538. }
  539. if (intel_connector->panel.fitting_mode == value) {
  540. /* the LVDS scaling property is not changed */
  541. return 0;
  542. }
  543. intel_connector->panel.fitting_mode = value;
  544. crtc = intel_attached_encoder(connector)->base.crtc;
  545. if (crtc && crtc->enabled) {
  546. /*
  547. * If the CRTC is enabled, the display will be changed
  548. * according to the new panel fitting mode.
  549. */
  550. intel_crtc_restore_mode(crtc);
  551. }
  552. }
  553. return 0;
  554. }
  555. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  556. .mode_fixup = intel_lvds_mode_fixup,
  557. .mode_set = intel_lvds_mode_set,
  558. .disable = intel_encoder_noop,
  559. };
  560. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  561. .get_modes = intel_lvds_get_modes,
  562. .mode_valid = intel_lvds_mode_valid,
  563. .best_encoder = intel_best_encoder,
  564. };
  565. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  566. .dpms = intel_connector_dpms,
  567. .detect = intel_lvds_detect,
  568. .fill_modes = drm_helper_probe_single_connector_modes,
  569. .set_property = intel_lvds_set_property,
  570. .destroy = intel_lvds_destroy,
  571. };
  572. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  573. .destroy = intel_encoder_destroy,
  574. };
  575. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  576. {
  577. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  578. return 1;
  579. }
  580. /* These systems claim to have LVDS, but really don't */
  581. static const struct dmi_system_id intel_no_lvds[] = {
  582. {
  583. .callback = intel_no_lvds_dmi_callback,
  584. .ident = "Apple Mac Mini (Core series)",
  585. .matches = {
  586. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  587. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  588. },
  589. },
  590. {
  591. .callback = intel_no_lvds_dmi_callback,
  592. .ident = "Apple Mac Mini (Core 2 series)",
  593. .matches = {
  594. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  595. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  596. },
  597. },
  598. {
  599. .callback = intel_no_lvds_dmi_callback,
  600. .ident = "MSI IM-945GSE-A",
  601. .matches = {
  602. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  603. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  604. },
  605. },
  606. {
  607. .callback = intel_no_lvds_dmi_callback,
  608. .ident = "Dell Studio Hybrid",
  609. .matches = {
  610. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  611. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  612. },
  613. },
  614. {
  615. .callback = intel_no_lvds_dmi_callback,
  616. .ident = "Dell OptiPlex FX170",
  617. .matches = {
  618. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  619. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  620. },
  621. },
  622. {
  623. .callback = intel_no_lvds_dmi_callback,
  624. .ident = "AOpen Mini PC",
  625. .matches = {
  626. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  627. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  628. },
  629. },
  630. {
  631. .callback = intel_no_lvds_dmi_callback,
  632. .ident = "AOpen Mini PC MP915",
  633. .matches = {
  634. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  635. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  636. },
  637. },
  638. {
  639. .callback = intel_no_lvds_dmi_callback,
  640. .ident = "AOpen i915GMm-HFS",
  641. .matches = {
  642. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  643. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  644. },
  645. },
  646. {
  647. .callback = intel_no_lvds_dmi_callback,
  648. .ident = "AOpen i45GMx-I",
  649. .matches = {
  650. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  651. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  652. },
  653. },
  654. {
  655. .callback = intel_no_lvds_dmi_callback,
  656. .ident = "Aopen i945GTt-VFA",
  657. .matches = {
  658. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  659. },
  660. },
  661. {
  662. .callback = intel_no_lvds_dmi_callback,
  663. .ident = "Clientron U800",
  664. .matches = {
  665. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  666. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  667. },
  668. },
  669. {
  670. .callback = intel_no_lvds_dmi_callback,
  671. .ident = "Clientron E830",
  672. .matches = {
  673. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  674. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  675. },
  676. },
  677. {
  678. .callback = intel_no_lvds_dmi_callback,
  679. .ident = "Asus EeeBox PC EB1007",
  680. .matches = {
  681. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  682. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  683. },
  684. },
  685. {
  686. .callback = intel_no_lvds_dmi_callback,
  687. .ident = "Asus AT5NM10T-I",
  688. .matches = {
  689. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  690. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  691. },
  692. },
  693. {
  694. .callback = intel_no_lvds_dmi_callback,
  695. .ident = "Hewlett-Packard HP t5740e Thin Client",
  696. .matches = {
  697. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  698. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  699. },
  700. },
  701. {
  702. .callback = intel_no_lvds_dmi_callback,
  703. .ident = "Hewlett-Packard t5745",
  704. .matches = {
  705. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  706. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  707. },
  708. },
  709. {
  710. .callback = intel_no_lvds_dmi_callback,
  711. .ident = "Hewlett-Packard st5747",
  712. .matches = {
  713. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  714. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  715. },
  716. },
  717. {
  718. .callback = intel_no_lvds_dmi_callback,
  719. .ident = "MSI Wind Box DC500",
  720. .matches = {
  721. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  722. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  723. },
  724. },
  725. {
  726. .callback = intel_no_lvds_dmi_callback,
  727. .ident = "Gigabyte GA-D525TUD",
  728. .matches = {
  729. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  730. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  731. },
  732. },
  733. {
  734. .callback = intel_no_lvds_dmi_callback,
  735. .ident = "Supermicro X7SPA-H",
  736. .matches = {
  737. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  738. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  739. },
  740. },
  741. { } /* terminating entry */
  742. };
  743. /**
  744. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  745. * @dev: drm device
  746. * @connector: LVDS connector
  747. *
  748. * Find the reduced downclock for LVDS in EDID.
  749. */
  750. static void intel_find_lvds_downclock(struct drm_device *dev,
  751. struct drm_display_mode *fixed_mode,
  752. struct drm_connector *connector)
  753. {
  754. struct drm_i915_private *dev_priv = dev->dev_private;
  755. struct drm_display_mode *scan;
  756. int temp_downclock;
  757. temp_downclock = fixed_mode->clock;
  758. list_for_each_entry(scan, &connector->probed_modes, head) {
  759. /*
  760. * If one mode has the same resolution with the fixed_panel
  761. * mode while they have the different refresh rate, it means
  762. * that the reduced downclock is found for the LVDS. In such
  763. * case we can set the different FPx0/1 to dynamically select
  764. * between low and high frequency.
  765. */
  766. if (scan->hdisplay == fixed_mode->hdisplay &&
  767. scan->hsync_start == fixed_mode->hsync_start &&
  768. scan->hsync_end == fixed_mode->hsync_end &&
  769. scan->htotal == fixed_mode->htotal &&
  770. scan->vdisplay == fixed_mode->vdisplay &&
  771. scan->vsync_start == fixed_mode->vsync_start &&
  772. scan->vsync_end == fixed_mode->vsync_end &&
  773. scan->vtotal == fixed_mode->vtotal) {
  774. if (scan->clock < temp_downclock) {
  775. /*
  776. * The downclock is already found. But we
  777. * expect to find the lower downclock.
  778. */
  779. temp_downclock = scan->clock;
  780. }
  781. }
  782. }
  783. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  784. /* We found the downclock for LVDS. */
  785. dev_priv->lvds_downclock_avail = 1;
  786. dev_priv->lvds_downclock = temp_downclock;
  787. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  788. "Normal clock %dKhz, downclock %dKhz\n",
  789. fixed_mode->clock, temp_downclock);
  790. }
  791. }
  792. /*
  793. * Enumerate the child dev array parsed from VBT to check whether
  794. * the LVDS is present.
  795. * If it is present, return 1.
  796. * If it is not present, return false.
  797. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  798. */
  799. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  800. u8 *i2c_pin)
  801. {
  802. struct drm_i915_private *dev_priv = dev->dev_private;
  803. int i;
  804. if (!dev_priv->child_dev_num)
  805. return true;
  806. for (i = 0; i < dev_priv->child_dev_num; i++) {
  807. struct child_device_config *child = dev_priv->child_dev + i;
  808. /* If the device type is not LFP, continue.
  809. * We have to check both the new identifiers as well as the
  810. * old for compatibility with some BIOSes.
  811. */
  812. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  813. child->device_type != DEVICE_TYPE_LFP)
  814. continue;
  815. if (intel_gmbus_is_port_valid(child->i2c_pin))
  816. *i2c_pin = child->i2c_pin;
  817. /* However, we cannot trust the BIOS writers to populate
  818. * the VBT correctly. Since LVDS requires additional
  819. * information from AIM blocks, a non-zero addin offset is
  820. * a good indicator that the LVDS is actually present.
  821. */
  822. if (child->addin_offset)
  823. return true;
  824. /* But even then some BIOS writers perform some black magic
  825. * and instantiate the device without reference to any
  826. * additional data. Trust that if the VBT was written into
  827. * the OpRegion then they have validated the LVDS's existence.
  828. */
  829. if (dev_priv->opregion.vbt)
  830. return true;
  831. }
  832. return false;
  833. }
  834. static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
  835. {
  836. DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
  837. return 1;
  838. }
  839. static const struct dmi_system_id intel_dual_link_lvds[] = {
  840. {
  841. .callback = intel_dual_link_lvds_callback,
  842. .ident = "Apple MacBook Pro (Core i5/i7 Series)",
  843. .matches = {
  844. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  845. DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
  846. },
  847. },
  848. { } /* terminating entry */
  849. };
  850. bool intel_is_dual_link_lvds(struct drm_device *dev)
  851. {
  852. struct intel_encoder *encoder;
  853. struct intel_lvds_encoder *lvds_encoder;
  854. list_for_each_entry(encoder, &dev->mode_config.encoder_list,
  855. base.head) {
  856. if (encoder->type == INTEL_OUTPUT_LVDS) {
  857. lvds_encoder = to_lvds_encoder(&encoder->base);
  858. return lvds_encoder->is_dual_link;
  859. }
  860. }
  861. return false;
  862. }
  863. static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
  864. {
  865. struct drm_device *dev = lvds_encoder->base.base.dev;
  866. unsigned int val;
  867. struct drm_i915_private *dev_priv = dev->dev_private;
  868. /* use the module option value if specified */
  869. if (i915_lvds_channel_mode > 0)
  870. return i915_lvds_channel_mode == 2;
  871. if (dmi_check_system(intel_dual_link_lvds))
  872. return true;
  873. /* BIOS should set the proper LVDS register value at boot, but
  874. * in reality, it doesn't set the value when the lid is closed;
  875. * we need to check "the value to be set" in VBT when LVDS
  876. * register is uninitialized.
  877. */
  878. val = I915_READ(lvds_encoder->reg);
  879. if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
  880. val = dev_priv->bios_lvds_val;
  881. return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
  882. }
  883. static bool intel_lvds_supported(struct drm_device *dev)
  884. {
  885. /* With the introduction of the PCH we gained a dedicated
  886. * LVDS presence pin, use it. */
  887. if (HAS_PCH_SPLIT(dev))
  888. return true;
  889. /* Otherwise LVDS was only attached to mobile products,
  890. * except for the inglorious 830gm */
  891. return IS_MOBILE(dev) && !IS_I830(dev);
  892. }
  893. /**
  894. * intel_lvds_init - setup LVDS connectors on this device
  895. * @dev: drm device
  896. *
  897. * Create the connector, register the LVDS DDC bus, and try to figure out what
  898. * modes we can display on the LVDS panel (if present).
  899. */
  900. bool intel_lvds_init(struct drm_device *dev)
  901. {
  902. struct drm_i915_private *dev_priv = dev->dev_private;
  903. struct intel_lvds_encoder *lvds_encoder;
  904. struct intel_encoder *intel_encoder;
  905. struct intel_lvds_connector *lvds_connector;
  906. struct intel_connector *intel_connector;
  907. struct drm_connector *connector;
  908. struct drm_encoder *encoder;
  909. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  910. struct drm_display_mode *fixed_mode = NULL;
  911. struct edid *edid;
  912. struct drm_crtc *crtc;
  913. u32 lvds;
  914. int pipe;
  915. u8 pin;
  916. if (!intel_lvds_supported(dev))
  917. return false;
  918. /* Skip init on machines we know falsely report LVDS */
  919. if (dmi_check_system(intel_no_lvds))
  920. return false;
  921. pin = GMBUS_PORT_PANEL;
  922. if (!lvds_is_present_in_vbt(dev, &pin)) {
  923. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  924. return false;
  925. }
  926. if (HAS_PCH_SPLIT(dev)) {
  927. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  928. return false;
  929. if (dev_priv->edp.support) {
  930. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  931. return false;
  932. }
  933. }
  934. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  935. if (!lvds_encoder)
  936. return false;
  937. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  938. if (!lvds_connector) {
  939. kfree(lvds_encoder);
  940. return false;
  941. }
  942. lvds_encoder->attached_connector = lvds_connector;
  943. if (!HAS_PCH_SPLIT(dev)) {
  944. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  945. }
  946. intel_encoder = &lvds_encoder->base;
  947. encoder = &intel_encoder->base;
  948. intel_connector = &lvds_connector->base;
  949. connector = &intel_connector->base;
  950. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  951. DRM_MODE_CONNECTOR_LVDS);
  952. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  953. DRM_MODE_ENCODER_LVDS);
  954. intel_encoder->enable = intel_enable_lvds;
  955. intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
  956. intel_encoder->disable = intel_disable_lvds;
  957. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  958. intel_connector->get_hw_state = intel_connector_get_hw_state;
  959. intel_connector_attach_encoder(intel_connector, intel_encoder);
  960. intel_encoder->type = INTEL_OUTPUT_LVDS;
  961. intel_encoder->cloneable = false;
  962. if (HAS_PCH_SPLIT(dev))
  963. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  964. else if (IS_GEN4(dev))
  965. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  966. else
  967. intel_encoder->crtc_mask = (1 << 1);
  968. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  969. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  970. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  971. connector->interlace_allowed = false;
  972. connector->doublescan_allowed = false;
  973. if (HAS_PCH_SPLIT(dev)) {
  974. lvds_encoder->reg = PCH_LVDS;
  975. } else {
  976. lvds_encoder->reg = LVDS;
  977. }
  978. /* create the scaling mode property */
  979. drm_mode_create_scaling_mode_property(dev);
  980. drm_object_attach_property(&connector->base,
  981. dev->mode_config.scaling_mode_property,
  982. DRM_MODE_SCALE_ASPECT);
  983. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  984. /*
  985. * LVDS discovery:
  986. * 1) check for EDID on DDC
  987. * 2) check for VBT data
  988. * 3) check to see if LVDS is already on
  989. * if none of the above, no panel
  990. * 4) make sure lid is open
  991. * if closed, act like it's not there for now
  992. */
  993. /*
  994. * Attempt to get the fixed panel mode from DDC. Assume that the
  995. * preferred mode is the right one.
  996. */
  997. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  998. if (edid) {
  999. if (drm_add_edid_modes(connector, edid)) {
  1000. drm_mode_connector_update_edid_property(connector,
  1001. edid);
  1002. } else {
  1003. kfree(edid);
  1004. edid = ERR_PTR(-EINVAL);
  1005. }
  1006. } else {
  1007. edid = ERR_PTR(-ENOENT);
  1008. }
  1009. lvds_connector->base.edid = edid;
  1010. if (IS_ERR_OR_NULL(edid)) {
  1011. /* Didn't get an EDID, so
  1012. * Set wide sync ranges so we get all modes
  1013. * handed to valid_mode for checking
  1014. */
  1015. connector->display_info.min_vfreq = 0;
  1016. connector->display_info.max_vfreq = 200;
  1017. connector->display_info.min_hfreq = 0;
  1018. connector->display_info.max_hfreq = 200;
  1019. }
  1020. list_for_each_entry(scan, &connector->probed_modes, head) {
  1021. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  1022. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  1023. drm_mode_debug_printmodeline(scan);
  1024. fixed_mode = drm_mode_duplicate(dev, scan);
  1025. if (fixed_mode) {
  1026. intel_find_lvds_downclock(dev, fixed_mode,
  1027. connector);
  1028. goto out;
  1029. }
  1030. }
  1031. }
  1032. /* Failed to get EDID, what about VBT? */
  1033. if (dev_priv->lfp_lvds_vbt_mode) {
  1034. DRM_DEBUG_KMS("using mode from VBT: ");
  1035. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  1036. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  1037. if (fixed_mode) {
  1038. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1039. goto out;
  1040. }
  1041. }
  1042. /*
  1043. * If we didn't get EDID, try checking if the panel is already turned
  1044. * on. If so, assume that whatever is currently programmed is the
  1045. * correct mode.
  1046. */
  1047. /* Ironlake: FIXME if still fail, not try pipe mode now */
  1048. if (HAS_PCH_SPLIT(dev))
  1049. goto failed;
  1050. lvds = I915_READ(LVDS);
  1051. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  1052. crtc = intel_get_crtc_for_pipe(dev, pipe);
  1053. if (crtc && (lvds & LVDS_PORT_EN)) {
  1054. fixed_mode = intel_crtc_mode_get(dev, crtc);
  1055. if (fixed_mode) {
  1056. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  1057. drm_mode_debug_printmodeline(fixed_mode);
  1058. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  1059. goto out;
  1060. }
  1061. }
  1062. /* If we still don't have a mode after all that, give up. */
  1063. if (!fixed_mode)
  1064. goto failed;
  1065. out:
  1066. lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
  1067. DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
  1068. lvds_encoder->is_dual_link ? "dual" : "single");
  1069. /*
  1070. * Unlock registers and just
  1071. * leave them unlocked
  1072. */
  1073. if (HAS_PCH_SPLIT(dev)) {
  1074. I915_WRITE(PCH_PP_CONTROL,
  1075. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  1076. } else {
  1077. I915_WRITE(PP_CONTROL,
  1078. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  1079. }
  1080. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  1081. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  1082. DRM_DEBUG_KMS("lid notifier registration failed\n");
  1083. lvds_connector->lid_notifier.notifier_call = NULL;
  1084. }
  1085. drm_sysfs_connector_add(connector);
  1086. intel_panel_init(&intel_connector->panel, fixed_mode);
  1087. intel_panel_setup_backlight(connector);
  1088. return true;
  1089. failed:
  1090. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  1091. drm_connector_cleanup(connector);
  1092. drm_encoder_cleanup(encoder);
  1093. if (fixed_mode)
  1094. drm_mode_destroy(dev, fixed_mode);
  1095. kfree(lvds_encoder);
  1096. kfree(lvds_connector);
  1097. return false;
  1098. }