taishan.dts 8.9 KB

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  1. /*
  2. * Device Tree Source for IBM/AMCC Taishan
  3. *
  4. * Copyright 2007 IBM Corp.
  5. * Hugh Blemings <hugh@au.ibm.com> based off code by
  6. * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without
  10. * any warranty of any kind, whether express or implied.
  11. */
  12. / {
  13. #address-cells = <2>;
  14. #size-cells = <1>;
  15. model = "amcc,taishan";
  16. compatible = "amcc,taishan";
  17. dcr-parent = <&/cpus/cpu@0>;
  18. cpus {
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. cpu@0 {
  22. device_type = "cpu";
  23. model = "PowerPC,440GX";
  24. reg = <0>;
  25. clock-frequency = <2FAF0800>; // 800MHz
  26. timebase-frequency = <0>; // Filled in by zImage
  27. i-cache-line-size = <32>;
  28. d-cache-line-size = <32>;
  29. i-cache-size = <8000>; /* 32 kB */
  30. d-cache-size = <8000>; /* 32 kB */
  31. dcr-controller;
  32. dcr-access-method = "native";
  33. };
  34. };
  35. memory {
  36. device_type = "memory";
  37. reg = <0 0 0>; // Filled in by zImage
  38. };
  39. UICB0: interrupt-controller-base {
  40. compatible = "ibm,uic-440gx", "ibm,uic";
  41. interrupt-controller;
  42. cell-index = <3>;
  43. dcr-reg = <200 009>;
  44. #address-cells = <0>;
  45. #size-cells = <0>;
  46. #interrupt-cells = <2>;
  47. };
  48. UIC0: interrupt-controller0 {
  49. compatible = "ibm,uic-440gx", "ibm,uic";
  50. interrupt-controller;
  51. cell-index = <0>;
  52. dcr-reg = <0c0 009>;
  53. #address-cells = <0>;
  54. #size-cells = <0>;
  55. #interrupt-cells = <2>;
  56. interrupts = <01 4 00 4>; /* cascade - first non-critical */
  57. interrupt-parent = <&UICB0>;
  58. };
  59. UIC1: interrupt-controller1 {
  60. compatible = "ibm,uic-440gx", "ibm,uic";
  61. interrupt-controller;
  62. cell-index = <1>;
  63. dcr-reg = <0d0 009>;
  64. #address-cells = <0>;
  65. #size-cells = <0>;
  66. #interrupt-cells = <2>;
  67. interrupts = <03 4 02 4>; /* cascade */
  68. interrupt-parent = <&UICB0>;
  69. };
  70. UIC2: interrupt-controller2 {
  71. compatible = "ibm,uic-440gx", "ibm,uic";
  72. interrupt-controller;
  73. cell-index = <2>; /* was 1 */
  74. dcr-reg = <210 009>;
  75. #address-cells = <0>;
  76. #size-cells = <0>;
  77. #interrupt-cells = <2>;
  78. interrupts = <05 4 04 4>; /* cascade */
  79. interrupt-parent = <&UICB0>;
  80. };
  81. CPC0: cpc {
  82. compatible = "ibm,cpc-440gp";
  83. dcr-reg = <0b0 003 0e0 010>;
  84. // FIXME: anything else?
  85. };
  86. plb {
  87. compatible = "ibm,plb-440gx", "ibm,plb4";
  88. #address-cells = <2>;
  89. #size-cells = <1>;
  90. ranges;
  91. clock-frequency = <9896800>; // 160MHz
  92. SDRAM0: memory-controller {
  93. compatible = "ibm,sdram-440gp";
  94. dcr-reg = <010 2>;
  95. // FIXME: anything else?
  96. };
  97. SRAM0: sram {
  98. compatible = "ibm,sram-440gp";
  99. dcr-reg = <020 8 00a 1>;
  100. };
  101. DMA0: dma {
  102. // FIXME: ???
  103. compatible = "ibm,dma-440gp";
  104. dcr-reg = <100 027>;
  105. };
  106. MAL0: mcmal {
  107. compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
  108. dcr-reg = <180 62>;
  109. num-tx-chans = <4>;
  110. num-rx-chans = <4>;
  111. interrupt-parent = <&MAL0>;
  112. interrupts = <0 1 2 3 4>;
  113. #interrupt-cells = <1>;
  114. #address-cells = <0>;
  115. #size-cells = <0>;
  116. interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
  117. /*RXEOB*/ 1 &UIC0 b 4
  118. /*SERR*/ 2 &UIC1 0 4
  119. /*TXDE*/ 3 &UIC1 1 4
  120. /*RXDE*/ 4 &UIC1 2 4>;
  121. interrupt-map-mask = <ffffffff>;
  122. };
  123. POB0: opb {
  124. compatible = "ibm,opb-440gx", "ibm,opb";
  125. #address-cells = <1>;
  126. #size-cells = <1>;
  127. /* Wish there was a nicer way of specifying a full 32-bit
  128. range */
  129. ranges = <00000000 1 00000000 80000000
  130. 80000000 1 80000000 80000000>;
  131. dcr-reg = <090 00b>;
  132. interrupt-parent = <&UIC1>;
  133. interrupts = <7 4>;
  134. clock-frequency = <4C4B400>; // 80MHz
  135. EBC0: ebc {
  136. compatible = "ibm,ebc-440gx", "ibm,ebc";
  137. dcr-reg = <012 2>;
  138. #address-cells = <2>;
  139. #size-cells = <1>;
  140. clock-frequency = <4C4B400>; // 80MHz
  141. /* ranges property is supplied by zImage
  142. * based on firmware's configuration of the
  143. * EBC bridge */
  144. interrupts = <5 4>;
  145. interrupt-parent = <&UIC1>;
  146. /* TODO: Add other EBC devices */
  147. };
  148. UART0: serial@40000200 {
  149. device_type = "serial";
  150. compatible = "ns16550";
  151. reg = <40000200 8>;
  152. virtual-reg = <e0000200>;
  153. clock-frequency = <A8C000>;
  154. current-speed = <1C200>; /* 115200 */
  155. interrupt-parent = <&UIC0>;
  156. interrupts = <0 4>;
  157. };
  158. UART1: serial@40000300 {
  159. device_type = "serial";
  160. compatible = "ns16550";
  161. reg = <40000300 8>;
  162. virtual-reg = <e0000300>;
  163. clock-frequency = <A8C000>;
  164. current-speed = <1C200>; /* 115200 */
  165. interrupt-parent = <&UIC0>;
  166. interrupts = <1 4>;
  167. };
  168. IIC0: i2c@40000400 {
  169. /* FIXME */
  170. device_type = "i2c";
  171. compatible = "ibm,iic-440gp", "ibm,iic";
  172. reg = <40000400 14>;
  173. interrupt-parent = <&UIC0>;
  174. interrupts = <2 4>;
  175. };
  176. IIC1: i2c@40000500 {
  177. /* FIXME */
  178. device_type = "i2c";
  179. compatible = "ibm,iic-440gp", "ibm,iic";
  180. reg = <40000500 14>;
  181. interrupt-parent = <&UIC0>;
  182. interrupts = <3 4>;
  183. };
  184. GPIO0: gpio@40000700 {
  185. /* FIXME */
  186. compatible = "ibm,gpio-440gp";
  187. reg = <40000700 20>;
  188. };
  189. ZMII0: emac-zmii@40000780 {
  190. device_type = "zgmii-interface";
  191. compatible = "ibm,zmii-440gx", "ibm,zmii";
  192. reg = <40000780 c>;
  193. };
  194. RGMII0: emac-rgmii@40000790 {
  195. device_type = "rgmii-interface";
  196. compatible = "ibm,rgmii";
  197. reg = <40000790 8>;
  198. };
  199. EMAC0: ethernet@40000800 {
  200. unused = <1>;
  201. linux,network-index = <2>;
  202. device_type = "network";
  203. compatible = "ibm,emac-440gx", "ibm,emac4";
  204. interrupt-parent = <&UIC1>;
  205. interrupts = <1c 4 1d 4>;
  206. reg = <40000800 70>;
  207. local-mac-address = [000000000000]; // Filled in by zImage
  208. mal-device = <&MAL0>;
  209. mal-tx-channel = <0>;
  210. mal-rx-channel = <0>;
  211. cell-index = <0>;
  212. max-frame-size = <5dc>;
  213. rx-fifo-size = <1000>;
  214. tx-fifo-size = <800>;
  215. phy-mode = "rmii";
  216. phy-map = <00000001>;
  217. zmii-device = <&ZMII0>;
  218. zmii-channel = <0>;
  219. };
  220. EMAC1: ethernet@40000900 {
  221. unused = <1>;
  222. linux,network-index = <3>;
  223. device_type = "network";
  224. compatible = "ibm,emac-440gx", "ibm,emac4";
  225. interrupt-parent = <&UIC1>;
  226. interrupts = <1e 4 1f 4>;
  227. reg = <40000900 70>;
  228. local-mac-address = [000000000000]; // Filled in by zImage
  229. mal-device = <&MAL0>;
  230. mal-tx-channel = <1>;
  231. mal-rx-channel = <1>;
  232. cell-index = <1>;
  233. max-frame-size = <5dc>;
  234. rx-fifo-size = <1000>;
  235. tx-fifo-size = <800>;
  236. phy-mode = "rmii";
  237. phy-map = <00000001>;
  238. zmii-device = <&ZMII0>;
  239. zmii-channel = <1>;
  240. };
  241. EMAC2: ethernet@40000c00 {
  242. linux,network-index = <0>;
  243. device_type = "network";
  244. compatible = "ibm,emac-440gx", "ibm,emac4";
  245. interrupt-parent = <&UIC2>;
  246. interrupts = <0 4 1 4>;
  247. reg = <40000c00 70>;
  248. local-mac-address = [000000000000]; // Filled in by zImage
  249. mal-device = <&MAL0>;
  250. mal-tx-channel = <2>;
  251. mal-rx-channel = <2>;
  252. cell-index = <2>;
  253. max-frame-size = <5dc>;
  254. rx-fifo-size = <1000>;
  255. tx-fifo-size = <800>;
  256. phy-mode = "rgmii";
  257. phy-map = <00000001>;
  258. rgmii-device = <&RGMII0>;
  259. rgmii-channel = <0>;
  260. zmii-device = <&ZMII0>;
  261. zmii-channel = <2>;
  262. };
  263. EMAC3: ethernet@40000e00 {
  264. linux,network-index = <1>;
  265. device_type = "network";
  266. compatible = "ibm,emac-440gx", "ibm,emac4";
  267. interrupt-parent = <&UIC2>;
  268. interrupts = <2 4 3 4>;
  269. reg = <40000e00 70>;
  270. local-mac-address = [000000000000]; // Filled in by zImage
  271. mal-device = <&MAL0>;
  272. mal-tx-channel = <3>;
  273. mal-rx-channel = <3>;
  274. cell-index = <3>;
  275. max-frame-size = <5dc>;
  276. rx-fifo-size = <1000>;
  277. tx-fifo-size = <800>;
  278. phy-mode = "rgmii";
  279. phy-map = <00000003>;
  280. rgmii-device = <&RGMII0>;
  281. rgmii-channel = <1>;
  282. zmii-device = <&ZMII0>;
  283. zmii-channel = <3>;
  284. };
  285. GPT0: gpt@40000a00 {
  286. /* FIXME */
  287. reg = <40000a00 d4>;
  288. interrupt-parent = <&UIC0>;
  289. interrupts = <12 4 13 4 14 4 15 4 16 4>;
  290. };
  291. };
  292. PCIX0: pci@20ec00000 {
  293. device_type = "pci";
  294. #interrupt-cells = <1>;
  295. #size-cells = <2>;
  296. #address-cells = <3>;
  297. compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
  298. primary;
  299. large-inbound-windows;
  300. enable-msi-hole;
  301. reg = <2 0ec00000 8 /* Config space access */
  302. 0 0 0 /* no IACK cycles */
  303. 2 0ed00000 4 /* Special cycles */
  304. 2 0ec80000 100 /* Internal registers */
  305. 2 0ec80100 fc>; /* Internal messaging registers */
  306. /* Outbound ranges, one memory and one IO,
  307. * later cannot be changed
  308. */
  309. ranges = <02000000 0 80000000 00000003 80000000 0 80000000
  310. 01000000 0 00000000 00000002 08000000 0 00010000>;
  311. /* Inbound 2GB range starting at 0 */
  312. dma-ranges = <42000000 0 0 0 0 0 80000000>;
  313. interrupt-map-mask = <f800 0 0 7>;
  314. interrupt-map = <
  315. /* IDSEL 1 */
  316. 0800 0 0 1 &UIC0 17 8
  317. 0800 0 0 2 &UIC0 18 8
  318. 0800 0 0 3 &UIC0 19 8
  319. 0800 0 0 4 &UIC0 1a 8
  320. /* IDSEL 2 */
  321. 1000 0 0 1 &UIC0 18 8
  322. 1000 0 0 2 &UIC0 19 8
  323. 1000 0 0 3 &UIC0 1a 8
  324. 1000 0 0 4 &UIC0 17 8
  325. >;
  326. };
  327. };
  328. chosen {
  329. linux,stdout-path = "/plb/opb/serial@40000300";
  330. };
  331. };