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include
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asm-arm
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arch-iop33x
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iop331.h

iop331.h 11 KB
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  1. /*
    2. 

  2.  * linux/include/asm/arch-iop33x/iop331.h
    3. 

  3.  *
    4. 

  4.  * Intel IOP331 Chip definitions
    5. 

  5.  *
    6. 

  6.  * Author: Dave Jiang (dave.jiang@intel.com)
    7. 

  7.  * Copyright (C) 2003, 2004 Intel Corp.
    8. 

  8.  *
    9. 

  9.  * This program is free software; you can redistribute it and/or modify
    10. 

  10.  * it under the terms of the GNU General Public License version 2 as
    11. 

  11.  * published by the Free Software Foundation.
    12. 

  12.  */
    13. 

  13. 

  14. #ifndef _IOP331_HW_H_
    15. 

  15. #define _IOP331_HW_H_
    16. 

  16. 

  17. 

  18. /*
    19. 

  19.  * This is needed for mixed drivers that need to work on all
    20. 

  20.  * IOP3xx variants but behave slightly differently on each.
    21. 

  21.  */
    22. 

  22. #ifndef __ASSEMBLY__
    23. 

  23. #define	iop_is_331()		1
    24. 

  24. #endif
    25. 

  25. 

  26. /*
    27. 

  27.  * IOP331 chipset registers
    28. 

  28.  */
    29. 

  29. #define IOP331_VIRT_MEM_BASE  0xfeffe000  /* chip virtual mem address*/
    30. 

  30. #define IOP331_PHYS_MEM_BASE  0xffffe000  /* chip physical memory address */
    31. 

  31. #define IOP331_REG_ADDR(reg) (IOP331_VIRT_MEM_BASE | (reg))
    32. 

  32. 

  33. /* Reserved 0x00000000 through 0x000000FF */
    34. 

  34. 

  35. /* Address Translation Unit 0x00000100 through 0x000001FF */
    36. 

  36. 

  37. /* Messaging Unit 0x00000300 through 0x000003FF */
    38. 

  38. 

  39. /* Reserved 0x00000300 through 0x0000030c */
    40. 

  40. #define IOP331_IMR0       (volatile u32 *)IOP331_REG_ADDR(0x00000310)
    41. 

  41. #define IOP331_IMR1       (volatile u32 *)IOP331_REG_ADDR(0x00000314)
    42. 

  42. #define IOP331_OMR0       (volatile u32 *)IOP331_REG_ADDR(0x00000318)
    43. 

  43. #define IOP331_OMR1       (volatile u32 *)IOP331_REG_ADDR(0x0000031C)
    44. 

  44. #define IOP331_IDR        (volatile u32 *)IOP331_REG_ADDR(0x00000320)
    45. 

  45. #define IOP331_IISR       (volatile u32 *)IOP331_REG_ADDR(0x00000324)
    46. 

  46. #define IOP331_IIMR       (volatile u32 *)IOP331_REG_ADDR(0x00000328)
    47. 

  47. #define IOP331_ODR        (volatile u32 *)IOP331_REG_ADDR(0x0000032C)
    48. 

  48. #define IOP331_OISR       (volatile u32 *)IOP331_REG_ADDR(0x00000330)
    49. 

  49. #define IOP331_OIMR       (volatile u32 *)IOP331_REG_ADDR(0x00000334)
    50. 

  50. /* Reserved 0x00000338 through 0x0000034F */
    51. 

  51. #define IOP331_MUCR       (volatile u32 *)IOP331_REG_ADDR(0x00000350)
    52. 

  52. #define IOP331_QBAR       (volatile u32 *)IOP331_REG_ADDR(0x00000354)
    53. 

  53. /* Reserved 0x00000358 through 0x0000035C */
    54. 

  54. #define IOP331_IFHPR      (volatile u32 *)IOP331_REG_ADDR(0x00000360)
    55. 

  55. #define IOP331_IFTPR      (volatile u32 *)IOP331_REG_ADDR(0x00000364)
    56. 

  56. #define IOP331_IPHPR      (volatile u32 *)IOP331_REG_ADDR(0x00000368)
    57. 

  57. #define IOP331_IPTPR      (volatile u32 *)IOP331_REG_ADDR(0x0000036C)
    58. 

  58. #define IOP331_OFHPR      (volatile u32 *)IOP331_REG_ADDR(0x00000370)
    59. 

  59. #define IOP331_OFTPR      (volatile u32 *)IOP331_REG_ADDR(0x00000374)
    60. 

  60. #define IOP331_OPHPR      (volatile u32 *)IOP331_REG_ADDR(0x00000378)
    61. 

  61. #define IOP331_OPTPR      (volatile u32 *)IOP331_REG_ADDR(0x0000037C)
    62. 

  62. #define IOP331_IAR        (volatile u32 *)IOP331_REG_ADDR(0x00000380)
    63. 

  63. /* Reserved 0x00000384 through 0x000003FF */
    64. 

  64. 

  65. /* DMA Controller 0x00000400 through 0x000004FF */
    66. 

  66. #define IOP331_DMA0_CCR   (volatile u32 *)IOP331_REG_ADDR(0x00000400)
    67. 

  67. #define IOP331_DMA0_CSR   (volatile u32 *)IOP331_REG_ADDR(0x00000404)
    68. 

  68. #define IOP331_DMA0_DAR   (volatile u32 *)IOP331_REG_ADDR(0x0000040C)
    69. 

  69. #define IOP331_DMA0_NDAR  (volatile u32 *)IOP331_REG_ADDR(0x00000410)
    70. 

  70. #define IOP331_DMA0_PADR  (volatile u32 *)IOP331_REG_ADDR(0x00000414)
    71. 

  71. #define IOP331_DMA0_PUADR (volatile u32 *)IOP331_REG_ADDR(0x00000418)
    72. 

  72. #define IOP331_DMA0_LADR  (volatile u32 *)IOP331_REG_ADDR(0X0000041C)
    73. 

  73. #define IOP331_DMA0_BCR   (volatile u32 *)IOP331_REG_ADDR(0x00000420)
    74. 

  74. #define IOP331_DMA0_DCR   (volatile u32 *)IOP331_REG_ADDR(0x00000424)
    75. 

  75. /* Reserved 0x00000428 through 0x0000043C */
    76. 

  76. #define IOP331_DMA1_CCR   (volatile u32 *)IOP331_REG_ADDR(0x00000440)
    77. 

  77. #define IOP331_DMA1_CSR   (volatile u32 *)IOP331_REG_ADDR(0x00000444)
    78. 

  78. #define IOP331_DMA1_DAR   (volatile u32 *)IOP331_REG_ADDR(0x0000044C)
    79. 

  79. #define IOP331_DMA1_NDAR  (volatile u32 *)IOP331_REG_ADDR(0x00000450)
    80. 

  80. #define IOP331_DMA1_PADR  (volatile u32 *)IOP331_REG_ADDR(0x00000454)
    81. 

  81. #define IOP331_DMA1_PUADR (volatile u32 *)IOP331_REG_ADDR(0x00000458)
    82. 

  82. #define IOP331_DMA1_LADR  (volatile u32 *)IOP331_REG_ADDR(0x0000045C)
    83. 

  83. #define IOP331_DMA1_BCR   (volatile u32 *)IOP331_REG_ADDR(0x00000460)
    84. 

  84. #define IOP331_DMA1_DCR   (volatile u32 *)IOP331_REG_ADDR(0x00000464)
    85. 

  85. /* Reserved 0x00000468 through 0x000004FF */
    86. 

  86. 

  87. /* Memory controller 0x00000500 through 0x0005FF */
    88. 

  88. 

  89. /* Peripheral bus interface unit 0x00000680 through 0x0006FF */
    90. 

  90. #define IOP331_PBCR       (volatile u32 *)IOP331_REG_ADDR(0x00000680)
    91. 

  91. #define IOP331_PBISR      (volatile u32 *)IOP331_REG_ADDR(0x00000684)
    92. 

  92. #define IOP331_PBBAR0     (volatile u32 *)IOP331_REG_ADDR(0x00000688)
    93. 

  93. #define IOP331_PBLR0      (volatile u32 *)IOP331_REG_ADDR(0x0000068C)
    94. 

  94. #define IOP331_PBBAR1     (volatile u32 *)IOP331_REG_ADDR(0x00000690)
    95. 

  95. #define IOP331_PBLR1      (volatile u32 *)IOP331_REG_ADDR(0x00000694)
    96. 

  96. #define IOP331_PBBAR2     (volatile u32 *)IOP331_REG_ADDR(0x00000698)
    97. 

  97. #define IOP331_PBLR2      (volatile u32 *)IOP331_REG_ADDR(0x0000069C)
    98. 

  98. #define IOP331_PBBAR3     (volatile u32 *)IOP331_REG_ADDR(0x000006A0)
    99. 

  99. #define IOP331_PBLR3      (volatile u32 *)IOP331_REG_ADDR(0x000006A4)
    100. 

  100. #define IOP331_PBBAR4     (volatile u32 *)IOP331_REG_ADDR(0x000006A8)
    101. 

  101. #define IOP331_PBLR4      (volatile u32 *)IOP331_REG_ADDR(0x000006AC)
    102. 

  102. #define IOP331_PBBAR5     (volatile u32 *)IOP331_REG_ADDR(0x000006B0)
    103. 

  103. #define IOP331_PBLR5      (volatile u32 *)IOP331_REG_ADDR(0x000006B4)
    104. 

  104. #define IOP331_PBDSCR     (volatile u32 *)IOP331_REG_ADDR(0x000006B8)
    105. 

  105. /* Reserved 0x000006BC */
    106. 

  106. #define IOP331_PMBR0      (volatile u32 *)IOP331_REG_ADDR(0x000006C0)
    107. 

  107. /* Reserved 0x000006C4 through 0x000006DC */
    108. 

  108. #define IOP331_PMBR1      (volatile u32 *)IOP331_REG_ADDR(0x000006E0)
    109. 

  109. #define IOP331_PMBR2      (volatile u32 *)IOP331_REG_ADDR(0x000006E4)
    110. 

  110. 

  111. #define IOP331_PBCR_EN    0x1
    112. 

  112. 

  113. #define IOP331_PBISR_BOOR_ERR 0x1
    114. 

  114. 

  115. 

  116. 

  117. /* Peripheral performance monitoring unit 0x00000700 through 0x00077F */
    118. 

  118. /* Internal arbitration unit 0x00000780 through 0x0007BF */
    119. 

  119. 

  120. /* Interrupt Controller */
    121. 

  121. #define IOP331_INTCTL0    (volatile u32 *)IOP331_REG_ADDR(0x00000790)
    122. 

  122. #define IOP331_INTCTL1    (volatile u32 *)IOP331_REG_ADDR(0x00000794)
    123. 

  123. #define IOP331_INTSTR0    (volatile u32 *)IOP331_REG_ADDR(0x00000798)
    124. 

  124. #define IOP331_INTSTR1    (volatile u32 *)IOP331_REG_ADDR(0x0000079C)
    125. 

  125. #define IOP331_IINTSRC0   (volatile u32 *)IOP331_REG_ADDR(0x000007A0)
    126. 

  126. #define IOP331_IINTSRC1   (volatile u32 *)IOP331_REG_ADDR(0x000007A4)
    127. 

  127. #define IOP331_FINTSRC0   (volatile u32 *)IOP331_REG_ADDR(0x000007A8)
    128. 

  128. #define IOP331_FINTSRC1   (volatile u32 *)IOP331_REG_ADDR(0x000007AC)
    129. 

  129. #define IOP331_IPR0       (volatile u32 *)IOP331_REG_ADDR(0x000007B0)
    130. 

  130. #define IOP331_IPR1       (volatile u32 *)IOP331_REG_ADDR(0x000007B4)
    131. 

  131. #define IOP331_IPR2       (volatile u32 *)IOP331_REG_ADDR(0x000007B8)
    132. 

  132. #define IOP331_IPR3       (volatile u32 *)IOP331_REG_ADDR(0x000007BC)
    133. 

  133. #define IOP331_INTBASE    (volatile u32 *)IOP331_REG_ADDR(0x000007C0)
    134. 

  134. #define IOP331_INTSIZE    (volatile u32 *)IOP331_REG_ADDR(0x000007C4)
    135. 

  135. #define IOP331_IINTVEC    (volatile u32 *)IOP331_REG_ADDR(0x000007C8)
    136. 

  136. #define IOP331_FINTVEC    (volatile u32 *)IOP331_REG_ADDR(0x000007CC)
    137. 

  137. 

  138. 

  139. /* Timers */
    140. 

  140. #if defined(CONFIG_ARCH_IOP33X)
    141. 

  141. #define	IOP331_TICK_RATE	266000000	/* 266 MHz IB clock */
    142. 

  142. #endif
    143. 

  143. 

  144. #if defined(CONFIG_IOP331_STEPD) || defined(CONFIG_ARCH_IQ80333)
    145. 

  145. #undef IOP331_TICK_RATE
    146. 

  146. #define IOP331_TICK_RATE	333000000	/* 333 Mhz IB clock */
    147. 

  147. #endif
    148. 

  148. 

  149. /* Application accelerator unit 0x00000800 - 0x000008FF */
    150. 

  150. #define IOP331_AAU_ACR     (volatile u32 *)IOP331_REG_ADDR(0x00000800)
    151. 

  151. #define IOP331_AAU_ASR     (volatile u32 *)IOP331_REG_ADDR(0x00000804)
    152. 

  152. #define IOP331_AAU_ADAR    (volatile u32 *)IOP331_REG_ADDR(0x00000808)
    153. 

  153. #define IOP331_AAU_ANDAR   (volatile u32 *)IOP331_REG_ADDR(0x0000080C)
    154. 

  154. #define IOP331_AAU_SAR1    (volatile u32 *)IOP331_REG_ADDR(0x00000810)
    155. 

  155. #define IOP331_AAU_SAR2    (volatile u32 *)IOP331_REG_ADDR(0x00000814)
    156. 

  156. #define IOP331_AAU_SAR3    (volatile u32 *)IOP331_REG_ADDR(0x00000818)
    157. 

  157. #define IOP331_AAU_SAR4    (volatile u32 *)IOP331_REG_ADDR(0x0000081C)
    158. 

  158. #define IOP331_AAU_SAR5    (volatile u32 *)IOP331_REG_ADDR(0x0000082C)
    159. 

  159. #define IOP331_AAU_SAR6    (volatile u32 *)IOP331_REG_ADDR(0x00000830)
    160. 

  160. #define IOP331_AAU_SAR7    (volatile u32 *)IOP331_REG_ADDR(0x00000834)
    161. 

  161. #define IOP331_AAU_SAR8    (volatile u32 *)IOP331_REG_ADDR(0x00000838)
    162. 

  162. #define IOP331_AAU_SAR9    (volatile u32 *)IOP331_REG_ADDR(0x00000840)
    163. 

  163. #define IOP331_AAU_SAR10   (volatile u32 *)IOP331_REG_ADDR(0x00000844)
    164. 

  164. #define IOP331_AAU_SAR11   (volatile u32 *)IOP331_REG_ADDR(0x00000848)
    165. 

  165. #define IOP331_AAU_SAR12   (volatile u32 *)IOP331_REG_ADDR(0x0000084C)
    166. 

  166. #define IOP331_AAU_SAR13   (volatile u32 *)IOP331_REG_ADDR(0x00000850)
    167. 

  167. #define IOP331_AAU_SAR14   (volatile u32 *)IOP331_REG_ADDR(0x00000854)
    168. 

  168. #define IOP331_AAU_SAR15   (volatile u32 *)IOP331_REG_ADDR(0x00000858)
    169. 

  169. #define IOP331_AAU_SAR16   (volatile u32 *)IOP331_REG_ADDR(0x0000085C)
    170. 

  170. #define IOP331_AAU_SAR17   (volatile u32 *)IOP331_REG_ADDR(0x00000864)
    171. 

  171. #define IOP331_AAU_SAR18   (volatile u32 *)IOP331_REG_ADDR(0x00000868)
    172. 

  172. #define IOP331_AAU_SAR19   (volatile u32 *)IOP331_REG_ADDR(0x0000086C)
    173. 

  173. #define IOP331_AAU_SAR20   (volatile u32 *)IOP331_REG_ADDR(0x00000870)
    174. 

  174. #define IOP331_AAU_SAR21   (volatile u32 *)IOP331_REG_ADDR(0x00000874)
    175. 

  175. #define IOP331_AAU_SAR22   (volatile u32 *)IOP331_REG_ADDR(0x00000878)
    176. 

  176. #define IOP331_AAU_SAR23   (volatile u32 *)IOP331_REG_ADDR(0x0000087C)
    177. 

  177. #define IOP331_AAU_SAR24   (volatile u32 *)IOP331_REG_ADDR(0x00000880)
    178. 

  178. #define IOP331_AAU_SAR25   (volatile u32 *)IOP331_REG_ADDR(0x00000888)
    179. 

  179. #define IOP331_AAU_SAR26   (volatile u32 *)IOP331_REG_ADDR(0x0000088C)
    180. 

  180. #define IOP331_AAU_SAR27   (volatile u32 *)IOP331_REG_ADDR(0x00000890)
    181. 

  181. #define IOP331_AAU_SAR28   (volatile u32 *)IOP331_REG_ADDR(0x00000894)
    182. 

  182. #define IOP331_AAU_SAR29   (volatile u32 *)IOP331_REG_ADDR(0x00000898)
    183. 

  183. #define IOP331_AAU_SAR30   (volatile u32 *)IOP331_REG_ADDR(0x0000089C)
    184. 

  184. #define IOP331_AAU_SAR31   (volatile u32 *)IOP331_REG_ADDR(0x000008A0)
    185. 

  185. #define IOP331_AAU_SAR32   (volatile u32 *)IOP331_REG_ADDR(0x000008A4)
    186. 

  186. #define IOP331_AAU_DAR     (volatile u32 *)IOP331_REG_ADDR(0x00000820)
    187. 

  187. #define IOP331_AAU_ABCR    (volatile u32 *)IOP331_REG_ADDR(0x00000824)
    188. 

  188. #define IOP331_AAU_ADCR    (volatile u32 *)IOP331_REG_ADDR(0x00000828)
    189. 

  189. #define IOP331_AAU_EDCR0   (volatile u32 *)IOP331_REG_ADDR(0x0000083c)
    190. 

  190. #define IOP331_AAU_EDCR1   (volatile u32 *)IOP331_REG_ADDR(0x00000860)
    191. 

  191. #define IOP331_AAU_EDCR2   (volatile u32 *)IOP331_REG_ADDR(0x00000884)
    192. 

  192. 

  193. 

  194. #define IOP331_SPDSCR	  (volatile u32 *)IOP331_REG_ADDR(0x000015C0)
    195. 

  195. #define IOP331_PPDSCR	  (volatile u32 *)IOP331_REG_ADDR(0x000015C8)
    196. 

  196. /* SSP serial port unit 0x00001600 - 0x0000167F */
    197. 

  197. 

  198. /* I2C bus interface unit 0x00001680 - 0x000016FF */
    199. 

  199. 

  200. /* 0x00001700 through 0x0000172C  UART 0 */
    201. 

  201. 

  202. /* Reserved 0x00001730 through 0x0000173F */
    203. 

  203. 

  204. /* 0x00001740 through 0x0000176C UART 1 */
    205. 

  205. 

  206. #define IOP331_UART0_PHYS  (IOP331_PHYS_MEM_BASE | 0x00001700)	/* UART #1 physical */
    207. 

  207. #define IOP331_UART1_PHYS  (IOP331_PHYS_MEM_BASE | 0x00001740)	/* UART #2 physical */
    208. 

  208. #define IOP331_UART0_VIRT  (IOP331_VIRT_MEM_BASE | 0x00001700) /* UART #1 virtual addr */
    209. 

  209. #define IOP331_UART1_VIRT  (IOP331_VIRT_MEM_BASE | 0x00001740) /* UART #2 virtual addr */
    210. 

  210. 

  211. /* Reserved 0x00001770 through 0x0000177F */
    212. 

  212. 

  213. /* General Purpose I/O Registers */
    214. 

  214. #define IOP331_GPOE       (volatile u32 *)IOP331_REG_ADDR(0x00001780)
    215. 

  215. #define IOP331_GPID       (volatile u32 *)IOP331_REG_ADDR(0x00001784)
    216. 

  216. #define IOP331_GPOD       (volatile u32 *)IOP331_REG_ADDR(0x00001788)
    217. 

  217. 

  218. /* Reserved 0x0000178c through 0x000019ff */
    219. 

  219. 

  220. /*
    221. 

  221.  * Peripherals that are shared between the iop32x and iop33x but
    222. 

  222.  * located at different addresses.
    223. 

  223.  */
    224. 

  224. #define IOP3XX_GPIO_REG(reg)   (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
    225. 

  225. #define IOP3XX_TIMER_REG(reg)  (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
    226. 

  226. 

  227. #include <asm/hardware/iop3xx.h>
    228. 

  228. 

  229. 

  230. #ifndef __ASSEMBLY__
    231. 

  231. extern void iop331_init_irq(void);
    232. 

  232. extern void iop331_time_init(void);
    233. 

  233. #endif
    234. 

  234. 

  235. #endif // _IOP331_HW_H_
    236.