e1000_main.c 126 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  89. /* required last entry */
  90. {0,}
  91. };
  92. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  93. int e1000_up(struct e1000_adapter *adapter);
  94. void e1000_down(struct e1000_adapter *adapter);
  95. void e1000_reset(struct e1000_adapter *adapter);
  96. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  97. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  98. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  99. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  100. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  101. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  102. struct e1000_tx_ring *txdr);
  103. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  104. struct e1000_rx_ring *rxdr);
  105. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  106. struct e1000_tx_ring *tx_ring);
  107. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  108. struct e1000_rx_ring *rx_ring);
  109. void e1000_update_stats(struct e1000_adapter *adapter);
  110. /* Local Function Prototypes */
  111. static int e1000_init_module(void);
  112. static void e1000_exit_module(void);
  113. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  114. static void __devexit e1000_remove(struct pci_dev *pdev);
  115. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  116. #ifdef CONFIG_E1000_MQ
  117. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  118. #endif
  119. static int e1000_sw_init(struct e1000_adapter *adapter);
  120. static int e1000_open(struct net_device *netdev);
  121. static int e1000_close(struct net_device *netdev);
  122. static void e1000_configure_tx(struct e1000_adapter *adapter);
  123. static void e1000_configure_rx(struct e1000_adapter *adapter);
  124. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  125. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  126. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  127. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  130. struct e1000_rx_ring *rx_ring);
  131. static void e1000_set_multi(struct net_device *netdev);
  132. static void e1000_update_phy_info(unsigned long data);
  133. static void e1000_watchdog(unsigned long data);
  134. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  135. static void e1000_82547_tx_fifo_stall(unsigned long data);
  136. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  137. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  138. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  139. static int e1000_set_mac(struct net_device *netdev, void *p);
  140. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  141. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  142. struct e1000_tx_ring *tx_ring);
  143. #ifdef CONFIG_E1000_NAPI
  144. static int e1000_clean(struct net_device *poll_dev, int *budget);
  145. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  146. struct e1000_rx_ring *rx_ring,
  147. int *work_done, int work_to_do);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring,
  150. int *work_done, int work_to_do);
  151. #else
  152. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  153. struct e1000_rx_ring *rx_ring);
  154. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. #endif
  157. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  158. struct e1000_rx_ring *rx_ring,
  159. int cleaned_count);
  160. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  161. struct e1000_rx_ring *rx_ring,
  162. int cleaned_count);
  163. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  164. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  165. int cmd);
  166. void e1000_set_ethtool_ops(struct net_device *netdev);
  167. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  168. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  169. static void e1000_tx_timeout(struct net_device *dev);
  170. static void e1000_tx_timeout_task(struct net_device *dev);
  171. static void e1000_smartspeed(struct e1000_adapter *adapter);
  172. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  173. struct sk_buff *skb);
  174. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  175. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  176. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  177. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  178. #ifdef CONFIG_PM
  179. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  180. static int e1000_resume(struct pci_dev *pdev);
  181. #endif
  182. #ifdef CONFIG_NET_POLL_CONTROLLER
  183. /* for netdump / net console */
  184. static void e1000_netpoll (struct net_device *netdev);
  185. #endif
  186. #ifdef CONFIG_E1000_MQ
  187. /* for multiple Rx queues */
  188. void e1000_rx_schedule(void *data);
  189. #endif
  190. /* Exported from other modules */
  191. extern void e1000_check_options(struct e1000_adapter *adapter);
  192. static struct pci_driver e1000_driver = {
  193. .name = e1000_driver_name,
  194. .id_table = e1000_pci_tbl,
  195. .probe = e1000_probe,
  196. .remove = __devexit_p(e1000_remove),
  197. /* Power Managment Hooks */
  198. #ifdef CONFIG_PM
  199. .suspend = e1000_suspend,
  200. .resume = e1000_resume
  201. #endif
  202. };
  203. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  204. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  205. MODULE_LICENSE("GPL");
  206. MODULE_VERSION(DRV_VERSION);
  207. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  208. module_param(debug, int, 0);
  209. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  210. /**
  211. * e1000_init_module - Driver Registration Routine
  212. *
  213. * e1000_init_module is the first routine called when the driver is
  214. * loaded. All it does is register with the PCI subsystem.
  215. **/
  216. static int __init
  217. e1000_init_module(void)
  218. {
  219. int ret;
  220. printk(KERN_INFO "%s - version %s\n",
  221. e1000_driver_string, e1000_driver_version);
  222. printk(KERN_INFO "%s\n", e1000_copyright);
  223. ret = pci_module_init(&e1000_driver);
  224. return ret;
  225. }
  226. module_init(e1000_init_module);
  227. /**
  228. * e1000_exit_module - Driver Exit Cleanup Routine
  229. *
  230. * e1000_exit_module is called just before the driver is removed
  231. * from memory.
  232. **/
  233. static void __exit
  234. e1000_exit_module(void)
  235. {
  236. pci_unregister_driver(&e1000_driver);
  237. }
  238. module_exit(e1000_exit_module);
  239. /**
  240. * e1000_irq_disable - Mask off interrupt generation on the NIC
  241. * @adapter: board private structure
  242. **/
  243. static inline void
  244. e1000_irq_disable(struct e1000_adapter *adapter)
  245. {
  246. atomic_inc(&adapter->irq_sem);
  247. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  248. E1000_WRITE_FLUSH(&adapter->hw);
  249. synchronize_irq(adapter->pdev->irq);
  250. }
  251. /**
  252. * e1000_irq_enable - Enable default interrupt generation settings
  253. * @adapter: board private structure
  254. **/
  255. static inline void
  256. e1000_irq_enable(struct e1000_adapter *adapter)
  257. {
  258. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  259. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  260. E1000_WRITE_FLUSH(&adapter->hw);
  261. }
  262. }
  263. static void
  264. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  265. {
  266. struct net_device *netdev = adapter->netdev;
  267. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  268. uint16_t old_vid = adapter->mng_vlan_id;
  269. if(adapter->vlgrp) {
  270. if(!adapter->vlgrp->vlan_devices[vid]) {
  271. if(adapter->hw.mng_cookie.status &
  272. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  273. e1000_vlan_rx_add_vid(netdev, vid);
  274. adapter->mng_vlan_id = vid;
  275. } else
  276. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  277. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  278. (vid != old_vid) &&
  279. !adapter->vlgrp->vlan_devices[old_vid])
  280. e1000_vlan_rx_kill_vid(netdev, old_vid);
  281. }
  282. }
  283. }
  284. /**
  285. * e1000_release_hw_control - release control of the h/w to f/w
  286. * @adapter: address of board private structure
  287. *
  288. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  289. * For ASF and Pass Through versions of f/w this means that the
  290. * driver is no longer loaded. For AMT version (only with 82573) i
  291. * of the f/w this means that the netowrk i/f is closed.
  292. *
  293. **/
  294. static inline void
  295. e1000_release_hw_control(struct e1000_adapter *adapter)
  296. {
  297. uint32_t ctrl_ext;
  298. uint32_t swsm;
  299. /* Let firmware taken over control of h/w */
  300. switch (adapter->hw.mac_type) {
  301. case e1000_82571:
  302. case e1000_82572:
  303. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  304. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  305. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  306. break;
  307. case e1000_82573:
  308. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  309. E1000_WRITE_REG(&adapter->hw, SWSM,
  310. swsm & ~E1000_SWSM_DRV_LOAD);
  311. default:
  312. break;
  313. }
  314. }
  315. /**
  316. * e1000_get_hw_control - get control of the h/w from f/w
  317. * @adapter: address of board private structure
  318. *
  319. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  320. * For ASF and Pass Through versions of f/w this means that
  321. * the driver is loaded. For AMT version (only with 82573)
  322. * of the f/w this means that the netowrk i/f is open.
  323. *
  324. **/
  325. static inline void
  326. e1000_get_hw_control(struct e1000_adapter *adapter)
  327. {
  328. uint32_t ctrl_ext;
  329. uint32_t swsm;
  330. /* Let firmware know the driver has taken over */
  331. switch (adapter->hw.mac_type) {
  332. case e1000_82571:
  333. case e1000_82572:
  334. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  335. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  336. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  337. break;
  338. case e1000_82573:
  339. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  340. E1000_WRITE_REG(&adapter->hw, SWSM,
  341. swsm | E1000_SWSM_DRV_LOAD);
  342. break;
  343. default:
  344. break;
  345. }
  346. }
  347. int
  348. e1000_up(struct e1000_adapter *adapter)
  349. {
  350. struct net_device *netdev = adapter->netdev;
  351. int i, err;
  352. /* hardware has been reset, we need to reload some things */
  353. /* Reset the PHY if it was previously powered down */
  354. if(adapter->hw.media_type == e1000_media_type_copper) {
  355. uint16_t mii_reg;
  356. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  357. if(mii_reg & MII_CR_POWER_DOWN)
  358. e1000_phy_reset(&adapter->hw);
  359. }
  360. e1000_set_multi(netdev);
  361. e1000_restore_vlan(adapter);
  362. e1000_configure_tx(adapter);
  363. e1000_setup_rctl(adapter);
  364. e1000_configure_rx(adapter);
  365. /* call E1000_DESC_UNUSED which always leaves
  366. * at least 1 descriptor unused to make sure
  367. * next_to_use != next_to_clean */
  368. for (i = 0; i < adapter->num_rx_queues; i++) {
  369. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  370. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  371. }
  372. #ifdef CONFIG_PCI_MSI
  373. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  374. adapter->have_msi = TRUE;
  375. if((err = pci_enable_msi(adapter->pdev))) {
  376. DPRINTK(PROBE, ERR,
  377. "Unable to allocate MSI interrupt Error: %d\n", err);
  378. adapter->have_msi = FALSE;
  379. }
  380. }
  381. #endif
  382. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  383. SA_SHIRQ | SA_SAMPLE_RANDOM,
  384. netdev->name, netdev))) {
  385. DPRINTK(PROBE, ERR,
  386. "Unable to allocate interrupt Error: %d\n", err);
  387. return err;
  388. }
  389. #ifdef CONFIG_E1000_MQ
  390. e1000_setup_queue_mapping(adapter);
  391. #endif
  392. adapter->tx_queue_len = netdev->tx_queue_len;
  393. mod_timer(&adapter->watchdog_timer, jiffies);
  394. #ifdef CONFIG_E1000_NAPI
  395. netif_poll_enable(netdev);
  396. #endif
  397. e1000_irq_enable(adapter);
  398. return 0;
  399. }
  400. void
  401. e1000_down(struct e1000_adapter *adapter)
  402. {
  403. struct net_device *netdev = adapter->netdev;
  404. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  405. e1000_check_mng_mode(&adapter->hw);
  406. e1000_irq_disable(adapter);
  407. #ifdef CONFIG_E1000_MQ
  408. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  409. #endif
  410. free_irq(adapter->pdev->irq, netdev);
  411. #ifdef CONFIG_PCI_MSI
  412. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  413. adapter->have_msi == TRUE)
  414. pci_disable_msi(adapter->pdev);
  415. #endif
  416. del_timer_sync(&adapter->tx_fifo_stall_timer);
  417. del_timer_sync(&adapter->watchdog_timer);
  418. del_timer_sync(&adapter->phy_info_timer);
  419. #ifdef CONFIG_E1000_NAPI
  420. netif_poll_disable(netdev);
  421. #endif
  422. netdev->tx_queue_len = adapter->tx_queue_len;
  423. adapter->link_speed = 0;
  424. adapter->link_duplex = 0;
  425. netif_carrier_off(netdev);
  426. netif_stop_queue(netdev);
  427. e1000_reset(adapter);
  428. e1000_clean_all_tx_rings(adapter);
  429. e1000_clean_all_rx_rings(adapter);
  430. /* Power down the PHY so no link is implied when interface is down *
  431. * The PHY cannot be powered down if any of the following is TRUE *
  432. * (a) WoL is enabled
  433. * (b) AMT is active
  434. * (c) SoL/IDER session is active */
  435. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  436. adapter->hw.media_type == e1000_media_type_copper &&
  437. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  438. !mng_mode_enabled &&
  439. !e1000_check_phy_reset_block(&adapter->hw)) {
  440. uint16_t mii_reg;
  441. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  442. mii_reg |= MII_CR_POWER_DOWN;
  443. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  444. mdelay(1);
  445. }
  446. }
  447. void
  448. e1000_reset(struct e1000_adapter *adapter)
  449. {
  450. uint32_t pba, manc;
  451. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  452. /* Repartition Pba for greater than 9k mtu
  453. * To take effect CTRL.RST is required.
  454. */
  455. switch (adapter->hw.mac_type) {
  456. case e1000_82547:
  457. case e1000_82547_rev_2:
  458. pba = E1000_PBA_30K;
  459. break;
  460. case e1000_82571:
  461. case e1000_82572:
  462. pba = E1000_PBA_38K;
  463. break;
  464. case e1000_82573:
  465. pba = E1000_PBA_12K;
  466. break;
  467. default:
  468. pba = E1000_PBA_48K;
  469. break;
  470. }
  471. if((adapter->hw.mac_type != e1000_82573) &&
  472. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  473. pba -= 8; /* allocate more FIFO for Tx */
  474. if(adapter->hw.mac_type == e1000_82547) {
  475. adapter->tx_fifo_head = 0;
  476. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  477. adapter->tx_fifo_size =
  478. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  479. atomic_set(&adapter->tx_fifo_stall, 0);
  480. }
  481. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  482. /* flow control settings */
  483. /* Set the FC high water mark to 90% of the FIFO size.
  484. * Required to clear last 3 LSB */
  485. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  486. adapter->hw.fc_high_water = fc_high_water_mark;
  487. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  488. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  489. adapter->hw.fc_send_xon = 1;
  490. adapter->hw.fc = adapter->hw.original_fc;
  491. /* Allow time for pending master requests to run */
  492. e1000_reset_hw(&adapter->hw);
  493. if(adapter->hw.mac_type >= e1000_82544)
  494. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  495. if(e1000_init_hw(&adapter->hw))
  496. DPRINTK(PROBE, ERR, "Hardware Error\n");
  497. e1000_update_mng_vlan(adapter);
  498. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  499. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  500. e1000_reset_adaptive(&adapter->hw);
  501. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  502. if (adapter->en_mng_pt) {
  503. manc = E1000_READ_REG(&adapter->hw, MANC);
  504. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  505. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  506. }
  507. }
  508. /**
  509. * e1000_probe - Device Initialization Routine
  510. * @pdev: PCI device information struct
  511. * @ent: entry in e1000_pci_tbl
  512. *
  513. * Returns 0 on success, negative on failure
  514. *
  515. * e1000_probe initializes an adapter identified by a pci_dev structure.
  516. * The OS initialization, configuring of the adapter private structure,
  517. * and a hardware reset occur.
  518. **/
  519. static int __devinit
  520. e1000_probe(struct pci_dev *pdev,
  521. const struct pci_device_id *ent)
  522. {
  523. struct net_device *netdev;
  524. struct e1000_adapter *adapter;
  525. unsigned long mmio_start, mmio_len;
  526. static int cards_found = 0;
  527. int i, err, pci_using_dac;
  528. uint16_t eeprom_data;
  529. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  530. if((err = pci_enable_device(pdev)))
  531. return err;
  532. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  533. pci_using_dac = 1;
  534. } else {
  535. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  536. E1000_ERR("No usable DMA configuration, aborting\n");
  537. return err;
  538. }
  539. pci_using_dac = 0;
  540. }
  541. if((err = pci_request_regions(pdev, e1000_driver_name)))
  542. return err;
  543. pci_set_master(pdev);
  544. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  545. if(!netdev) {
  546. err = -ENOMEM;
  547. goto err_alloc_etherdev;
  548. }
  549. SET_MODULE_OWNER(netdev);
  550. SET_NETDEV_DEV(netdev, &pdev->dev);
  551. pci_set_drvdata(pdev, netdev);
  552. adapter = netdev_priv(netdev);
  553. adapter->netdev = netdev;
  554. adapter->pdev = pdev;
  555. adapter->hw.back = adapter;
  556. adapter->msg_enable = (1 << debug) - 1;
  557. mmio_start = pci_resource_start(pdev, BAR_0);
  558. mmio_len = pci_resource_len(pdev, BAR_0);
  559. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  560. if(!adapter->hw.hw_addr) {
  561. err = -EIO;
  562. goto err_ioremap;
  563. }
  564. for(i = BAR_1; i <= BAR_5; i++) {
  565. if(pci_resource_len(pdev, i) == 0)
  566. continue;
  567. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  568. adapter->hw.io_base = pci_resource_start(pdev, i);
  569. break;
  570. }
  571. }
  572. netdev->open = &e1000_open;
  573. netdev->stop = &e1000_close;
  574. netdev->hard_start_xmit = &e1000_xmit_frame;
  575. netdev->get_stats = &e1000_get_stats;
  576. netdev->set_multicast_list = &e1000_set_multi;
  577. netdev->set_mac_address = &e1000_set_mac;
  578. netdev->change_mtu = &e1000_change_mtu;
  579. netdev->do_ioctl = &e1000_ioctl;
  580. e1000_set_ethtool_ops(netdev);
  581. netdev->tx_timeout = &e1000_tx_timeout;
  582. netdev->watchdog_timeo = 5 * HZ;
  583. #ifdef CONFIG_E1000_NAPI
  584. netdev->poll = &e1000_clean;
  585. netdev->weight = 64;
  586. #endif
  587. netdev->vlan_rx_register = e1000_vlan_rx_register;
  588. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  589. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  590. #ifdef CONFIG_NET_POLL_CONTROLLER
  591. netdev->poll_controller = e1000_netpoll;
  592. #endif
  593. strcpy(netdev->name, pci_name(pdev));
  594. netdev->mem_start = mmio_start;
  595. netdev->mem_end = mmio_start + mmio_len;
  596. netdev->base_addr = adapter->hw.io_base;
  597. adapter->bd_number = cards_found;
  598. /* setup the private structure */
  599. if((err = e1000_sw_init(adapter)))
  600. goto err_sw_init;
  601. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  602. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  603. if(adapter->hw.mac_type >= e1000_82543) {
  604. netdev->features = NETIF_F_SG |
  605. NETIF_F_HW_CSUM |
  606. NETIF_F_HW_VLAN_TX |
  607. NETIF_F_HW_VLAN_RX |
  608. NETIF_F_HW_VLAN_FILTER;
  609. }
  610. #ifdef NETIF_F_TSO
  611. if((adapter->hw.mac_type >= e1000_82544) &&
  612. (adapter->hw.mac_type != e1000_82547))
  613. netdev->features |= NETIF_F_TSO;
  614. #ifdef NETIF_F_TSO_IPV6
  615. if(adapter->hw.mac_type > e1000_82547_rev_2)
  616. netdev->features |= NETIF_F_TSO_IPV6;
  617. #endif
  618. #endif
  619. if(pci_using_dac)
  620. netdev->features |= NETIF_F_HIGHDMA;
  621. /* hard_start_xmit is safe against parallel locking */
  622. netdev->features |= NETIF_F_LLTX;
  623. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  624. /* before reading the EEPROM, reset the controller to
  625. * put the device in a known good starting state */
  626. e1000_reset_hw(&adapter->hw);
  627. /* make sure the EEPROM is good */
  628. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  629. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  630. err = -EIO;
  631. goto err_eeprom;
  632. }
  633. /* copy the MAC address out of the EEPROM */
  634. if(e1000_read_mac_addr(&adapter->hw))
  635. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  636. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  637. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  638. if(!is_valid_ether_addr(netdev->perm_addr)) {
  639. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  640. err = -EIO;
  641. goto err_eeprom;
  642. }
  643. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  644. e1000_get_bus_info(&adapter->hw);
  645. init_timer(&adapter->tx_fifo_stall_timer);
  646. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  647. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  648. init_timer(&adapter->watchdog_timer);
  649. adapter->watchdog_timer.function = &e1000_watchdog;
  650. adapter->watchdog_timer.data = (unsigned long) adapter;
  651. INIT_WORK(&adapter->watchdog_task,
  652. (void (*)(void *))e1000_watchdog_task, adapter);
  653. init_timer(&adapter->phy_info_timer);
  654. adapter->phy_info_timer.function = &e1000_update_phy_info;
  655. adapter->phy_info_timer.data = (unsigned long) adapter;
  656. INIT_WORK(&adapter->tx_timeout_task,
  657. (void (*)(void *))e1000_tx_timeout_task, netdev);
  658. /* we're going to reset, so assume we have no link for now */
  659. netif_carrier_off(netdev);
  660. netif_stop_queue(netdev);
  661. e1000_check_options(adapter);
  662. /* Initial Wake on LAN setting
  663. * If APM wake is enabled in the EEPROM,
  664. * enable the ACPI Magic Packet filter
  665. */
  666. switch(adapter->hw.mac_type) {
  667. case e1000_82542_rev2_0:
  668. case e1000_82542_rev2_1:
  669. case e1000_82543:
  670. break;
  671. case e1000_82544:
  672. e1000_read_eeprom(&adapter->hw,
  673. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  674. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  675. break;
  676. case e1000_82546:
  677. case e1000_82546_rev_3:
  678. case e1000_82571:
  679. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  680. && (adapter->hw.media_type == e1000_media_type_copper)) {
  681. e1000_read_eeprom(&adapter->hw,
  682. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  683. break;
  684. }
  685. /* Fall Through */
  686. default:
  687. e1000_read_eeprom(&adapter->hw,
  688. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  689. break;
  690. }
  691. if(eeprom_data & eeprom_apme_mask)
  692. adapter->wol |= E1000_WUFC_MAG;
  693. /* reset the hardware with the new settings */
  694. e1000_reset(adapter);
  695. /* If the controller is 82573 and f/w is AMT, do not set
  696. * DRV_LOAD until the interface is up. For all other cases,
  697. * let the f/w know that the h/w is now under the control
  698. * of the driver. */
  699. if (adapter->hw.mac_type != e1000_82573 ||
  700. !e1000_check_mng_mode(&adapter->hw))
  701. e1000_get_hw_control(adapter);
  702. strcpy(netdev->name, "eth%d");
  703. if((err = register_netdev(netdev)))
  704. goto err_register;
  705. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  706. cards_found++;
  707. return 0;
  708. err_register:
  709. err_sw_init:
  710. err_eeprom:
  711. iounmap(adapter->hw.hw_addr);
  712. err_ioremap:
  713. free_netdev(netdev);
  714. err_alloc_etherdev:
  715. pci_release_regions(pdev);
  716. return err;
  717. }
  718. /**
  719. * e1000_remove - Device Removal Routine
  720. * @pdev: PCI device information struct
  721. *
  722. * e1000_remove is called by the PCI subsystem to alert the driver
  723. * that it should release a PCI device. The could be caused by a
  724. * Hot-Plug event, or because the driver is going to be removed from
  725. * memory.
  726. **/
  727. static void __devexit
  728. e1000_remove(struct pci_dev *pdev)
  729. {
  730. struct net_device *netdev = pci_get_drvdata(pdev);
  731. struct e1000_adapter *adapter = netdev_priv(netdev);
  732. uint32_t manc;
  733. #ifdef CONFIG_E1000_NAPI
  734. int i;
  735. #endif
  736. flush_scheduled_work();
  737. if(adapter->hw.mac_type >= e1000_82540 &&
  738. adapter->hw.media_type == e1000_media_type_copper) {
  739. manc = E1000_READ_REG(&adapter->hw, MANC);
  740. if(manc & E1000_MANC_SMBUS_EN) {
  741. manc |= E1000_MANC_ARP_EN;
  742. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  743. }
  744. }
  745. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  746. * would have already happened in close and is redundant. */
  747. e1000_release_hw_control(adapter);
  748. unregister_netdev(netdev);
  749. #ifdef CONFIG_E1000_NAPI
  750. for (i = 0; i < adapter->num_rx_queues; i++)
  751. __dev_put(&adapter->polling_netdev[i]);
  752. #endif
  753. if(!e1000_check_phy_reset_block(&adapter->hw))
  754. e1000_phy_hw_reset(&adapter->hw);
  755. kfree(adapter->tx_ring);
  756. kfree(adapter->rx_ring);
  757. #ifdef CONFIG_E1000_NAPI
  758. kfree(adapter->polling_netdev);
  759. #endif
  760. iounmap(adapter->hw.hw_addr);
  761. pci_release_regions(pdev);
  762. #ifdef CONFIG_E1000_MQ
  763. free_percpu(adapter->cpu_netdev);
  764. free_percpu(adapter->cpu_tx_ring);
  765. #endif
  766. free_netdev(netdev);
  767. pci_disable_device(pdev);
  768. }
  769. /**
  770. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  771. * @adapter: board private structure to initialize
  772. *
  773. * e1000_sw_init initializes the Adapter private data structure.
  774. * Fields are initialized based on PCI device information and
  775. * OS network device settings (MTU size).
  776. **/
  777. static int __devinit
  778. e1000_sw_init(struct e1000_adapter *adapter)
  779. {
  780. struct e1000_hw *hw = &adapter->hw;
  781. struct net_device *netdev = adapter->netdev;
  782. struct pci_dev *pdev = adapter->pdev;
  783. #ifdef CONFIG_E1000_NAPI
  784. int i;
  785. #endif
  786. /* PCI config space info */
  787. hw->vendor_id = pdev->vendor;
  788. hw->device_id = pdev->device;
  789. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  790. hw->subsystem_id = pdev->subsystem_device;
  791. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  792. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  793. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  794. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  795. hw->max_frame_size = netdev->mtu +
  796. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  797. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  798. /* identify the MAC */
  799. if(e1000_set_mac_type(hw)) {
  800. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  801. return -EIO;
  802. }
  803. /* initialize eeprom parameters */
  804. if(e1000_init_eeprom_params(hw)) {
  805. E1000_ERR("EEPROM initialization failed\n");
  806. return -EIO;
  807. }
  808. switch(hw->mac_type) {
  809. default:
  810. break;
  811. case e1000_82541:
  812. case e1000_82547:
  813. case e1000_82541_rev_2:
  814. case e1000_82547_rev_2:
  815. hw->phy_init_script = 1;
  816. break;
  817. }
  818. e1000_set_media_type(hw);
  819. hw->wait_autoneg_complete = FALSE;
  820. hw->tbi_compatibility_en = TRUE;
  821. hw->adaptive_ifs = TRUE;
  822. /* Copper options */
  823. if(hw->media_type == e1000_media_type_copper) {
  824. hw->mdix = AUTO_ALL_MODES;
  825. hw->disable_polarity_correction = FALSE;
  826. hw->master_slave = E1000_MASTER_SLAVE;
  827. }
  828. #ifdef CONFIG_E1000_MQ
  829. /* Number of supported queues */
  830. switch (hw->mac_type) {
  831. case e1000_82571:
  832. case e1000_82572:
  833. /* These controllers support 2 tx queues, but with a single
  834. * qdisc implementation, multiple tx queues aren't quite as
  835. * interesting. If we can find a logical way of mapping
  836. * flows to a queue, then perhaps we can up the num_tx_queue
  837. * count back to its default. Until then, we run the risk of
  838. * terrible performance due to SACK overload. */
  839. adapter->num_tx_queues = 1;
  840. adapter->num_rx_queues = 2;
  841. break;
  842. default:
  843. adapter->num_tx_queues = 1;
  844. adapter->num_rx_queues = 1;
  845. break;
  846. }
  847. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  848. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  849. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  850. adapter->num_rx_queues,
  851. ((adapter->num_rx_queues == 1)
  852. ? ((num_online_cpus() > 1)
  853. ? "(due to unsupported feature in current adapter)"
  854. : "(due to unsupported system configuration)")
  855. : ""));
  856. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  857. adapter->num_tx_queues);
  858. #else
  859. adapter->num_tx_queues = 1;
  860. adapter->num_rx_queues = 1;
  861. #endif
  862. if (e1000_alloc_queues(adapter)) {
  863. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  864. return -ENOMEM;
  865. }
  866. #ifdef CONFIG_E1000_NAPI
  867. for (i = 0; i < adapter->num_rx_queues; i++) {
  868. adapter->polling_netdev[i].priv = adapter;
  869. adapter->polling_netdev[i].poll = &e1000_clean;
  870. adapter->polling_netdev[i].weight = 64;
  871. dev_hold(&adapter->polling_netdev[i]);
  872. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  873. }
  874. spin_lock_init(&adapter->tx_queue_lock);
  875. #endif
  876. atomic_set(&adapter->irq_sem, 1);
  877. spin_lock_init(&adapter->stats_lock);
  878. return 0;
  879. }
  880. /**
  881. * e1000_alloc_queues - Allocate memory for all rings
  882. * @adapter: board private structure to initialize
  883. *
  884. * We allocate one ring per queue at run-time since we don't know the
  885. * number of queues at compile-time. The polling_netdev array is
  886. * intended for Multiqueue, but should work fine with a single queue.
  887. **/
  888. static int __devinit
  889. e1000_alloc_queues(struct e1000_adapter *adapter)
  890. {
  891. int size;
  892. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  893. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  894. if (!adapter->tx_ring)
  895. return -ENOMEM;
  896. memset(adapter->tx_ring, 0, size);
  897. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  898. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  899. if (!adapter->rx_ring) {
  900. kfree(adapter->tx_ring);
  901. return -ENOMEM;
  902. }
  903. memset(adapter->rx_ring, 0, size);
  904. #ifdef CONFIG_E1000_NAPI
  905. size = sizeof(struct net_device) * adapter->num_rx_queues;
  906. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  907. if (!adapter->polling_netdev) {
  908. kfree(adapter->tx_ring);
  909. kfree(adapter->rx_ring);
  910. return -ENOMEM;
  911. }
  912. memset(adapter->polling_netdev, 0, size);
  913. #endif
  914. #ifdef CONFIG_E1000_MQ
  915. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  916. adapter->rx_sched_call_data.info = adapter->netdev;
  917. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  918. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  919. #endif
  920. return E1000_SUCCESS;
  921. }
  922. #ifdef CONFIG_E1000_MQ
  923. static void __devinit
  924. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  925. {
  926. int i, cpu;
  927. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  928. adapter->rx_sched_call_data.info = adapter->netdev;
  929. cpus_clear(adapter->rx_sched_call_data.cpumask);
  930. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  931. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  932. lock_cpu_hotplug();
  933. i = 0;
  934. for_each_online_cpu(cpu) {
  935. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  936. /* This is incomplete because we'd like to assign separate
  937. * physical cpus to these netdev polling structures and
  938. * avoid saturating a subset of cpus.
  939. */
  940. if (i < adapter->num_rx_queues) {
  941. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  942. adapter->rx_ring[i].cpu = cpu;
  943. cpu_set(cpu, adapter->cpumask);
  944. } else
  945. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  946. i++;
  947. }
  948. unlock_cpu_hotplug();
  949. }
  950. #endif
  951. /**
  952. * e1000_open - Called when a network interface is made active
  953. * @netdev: network interface device structure
  954. *
  955. * Returns 0 on success, negative value on failure
  956. *
  957. * The open entry point is called when a network interface is made
  958. * active by the system (IFF_UP). At this point all resources needed
  959. * for transmit and receive operations are allocated, the interrupt
  960. * handler is registered with the OS, the watchdog timer is started,
  961. * and the stack is notified that the interface is ready.
  962. **/
  963. static int
  964. e1000_open(struct net_device *netdev)
  965. {
  966. struct e1000_adapter *adapter = netdev_priv(netdev);
  967. int err;
  968. /* allocate transmit descriptors */
  969. if ((err = e1000_setup_all_tx_resources(adapter)))
  970. goto err_setup_tx;
  971. /* allocate receive descriptors */
  972. if ((err = e1000_setup_all_rx_resources(adapter)))
  973. goto err_setup_rx;
  974. if((err = e1000_up(adapter)))
  975. goto err_up;
  976. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  977. if((adapter->hw.mng_cookie.status &
  978. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  979. e1000_update_mng_vlan(adapter);
  980. }
  981. /* If AMT is enabled, let the firmware know that the network
  982. * interface is now open */
  983. if (adapter->hw.mac_type == e1000_82573 &&
  984. e1000_check_mng_mode(&adapter->hw))
  985. e1000_get_hw_control(adapter);
  986. return E1000_SUCCESS;
  987. err_up:
  988. e1000_free_all_rx_resources(adapter);
  989. err_setup_rx:
  990. e1000_free_all_tx_resources(adapter);
  991. err_setup_tx:
  992. e1000_reset(adapter);
  993. return err;
  994. }
  995. /**
  996. * e1000_close - Disables a network interface
  997. * @netdev: network interface device structure
  998. *
  999. * Returns 0, this is not allowed to fail
  1000. *
  1001. * The close entry point is called when an interface is de-activated
  1002. * by the OS. The hardware is still under the drivers control, but
  1003. * needs to be disabled. A global MAC reset is issued to stop the
  1004. * hardware, and all transmit and receive resources are freed.
  1005. **/
  1006. static int
  1007. e1000_close(struct net_device *netdev)
  1008. {
  1009. struct e1000_adapter *adapter = netdev_priv(netdev);
  1010. e1000_down(adapter);
  1011. e1000_free_all_tx_resources(adapter);
  1012. e1000_free_all_rx_resources(adapter);
  1013. if((adapter->hw.mng_cookie.status &
  1014. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1015. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1016. }
  1017. /* If AMT is enabled, let the firmware know that the network
  1018. * interface is now closed */
  1019. if (adapter->hw.mac_type == e1000_82573 &&
  1020. e1000_check_mng_mode(&adapter->hw))
  1021. e1000_release_hw_control(adapter);
  1022. return 0;
  1023. }
  1024. /**
  1025. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1026. * @adapter: address of board private structure
  1027. * @start: address of beginning of memory
  1028. * @len: length of memory
  1029. **/
  1030. static inline boolean_t
  1031. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1032. void *start, unsigned long len)
  1033. {
  1034. unsigned long begin = (unsigned long) start;
  1035. unsigned long end = begin + len;
  1036. /* First rev 82545 and 82546 need to not allow any memory
  1037. * write location to cross 64k boundary due to errata 23 */
  1038. if (adapter->hw.mac_type == e1000_82545 ||
  1039. adapter->hw.mac_type == e1000_82546) {
  1040. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1041. }
  1042. return TRUE;
  1043. }
  1044. /**
  1045. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1046. * @adapter: board private structure
  1047. * @txdr: tx descriptor ring (for a specific queue) to setup
  1048. *
  1049. * Return 0 on success, negative on failure
  1050. **/
  1051. static int
  1052. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1053. struct e1000_tx_ring *txdr)
  1054. {
  1055. struct pci_dev *pdev = adapter->pdev;
  1056. int size;
  1057. size = sizeof(struct e1000_buffer) * txdr->count;
  1058. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1059. if(!txdr->buffer_info) {
  1060. DPRINTK(PROBE, ERR,
  1061. "Unable to allocate memory for the transmit descriptor ring\n");
  1062. return -ENOMEM;
  1063. }
  1064. memset(txdr->buffer_info, 0, size);
  1065. /* round up to nearest 4K */
  1066. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1067. E1000_ROUNDUP(txdr->size, 4096);
  1068. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1069. if(!txdr->desc) {
  1070. setup_tx_desc_die:
  1071. vfree(txdr->buffer_info);
  1072. DPRINTK(PROBE, ERR,
  1073. "Unable to allocate memory for the transmit descriptor ring\n");
  1074. return -ENOMEM;
  1075. }
  1076. /* Fix for errata 23, can't cross 64kB boundary */
  1077. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1078. void *olddesc = txdr->desc;
  1079. dma_addr_t olddma = txdr->dma;
  1080. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1081. "at %p\n", txdr->size, txdr->desc);
  1082. /* Try again, without freeing the previous */
  1083. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1084. if(!txdr->desc) {
  1085. /* Failed allocation, critical failure */
  1086. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1087. goto setup_tx_desc_die;
  1088. }
  1089. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1090. /* give up */
  1091. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1092. txdr->dma);
  1093. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1094. DPRINTK(PROBE, ERR,
  1095. "Unable to allocate aligned memory "
  1096. "for the transmit descriptor ring\n");
  1097. vfree(txdr->buffer_info);
  1098. return -ENOMEM;
  1099. } else {
  1100. /* Free old allocation, new allocation was successful */
  1101. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1102. }
  1103. }
  1104. memset(txdr->desc, 0, txdr->size);
  1105. txdr->next_to_use = 0;
  1106. txdr->next_to_clean = 0;
  1107. spin_lock_init(&txdr->tx_lock);
  1108. return 0;
  1109. }
  1110. /**
  1111. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1112. * (Descriptors) for all queues
  1113. * @adapter: board private structure
  1114. *
  1115. * If this function returns with an error, then it's possible one or
  1116. * more of the rings is populated (while the rest are not). It is the
  1117. * callers duty to clean those orphaned rings.
  1118. *
  1119. * Return 0 on success, negative on failure
  1120. **/
  1121. int
  1122. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1123. {
  1124. int i, err = 0;
  1125. for (i = 0; i < adapter->num_tx_queues; i++) {
  1126. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1127. if (err) {
  1128. DPRINTK(PROBE, ERR,
  1129. "Allocation for Tx Queue %u failed\n", i);
  1130. break;
  1131. }
  1132. }
  1133. return err;
  1134. }
  1135. /**
  1136. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1137. * @adapter: board private structure
  1138. *
  1139. * Configure the Tx unit of the MAC after a reset.
  1140. **/
  1141. static void
  1142. e1000_configure_tx(struct e1000_adapter *adapter)
  1143. {
  1144. uint64_t tdba;
  1145. struct e1000_hw *hw = &adapter->hw;
  1146. uint32_t tdlen, tctl, tipg, tarc;
  1147. uint32_t ipgr1, ipgr2;
  1148. /* Setup the HW Tx Head and Tail descriptor pointers */
  1149. switch (adapter->num_tx_queues) {
  1150. case 2:
  1151. tdba = adapter->tx_ring[1].dma;
  1152. tdlen = adapter->tx_ring[1].count *
  1153. sizeof(struct e1000_tx_desc);
  1154. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1155. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1156. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1157. E1000_WRITE_REG(hw, TDH1, 0);
  1158. E1000_WRITE_REG(hw, TDT1, 0);
  1159. adapter->tx_ring[1].tdh = E1000_TDH1;
  1160. adapter->tx_ring[1].tdt = E1000_TDT1;
  1161. /* Fall Through */
  1162. case 1:
  1163. default:
  1164. tdba = adapter->tx_ring[0].dma;
  1165. tdlen = adapter->tx_ring[0].count *
  1166. sizeof(struct e1000_tx_desc);
  1167. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1168. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1169. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1170. E1000_WRITE_REG(hw, TDH, 0);
  1171. E1000_WRITE_REG(hw, TDT, 0);
  1172. adapter->tx_ring[0].tdh = E1000_TDH;
  1173. adapter->tx_ring[0].tdt = E1000_TDT;
  1174. break;
  1175. }
  1176. /* Set the default values for the Tx Inter Packet Gap timer */
  1177. if (hw->media_type == e1000_media_type_fiber ||
  1178. hw->media_type == e1000_media_type_internal_serdes)
  1179. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1180. else
  1181. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1182. switch (hw->mac_type) {
  1183. case e1000_82542_rev2_0:
  1184. case e1000_82542_rev2_1:
  1185. tipg = DEFAULT_82542_TIPG_IPGT;
  1186. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1187. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1188. break;
  1189. default:
  1190. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1191. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1192. break;
  1193. }
  1194. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1195. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1196. E1000_WRITE_REG(hw, TIPG, tipg);
  1197. /* Set the Tx Interrupt Delay register */
  1198. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1199. if (hw->mac_type >= e1000_82540)
  1200. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1201. /* Program the Transmit Control Register */
  1202. tctl = E1000_READ_REG(hw, TCTL);
  1203. tctl &= ~E1000_TCTL_CT;
  1204. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1205. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1206. E1000_WRITE_REG(hw, TCTL, tctl);
  1207. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1208. tarc = E1000_READ_REG(hw, TARC0);
  1209. tarc |= ((1 << 25) | (1 << 21));
  1210. E1000_WRITE_REG(hw, TARC0, tarc);
  1211. tarc = E1000_READ_REG(hw, TARC1);
  1212. tarc |= (1 << 25);
  1213. if (tctl & E1000_TCTL_MULR)
  1214. tarc &= ~(1 << 28);
  1215. else
  1216. tarc |= (1 << 28);
  1217. E1000_WRITE_REG(hw, TARC1, tarc);
  1218. }
  1219. e1000_config_collision_dist(hw);
  1220. /* Setup Transmit Descriptor Settings for eop descriptor */
  1221. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1222. E1000_TXD_CMD_IFCS;
  1223. if (hw->mac_type < e1000_82543)
  1224. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1225. else
  1226. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1227. /* Cache if we're 82544 running in PCI-X because we'll
  1228. * need this to apply a workaround later in the send path. */
  1229. if (hw->mac_type == e1000_82544 &&
  1230. hw->bus_type == e1000_bus_type_pcix)
  1231. adapter->pcix_82544 = 1;
  1232. }
  1233. /**
  1234. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1235. * @adapter: board private structure
  1236. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1237. *
  1238. * Returns 0 on success, negative on failure
  1239. **/
  1240. static int
  1241. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1242. struct e1000_rx_ring *rxdr)
  1243. {
  1244. struct pci_dev *pdev = adapter->pdev;
  1245. int size, desc_len;
  1246. size = sizeof(struct e1000_buffer) * rxdr->count;
  1247. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1248. if (!rxdr->buffer_info) {
  1249. DPRINTK(PROBE, ERR,
  1250. "Unable to allocate memory for the receive descriptor ring\n");
  1251. return -ENOMEM;
  1252. }
  1253. memset(rxdr->buffer_info, 0, size);
  1254. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1255. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1256. if(!rxdr->ps_page) {
  1257. vfree(rxdr->buffer_info);
  1258. DPRINTK(PROBE, ERR,
  1259. "Unable to allocate memory for the receive descriptor ring\n");
  1260. return -ENOMEM;
  1261. }
  1262. memset(rxdr->ps_page, 0, size);
  1263. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1264. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1265. if(!rxdr->ps_page_dma) {
  1266. vfree(rxdr->buffer_info);
  1267. kfree(rxdr->ps_page);
  1268. DPRINTK(PROBE, ERR,
  1269. "Unable to allocate memory for the receive descriptor ring\n");
  1270. return -ENOMEM;
  1271. }
  1272. memset(rxdr->ps_page_dma, 0, size);
  1273. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1274. desc_len = sizeof(struct e1000_rx_desc);
  1275. else
  1276. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1277. /* Round up to nearest 4K */
  1278. rxdr->size = rxdr->count * desc_len;
  1279. E1000_ROUNDUP(rxdr->size, 4096);
  1280. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1281. if (!rxdr->desc) {
  1282. DPRINTK(PROBE, ERR,
  1283. "Unable to allocate memory for the receive descriptor ring\n");
  1284. setup_rx_desc_die:
  1285. vfree(rxdr->buffer_info);
  1286. kfree(rxdr->ps_page);
  1287. kfree(rxdr->ps_page_dma);
  1288. return -ENOMEM;
  1289. }
  1290. /* Fix for errata 23, can't cross 64kB boundary */
  1291. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1292. void *olddesc = rxdr->desc;
  1293. dma_addr_t olddma = rxdr->dma;
  1294. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1295. "at %p\n", rxdr->size, rxdr->desc);
  1296. /* Try again, without freeing the previous */
  1297. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1298. /* Failed allocation, critical failure */
  1299. if (!rxdr->desc) {
  1300. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1301. DPRINTK(PROBE, ERR,
  1302. "Unable to allocate memory "
  1303. "for the receive descriptor ring\n");
  1304. goto setup_rx_desc_die;
  1305. }
  1306. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1307. /* give up */
  1308. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1309. rxdr->dma);
  1310. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1311. DPRINTK(PROBE, ERR,
  1312. "Unable to allocate aligned memory "
  1313. "for the receive descriptor ring\n");
  1314. goto setup_rx_desc_die;
  1315. } else {
  1316. /* Free old allocation, new allocation was successful */
  1317. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1318. }
  1319. }
  1320. memset(rxdr->desc, 0, rxdr->size);
  1321. rxdr->next_to_clean = 0;
  1322. rxdr->next_to_use = 0;
  1323. rxdr->rx_skb_top = NULL;
  1324. rxdr->rx_skb_prev = NULL;
  1325. return 0;
  1326. }
  1327. /**
  1328. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1329. * (Descriptors) for all queues
  1330. * @adapter: board private structure
  1331. *
  1332. * If this function returns with an error, then it's possible one or
  1333. * more of the rings is populated (while the rest are not). It is the
  1334. * callers duty to clean those orphaned rings.
  1335. *
  1336. * Return 0 on success, negative on failure
  1337. **/
  1338. int
  1339. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1340. {
  1341. int i, err = 0;
  1342. for (i = 0; i < adapter->num_rx_queues; i++) {
  1343. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1344. if (err) {
  1345. DPRINTK(PROBE, ERR,
  1346. "Allocation for Rx Queue %u failed\n", i);
  1347. break;
  1348. }
  1349. }
  1350. return err;
  1351. }
  1352. /**
  1353. * e1000_setup_rctl - configure the receive control registers
  1354. * @adapter: Board private structure
  1355. **/
  1356. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1357. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1358. static void
  1359. e1000_setup_rctl(struct e1000_adapter *adapter)
  1360. {
  1361. uint32_t rctl, rfctl;
  1362. uint32_t psrctl = 0;
  1363. #ifdef CONFIG_E1000_PACKET_SPLIT
  1364. uint32_t pages = 0;
  1365. #endif
  1366. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1367. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1368. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1369. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1370. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1371. if (adapter->hw.mac_type > e1000_82543)
  1372. rctl |= E1000_RCTL_SECRC;
  1373. if (adapter->hw.tbi_compatibility_on == 1)
  1374. rctl |= E1000_RCTL_SBP;
  1375. else
  1376. rctl &= ~E1000_RCTL_SBP;
  1377. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1378. rctl &= ~E1000_RCTL_LPE;
  1379. else
  1380. rctl |= E1000_RCTL_LPE;
  1381. /* Setup buffer sizes */
  1382. if(adapter->hw.mac_type >= e1000_82571) {
  1383. /* We can now specify buffers in 1K increments.
  1384. * BSIZE and BSEX are ignored in this case. */
  1385. rctl |= adapter->rx_buffer_len << 0x11;
  1386. } else {
  1387. rctl &= ~E1000_RCTL_SZ_4096;
  1388. rctl |= E1000_RCTL_BSEX;
  1389. switch (adapter->rx_buffer_len) {
  1390. case E1000_RXBUFFER_2048:
  1391. default:
  1392. rctl |= E1000_RCTL_SZ_2048;
  1393. rctl &= ~E1000_RCTL_BSEX;
  1394. break;
  1395. case E1000_RXBUFFER_4096:
  1396. rctl |= E1000_RCTL_SZ_4096;
  1397. break;
  1398. case E1000_RXBUFFER_8192:
  1399. rctl |= E1000_RCTL_SZ_8192;
  1400. break;
  1401. case E1000_RXBUFFER_16384:
  1402. rctl |= E1000_RCTL_SZ_16384;
  1403. break;
  1404. }
  1405. }
  1406. #ifdef CONFIG_E1000_PACKET_SPLIT
  1407. /* 82571 and greater support packet-split where the protocol
  1408. * header is placed in skb->data and the packet data is
  1409. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1410. * In the case of a non-split, skb->data is linearly filled,
  1411. * followed by the page buffers. Therefore, skb->data is
  1412. * sized to hold the largest protocol header.
  1413. */
  1414. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1415. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1416. PAGE_SIZE <= 16384)
  1417. adapter->rx_ps_pages = pages;
  1418. else
  1419. adapter->rx_ps_pages = 0;
  1420. #endif
  1421. if (adapter->rx_ps_pages) {
  1422. /* Configure extra packet-split registers */
  1423. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1424. rfctl |= E1000_RFCTL_EXTEN;
  1425. /* disable IPv6 packet split support */
  1426. rfctl |= E1000_RFCTL_IPV6_DIS;
  1427. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1428. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1429. psrctl |= adapter->rx_ps_bsize0 >>
  1430. E1000_PSRCTL_BSIZE0_SHIFT;
  1431. switch (adapter->rx_ps_pages) {
  1432. case 3:
  1433. psrctl |= PAGE_SIZE <<
  1434. E1000_PSRCTL_BSIZE3_SHIFT;
  1435. case 2:
  1436. psrctl |= PAGE_SIZE <<
  1437. E1000_PSRCTL_BSIZE2_SHIFT;
  1438. case 1:
  1439. psrctl |= PAGE_SIZE >>
  1440. E1000_PSRCTL_BSIZE1_SHIFT;
  1441. break;
  1442. }
  1443. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1444. }
  1445. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1446. }
  1447. /**
  1448. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1449. * @adapter: board private structure
  1450. *
  1451. * Configure the Rx unit of the MAC after a reset.
  1452. **/
  1453. static void
  1454. e1000_configure_rx(struct e1000_adapter *adapter)
  1455. {
  1456. uint64_t rdba;
  1457. struct e1000_hw *hw = &adapter->hw;
  1458. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1459. #ifdef CONFIG_E1000_MQ
  1460. uint32_t reta, mrqc;
  1461. int i;
  1462. #endif
  1463. if (adapter->rx_ps_pages) {
  1464. rdlen = adapter->rx_ring[0].count *
  1465. sizeof(union e1000_rx_desc_packet_split);
  1466. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1467. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1468. } else {
  1469. rdlen = adapter->rx_ring[0].count *
  1470. sizeof(struct e1000_rx_desc);
  1471. adapter->clean_rx = e1000_clean_rx_irq;
  1472. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1473. }
  1474. /* disable receives while setting up the descriptors */
  1475. rctl = E1000_READ_REG(hw, RCTL);
  1476. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1477. /* set the Receive Delay Timer Register */
  1478. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1479. if (hw->mac_type >= e1000_82540) {
  1480. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1481. if(adapter->itr > 1)
  1482. E1000_WRITE_REG(hw, ITR,
  1483. 1000000000 / (adapter->itr * 256));
  1484. }
  1485. if (hw->mac_type >= e1000_82571) {
  1486. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1487. /* Reset delay timers after every interrupt */
  1488. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1489. #ifdef CONFIG_E1000_NAPI
  1490. /* Auto-Mask interrupts upon ICR read. */
  1491. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1492. #endif
  1493. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1494. E1000_WRITE_REG(hw, IAM, ~0);
  1495. E1000_WRITE_FLUSH(hw);
  1496. }
  1497. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1498. * the Base and Length of the Rx Descriptor Ring */
  1499. switch (adapter->num_rx_queues) {
  1500. #ifdef CONFIG_E1000_MQ
  1501. case 2:
  1502. rdba = adapter->rx_ring[1].dma;
  1503. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1504. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1505. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1506. E1000_WRITE_REG(hw, RDH1, 0);
  1507. E1000_WRITE_REG(hw, RDT1, 0);
  1508. adapter->rx_ring[1].rdh = E1000_RDH1;
  1509. adapter->rx_ring[1].rdt = E1000_RDT1;
  1510. /* Fall Through */
  1511. #endif
  1512. case 1:
  1513. default:
  1514. rdba = adapter->rx_ring[0].dma;
  1515. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1516. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1517. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1518. E1000_WRITE_REG(hw, RDH, 0);
  1519. E1000_WRITE_REG(hw, RDT, 0);
  1520. adapter->rx_ring[0].rdh = E1000_RDH;
  1521. adapter->rx_ring[0].rdt = E1000_RDT;
  1522. break;
  1523. }
  1524. #ifdef CONFIG_E1000_MQ
  1525. if (adapter->num_rx_queues > 1) {
  1526. uint32_t random[10];
  1527. get_random_bytes(&random[0], 40);
  1528. if (hw->mac_type <= e1000_82572) {
  1529. E1000_WRITE_REG(hw, RSSIR, 0);
  1530. E1000_WRITE_REG(hw, RSSIM, 0);
  1531. }
  1532. switch (adapter->num_rx_queues) {
  1533. case 2:
  1534. default:
  1535. reta = 0x00800080;
  1536. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1537. break;
  1538. }
  1539. /* Fill out redirection table */
  1540. for (i = 0; i < 32; i++)
  1541. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1542. /* Fill out hash function seeds */
  1543. for (i = 0; i < 10; i++)
  1544. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1545. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1546. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1547. E1000_WRITE_REG(hw, MRQC, mrqc);
  1548. }
  1549. /* Multiqueue and packet checksumming are mutually exclusive. */
  1550. if (hw->mac_type >= e1000_82571) {
  1551. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1552. rxcsum |= E1000_RXCSUM_PCSD;
  1553. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1554. }
  1555. #else
  1556. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1557. if (hw->mac_type >= e1000_82543) {
  1558. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1559. if(adapter->rx_csum == TRUE) {
  1560. rxcsum |= E1000_RXCSUM_TUOFL;
  1561. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1562. * Must be used in conjunction with packet-split. */
  1563. if ((hw->mac_type >= e1000_82571) &&
  1564. (adapter->rx_ps_pages)) {
  1565. rxcsum |= E1000_RXCSUM_IPPCSE;
  1566. }
  1567. } else {
  1568. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1569. /* don't need to clear IPPCSE as it defaults to 0 */
  1570. }
  1571. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1572. }
  1573. #endif /* CONFIG_E1000_MQ */
  1574. if (hw->mac_type == e1000_82573)
  1575. E1000_WRITE_REG(hw, ERT, 0x0100);
  1576. /* Enable Receives */
  1577. E1000_WRITE_REG(hw, RCTL, rctl);
  1578. }
  1579. /**
  1580. * e1000_free_tx_resources - Free Tx Resources per Queue
  1581. * @adapter: board private structure
  1582. * @tx_ring: Tx descriptor ring for a specific queue
  1583. *
  1584. * Free all transmit software resources
  1585. **/
  1586. static void
  1587. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1588. struct e1000_tx_ring *tx_ring)
  1589. {
  1590. struct pci_dev *pdev = adapter->pdev;
  1591. e1000_clean_tx_ring(adapter, tx_ring);
  1592. vfree(tx_ring->buffer_info);
  1593. tx_ring->buffer_info = NULL;
  1594. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1595. tx_ring->desc = NULL;
  1596. }
  1597. /**
  1598. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1599. * @adapter: board private structure
  1600. *
  1601. * Free all transmit software resources
  1602. **/
  1603. void
  1604. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1605. {
  1606. int i;
  1607. for (i = 0; i < adapter->num_tx_queues; i++)
  1608. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1609. }
  1610. static inline void
  1611. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1612. struct e1000_buffer *buffer_info)
  1613. {
  1614. if(buffer_info->dma) {
  1615. pci_unmap_page(adapter->pdev,
  1616. buffer_info->dma,
  1617. buffer_info->length,
  1618. PCI_DMA_TODEVICE);
  1619. buffer_info->dma = 0;
  1620. }
  1621. if(buffer_info->skb) {
  1622. dev_kfree_skb_any(buffer_info->skb);
  1623. buffer_info->skb = NULL;
  1624. }
  1625. }
  1626. /**
  1627. * e1000_clean_tx_ring - Free Tx Buffers
  1628. * @adapter: board private structure
  1629. * @tx_ring: ring to be cleaned
  1630. **/
  1631. static void
  1632. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1633. struct e1000_tx_ring *tx_ring)
  1634. {
  1635. struct e1000_buffer *buffer_info;
  1636. unsigned long size;
  1637. unsigned int i;
  1638. /* Free all the Tx ring sk_buffs */
  1639. for(i = 0; i < tx_ring->count; i++) {
  1640. buffer_info = &tx_ring->buffer_info[i];
  1641. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1642. }
  1643. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1644. memset(tx_ring->buffer_info, 0, size);
  1645. /* Zero out the descriptor ring */
  1646. memset(tx_ring->desc, 0, tx_ring->size);
  1647. tx_ring->next_to_use = 0;
  1648. tx_ring->next_to_clean = 0;
  1649. tx_ring->last_tx_tso = 0;
  1650. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1651. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1652. }
  1653. /**
  1654. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1655. * @adapter: board private structure
  1656. **/
  1657. static void
  1658. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1659. {
  1660. int i;
  1661. for (i = 0; i < adapter->num_tx_queues; i++)
  1662. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1663. }
  1664. /**
  1665. * e1000_free_rx_resources - Free Rx Resources
  1666. * @adapter: board private structure
  1667. * @rx_ring: ring to clean the resources from
  1668. *
  1669. * Free all receive software resources
  1670. **/
  1671. static void
  1672. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1673. struct e1000_rx_ring *rx_ring)
  1674. {
  1675. struct pci_dev *pdev = adapter->pdev;
  1676. e1000_clean_rx_ring(adapter, rx_ring);
  1677. vfree(rx_ring->buffer_info);
  1678. rx_ring->buffer_info = NULL;
  1679. kfree(rx_ring->ps_page);
  1680. rx_ring->ps_page = NULL;
  1681. kfree(rx_ring->ps_page_dma);
  1682. rx_ring->ps_page_dma = NULL;
  1683. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1684. rx_ring->desc = NULL;
  1685. }
  1686. /**
  1687. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1688. * @adapter: board private structure
  1689. *
  1690. * Free all receive software resources
  1691. **/
  1692. void
  1693. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1694. {
  1695. int i;
  1696. for (i = 0; i < adapter->num_rx_queues; i++)
  1697. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1698. }
  1699. /**
  1700. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1701. * @adapter: board private structure
  1702. * @rx_ring: ring to free buffers from
  1703. **/
  1704. static void
  1705. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1706. struct e1000_rx_ring *rx_ring)
  1707. {
  1708. struct e1000_buffer *buffer_info;
  1709. struct e1000_ps_page *ps_page;
  1710. struct e1000_ps_page_dma *ps_page_dma;
  1711. struct pci_dev *pdev = adapter->pdev;
  1712. unsigned long size;
  1713. unsigned int i, j;
  1714. /* Free all the Rx ring sk_buffs */
  1715. for(i = 0; i < rx_ring->count; i++) {
  1716. buffer_info = &rx_ring->buffer_info[i];
  1717. if(buffer_info->skb) {
  1718. ps_page = &rx_ring->ps_page[i];
  1719. ps_page_dma = &rx_ring->ps_page_dma[i];
  1720. pci_unmap_single(pdev,
  1721. buffer_info->dma,
  1722. buffer_info->length,
  1723. PCI_DMA_FROMDEVICE);
  1724. dev_kfree_skb(buffer_info->skb);
  1725. buffer_info->skb = NULL;
  1726. }
  1727. ps_page = &rx_ring->ps_page[i];
  1728. ps_page_dma = &rx_ring->ps_page_dma[i];
  1729. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1730. if (!ps_page->ps_page[j]) break;
  1731. pci_unmap_page(pdev,
  1732. ps_page_dma->ps_page_dma[j],
  1733. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1734. ps_page_dma->ps_page_dma[j] = 0;
  1735. put_page(ps_page->ps_page[j]);
  1736. ps_page->ps_page[j] = NULL;
  1737. }
  1738. }
  1739. /* there also may be some cached data in our adapter */
  1740. if (rx_ring->rx_skb_top) {
  1741. dev_kfree_skb(rx_ring->rx_skb_top);
  1742. /* rx_skb_prev will be wiped out by rx_skb_top */
  1743. rx_ring->rx_skb_top = NULL;
  1744. rx_ring->rx_skb_prev = NULL;
  1745. }
  1746. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1747. memset(rx_ring->buffer_info, 0, size);
  1748. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1749. memset(rx_ring->ps_page, 0, size);
  1750. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1751. memset(rx_ring->ps_page_dma, 0, size);
  1752. /* Zero out the descriptor ring */
  1753. memset(rx_ring->desc, 0, rx_ring->size);
  1754. rx_ring->next_to_clean = 0;
  1755. rx_ring->next_to_use = 0;
  1756. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1757. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1758. }
  1759. /**
  1760. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1761. * @adapter: board private structure
  1762. **/
  1763. static void
  1764. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1765. {
  1766. int i;
  1767. for (i = 0; i < adapter->num_rx_queues; i++)
  1768. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1769. }
  1770. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1771. * and memory write and invalidate disabled for certain operations
  1772. */
  1773. static void
  1774. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1775. {
  1776. struct net_device *netdev = adapter->netdev;
  1777. uint32_t rctl;
  1778. e1000_pci_clear_mwi(&adapter->hw);
  1779. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1780. rctl |= E1000_RCTL_RST;
  1781. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1782. E1000_WRITE_FLUSH(&adapter->hw);
  1783. mdelay(5);
  1784. if(netif_running(netdev))
  1785. e1000_clean_all_rx_rings(adapter);
  1786. }
  1787. static void
  1788. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1789. {
  1790. struct net_device *netdev = adapter->netdev;
  1791. uint32_t rctl;
  1792. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1793. rctl &= ~E1000_RCTL_RST;
  1794. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1795. E1000_WRITE_FLUSH(&adapter->hw);
  1796. mdelay(5);
  1797. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1798. e1000_pci_set_mwi(&adapter->hw);
  1799. if(netif_running(netdev)) {
  1800. e1000_configure_rx(adapter);
  1801. /* No need to loop, because 82542 supports only 1 queue */
  1802. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1803. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1804. }
  1805. }
  1806. /**
  1807. * e1000_set_mac - Change the Ethernet Address of the NIC
  1808. * @netdev: network interface device structure
  1809. * @p: pointer to an address structure
  1810. *
  1811. * Returns 0 on success, negative on failure
  1812. **/
  1813. static int
  1814. e1000_set_mac(struct net_device *netdev, void *p)
  1815. {
  1816. struct e1000_adapter *adapter = netdev_priv(netdev);
  1817. struct sockaddr *addr = p;
  1818. if(!is_valid_ether_addr(addr->sa_data))
  1819. return -EADDRNOTAVAIL;
  1820. /* 82542 2.0 needs to be in reset to write receive address registers */
  1821. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1822. e1000_enter_82542_rst(adapter);
  1823. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1824. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1825. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1826. /* With 82571 controllers, LAA may be overwritten (with the default)
  1827. * due to controller reset from the other port. */
  1828. if (adapter->hw.mac_type == e1000_82571) {
  1829. /* activate the work around */
  1830. adapter->hw.laa_is_present = 1;
  1831. /* Hold a copy of the LAA in RAR[14] This is done so that
  1832. * between the time RAR[0] gets clobbered and the time it
  1833. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1834. * of the RARs and no incoming packets directed to this port
  1835. * are dropped. Eventaully the LAA will be in RAR[0] and
  1836. * RAR[14] */
  1837. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1838. E1000_RAR_ENTRIES - 1);
  1839. }
  1840. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1841. e1000_leave_82542_rst(adapter);
  1842. return 0;
  1843. }
  1844. /**
  1845. * e1000_set_multi - Multicast and Promiscuous mode set
  1846. * @netdev: network interface device structure
  1847. *
  1848. * The set_multi entry point is called whenever the multicast address
  1849. * list or the network interface flags are updated. This routine is
  1850. * responsible for configuring the hardware for proper multicast,
  1851. * promiscuous mode, and all-multi behavior.
  1852. **/
  1853. static void
  1854. e1000_set_multi(struct net_device *netdev)
  1855. {
  1856. struct e1000_adapter *adapter = netdev_priv(netdev);
  1857. struct e1000_hw *hw = &adapter->hw;
  1858. struct dev_mc_list *mc_ptr;
  1859. uint32_t rctl;
  1860. uint32_t hash_value;
  1861. int i, rar_entries = E1000_RAR_ENTRIES;
  1862. /* reserve RAR[14] for LAA over-write work-around */
  1863. if (adapter->hw.mac_type == e1000_82571)
  1864. rar_entries--;
  1865. /* Check for Promiscuous and All Multicast modes */
  1866. rctl = E1000_READ_REG(hw, RCTL);
  1867. if(netdev->flags & IFF_PROMISC) {
  1868. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1869. } else if(netdev->flags & IFF_ALLMULTI) {
  1870. rctl |= E1000_RCTL_MPE;
  1871. rctl &= ~E1000_RCTL_UPE;
  1872. } else {
  1873. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1874. }
  1875. E1000_WRITE_REG(hw, RCTL, rctl);
  1876. /* 82542 2.0 needs to be in reset to write receive address registers */
  1877. if(hw->mac_type == e1000_82542_rev2_0)
  1878. e1000_enter_82542_rst(adapter);
  1879. /* load the first 14 multicast address into the exact filters 1-14
  1880. * RAR 0 is used for the station MAC adddress
  1881. * if there are not 14 addresses, go ahead and clear the filters
  1882. * -- with 82571 controllers only 0-13 entries are filled here
  1883. */
  1884. mc_ptr = netdev->mc_list;
  1885. for(i = 1; i < rar_entries; i++) {
  1886. if (mc_ptr) {
  1887. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1888. mc_ptr = mc_ptr->next;
  1889. } else {
  1890. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1891. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1892. }
  1893. }
  1894. /* clear the old settings from the multicast hash table */
  1895. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1896. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1897. /* load any remaining addresses into the hash table */
  1898. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1899. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1900. e1000_mta_set(hw, hash_value);
  1901. }
  1902. if(hw->mac_type == e1000_82542_rev2_0)
  1903. e1000_leave_82542_rst(adapter);
  1904. }
  1905. /* Need to wait a few seconds after link up to get diagnostic information from
  1906. * the phy */
  1907. static void
  1908. e1000_update_phy_info(unsigned long data)
  1909. {
  1910. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1911. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1912. }
  1913. /**
  1914. * e1000_82547_tx_fifo_stall - Timer Call-back
  1915. * @data: pointer to adapter cast into an unsigned long
  1916. **/
  1917. static void
  1918. e1000_82547_tx_fifo_stall(unsigned long data)
  1919. {
  1920. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1921. struct net_device *netdev = adapter->netdev;
  1922. uint32_t tctl;
  1923. if(atomic_read(&adapter->tx_fifo_stall)) {
  1924. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1925. E1000_READ_REG(&adapter->hw, TDH)) &&
  1926. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1927. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1928. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1929. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1930. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1931. E1000_WRITE_REG(&adapter->hw, TCTL,
  1932. tctl & ~E1000_TCTL_EN);
  1933. E1000_WRITE_REG(&adapter->hw, TDFT,
  1934. adapter->tx_head_addr);
  1935. E1000_WRITE_REG(&adapter->hw, TDFH,
  1936. adapter->tx_head_addr);
  1937. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1938. adapter->tx_head_addr);
  1939. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1940. adapter->tx_head_addr);
  1941. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1942. E1000_WRITE_FLUSH(&adapter->hw);
  1943. adapter->tx_fifo_head = 0;
  1944. atomic_set(&adapter->tx_fifo_stall, 0);
  1945. netif_wake_queue(netdev);
  1946. } else {
  1947. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1948. }
  1949. }
  1950. }
  1951. /**
  1952. * e1000_watchdog - Timer Call-back
  1953. * @data: pointer to adapter cast into an unsigned long
  1954. **/
  1955. static void
  1956. e1000_watchdog(unsigned long data)
  1957. {
  1958. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1959. /* Do the rest outside of interrupt context */
  1960. schedule_work(&adapter->watchdog_task);
  1961. }
  1962. static void
  1963. e1000_watchdog_task(struct e1000_adapter *adapter)
  1964. {
  1965. struct net_device *netdev = adapter->netdev;
  1966. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1967. uint32_t link;
  1968. e1000_check_for_link(&adapter->hw);
  1969. if (adapter->hw.mac_type == e1000_82573) {
  1970. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1971. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1972. e1000_update_mng_vlan(adapter);
  1973. }
  1974. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1975. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1976. link = !adapter->hw.serdes_link_down;
  1977. else
  1978. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1979. if(link) {
  1980. if(!netif_carrier_ok(netdev)) {
  1981. e1000_get_speed_and_duplex(&adapter->hw,
  1982. &adapter->link_speed,
  1983. &adapter->link_duplex);
  1984. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1985. adapter->link_speed,
  1986. adapter->link_duplex == FULL_DUPLEX ?
  1987. "Full Duplex" : "Half Duplex");
  1988. /* tweak tx_queue_len according to speed/duplex */
  1989. netdev->tx_queue_len = adapter->tx_queue_len;
  1990. adapter->tx_timeout_factor = 1;
  1991. if (adapter->link_duplex == HALF_DUPLEX) {
  1992. switch (adapter->link_speed) {
  1993. case SPEED_10:
  1994. netdev->tx_queue_len = 10;
  1995. adapter->tx_timeout_factor = 8;
  1996. break;
  1997. case SPEED_100:
  1998. netdev->tx_queue_len = 100;
  1999. break;
  2000. }
  2001. }
  2002. netif_carrier_on(netdev);
  2003. netif_wake_queue(netdev);
  2004. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2005. adapter->smartspeed = 0;
  2006. }
  2007. } else {
  2008. if(netif_carrier_ok(netdev)) {
  2009. adapter->link_speed = 0;
  2010. adapter->link_duplex = 0;
  2011. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2012. netif_carrier_off(netdev);
  2013. netif_stop_queue(netdev);
  2014. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2015. }
  2016. e1000_smartspeed(adapter);
  2017. }
  2018. e1000_update_stats(adapter);
  2019. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2020. adapter->tpt_old = adapter->stats.tpt;
  2021. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2022. adapter->colc_old = adapter->stats.colc;
  2023. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2024. adapter->gorcl_old = adapter->stats.gorcl;
  2025. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2026. adapter->gotcl_old = adapter->stats.gotcl;
  2027. e1000_update_adaptive(&adapter->hw);
  2028. #ifdef CONFIG_E1000_MQ
  2029. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2030. #endif
  2031. if (!netif_carrier_ok(netdev)) {
  2032. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2033. /* We've lost link, so the controller stops DMA,
  2034. * but we've got queued Tx work that's never going
  2035. * to get done, so reset controller to flush Tx.
  2036. * (Do the reset outside of interrupt context). */
  2037. schedule_work(&adapter->tx_timeout_task);
  2038. }
  2039. }
  2040. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2041. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2042. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2043. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2044. * else is between 2000-8000. */
  2045. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2046. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2047. adapter->gotcl - adapter->gorcl :
  2048. adapter->gorcl - adapter->gotcl) / 10000;
  2049. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2050. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2051. }
  2052. /* Cause software interrupt to ensure rx ring is cleaned */
  2053. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2054. /* Force detection of hung controller every watchdog period */
  2055. adapter->detect_tx_hung = TRUE;
  2056. /* With 82571 controllers, LAA may be overwritten due to controller
  2057. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2058. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2059. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2060. /* Reset the timer */
  2061. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2062. }
  2063. #define E1000_TX_FLAGS_CSUM 0x00000001
  2064. #define E1000_TX_FLAGS_VLAN 0x00000002
  2065. #define E1000_TX_FLAGS_TSO 0x00000004
  2066. #define E1000_TX_FLAGS_IPV4 0x00000008
  2067. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2068. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2069. static inline int
  2070. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2071. struct sk_buff *skb)
  2072. {
  2073. #ifdef NETIF_F_TSO
  2074. struct e1000_context_desc *context_desc;
  2075. struct e1000_buffer *buffer_info;
  2076. unsigned int i;
  2077. uint32_t cmd_length = 0;
  2078. uint16_t ipcse = 0, tucse, mss;
  2079. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2080. int err;
  2081. if(skb_shinfo(skb)->tso_size) {
  2082. if (skb_header_cloned(skb)) {
  2083. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2084. if (err)
  2085. return err;
  2086. }
  2087. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2088. mss = skb_shinfo(skb)->tso_size;
  2089. if(skb->protocol == ntohs(ETH_P_IP)) {
  2090. skb->nh.iph->tot_len = 0;
  2091. skb->nh.iph->check = 0;
  2092. skb->h.th->check =
  2093. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2094. skb->nh.iph->daddr,
  2095. 0,
  2096. IPPROTO_TCP,
  2097. 0);
  2098. cmd_length = E1000_TXD_CMD_IP;
  2099. ipcse = skb->h.raw - skb->data - 1;
  2100. #ifdef NETIF_F_TSO_IPV6
  2101. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  2102. skb->nh.ipv6h->payload_len = 0;
  2103. skb->h.th->check =
  2104. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2105. &skb->nh.ipv6h->daddr,
  2106. 0,
  2107. IPPROTO_TCP,
  2108. 0);
  2109. ipcse = 0;
  2110. #endif
  2111. }
  2112. ipcss = skb->nh.raw - skb->data;
  2113. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2114. tucss = skb->h.raw - skb->data;
  2115. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2116. tucse = 0;
  2117. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2118. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2119. i = tx_ring->next_to_use;
  2120. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2121. buffer_info = &tx_ring->buffer_info[i];
  2122. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2123. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2124. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2125. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2126. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2127. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2128. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2129. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2130. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2131. buffer_info->time_stamp = jiffies;
  2132. if (++i == tx_ring->count) i = 0;
  2133. tx_ring->next_to_use = i;
  2134. return 1;
  2135. }
  2136. #endif
  2137. return 0;
  2138. }
  2139. static inline boolean_t
  2140. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2141. struct sk_buff *skb)
  2142. {
  2143. struct e1000_context_desc *context_desc;
  2144. struct e1000_buffer *buffer_info;
  2145. unsigned int i;
  2146. uint8_t css;
  2147. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2148. css = skb->h.raw - skb->data;
  2149. i = tx_ring->next_to_use;
  2150. buffer_info = &tx_ring->buffer_info[i];
  2151. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2152. context_desc->upper_setup.tcp_fields.tucss = css;
  2153. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2154. context_desc->upper_setup.tcp_fields.tucse = 0;
  2155. context_desc->tcp_seg_setup.data = 0;
  2156. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2157. buffer_info->time_stamp = jiffies;
  2158. if (unlikely(++i == tx_ring->count)) i = 0;
  2159. tx_ring->next_to_use = i;
  2160. return TRUE;
  2161. }
  2162. return FALSE;
  2163. }
  2164. #define E1000_MAX_TXD_PWR 12
  2165. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2166. static inline int
  2167. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2168. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2169. unsigned int nr_frags, unsigned int mss)
  2170. {
  2171. struct e1000_buffer *buffer_info;
  2172. unsigned int len = skb->len;
  2173. unsigned int offset = 0, size, count = 0, i;
  2174. unsigned int f;
  2175. len -= skb->data_len;
  2176. i = tx_ring->next_to_use;
  2177. while(len) {
  2178. buffer_info = &tx_ring->buffer_info[i];
  2179. size = min(len, max_per_txd);
  2180. #ifdef NETIF_F_TSO
  2181. /* Workaround for Controller erratum --
  2182. * descriptor for non-tso packet in a linear SKB that follows a
  2183. * tso gets written back prematurely before the data is fully
  2184. * DMAd to the controller */
  2185. if (!skb->data_len && tx_ring->last_tx_tso &&
  2186. !skb_shinfo(skb)->tso_size) {
  2187. tx_ring->last_tx_tso = 0;
  2188. size -= 4;
  2189. }
  2190. /* Workaround for premature desc write-backs
  2191. * in TSO mode. Append 4-byte sentinel desc */
  2192. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2193. size -= 4;
  2194. #endif
  2195. /* work-around for errata 10 and it applies
  2196. * to all controllers in PCI-X mode
  2197. * The fix is to make sure that the first descriptor of a
  2198. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2199. */
  2200. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2201. (size > 2015) && count == 0))
  2202. size = 2015;
  2203. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2204. * terminating buffers within evenly-aligned dwords. */
  2205. if(unlikely(adapter->pcix_82544 &&
  2206. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2207. size > 4))
  2208. size -= 4;
  2209. buffer_info->length = size;
  2210. buffer_info->dma =
  2211. pci_map_single(adapter->pdev,
  2212. skb->data + offset,
  2213. size,
  2214. PCI_DMA_TODEVICE);
  2215. buffer_info->time_stamp = jiffies;
  2216. len -= size;
  2217. offset += size;
  2218. count++;
  2219. if(unlikely(++i == tx_ring->count)) i = 0;
  2220. }
  2221. for(f = 0; f < nr_frags; f++) {
  2222. struct skb_frag_struct *frag;
  2223. frag = &skb_shinfo(skb)->frags[f];
  2224. len = frag->size;
  2225. offset = frag->page_offset;
  2226. while(len) {
  2227. buffer_info = &tx_ring->buffer_info[i];
  2228. size = min(len, max_per_txd);
  2229. #ifdef NETIF_F_TSO
  2230. /* Workaround for premature desc write-backs
  2231. * in TSO mode. Append 4-byte sentinel desc */
  2232. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2233. size -= 4;
  2234. #endif
  2235. /* Workaround for potential 82544 hang in PCI-X.
  2236. * Avoid terminating buffers within evenly-aligned
  2237. * dwords. */
  2238. if(unlikely(adapter->pcix_82544 &&
  2239. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2240. size > 4))
  2241. size -= 4;
  2242. buffer_info->length = size;
  2243. buffer_info->dma =
  2244. pci_map_page(adapter->pdev,
  2245. frag->page,
  2246. offset,
  2247. size,
  2248. PCI_DMA_TODEVICE);
  2249. buffer_info->time_stamp = jiffies;
  2250. len -= size;
  2251. offset += size;
  2252. count++;
  2253. if(unlikely(++i == tx_ring->count)) i = 0;
  2254. }
  2255. }
  2256. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2257. tx_ring->buffer_info[i].skb = skb;
  2258. tx_ring->buffer_info[first].next_to_watch = i;
  2259. return count;
  2260. }
  2261. static inline void
  2262. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2263. int tx_flags, int count)
  2264. {
  2265. struct e1000_tx_desc *tx_desc = NULL;
  2266. struct e1000_buffer *buffer_info;
  2267. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2268. unsigned int i;
  2269. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2270. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2271. E1000_TXD_CMD_TSE;
  2272. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2273. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2274. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2275. }
  2276. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2277. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2278. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2279. }
  2280. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2281. txd_lower |= E1000_TXD_CMD_VLE;
  2282. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2283. }
  2284. i = tx_ring->next_to_use;
  2285. while(count--) {
  2286. buffer_info = &tx_ring->buffer_info[i];
  2287. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2288. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2289. tx_desc->lower.data =
  2290. cpu_to_le32(txd_lower | buffer_info->length);
  2291. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2292. if(unlikely(++i == tx_ring->count)) i = 0;
  2293. }
  2294. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2295. /* Force memory writes to complete before letting h/w
  2296. * know there are new descriptors to fetch. (Only
  2297. * applicable for weak-ordered memory model archs,
  2298. * such as IA-64). */
  2299. wmb();
  2300. tx_ring->next_to_use = i;
  2301. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2302. }
  2303. /**
  2304. * 82547 workaround to avoid controller hang in half-duplex environment.
  2305. * The workaround is to avoid queuing a large packet that would span
  2306. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2307. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2308. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2309. * to the beginning of the Tx FIFO.
  2310. **/
  2311. #define E1000_FIFO_HDR 0x10
  2312. #define E1000_82547_PAD_LEN 0x3E0
  2313. static inline int
  2314. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2315. {
  2316. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2317. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2318. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2319. if(adapter->link_duplex != HALF_DUPLEX)
  2320. goto no_fifo_stall_required;
  2321. if(atomic_read(&adapter->tx_fifo_stall))
  2322. return 1;
  2323. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2324. atomic_set(&adapter->tx_fifo_stall, 1);
  2325. return 1;
  2326. }
  2327. no_fifo_stall_required:
  2328. adapter->tx_fifo_head += skb_fifo_len;
  2329. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2330. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2331. return 0;
  2332. }
  2333. #define MINIMUM_DHCP_PACKET_SIZE 282
  2334. static inline int
  2335. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2336. {
  2337. struct e1000_hw *hw = &adapter->hw;
  2338. uint16_t length, offset;
  2339. if(vlan_tx_tag_present(skb)) {
  2340. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2341. ( adapter->hw.mng_cookie.status &
  2342. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2343. return 0;
  2344. }
  2345. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2346. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2347. if((htons(ETH_P_IP) == eth->h_proto)) {
  2348. const struct iphdr *ip =
  2349. (struct iphdr *)((uint8_t *)skb->data+14);
  2350. if(IPPROTO_UDP == ip->protocol) {
  2351. struct udphdr *udp =
  2352. (struct udphdr *)((uint8_t *)ip +
  2353. (ip->ihl << 2));
  2354. if(ntohs(udp->dest) == 67) {
  2355. offset = (uint8_t *)udp + 8 - skb->data;
  2356. length = skb->len - offset;
  2357. return e1000_mng_write_dhcp_info(hw,
  2358. (uint8_t *)udp + 8,
  2359. length);
  2360. }
  2361. }
  2362. }
  2363. }
  2364. return 0;
  2365. }
  2366. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2367. static int
  2368. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2369. {
  2370. struct e1000_adapter *adapter = netdev_priv(netdev);
  2371. struct e1000_tx_ring *tx_ring;
  2372. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2373. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2374. unsigned int tx_flags = 0;
  2375. unsigned int len = skb->len;
  2376. unsigned long flags;
  2377. unsigned int nr_frags = 0;
  2378. unsigned int mss = 0;
  2379. int count = 0;
  2380. int tso;
  2381. unsigned int f;
  2382. len -= skb->data_len;
  2383. #ifdef CONFIG_E1000_MQ
  2384. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2385. #else
  2386. tx_ring = adapter->tx_ring;
  2387. #endif
  2388. if (unlikely(skb->len <= 0)) {
  2389. dev_kfree_skb_any(skb);
  2390. return NETDEV_TX_OK;
  2391. }
  2392. #ifdef NETIF_F_TSO
  2393. mss = skb_shinfo(skb)->tso_size;
  2394. /* The controller does a simple calculation to
  2395. * make sure there is enough room in the FIFO before
  2396. * initiating the DMA for each buffer. The calc is:
  2397. * 4 = ceil(buffer len/mss). To make sure we don't
  2398. * overrun the FIFO, adjust the max buffer len if mss
  2399. * drops. */
  2400. if(mss) {
  2401. uint8_t hdr_len;
  2402. max_per_txd = min(mss << 2, max_per_txd);
  2403. max_txd_pwr = fls(max_per_txd) - 1;
  2404. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2405. * points to just header, pull a few bytes of payload from
  2406. * frags into skb->data */
  2407. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2408. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2409. (adapter->hw.mac_type == e1000_82571 ||
  2410. adapter->hw.mac_type == e1000_82572)) {
  2411. unsigned int pull_size;
  2412. pull_size = min((unsigned int)4, skb->data_len);
  2413. if (!__pskb_pull_tail(skb, pull_size)) {
  2414. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2415. dev_kfree_skb_any(skb);
  2416. return -EFAULT;
  2417. }
  2418. len = skb->len - skb->data_len;
  2419. }
  2420. }
  2421. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2422. /* reserve a descriptor for the offload context */
  2423. count++;
  2424. count++;
  2425. #else
  2426. if(skb->ip_summed == CHECKSUM_HW)
  2427. count++;
  2428. #endif
  2429. #ifdef NETIF_F_TSO
  2430. /* Controller Erratum workaround */
  2431. if (!skb->data_len && tx_ring->last_tx_tso &&
  2432. !skb_shinfo(skb)->tso_size)
  2433. count++;
  2434. #endif
  2435. count += TXD_USE_COUNT(len, max_txd_pwr);
  2436. if(adapter->pcix_82544)
  2437. count++;
  2438. /* work-around for errata 10 and it applies to all controllers
  2439. * in PCI-X mode, so add one more descriptor to the count
  2440. */
  2441. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2442. (len > 2015)))
  2443. count++;
  2444. nr_frags = skb_shinfo(skb)->nr_frags;
  2445. for(f = 0; f < nr_frags; f++)
  2446. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2447. max_txd_pwr);
  2448. if(adapter->pcix_82544)
  2449. count += nr_frags;
  2450. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2451. e1000_transfer_dhcp_info(adapter, skb);
  2452. local_irq_save(flags);
  2453. if (!spin_trylock(&tx_ring->tx_lock)) {
  2454. /* Collision - tell upper layer to requeue */
  2455. local_irq_restore(flags);
  2456. return NETDEV_TX_LOCKED;
  2457. }
  2458. /* need: count + 2 desc gap to keep tail from touching
  2459. * head, otherwise try next time */
  2460. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2461. netif_stop_queue(netdev);
  2462. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2463. return NETDEV_TX_BUSY;
  2464. }
  2465. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2466. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2467. netif_stop_queue(netdev);
  2468. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2469. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2470. return NETDEV_TX_BUSY;
  2471. }
  2472. }
  2473. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2474. tx_flags |= E1000_TX_FLAGS_VLAN;
  2475. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2476. }
  2477. first = tx_ring->next_to_use;
  2478. tso = e1000_tso(adapter, tx_ring, skb);
  2479. if (tso < 0) {
  2480. dev_kfree_skb_any(skb);
  2481. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2482. return NETDEV_TX_OK;
  2483. }
  2484. if (likely(tso)) {
  2485. tx_ring->last_tx_tso = 1;
  2486. tx_flags |= E1000_TX_FLAGS_TSO;
  2487. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2488. tx_flags |= E1000_TX_FLAGS_CSUM;
  2489. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2490. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2491. * no longer assume, we must. */
  2492. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2493. tx_flags |= E1000_TX_FLAGS_IPV4;
  2494. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2495. e1000_tx_map(adapter, tx_ring, skb, first,
  2496. max_per_txd, nr_frags, mss));
  2497. netdev->trans_start = jiffies;
  2498. /* Make sure there is space in the ring for the next send. */
  2499. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2500. netif_stop_queue(netdev);
  2501. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2502. return NETDEV_TX_OK;
  2503. }
  2504. /**
  2505. * e1000_tx_timeout - Respond to a Tx Hang
  2506. * @netdev: network interface device structure
  2507. **/
  2508. static void
  2509. e1000_tx_timeout(struct net_device *netdev)
  2510. {
  2511. struct e1000_adapter *adapter = netdev_priv(netdev);
  2512. /* Do the reset outside of interrupt context */
  2513. schedule_work(&adapter->tx_timeout_task);
  2514. }
  2515. static void
  2516. e1000_tx_timeout_task(struct net_device *netdev)
  2517. {
  2518. struct e1000_adapter *adapter = netdev_priv(netdev);
  2519. adapter->tx_timeout_count++;
  2520. e1000_down(adapter);
  2521. e1000_up(adapter);
  2522. }
  2523. /**
  2524. * e1000_get_stats - Get System Network Statistics
  2525. * @netdev: network interface device structure
  2526. *
  2527. * Returns the address of the device statistics structure.
  2528. * The statistics are actually updated from the timer callback.
  2529. **/
  2530. static struct net_device_stats *
  2531. e1000_get_stats(struct net_device *netdev)
  2532. {
  2533. struct e1000_adapter *adapter = netdev_priv(netdev);
  2534. /* only return the current stats */
  2535. return &adapter->net_stats;
  2536. }
  2537. /**
  2538. * e1000_change_mtu - Change the Maximum Transfer Unit
  2539. * @netdev: network interface device structure
  2540. * @new_mtu: new value for maximum frame size
  2541. *
  2542. * Returns 0 on success, negative on failure
  2543. **/
  2544. static int
  2545. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2546. {
  2547. struct e1000_adapter *adapter = netdev_priv(netdev);
  2548. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2549. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2550. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2551. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2552. return -EINVAL;
  2553. }
  2554. /* Adapter-specific max frame size limits. */
  2555. switch (adapter->hw.mac_type) {
  2556. case e1000_82542_rev2_0:
  2557. case e1000_82542_rev2_1:
  2558. case e1000_82573:
  2559. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2560. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2561. return -EINVAL;
  2562. }
  2563. break;
  2564. case e1000_82571:
  2565. case e1000_82572:
  2566. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2567. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2568. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2569. return -EINVAL;
  2570. }
  2571. break;
  2572. default:
  2573. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2574. break;
  2575. }
  2576. /* since the driver code now supports splitting a packet across
  2577. * multiple descriptors, most of the fifo related limitations on
  2578. * jumbo frame traffic have gone away.
  2579. * simply use 2k descriptors for everything.
  2580. *
  2581. * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2582. * means we reserve 2 more, this pushes us to allocate from the next
  2583. * larger slab size
  2584. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2585. /* recent hardware supports 1KB granularity */
  2586. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2587. adapter->rx_buffer_len =
  2588. ((max_frame < E1000_RXBUFFER_2048) ?
  2589. max_frame : E1000_RXBUFFER_2048);
  2590. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2591. } else
  2592. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2593. netdev->mtu = new_mtu;
  2594. if(netif_running(netdev)) {
  2595. e1000_down(adapter);
  2596. e1000_up(adapter);
  2597. }
  2598. adapter->hw.max_frame_size = max_frame;
  2599. return 0;
  2600. }
  2601. /**
  2602. * e1000_update_stats - Update the board statistics counters
  2603. * @adapter: board private structure
  2604. **/
  2605. void
  2606. e1000_update_stats(struct e1000_adapter *adapter)
  2607. {
  2608. struct e1000_hw *hw = &adapter->hw;
  2609. unsigned long flags;
  2610. uint16_t phy_tmp;
  2611. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2612. spin_lock_irqsave(&adapter->stats_lock, flags);
  2613. /* these counters are modified from e1000_adjust_tbi_stats,
  2614. * called from the interrupt context, so they must only
  2615. * be written while holding adapter->stats_lock
  2616. */
  2617. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2618. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2619. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2620. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2621. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2622. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2623. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2624. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2625. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2626. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2627. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2628. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2629. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2630. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2631. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2632. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2633. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2634. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2635. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2636. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2637. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2638. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2639. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2640. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2641. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2642. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2643. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2644. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2645. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2646. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2647. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2648. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2649. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2650. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2651. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2652. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2653. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2654. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2655. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2656. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2657. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2658. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2659. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2660. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2661. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2662. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2663. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2664. /* used for adaptive IFS */
  2665. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2666. adapter->stats.tpt += hw->tx_packet_delta;
  2667. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2668. adapter->stats.colc += hw->collision_delta;
  2669. if(hw->mac_type >= e1000_82543) {
  2670. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2671. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2672. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2673. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2674. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2675. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2676. }
  2677. if(hw->mac_type > e1000_82547_rev_2) {
  2678. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2679. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2680. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2681. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2682. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2683. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2684. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2685. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2686. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2687. }
  2688. /* Fill out the OS statistics structure */
  2689. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2690. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2691. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2692. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2693. adapter->net_stats.multicast = adapter->stats.mprc;
  2694. adapter->net_stats.collisions = adapter->stats.colc;
  2695. /* Rx Errors */
  2696. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2697. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2698. adapter->stats.rlec + adapter->stats.cexterr;
  2699. adapter->net_stats.rx_dropped = 0;
  2700. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2701. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2702. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2703. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2704. /* Tx Errors */
  2705. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2706. adapter->stats.latecol;
  2707. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2708. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2709. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2710. /* Tx Dropped needs to be maintained elsewhere */
  2711. /* Phy Stats */
  2712. if(hw->media_type == e1000_media_type_copper) {
  2713. if((adapter->link_speed == SPEED_1000) &&
  2714. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2715. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2716. adapter->phy_stats.idle_errors += phy_tmp;
  2717. }
  2718. if((hw->mac_type <= e1000_82546) &&
  2719. (hw->phy_type == e1000_phy_m88) &&
  2720. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2721. adapter->phy_stats.receive_errors += phy_tmp;
  2722. }
  2723. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2724. }
  2725. #ifdef CONFIG_E1000_MQ
  2726. void
  2727. e1000_rx_schedule(void *data)
  2728. {
  2729. struct net_device *poll_dev, *netdev = data;
  2730. struct e1000_adapter *adapter = netdev->priv;
  2731. int this_cpu = get_cpu();
  2732. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2733. if (poll_dev == NULL) {
  2734. put_cpu();
  2735. return;
  2736. }
  2737. if (likely(netif_rx_schedule_prep(poll_dev)))
  2738. __netif_rx_schedule(poll_dev);
  2739. else
  2740. e1000_irq_enable(adapter);
  2741. put_cpu();
  2742. }
  2743. #endif
  2744. /**
  2745. * e1000_intr - Interrupt Handler
  2746. * @irq: interrupt number
  2747. * @data: pointer to a network interface device structure
  2748. * @pt_regs: CPU registers structure
  2749. **/
  2750. static irqreturn_t
  2751. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2752. {
  2753. struct net_device *netdev = data;
  2754. struct e1000_adapter *adapter = netdev_priv(netdev);
  2755. struct e1000_hw *hw = &adapter->hw;
  2756. uint32_t icr = E1000_READ_REG(hw, ICR);
  2757. #ifndef CONFIG_E1000_NAPI
  2758. int i;
  2759. #else
  2760. /* Interrupt Auto-Mask...upon reading ICR,
  2761. * interrupts are masked. No need for the
  2762. * IMC write, but it does mean we should
  2763. * account for it ASAP. */
  2764. if (likely(hw->mac_type >= e1000_82571))
  2765. atomic_inc(&adapter->irq_sem);
  2766. #endif
  2767. if (unlikely(!icr)) {
  2768. #ifdef CONFIG_E1000_NAPI
  2769. if (hw->mac_type >= e1000_82571)
  2770. e1000_irq_enable(adapter);
  2771. #endif
  2772. return IRQ_NONE; /* Not our interrupt */
  2773. }
  2774. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2775. hw->get_link_status = 1;
  2776. mod_timer(&adapter->watchdog_timer, jiffies);
  2777. }
  2778. #ifdef CONFIG_E1000_NAPI
  2779. if (unlikely(hw->mac_type < e1000_82571)) {
  2780. atomic_inc(&adapter->irq_sem);
  2781. E1000_WRITE_REG(hw, IMC, ~0);
  2782. E1000_WRITE_FLUSH(hw);
  2783. }
  2784. #ifdef CONFIG_E1000_MQ
  2785. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2786. /* We must setup the cpumask once count == 0 since
  2787. * each cpu bit is cleared when the work is done. */
  2788. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2789. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2790. atomic_set(&adapter->rx_sched_call_data.count,
  2791. adapter->num_rx_queues);
  2792. smp_call_async_mask(&adapter->rx_sched_call_data);
  2793. } else {
  2794. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2795. }
  2796. #else /* if !CONFIG_E1000_MQ */
  2797. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2798. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2799. else
  2800. e1000_irq_enable(adapter);
  2801. #endif /* CONFIG_E1000_MQ */
  2802. #else /* if !CONFIG_E1000_NAPI */
  2803. /* Writing IMC and IMS is needed for 82547.
  2804. Due to Hub Link bus being occupied, an interrupt
  2805. de-assertion message is not able to be sent.
  2806. When an interrupt assertion message is generated later,
  2807. two messages are re-ordered and sent out.
  2808. That causes APIC to think 82547 is in de-assertion
  2809. state, while 82547 is in assertion state, resulting
  2810. in dead lock. Writing IMC forces 82547 into
  2811. de-assertion state.
  2812. */
  2813. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2814. atomic_inc(&adapter->irq_sem);
  2815. E1000_WRITE_REG(hw, IMC, ~0);
  2816. }
  2817. for(i = 0; i < E1000_MAX_INTR; i++)
  2818. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2819. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2820. break;
  2821. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2822. e1000_irq_enable(adapter);
  2823. #endif /* CONFIG_E1000_NAPI */
  2824. return IRQ_HANDLED;
  2825. }
  2826. #ifdef CONFIG_E1000_NAPI
  2827. /**
  2828. * e1000_clean - NAPI Rx polling callback
  2829. * @adapter: board private structure
  2830. **/
  2831. static int
  2832. e1000_clean(struct net_device *poll_dev, int *budget)
  2833. {
  2834. struct e1000_adapter *adapter;
  2835. int work_to_do = min(*budget, poll_dev->quota);
  2836. int tx_cleaned, i = 0, work_done = 0;
  2837. /* Must NOT use netdev_priv macro here. */
  2838. adapter = poll_dev->priv;
  2839. /* Keep link state information with original netdev */
  2840. if (!netif_carrier_ok(adapter->netdev))
  2841. goto quit_polling;
  2842. while (poll_dev != &adapter->polling_netdev[i]) {
  2843. i++;
  2844. if (unlikely(i == adapter->num_rx_queues))
  2845. BUG();
  2846. }
  2847. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2848. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2849. &work_done, work_to_do);
  2850. *budget -= work_done;
  2851. poll_dev->quota -= work_done;
  2852. /* If no Tx and not enough Rx work done, exit the polling mode */
  2853. if((!tx_cleaned && (work_done == 0)) ||
  2854. !netif_running(adapter->netdev)) {
  2855. quit_polling:
  2856. netif_rx_complete(poll_dev);
  2857. e1000_irq_enable(adapter);
  2858. return 0;
  2859. }
  2860. return 1;
  2861. }
  2862. #endif
  2863. /**
  2864. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2865. * @adapter: board private structure
  2866. **/
  2867. static boolean_t
  2868. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2869. struct e1000_tx_ring *tx_ring)
  2870. {
  2871. struct net_device *netdev = adapter->netdev;
  2872. struct e1000_tx_desc *tx_desc, *eop_desc;
  2873. struct e1000_buffer *buffer_info;
  2874. unsigned int i, eop;
  2875. boolean_t cleaned = FALSE;
  2876. i = tx_ring->next_to_clean;
  2877. eop = tx_ring->buffer_info[i].next_to_watch;
  2878. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2879. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2880. for(cleaned = FALSE; !cleaned; ) {
  2881. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2882. buffer_info = &tx_ring->buffer_info[i];
  2883. cleaned = (i == eop);
  2884. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2885. tx_desc->buffer_addr = 0;
  2886. tx_desc->lower.data = 0;
  2887. tx_desc->upper.data = 0;
  2888. if(unlikely(++i == tx_ring->count)) i = 0;
  2889. }
  2890. #ifdef CONFIG_E1000_MQ
  2891. tx_ring->tx_stats.packets++;
  2892. #endif
  2893. eop = tx_ring->buffer_info[i].next_to_watch;
  2894. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2895. }
  2896. tx_ring->next_to_clean = i;
  2897. spin_lock(&tx_ring->tx_lock);
  2898. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2899. netif_carrier_ok(netdev)))
  2900. netif_wake_queue(netdev);
  2901. spin_unlock(&tx_ring->tx_lock);
  2902. if (adapter->detect_tx_hung) {
  2903. /* Detect a transmit hang in hardware, this serializes the
  2904. * check with the clearing of time_stamp and movement of i */
  2905. adapter->detect_tx_hung = FALSE;
  2906. if (tx_ring->buffer_info[eop].dma &&
  2907. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2908. adapter->tx_timeout_factor * HZ)
  2909. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2910. E1000_STATUS_TXOFF)) {
  2911. /* detected Tx unit hang */
  2912. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2913. " Tx Queue <%lu>\n"
  2914. " TDH <%x>\n"
  2915. " TDT <%x>\n"
  2916. " next_to_use <%x>\n"
  2917. " next_to_clean <%x>\n"
  2918. "buffer_info[next_to_clean]\n"
  2919. " time_stamp <%lx>\n"
  2920. " next_to_watch <%x>\n"
  2921. " jiffies <%lx>\n"
  2922. " next_to_watch.status <%x>\n",
  2923. (unsigned long)((tx_ring - adapter->tx_ring) /
  2924. sizeof(struct e1000_tx_ring)),
  2925. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2926. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2927. tx_ring->next_to_use,
  2928. tx_ring->next_to_clean,
  2929. tx_ring->buffer_info[eop].time_stamp,
  2930. eop,
  2931. jiffies,
  2932. eop_desc->upper.fields.status);
  2933. netif_stop_queue(netdev);
  2934. }
  2935. }
  2936. return cleaned;
  2937. }
  2938. /**
  2939. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2940. * @adapter: board private structure
  2941. * @status_err: receive descriptor status and error fields
  2942. * @csum: receive descriptor csum field
  2943. * @sk_buff: socket buffer with received data
  2944. **/
  2945. static inline void
  2946. e1000_rx_checksum(struct e1000_adapter *adapter,
  2947. uint32_t status_err, uint32_t csum,
  2948. struct sk_buff *skb)
  2949. {
  2950. uint16_t status = (uint16_t)status_err;
  2951. uint8_t errors = (uint8_t)(status_err >> 24);
  2952. skb->ip_summed = CHECKSUM_NONE;
  2953. /* 82543 or newer only */
  2954. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2955. /* Ignore Checksum bit is set */
  2956. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2957. /* TCP/UDP checksum error bit is set */
  2958. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2959. /* let the stack verify checksum errors */
  2960. adapter->hw_csum_err++;
  2961. return;
  2962. }
  2963. /* TCP/UDP Checksum has not been calculated */
  2964. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2965. if(!(status & E1000_RXD_STAT_TCPCS))
  2966. return;
  2967. } else {
  2968. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2969. return;
  2970. }
  2971. /* It must be a TCP or UDP packet with a valid checksum */
  2972. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2973. /* TCP checksum is good */
  2974. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2975. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2976. /* IP fragment with UDP payload */
  2977. /* Hardware complements the payload checksum, so we undo it
  2978. * and then put the value in host order for further stack use.
  2979. */
  2980. csum = ntohl(csum ^ 0xFFFF);
  2981. skb->csum = csum;
  2982. skb->ip_summed = CHECKSUM_HW;
  2983. }
  2984. adapter->hw_csum_good++;
  2985. }
  2986. /**
  2987. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2988. * @adapter: board private structure
  2989. **/
  2990. static boolean_t
  2991. #ifdef CONFIG_E1000_NAPI
  2992. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2993. struct e1000_rx_ring *rx_ring,
  2994. int *work_done, int work_to_do)
  2995. #else
  2996. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2997. struct e1000_rx_ring *rx_ring)
  2998. #endif
  2999. {
  3000. struct net_device *netdev = adapter->netdev;
  3001. struct pci_dev *pdev = adapter->pdev;
  3002. struct e1000_rx_desc *rx_desc;
  3003. struct e1000_buffer *buffer_info;
  3004. struct sk_buff *skb;
  3005. unsigned long flags;
  3006. uint32_t length;
  3007. uint8_t last_byte;
  3008. unsigned int i;
  3009. boolean_t cleaned = FALSE;
  3010. int cleaned_count = 0;
  3011. i = rx_ring->next_to_clean;
  3012. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3013. while(rx_desc->status & E1000_RXD_STAT_DD) {
  3014. buffer_info = &rx_ring->buffer_info[i];
  3015. #ifdef CONFIG_E1000_NAPI
  3016. if(*work_done >= work_to_do)
  3017. break;
  3018. (*work_done)++;
  3019. #endif
  3020. cleaned = TRUE;
  3021. cleaned_count++;
  3022. pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
  3023. PCI_DMA_FROMDEVICE);
  3024. skb = buffer_info->skb;
  3025. length = le16_to_cpu(rx_desc->length);
  3026. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  3027. /* All receives must fit into a single buffer */
  3028. E1000_DBG("%s: Receive packet consumed multiple"
  3029. " buffers\n", netdev->name);
  3030. dev_kfree_skb_irq(skb);
  3031. goto next_desc;
  3032. }
  3033. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3034. last_byte = *(skb->data + length - 1);
  3035. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  3036. rx_desc->errors, length, last_byte)) {
  3037. spin_lock_irqsave(&adapter->stats_lock, flags);
  3038. e1000_tbi_adjust_stats(&adapter->hw, &adapter->stats,
  3039. length, skb->data);
  3040. spin_unlock_irqrestore(&adapter->stats_lock,
  3041. flags);
  3042. length--;
  3043. } else {
  3044. dev_kfree_skb_irq(skb);
  3045. goto next_desc;
  3046. }
  3047. }
  3048. /* Good Receive */
  3049. skb_put(skb, length - ETHERNET_FCS_SIZE);
  3050. /* Receive Checksum Offload */
  3051. e1000_rx_checksum(adapter, (uint32_t)(rx_desc->status) |
  3052. ((uint32_t)(rx_desc->errors) << 24),
  3053. rx_desc->csum, skb);
  3054. skb->protocol = eth_type_trans(skb, netdev);
  3055. #ifdef CONFIG_E1000_NAPI
  3056. if(unlikely(adapter->vlgrp &&
  3057. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3058. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3059. le16_to_cpu(rx_desc->special) &
  3060. E1000_RXD_SPC_VLAN_MASK);
  3061. } else {
  3062. netif_receive_skb(skb);
  3063. }
  3064. #else /* CONFIG_E1000_NAPI */
  3065. if(unlikely(adapter->vlgrp &&
  3066. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3067. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3068. le16_to_cpu(rx_desc->special) &
  3069. E1000_RXD_SPC_VLAN_MASK);
  3070. } else {
  3071. netif_rx(skb);
  3072. }
  3073. #endif /* CONFIG_E1000_NAPI */
  3074. netdev->last_rx = jiffies;
  3075. #ifdef CONFIG_E1000_MQ
  3076. rx_ring->rx_stats.packets++;
  3077. rx_ring->rx_stats.bytes += length;
  3078. #endif
  3079. next_desc:
  3080. rx_desc->status = 0;
  3081. /* return some buffers to hardware, one at a time is too slow */
  3082. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3083. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3084. cleaned_count = 0;
  3085. }
  3086. }
  3087. rx_ring->next_to_clean = i;
  3088. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3089. if (cleaned_count)
  3090. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3091. return cleaned;
  3092. }
  3093. /**
  3094. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3095. * @adapter: board private structure
  3096. **/
  3097. static boolean_t
  3098. #ifdef CONFIG_E1000_NAPI
  3099. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3100. struct e1000_rx_ring *rx_ring,
  3101. int *work_done, int work_to_do)
  3102. #else
  3103. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3104. struct e1000_rx_ring *rx_ring)
  3105. #endif
  3106. {
  3107. union e1000_rx_desc_packet_split *rx_desc;
  3108. struct net_device *netdev = adapter->netdev;
  3109. struct pci_dev *pdev = adapter->pdev;
  3110. struct e1000_buffer *buffer_info;
  3111. struct e1000_ps_page *ps_page;
  3112. struct e1000_ps_page_dma *ps_page_dma;
  3113. struct sk_buff *skb;
  3114. unsigned int i, j;
  3115. uint32_t length, staterr;
  3116. int cleaned_count = 0;
  3117. boolean_t cleaned = FALSE;
  3118. i = rx_ring->next_to_clean;
  3119. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3120. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3121. while(staterr & E1000_RXD_STAT_DD) {
  3122. buffer_info = &rx_ring->buffer_info[i];
  3123. ps_page = &rx_ring->ps_page[i];
  3124. ps_page_dma = &rx_ring->ps_page_dma[i];
  3125. #ifdef CONFIG_E1000_NAPI
  3126. if(unlikely(*work_done >= work_to_do))
  3127. break;
  3128. (*work_done)++;
  3129. #endif
  3130. cleaned = TRUE;
  3131. cleaned_count++;
  3132. pci_unmap_single(pdev, buffer_info->dma,
  3133. buffer_info->length,
  3134. PCI_DMA_FROMDEVICE);
  3135. skb = buffer_info->skb;
  3136. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3137. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3138. " the full packet\n", netdev->name);
  3139. dev_kfree_skb_irq(skb);
  3140. goto next_desc;
  3141. }
  3142. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3143. dev_kfree_skb_irq(skb);
  3144. goto next_desc;
  3145. }
  3146. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3147. if(unlikely(!length)) {
  3148. E1000_DBG("%s: Last part of the packet spanning"
  3149. " multiple descriptors\n", netdev->name);
  3150. dev_kfree_skb_irq(skb);
  3151. goto next_desc;
  3152. }
  3153. /* Good Receive */
  3154. skb_put(skb, length);
  3155. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3156. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3157. break;
  3158. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3159. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3160. ps_page_dma->ps_page_dma[j] = 0;
  3161. skb_shinfo(skb)->frags[j].page =
  3162. ps_page->ps_page[j];
  3163. ps_page->ps_page[j] = NULL;
  3164. skb_shinfo(skb)->frags[j].page_offset = 0;
  3165. skb_shinfo(skb)->frags[j].size = length;
  3166. skb_shinfo(skb)->nr_frags++;
  3167. skb->len += length;
  3168. skb->data_len += length;
  3169. }
  3170. e1000_rx_checksum(adapter, staterr,
  3171. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3172. skb->protocol = eth_type_trans(skb, netdev);
  3173. if(likely(rx_desc->wb.upper.header_status &
  3174. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3175. adapter->rx_hdr_split++;
  3176. #ifdef HAVE_RX_ZERO_COPY
  3177. skb_shinfo(skb)->zero_copy = TRUE;
  3178. #endif
  3179. }
  3180. #ifdef CONFIG_E1000_NAPI
  3181. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3182. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3183. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3184. E1000_RXD_SPC_VLAN_MASK);
  3185. } else {
  3186. netif_receive_skb(skb);
  3187. }
  3188. #else /* CONFIG_E1000_NAPI */
  3189. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3190. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3191. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3192. E1000_RXD_SPC_VLAN_MASK);
  3193. } else {
  3194. netif_rx(skb);
  3195. }
  3196. #endif /* CONFIG_E1000_NAPI */
  3197. netdev->last_rx = jiffies;
  3198. #ifdef CONFIG_E1000_MQ
  3199. rx_ring->rx_stats.packets++;
  3200. rx_ring->rx_stats.bytes += length;
  3201. #endif
  3202. next_desc:
  3203. rx_desc->wb.middle.status_error &= ~0xFF;
  3204. buffer_info->skb = NULL;
  3205. /* return some buffers to hardware, one at a time is too slow */
  3206. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3207. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3208. cleaned_count = 0;
  3209. }
  3210. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3211. }
  3212. rx_ring->next_to_clean = i;
  3213. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3214. if (cleaned_count)
  3215. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3216. return cleaned;
  3217. }
  3218. /**
  3219. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3220. * @adapter: address of board private structure
  3221. **/
  3222. static void
  3223. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3224. struct e1000_rx_ring *rx_ring,
  3225. int cleaned_count)
  3226. {
  3227. struct net_device *netdev = adapter->netdev;
  3228. struct pci_dev *pdev = adapter->pdev;
  3229. struct e1000_rx_desc *rx_desc;
  3230. struct e1000_buffer *buffer_info;
  3231. struct sk_buff *skb;
  3232. unsigned int i;
  3233. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3234. i = rx_ring->next_to_use;
  3235. buffer_info = &rx_ring->buffer_info[i];
  3236. while(!buffer_info->skb) {
  3237. skb = dev_alloc_skb(bufsz);
  3238. if(unlikely(!skb)) {
  3239. /* Better luck next round */
  3240. adapter->alloc_rx_buff_failed++;
  3241. break;
  3242. }
  3243. /* Fix for errata 23, can't cross 64kB boundary */
  3244. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3245. struct sk_buff *oldskb = skb;
  3246. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3247. "at %p\n", bufsz, skb->data);
  3248. /* Try again, without freeing the previous */
  3249. skb = dev_alloc_skb(bufsz);
  3250. /* Failed allocation, critical failure */
  3251. if (!skb) {
  3252. dev_kfree_skb(oldskb);
  3253. break;
  3254. }
  3255. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3256. /* give up */
  3257. dev_kfree_skb(skb);
  3258. dev_kfree_skb(oldskb);
  3259. break; /* while !buffer_info->skb */
  3260. } else {
  3261. /* Use new allocation */
  3262. dev_kfree_skb(oldskb);
  3263. }
  3264. }
  3265. /* Make buffer alignment 2 beyond a 16 byte boundary
  3266. * this will result in a 16 byte aligned IP header after
  3267. * the 14 byte MAC header is removed
  3268. */
  3269. skb_reserve(skb, NET_IP_ALIGN);
  3270. skb->dev = netdev;
  3271. buffer_info->skb = skb;
  3272. buffer_info->length = adapter->rx_buffer_len;
  3273. buffer_info->dma = pci_map_single(pdev,
  3274. skb->data,
  3275. adapter->rx_buffer_len,
  3276. PCI_DMA_FROMDEVICE);
  3277. /* Fix for errata 23, can't cross 64kB boundary */
  3278. if (!e1000_check_64k_bound(adapter,
  3279. (void *)(unsigned long)buffer_info->dma,
  3280. adapter->rx_buffer_len)) {
  3281. DPRINTK(RX_ERR, ERR,
  3282. "dma align check failed: %u bytes at %p\n",
  3283. adapter->rx_buffer_len,
  3284. (void *)(unsigned long)buffer_info->dma);
  3285. dev_kfree_skb(skb);
  3286. buffer_info->skb = NULL;
  3287. pci_unmap_single(pdev, buffer_info->dma,
  3288. adapter->rx_buffer_len,
  3289. PCI_DMA_FROMDEVICE);
  3290. break; /* while !buffer_info->skb */
  3291. }
  3292. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3293. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3294. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3295. /* Force memory writes to complete before letting h/w
  3296. * know there are new descriptors to fetch. (Only
  3297. * applicable for weak-ordered memory model archs,
  3298. * such as IA-64). */
  3299. wmb();
  3300. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3301. }
  3302. if(unlikely(++i == rx_ring->count)) i = 0;
  3303. buffer_info = &rx_ring->buffer_info[i];
  3304. }
  3305. rx_ring->next_to_use = i;
  3306. }
  3307. /**
  3308. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3309. * @adapter: address of board private structure
  3310. **/
  3311. static void
  3312. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3313. struct e1000_rx_ring *rx_ring,
  3314. int cleaned_count)
  3315. {
  3316. struct net_device *netdev = adapter->netdev;
  3317. struct pci_dev *pdev = adapter->pdev;
  3318. union e1000_rx_desc_packet_split *rx_desc;
  3319. struct e1000_buffer *buffer_info;
  3320. struct e1000_ps_page *ps_page;
  3321. struct e1000_ps_page_dma *ps_page_dma;
  3322. struct sk_buff *skb;
  3323. unsigned int i, j;
  3324. i = rx_ring->next_to_use;
  3325. buffer_info = &rx_ring->buffer_info[i];
  3326. ps_page = &rx_ring->ps_page[i];
  3327. ps_page_dma = &rx_ring->ps_page_dma[i];
  3328. while (cleaned_count--) {
  3329. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3330. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3331. if (j < adapter->rx_ps_pages) {
  3332. if (likely(!ps_page->ps_page[j])) {
  3333. ps_page->ps_page[j] =
  3334. alloc_page(GFP_ATOMIC);
  3335. if (unlikely(!ps_page->ps_page[j]))
  3336. goto no_buffers;
  3337. ps_page_dma->ps_page_dma[j] =
  3338. pci_map_page(pdev,
  3339. ps_page->ps_page[j],
  3340. 0, PAGE_SIZE,
  3341. PCI_DMA_FROMDEVICE);
  3342. }
  3343. /* Refresh the desc even if buffer_addrs didn't
  3344. * change because each write-back erases
  3345. * this info.
  3346. */
  3347. rx_desc->read.buffer_addr[j+1] =
  3348. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3349. } else
  3350. rx_desc->read.buffer_addr[j+1] = ~0;
  3351. }
  3352. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3353. if(unlikely(!skb))
  3354. break;
  3355. /* Make buffer alignment 2 beyond a 16 byte boundary
  3356. * this will result in a 16 byte aligned IP header after
  3357. * the 14 byte MAC header is removed
  3358. */
  3359. skb_reserve(skb, NET_IP_ALIGN);
  3360. skb->dev = netdev;
  3361. buffer_info->skb = skb;
  3362. buffer_info->length = adapter->rx_ps_bsize0;
  3363. buffer_info->dma = pci_map_single(pdev, skb->data,
  3364. adapter->rx_ps_bsize0,
  3365. PCI_DMA_FROMDEVICE);
  3366. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3367. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3368. /* Force memory writes to complete before letting h/w
  3369. * know there are new descriptors to fetch. (Only
  3370. * applicable for weak-ordered memory model archs,
  3371. * such as IA-64). */
  3372. wmb();
  3373. /* Hardware increments by 16 bytes, but packet split
  3374. * descriptors are 32 bytes...so we increment tail
  3375. * twice as much.
  3376. */
  3377. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3378. }
  3379. if(unlikely(++i == rx_ring->count)) i = 0;
  3380. buffer_info = &rx_ring->buffer_info[i];
  3381. ps_page = &rx_ring->ps_page[i];
  3382. ps_page_dma = &rx_ring->ps_page_dma[i];
  3383. }
  3384. no_buffers:
  3385. rx_ring->next_to_use = i;
  3386. }
  3387. /**
  3388. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3389. * @adapter:
  3390. **/
  3391. static void
  3392. e1000_smartspeed(struct e1000_adapter *adapter)
  3393. {
  3394. uint16_t phy_status;
  3395. uint16_t phy_ctrl;
  3396. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3397. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3398. return;
  3399. if(adapter->smartspeed == 0) {
  3400. /* If Master/Slave config fault is asserted twice,
  3401. * we assume back-to-back */
  3402. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3403. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3404. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3405. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3406. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3407. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3408. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3409. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3410. phy_ctrl);
  3411. adapter->smartspeed++;
  3412. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3413. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3414. &phy_ctrl)) {
  3415. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3416. MII_CR_RESTART_AUTO_NEG);
  3417. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3418. phy_ctrl);
  3419. }
  3420. }
  3421. return;
  3422. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3423. /* If still no link, perhaps using 2/3 pair cable */
  3424. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3425. phy_ctrl |= CR_1000T_MS_ENABLE;
  3426. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3427. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3428. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3429. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3430. MII_CR_RESTART_AUTO_NEG);
  3431. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3432. }
  3433. }
  3434. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3435. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3436. adapter->smartspeed = 0;
  3437. }
  3438. /**
  3439. * e1000_ioctl -
  3440. * @netdev:
  3441. * @ifreq:
  3442. * @cmd:
  3443. **/
  3444. static int
  3445. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3446. {
  3447. switch (cmd) {
  3448. case SIOCGMIIPHY:
  3449. case SIOCGMIIREG:
  3450. case SIOCSMIIREG:
  3451. return e1000_mii_ioctl(netdev, ifr, cmd);
  3452. default:
  3453. return -EOPNOTSUPP;
  3454. }
  3455. }
  3456. /**
  3457. * e1000_mii_ioctl -
  3458. * @netdev:
  3459. * @ifreq:
  3460. * @cmd:
  3461. **/
  3462. static int
  3463. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3464. {
  3465. struct e1000_adapter *adapter = netdev_priv(netdev);
  3466. struct mii_ioctl_data *data = if_mii(ifr);
  3467. int retval;
  3468. uint16_t mii_reg;
  3469. uint16_t spddplx;
  3470. unsigned long flags;
  3471. if(adapter->hw.media_type != e1000_media_type_copper)
  3472. return -EOPNOTSUPP;
  3473. switch (cmd) {
  3474. case SIOCGMIIPHY:
  3475. data->phy_id = adapter->hw.phy_addr;
  3476. break;
  3477. case SIOCGMIIREG:
  3478. if(!capable(CAP_NET_ADMIN))
  3479. return -EPERM;
  3480. spin_lock_irqsave(&adapter->stats_lock, flags);
  3481. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3482. &data->val_out)) {
  3483. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3484. return -EIO;
  3485. }
  3486. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3487. break;
  3488. case SIOCSMIIREG:
  3489. if(!capable(CAP_NET_ADMIN))
  3490. return -EPERM;
  3491. if(data->reg_num & ~(0x1F))
  3492. return -EFAULT;
  3493. mii_reg = data->val_in;
  3494. spin_lock_irqsave(&adapter->stats_lock, flags);
  3495. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3496. mii_reg)) {
  3497. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3498. return -EIO;
  3499. }
  3500. if(adapter->hw.phy_type == e1000_phy_m88) {
  3501. switch (data->reg_num) {
  3502. case PHY_CTRL:
  3503. if(mii_reg & MII_CR_POWER_DOWN)
  3504. break;
  3505. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3506. adapter->hw.autoneg = 1;
  3507. adapter->hw.autoneg_advertised = 0x2F;
  3508. } else {
  3509. if (mii_reg & 0x40)
  3510. spddplx = SPEED_1000;
  3511. else if (mii_reg & 0x2000)
  3512. spddplx = SPEED_100;
  3513. else
  3514. spddplx = SPEED_10;
  3515. spddplx += (mii_reg & 0x100)
  3516. ? FULL_DUPLEX :
  3517. HALF_DUPLEX;
  3518. retval = e1000_set_spd_dplx(adapter,
  3519. spddplx);
  3520. if(retval) {
  3521. spin_unlock_irqrestore(
  3522. &adapter->stats_lock,
  3523. flags);
  3524. return retval;
  3525. }
  3526. }
  3527. if(netif_running(adapter->netdev)) {
  3528. e1000_down(adapter);
  3529. e1000_up(adapter);
  3530. } else
  3531. e1000_reset(adapter);
  3532. break;
  3533. case M88E1000_PHY_SPEC_CTRL:
  3534. case M88E1000_EXT_PHY_SPEC_CTRL:
  3535. if(e1000_phy_reset(&adapter->hw)) {
  3536. spin_unlock_irqrestore(
  3537. &adapter->stats_lock, flags);
  3538. return -EIO;
  3539. }
  3540. break;
  3541. }
  3542. } else {
  3543. switch (data->reg_num) {
  3544. case PHY_CTRL:
  3545. if(mii_reg & MII_CR_POWER_DOWN)
  3546. break;
  3547. if(netif_running(adapter->netdev)) {
  3548. e1000_down(adapter);
  3549. e1000_up(adapter);
  3550. } else
  3551. e1000_reset(adapter);
  3552. break;
  3553. }
  3554. }
  3555. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3556. break;
  3557. default:
  3558. return -EOPNOTSUPP;
  3559. }
  3560. return E1000_SUCCESS;
  3561. }
  3562. void
  3563. e1000_pci_set_mwi(struct e1000_hw *hw)
  3564. {
  3565. struct e1000_adapter *adapter = hw->back;
  3566. int ret_val = pci_set_mwi(adapter->pdev);
  3567. if(ret_val)
  3568. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3569. }
  3570. void
  3571. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3572. {
  3573. struct e1000_adapter *adapter = hw->back;
  3574. pci_clear_mwi(adapter->pdev);
  3575. }
  3576. void
  3577. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3578. {
  3579. struct e1000_adapter *adapter = hw->back;
  3580. pci_read_config_word(adapter->pdev, reg, value);
  3581. }
  3582. void
  3583. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3584. {
  3585. struct e1000_adapter *adapter = hw->back;
  3586. pci_write_config_word(adapter->pdev, reg, *value);
  3587. }
  3588. uint32_t
  3589. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3590. {
  3591. return inl(port);
  3592. }
  3593. void
  3594. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3595. {
  3596. outl(value, port);
  3597. }
  3598. static void
  3599. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3600. {
  3601. struct e1000_adapter *adapter = netdev_priv(netdev);
  3602. uint32_t ctrl, rctl;
  3603. e1000_irq_disable(adapter);
  3604. adapter->vlgrp = grp;
  3605. if(grp) {
  3606. /* enable VLAN tag insert/strip */
  3607. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3608. ctrl |= E1000_CTRL_VME;
  3609. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3610. /* enable VLAN receive filtering */
  3611. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3612. rctl |= E1000_RCTL_VFE;
  3613. rctl &= ~E1000_RCTL_CFIEN;
  3614. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3615. e1000_update_mng_vlan(adapter);
  3616. } else {
  3617. /* disable VLAN tag insert/strip */
  3618. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3619. ctrl &= ~E1000_CTRL_VME;
  3620. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3621. /* disable VLAN filtering */
  3622. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3623. rctl &= ~E1000_RCTL_VFE;
  3624. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3625. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3626. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3627. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3628. }
  3629. }
  3630. e1000_irq_enable(adapter);
  3631. }
  3632. static void
  3633. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3634. {
  3635. struct e1000_adapter *adapter = netdev_priv(netdev);
  3636. uint32_t vfta, index;
  3637. if((adapter->hw.mng_cookie.status &
  3638. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3639. (vid == adapter->mng_vlan_id))
  3640. return;
  3641. /* add VID to filter table */
  3642. index = (vid >> 5) & 0x7F;
  3643. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3644. vfta |= (1 << (vid & 0x1F));
  3645. e1000_write_vfta(&adapter->hw, index, vfta);
  3646. }
  3647. static void
  3648. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3649. {
  3650. struct e1000_adapter *adapter = netdev_priv(netdev);
  3651. uint32_t vfta, index;
  3652. e1000_irq_disable(adapter);
  3653. if(adapter->vlgrp)
  3654. adapter->vlgrp->vlan_devices[vid] = NULL;
  3655. e1000_irq_enable(adapter);
  3656. if((adapter->hw.mng_cookie.status &
  3657. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3658. (vid == adapter->mng_vlan_id)) {
  3659. /* release control to f/w */
  3660. e1000_release_hw_control(adapter);
  3661. return;
  3662. }
  3663. /* remove VID from filter table */
  3664. index = (vid >> 5) & 0x7F;
  3665. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3666. vfta &= ~(1 << (vid & 0x1F));
  3667. e1000_write_vfta(&adapter->hw, index, vfta);
  3668. }
  3669. static void
  3670. e1000_restore_vlan(struct e1000_adapter *adapter)
  3671. {
  3672. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3673. if(adapter->vlgrp) {
  3674. uint16_t vid;
  3675. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3676. if(!adapter->vlgrp->vlan_devices[vid])
  3677. continue;
  3678. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3679. }
  3680. }
  3681. }
  3682. int
  3683. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3684. {
  3685. adapter->hw.autoneg = 0;
  3686. /* Fiber NICs only allow 1000 gbps Full duplex */
  3687. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3688. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3689. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3690. return -EINVAL;
  3691. }
  3692. switch(spddplx) {
  3693. case SPEED_10 + DUPLEX_HALF:
  3694. adapter->hw.forced_speed_duplex = e1000_10_half;
  3695. break;
  3696. case SPEED_10 + DUPLEX_FULL:
  3697. adapter->hw.forced_speed_duplex = e1000_10_full;
  3698. break;
  3699. case SPEED_100 + DUPLEX_HALF:
  3700. adapter->hw.forced_speed_duplex = e1000_100_half;
  3701. break;
  3702. case SPEED_100 + DUPLEX_FULL:
  3703. adapter->hw.forced_speed_duplex = e1000_100_full;
  3704. break;
  3705. case SPEED_1000 + DUPLEX_FULL:
  3706. adapter->hw.autoneg = 1;
  3707. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3708. break;
  3709. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3710. default:
  3711. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3712. return -EINVAL;
  3713. }
  3714. return 0;
  3715. }
  3716. #ifdef CONFIG_PM
  3717. static int
  3718. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3719. {
  3720. struct net_device *netdev = pci_get_drvdata(pdev);
  3721. struct e1000_adapter *adapter = netdev_priv(netdev);
  3722. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3723. uint32_t wufc = adapter->wol;
  3724. netif_device_detach(netdev);
  3725. if(netif_running(netdev))
  3726. e1000_down(adapter);
  3727. status = E1000_READ_REG(&adapter->hw, STATUS);
  3728. if(status & E1000_STATUS_LU)
  3729. wufc &= ~E1000_WUFC_LNKC;
  3730. if(wufc) {
  3731. e1000_setup_rctl(adapter);
  3732. e1000_set_multi(netdev);
  3733. /* turn on all-multi mode if wake on multicast is enabled */
  3734. if(adapter->wol & E1000_WUFC_MC) {
  3735. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3736. rctl |= E1000_RCTL_MPE;
  3737. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3738. }
  3739. if(adapter->hw.mac_type >= e1000_82540) {
  3740. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3741. /* advertise wake from D3Cold */
  3742. #define E1000_CTRL_ADVD3WUC 0x00100000
  3743. /* phy power management enable */
  3744. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3745. ctrl |= E1000_CTRL_ADVD3WUC |
  3746. E1000_CTRL_EN_PHY_PWR_MGMT;
  3747. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3748. }
  3749. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3750. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3751. /* keep the laser running in D3 */
  3752. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3753. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3754. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3755. }
  3756. /* Allow time for pending master requests to run */
  3757. e1000_disable_pciex_master(&adapter->hw);
  3758. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3759. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3760. pci_enable_wake(pdev, 3, 1);
  3761. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3762. } else {
  3763. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3764. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3765. pci_enable_wake(pdev, 3, 0);
  3766. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3767. }
  3768. pci_save_state(pdev);
  3769. if(adapter->hw.mac_type >= e1000_82540 &&
  3770. adapter->hw.media_type == e1000_media_type_copper) {
  3771. manc = E1000_READ_REG(&adapter->hw, MANC);
  3772. if(manc & E1000_MANC_SMBUS_EN) {
  3773. manc |= E1000_MANC_ARP_EN;
  3774. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3775. pci_enable_wake(pdev, 3, 1);
  3776. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3777. }
  3778. }
  3779. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3780. * would have already happened in close and is redundant. */
  3781. e1000_release_hw_control(adapter);
  3782. pci_disable_device(pdev);
  3783. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3784. return 0;
  3785. }
  3786. static int
  3787. e1000_resume(struct pci_dev *pdev)
  3788. {
  3789. struct net_device *netdev = pci_get_drvdata(pdev);
  3790. struct e1000_adapter *adapter = netdev_priv(netdev);
  3791. uint32_t manc, ret_val;
  3792. pci_set_power_state(pdev, PCI_D0);
  3793. pci_restore_state(pdev);
  3794. ret_val = pci_enable_device(pdev);
  3795. pci_set_master(pdev);
  3796. pci_enable_wake(pdev, PCI_D3hot, 0);
  3797. pci_enable_wake(pdev, PCI_D3cold, 0);
  3798. e1000_reset(adapter);
  3799. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3800. if(netif_running(netdev))
  3801. e1000_up(adapter);
  3802. netif_device_attach(netdev);
  3803. if(adapter->hw.mac_type >= e1000_82540 &&
  3804. adapter->hw.media_type == e1000_media_type_copper) {
  3805. manc = E1000_READ_REG(&adapter->hw, MANC);
  3806. manc &= ~(E1000_MANC_ARP_EN);
  3807. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3808. }
  3809. /* If the controller is 82573 and f/w is AMT, do not set
  3810. * DRV_LOAD until the interface is up. For all other cases,
  3811. * let the f/w know that the h/w is now under the control
  3812. * of the driver. */
  3813. if (adapter->hw.mac_type != e1000_82573 ||
  3814. !e1000_check_mng_mode(&adapter->hw))
  3815. e1000_get_hw_control(adapter);
  3816. return 0;
  3817. }
  3818. #endif
  3819. #ifdef CONFIG_NET_POLL_CONTROLLER
  3820. /*
  3821. * Polling 'interrupt' - used by things like netconsole to send skbs
  3822. * without having to re-enable interrupts. It's not called while
  3823. * the interrupt routine is executing.
  3824. */
  3825. static void
  3826. e1000_netpoll(struct net_device *netdev)
  3827. {
  3828. struct e1000_adapter *adapter = netdev_priv(netdev);
  3829. disable_irq(adapter->pdev->irq);
  3830. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3831. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3832. #ifndef CONFIG_E1000_NAPI
  3833. adapter->clean_rx(adapter, adapter->rx_ring);
  3834. #endif
  3835. enable_irq(adapter->pdev->irq);
  3836. }
  3837. #endif
  3838. /* e1000_main.c */