hpsa.c 113 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. /* define the PCI info for the cards we can control */
  72. static const struct pci_device_id hpsa_pci_device_id[] = {
  73. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  74. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  75. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  76. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  86. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  87. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  88. {0,}
  89. };
  90. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  91. /* board_id = Subsystem Device ID & Vendor ID
  92. * product = Marketing Name for the board
  93. * access = Address of the struct of function pointers
  94. */
  95. static struct board_type products[] = {
  96. {0x3241103C, "Smart Array P212", &SA5_access},
  97. {0x3243103C, "Smart Array P410", &SA5_access},
  98. {0x3245103C, "Smart Array P410i", &SA5_access},
  99. {0x3247103C, "Smart Array P411", &SA5_access},
  100. {0x3249103C, "Smart Array P812", &SA5_access},
  101. {0x324a103C, "Smart Array P712m", &SA5_access},
  102. {0x324b103C, "Smart Array P711m", &SA5_access},
  103. {0x3250103C, "Smart Array", &SA5_access},
  104. {0x3250113C, "Smart Array", &SA5_access},
  105. {0x3250123C, "Smart Array", &SA5_access},
  106. {0x3250133C, "Smart Array", &SA5_access},
  107. {0x3250143C, "Smart Array", &SA5_access},
  108. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  109. };
  110. static int number_of_controllers;
  111. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  112. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  113. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  114. static void start_io(struct ctlr_info *h);
  115. #ifdef CONFIG_COMPAT
  116. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  117. #endif
  118. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  119. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  120. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  121. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  122. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  123. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  124. int cmd_type);
  125. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  126. static void hpsa_scan_start(struct Scsi_Host *);
  127. static int hpsa_scan_finished(struct Scsi_Host *sh,
  128. unsigned long elapsed_time);
  129. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  130. int qdepth, int reason);
  131. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  132. static int hpsa_slave_alloc(struct scsi_device *sdev);
  133. static void hpsa_slave_destroy(struct scsi_device *sdev);
  134. static ssize_t raid_level_show(struct device *dev,
  135. struct device_attribute *attr, char *buf);
  136. static ssize_t lunid_show(struct device *dev,
  137. struct device_attribute *attr, char *buf);
  138. static ssize_t unique_id_show(struct device *dev,
  139. struct device_attribute *attr, char *buf);
  140. static ssize_t host_show_firmware_revision(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static ssize_t host_store_rescan(struct device *dev,
  144. struct device_attribute *attr, const char *buf, size_t count);
  145. static int check_for_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. static void check_ioctl_unit_attention(struct ctlr_info *h,
  148. struct CommandList *c);
  149. /* performant mode helper functions */
  150. static void calc_bucket_map(int *bucket, int num_buckets,
  151. int nsgs, int *bucket_map);
  152. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  153. static inline u32 next_command(struct ctlr_info *h);
  154. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  155. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  156. u64 *cfg_offset);
  157. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  158. unsigned long *memory_bar);
  159. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  160. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  161. void __iomem *vaddr, int wait_for_ready);
  162. #define BOARD_NOT_READY 0
  163. #define BOARD_READY 1
  164. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  165. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  166. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  167. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  168. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  169. host_show_firmware_revision, NULL);
  170. static struct device_attribute *hpsa_sdev_attrs[] = {
  171. &dev_attr_raid_level,
  172. &dev_attr_lunid,
  173. &dev_attr_unique_id,
  174. NULL,
  175. };
  176. static struct device_attribute *hpsa_shost_attrs[] = {
  177. &dev_attr_rescan,
  178. &dev_attr_firmware_revision,
  179. NULL,
  180. };
  181. static struct scsi_host_template hpsa_driver_template = {
  182. .module = THIS_MODULE,
  183. .name = "hpsa",
  184. .proc_name = "hpsa",
  185. .queuecommand = hpsa_scsi_queue_command,
  186. .scan_start = hpsa_scan_start,
  187. .scan_finished = hpsa_scan_finished,
  188. .change_queue_depth = hpsa_change_queue_depth,
  189. .this_id = -1,
  190. .use_clustering = ENABLE_CLUSTERING,
  191. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  192. .ioctl = hpsa_ioctl,
  193. .slave_alloc = hpsa_slave_alloc,
  194. .slave_destroy = hpsa_slave_destroy,
  195. #ifdef CONFIG_COMPAT
  196. .compat_ioctl = hpsa_compat_ioctl,
  197. #endif
  198. .sdev_attrs = hpsa_sdev_attrs,
  199. .shost_attrs = hpsa_shost_attrs,
  200. };
  201. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  202. {
  203. unsigned long *priv = shost_priv(sdev->host);
  204. return (struct ctlr_info *) *priv;
  205. }
  206. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  207. {
  208. unsigned long *priv = shost_priv(sh);
  209. return (struct ctlr_info *) *priv;
  210. }
  211. static int check_for_unit_attention(struct ctlr_info *h,
  212. struct CommandList *c)
  213. {
  214. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  215. return 0;
  216. switch (c->err_info->SenseInfo[12]) {
  217. case STATE_CHANGED:
  218. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  219. "detected, command retried\n", h->ctlr);
  220. break;
  221. case LUN_FAILED:
  222. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  223. "detected, action required\n", h->ctlr);
  224. break;
  225. case REPORT_LUNS_CHANGED:
  226. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  227. "changed, action required\n", h->ctlr);
  228. /*
  229. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  230. */
  231. break;
  232. case POWER_OR_RESET:
  233. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  234. "or device reset detected\n", h->ctlr);
  235. break;
  236. case UNIT_ATTENTION_CLEARED:
  237. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  238. "cleared by another initiator\n", h->ctlr);
  239. break;
  240. default:
  241. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  242. "unit attention detected\n", h->ctlr);
  243. break;
  244. }
  245. return 1;
  246. }
  247. static ssize_t host_store_rescan(struct device *dev,
  248. struct device_attribute *attr,
  249. const char *buf, size_t count)
  250. {
  251. struct ctlr_info *h;
  252. struct Scsi_Host *shost = class_to_shost(dev);
  253. h = shost_to_hba(shost);
  254. hpsa_scan_start(h->scsi_host);
  255. return count;
  256. }
  257. static ssize_t host_show_firmware_revision(struct device *dev,
  258. struct device_attribute *attr, char *buf)
  259. {
  260. struct ctlr_info *h;
  261. struct Scsi_Host *shost = class_to_shost(dev);
  262. unsigned char *fwrev;
  263. h = shost_to_hba(shost);
  264. if (!h->hba_inquiry_data)
  265. return 0;
  266. fwrev = &h->hba_inquiry_data[32];
  267. return snprintf(buf, 20, "%c%c%c%c\n",
  268. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  269. }
  270. /* Enqueuing and dequeuing functions for cmdlists. */
  271. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  272. {
  273. hlist_add_head(&c->list, list);
  274. }
  275. static inline u32 next_command(struct ctlr_info *h)
  276. {
  277. u32 a;
  278. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  279. return h->access.command_completed(h);
  280. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  281. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  282. (h->reply_pool_head)++;
  283. h->commands_outstanding--;
  284. } else {
  285. a = FIFO_EMPTY;
  286. }
  287. /* Check for wraparound */
  288. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  289. h->reply_pool_head = h->reply_pool;
  290. h->reply_pool_wraparound ^= 1;
  291. }
  292. return a;
  293. }
  294. /* set_performant_mode: Modify the tag for cciss performant
  295. * set bit 0 for pull model, bits 3-1 for block fetch
  296. * register number
  297. */
  298. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  299. {
  300. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  301. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  302. }
  303. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  304. struct CommandList *c)
  305. {
  306. unsigned long flags;
  307. set_performant_mode(h, c);
  308. spin_lock_irqsave(&h->lock, flags);
  309. addQ(&h->reqQ, c);
  310. h->Qdepth++;
  311. start_io(h);
  312. spin_unlock_irqrestore(&h->lock, flags);
  313. }
  314. static inline void removeQ(struct CommandList *c)
  315. {
  316. if (WARN_ON(hlist_unhashed(&c->list)))
  317. return;
  318. hlist_del_init(&c->list);
  319. }
  320. static inline int is_hba_lunid(unsigned char scsi3addr[])
  321. {
  322. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  323. }
  324. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  325. {
  326. return (scsi3addr[3] & 0xC0) == 0x40;
  327. }
  328. static inline int is_scsi_rev_5(struct ctlr_info *h)
  329. {
  330. if (!h->hba_inquiry_data)
  331. return 0;
  332. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  333. return 1;
  334. return 0;
  335. }
  336. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  337. "UNKNOWN"
  338. };
  339. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  340. static ssize_t raid_level_show(struct device *dev,
  341. struct device_attribute *attr, char *buf)
  342. {
  343. ssize_t l = 0;
  344. unsigned char rlevel;
  345. struct ctlr_info *h;
  346. struct scsi_device *sdev;
  347. struct hpsa_scsi_dev_t *hdev;
  348. unsigned long flags;
  349. sdev = to_scsi_device(dev);
  350. h = sdev_to_hba(sdev);
  351. spin_lock_irqsave(&h->lock, flags);
  352. hdev = sdev->hostdata;
  353. if (!hdev) {
  354. spin_unlock_irqrestore(&h->lock, flags);
  355. return -ENODEV;
  356. }
  357. /* Is this even a logical drive? */
  358. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  359. spin_unlock_irqrestore(&h->lock, flags);
  360. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  361. return l;
  362. }
  363. rlevel = hdev->raid_level;
  364. spin_unlock_irqrestore(&h->lock, flags);
  365. if (rlevel > RAID_UNKNOWN)
  366. rlevel = RAID_UNKNOWN;
  367. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  368. return l;
  369. }
  370. static ssize_t lunid_show(struct device *dev,
  371. struct device_attribute *attr, char *buf)
  372. {
  373. struct ctlr_info *h;
  374. struct scsi_device *sdev;
  375. struct hpsa_scsi_dev_t *hdev;
  376. unsigned long flags;
  377. unsigned char lunid[8];
  378. sdev = to_scsi_device(dev);
  379. h = sdev_to_hba(sdev);
  380. spin_lock_irqsave(&h->lock, flags);
  381. hdev = sdev->hostdata;
  382. if (!hdev) {
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return -ENODEV;
  385. }
  386. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  387. spin_unlock_irqrestore(&h->lock, flags);
  388. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  389. lunid[0], lunid[1], lunid[2], lunid[3],
  390. lunid[4], lunid[5], lunid[6], lunid[7]);
  391. }
  392. static ssize_t unique_id_show(struct device *dev,
  393. struct device_attribute *attr, char *buf)
  394. {
  395. struct ctlr_info *h;
  396. struct scsi_device *sdev;
  397. struct hpsa_scsi_dev_t *hdev;
  398. unsigned long flags;
  399. unsigned char sn[16];
  400. sdev = to_scsi_device(dev);
  401. h = sdev_to_hba(sdev);
  402. spin_lock_irqsave(&h->lock, flags);
  403. hdev = sdev->hostdata;
  404. if (!hdev) {
  405. spin_unlock_irqrestore(&h->lock, flags);
  406. return -ENODEV;
  407. }
  408. memcpy(sn, hdev->device_id, sizeof(sn));
  409. spin_unlock_irqrestore(&h->lock, flags);
  410. return snprintf(buf, 16 * 2 + 2,
  411. "%02X%02X%02X%02X%02X%02X%02X%02X"
  412. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  413. sn[0], sn[1], sn[2], sn[3],
  414. sn[4], sn[5], sn[6], sn[7],
  415. sn[8], sn[9], sn[10], sn[11],
  416. sn[12], sn[13], sn[14], sn[15]);
  417. }
  418. static int hpsa_find_target_lun(struct ctlr_info *h,
  419. unsigned char scsi3addr[], int bus, int *target, int *lun)
  420. {
  421. /* finds an unused bus, target, lun for a new physical device
  422. * assumes h->devlock is held
  423. */
  424. int i, found = 0;
  425. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  426. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  427. for (i = 0; i < h->ndevices; i++) {
  428. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  429. set_bit(h->dev[i]->target, lun_taken);
  430. }
  431. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  432. if (!test_bit(i, lun_taken)) {
  433. /* *bus = 1; */
  434. *target = i;
  435. *lun = 0;
  436. found = 1;
  437. break;
  438. }
  439. }
  440. return !found;
  441. }
  442. /* Add an entry into h->dev[] array. */
  443. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  444. struct hpsa_scsi_dev_t *device,
  445. struct hpsa_scsi_dev_t *added[], int *nadded)
  446. {
  447. /* assumes h->devlock is held */
  448. int n = h->ndevices;
  449. int i;
  450. unsigned char addr1[8], addr2[8];
  451. struct hpsa_scsi_dev_t *sd;
  452. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  453. dev_err(&h->pdev->dev, "too many devices, some will be "
  454. "inaccessible.\n");
  455. return -1;
  456. }
  457. /* physical devices do not have lun or target assigned until now. */
  458. if (device->lun != -1)
  459. /* Logical device, lun is already assigned. */
  460. goto lun_assigned;
  461. /* If this device a non-zero lun of a multi-lun device
  462. * byte 4 of the 8-byte LUN addr will contain the logical
  463. * unit no, zero otherise.
  464. */
  465. if (device->scsi3addr[4] == 0) {
  466. /* This is not a non-zero lun of a multi-lun device */
  467. if (hpsa_find_target_lun(h, device->scsi3addr,
  468. device->bus, &device->target, &device->lun) != 0)
  469. return -1;
  470. goto lun_assigned;
  471. }
  472. /* This is a non-zero lun of a multi-lun device.
  473. * Search through our list and find the device which
  474. * has the same 8 byte LUN address, excepting byte 4.
  475. * Assign the same bus and target for this new LUN.
  476. * Use the logical unit number from the firmware.
  477. */
  478. memcpy(addr1, device->scsi3addr, 8);
  479. addr1[4] = 0;
  480. for (i = 0; i < n; i++) {
  481. sd = h->dev[i];
  482. memcpy(addr2, sd->scsi3addr, 8);
  483. addr2[4] = 0;
  484. /* differ only in byte 4? */
  485. if (memcmp(addr1, addr2, 8) == 0) {
  486. device->bus = sd->bus;
  487. device->target = sd->target;
  488. device->lun = device->scsi3addr[4];
  489. break;
  490. }
  491. }
  492. if (device->lun == -1) {
  493. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  494. " suspect firmware bug or unsupported hardware "
  495. "configuration.\n");
  496. return -1;
  497. }
  498. lun_assigned:
  499. h->dev[n] = device;
  500. h->ndevices++;
  501. added[*nadded] = device;
  502. (*nadded)++;
  503. /* initially, (before registering with scsi layer) we don't
  504. * know our hostno and we don't want to print anything first
  505. * time anyway (the scsi layer's inquiries will show that info)
  506. */
  507. /* if (hostno != -1) */
  508. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  509. scsi_device_type(device->devtype), hostno,
  510. device->bus, device->target, device->lun);
  511. return 0;
  512. }
  513. /* Replace an entry from h->dev[] array. */
  514. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  515. int entry, struct hpsa_scsi_dev_t *new_entry,
  516. struct hpsa_scsi_dev_t *added[], int *nadded,
  517. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  518. {
  519. /* assumes h->devlock is held */
  520. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  521. removed[*nremoved] = h->dev[entry];
  522. (*nremoved)++;
  523. h->dev[entry] = new_entry;
  524. added[*nadded] = new_entry;
  525. (*nadded)++;
  526. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  527. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  528. new_entry->target, new_entry->lun);
  529. }
  530. /* Remove an entry from h->dev[] array. */
  531. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  532. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  533. {
  534. /* assumes h->devlock is held */
  535. int i;
  536. struct hpsa_scsi_dev_t *sd;
  537. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  538. sd = h->dev[entry];
  539. removed[*nremoved] = h->dev[entry];
  540. (*nremoved)++;
  541. for (i = entry; i < h->ndevices-1; i++)
  542. h->dev[i] = h->dev[i+1];
  543. h->ndevices--;
  544. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  545. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  546. sd->lun);
  547. }
  548. #define SCSI3ADDR_EQ(a, b) ( \
  549. (a)[7] == (b)[7] && \
  550. (a)[6] == (b)[6] && \
  551. (a)[5] == (b)[5] && \
  552. (a)[4] == (b)[4] && \
  553. (a)[3] == (b)[3] && \
  554. (a)[2] == (b)[2] && \
  555. (a)[1] == (b)[1] && \
  556. (a)[0] == (b)[0])
  557. static void fixup_botched_add(struct ctlr_info *h,
  558. struct hpsa_scsi_dev_t *added)
  559. {
  560. /* called when scsi_add_device fails in order to re-adjust
  561. * h->dev[] to match the mid layer's view.
  562. */
  563. unsigned long flags;
  564. int i, j;
  565. spin_lock_irqsave(&h->lock, flags);
  566. for (i = 0; i < h->ndevices; i++) {
  567. if (h->dev[i] == added) {
  568. for (j = i; j < h->ndevices-1; j++)
  569. h->dev[j] = h->dev[j+1];
  570. h->ndevices--;
  571. break;
  572. }
  573. }
  574. spin_unlock_irqrestore(&h->lock, flags);
  575. kfree(added);
  576. }
  577. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  578. struct hpsa_scsi_dev_t *dev2)
  579. {
  580. /* we compare everything except lun and target as these
  581. * are not yet assigned. Compare parts likely
  582. * to differ first
  583. */
  584. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  585. sizeof(dev1->scsi3addr)) != 0)
  586. return 0;
  587. if (memcmp(dev1->device_id, dev2->device_id,
  588. sizeof(dev1->device_id)) != 0)
  589. return 0;
  590. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  591. return 0;
  592. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  593. return 0;
  594. if (dev1->devtype != dev2->devtype)
  595. return 0;
  596. if (dev1->bus != dev2->bus)
  597. return 0;
  598. return 1;
  599. }
  600. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  601. * and return needle location in *index. If scsi3addr matches, but not
  602. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  603. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  604. */
  605. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  606. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  607. int *index)
  608. {
  609. int i;
  610. #define DEVICE_NOT_FOUND 0
  611. #define DEVICE_CHANGED 1
  612. #define DEVICE_SAME 2
  613. for (i = 0; i < haystack_size; i++) {
  614. if (haystack[i] == NULL) /* previously removed. */
  615. continue;
  616. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  617. *index = i;
  618. if (device_is_the_same(needle, haystack[i]))
  619. return DEVICE_SAME;
  620. else
  621. return DEVICE_CHANGED;
  622. }
  623. }
  624. *index = -1;
  625. return DEVICE_NOT_FOUND;
  626. }
  627. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  628. struct hpsa_scsi_dev_t *sd[], int nsds)
  629. {
  630. /* sd contains scsi3 addresses and devtypes, and inquiry
  631. * data. This function takes what's in sd to be the current
  632. * reality and updates h->dev[] to reflect that reality.
  633. */
  634. int i, entry, device_change, changes = 0;
  635. struct hpsa_scsi_dev_t *csd;
  636. unsigned long flags;
  637. struct hpsa_scsi_dev_t **added, **removed;
  638. int nadded, nremoved;
  639. struct Scsi_Host *sh = NULL;
  640. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  641. GFP_KERNEL);
  642. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  643. GFP_KERNEL);
  644. if (!added || !removed) {
  645. dev_warn(&h->pdev->dev, "out of memory in "
  646. "adjust_hpsa_scsi_table\n");
  647. goto free_and_out;
  648. }
  649. spin_lock_irqsave(&h->devlock, flags);
  650. /* find any devices in h->dev[] that are not in
  651. * sd[] and remove them from h->dev[], and for any
  652. * devices which have changed, remove the old device
  653. * info and add the new device info.
  654. */
  655. i = 0;
  656. nremoved = 0;
  657. nadded = 0;
  658. while (i < h->ndevices) {
  659. csd = h->dev[i];
  660. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  661. if (device_change == DEVICE_NOT_FOUND) {
  662. changes++;
  663. hpsa_scsi_remove_entry(h, hostno, i,
  664. removed, &nremoved);
  665. continue; /* remove ^^^, hence i not incremented */
  666. } else if (device_change == DEVICE_CHANGED) {
  667. changes++;
  668. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  669. added, &nadded, removed, &nremoved);
  670. /* Set it to NULL to prevent it from being freed
  671. * at the bottom of hpsa_update_scsi_devices()
  672. */
  673. sd[entry] = NULL;
  674. }
  675. i++;
  676. }
  677. /* Now, make sure every device listed in sd[] is also
  678. * listed in h->dev[], adding them if they aren't found
  679. */
  680. for (i = 0; i < nsds; i++) {
  681. if (!sd[i]) /* if already added above. */
  682. continue;
  683. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  684. h->ndevices, &entry);
  685. if (device_change == DEVICE_NOT_FOUND) {
  686. changes++;
  687. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  688. added, &nadded) != 0)
  689. break;
  690. sd[i] = NULL; /* prevent from being freed later. */
  691. } else if (device_change == DEVICE_CHANGED) {
  692. /* should never happen... */
  693. changes++;
  694. dev_warn(&h->pdev->dev,
  695. "device unexpectedly changed.\n");
  696. /* but if it does happen, we just ignore that device */
  697. }
  698. }
  699. spin_unlock_irqrestore(&h->devlock, flags);
  700. /* Don't notify scsi mid layer of any changes the first time through
  701. * (or if there are no changes) scsi_scan_host will do it later the
  702. * first time through.
  703. */
  704. if (hostno == -1 || !changes)
  705. goto free_and_out;
  706. sh = h->scsi_host;
  707. /* Notify scsi mid layer of any removed devices */
  708. for (i = 0; i < nremoved; i++) {
  709. struct scsi_device *sdev =
  710. scsi_device_lookup(sh, removed[i]->bus,
  711. removed[i]->target, removed[i]->lun);
  712. if (sdev != NULL) {
  713. scsi_remove_device(sdev);
  714. scsi_device_put(sdev);
  715. } else {
  716. /* We don't expect to get here.
  717. * future cmds to this device will get selection
  718. * timeout as if the device was gone.
  719. */
  720. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  721. " for removal.", hostno, removed[i]->bus,
  722. removed[i]->target, removed[i]->lun);
  723. }
  724. kfree(removed[i]);
  725. removed[i] = NULL;
  726. }
  727. /* Notify scsi mid layer of any added devices */
  728. for (i = 0; i < nadded; i++) {
  729. if (scsi_add_device(sh, added[i]->bus,
  730. added[i]->target, added[i]->lun) == 0)
  731. continue;
  732. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  733. "device not added.\n", hostno, added[i]->bus,
  734. added[i]->target, added[i]->lun);
  735. /* now we have to remove it from h->dev,
  736. * since it didn't get added to scsi mid layer
  737. */
  738. fixup_botched_add(h, added[i]);
  739. }
  740. free_and_out:
  741. kfree(added);
  742. kfree(removed);
  743. }
  744. /*
  745. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  746. * Assume's h->devlock is held.
  747. */
  748. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  749. int bus, int target, int lun)
  750. {
  751. int i;
  752. struct hpsa_scsi_dev_t *sd;
  753. for (i = 0; i < h->ndevices; i++) {
  754. sd = h->dev[i];
  755. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  756. return sd;
  757. }
  758. return NULL;
  759. }
  760. /* link sdev->hostdata to our per-device structure. */
  761. static int hpsa_slave_alloc(struct scsi_device *sdev)
  762. {
  763. struct hpsa_scsi_dev_t *sd;
  764. unsigned long flags;
  765. struct ctlr_info *h;
  766. h = sdev_to_hba(sdev);
  767. spin_lock_irqsave(&h->devlock, flags);
  768. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  769. sdev_id(sdev), sdev->lun);
  770. if (sd != NULL)
  771. sdev->hostdata = sd;
  772. spin_unlock_irqrestore(&h->devlock, flags);
  773. return 0;
  774. }
  775. static void hpsa_slave_destroy(struct scsi_device *sdev)
  776. {
  777. /* nothing to do. */
  778. }
  779. static void hpsa_scsi_setup(struct ctlr_info *h)
  780. {
  781. h->ndevices = 0;
  782. h->scsi_host = NULL;
  783. spin_lock_init(&h->devlock);
  784. }
  785. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  786. {
  787. int i;
  788. if (!h->cmd_sg_list)
  789. return;
  790. for (i = 0; i < h->nr_cmds; i++) {
  791. kfree(h->cmd_sg_list[i]);
  792. h->cmd_sg_list[i] = NULL;
  793. }
  794. kfree(h->cmd_sg_list);
  795. h->cmd_sg_list = NULL;
  796. }
  797. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  798. {
  799. int i;
  800. if (h->chainsize <= 0)
  801. return 0;
  802. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  803. GFP_KERNEL);
  804. if (!h->cmd_sg_list)
  805. return -ENOMEM;
  806. for (i = 0; i < h->nr_cmds; i++) {
  807. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  808. h->chainsize, GFP_KERNEL);
  809. if (!h->cmd_sg_list[i])
  810. goto clean;
  811. }
  812. return 0;
  813. clean:
  814. hpsa_free_sg_chain_blocks(h);
  815. return -ENOMEM;
  816. }
  817. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  818. struct CommandList *c)
  819. {
  820. struct SGDescriptor *chain_sg, *chain_block;
  821. u64 temp64;
  822. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  823. chain_block = h->cmd_sg_list[c->cmdindex];
  824. chain_sg->Ext = HPSA_SG_CHAIN;
  825. chain_sg->Len = sizeof(*chain_sg) *
  826. (c->Header.SGTotal - h->max_cmd_sg_entries);
  827. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  828. PCI_DMA_TODEVICE);
  829. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  830. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  831. }
  832. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  833. struct CommandList *c)
  834. {
  835. struct SGDescriptor *chain_sg;
  836. union u64bit temp64;
  837. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  838. return;
  839. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  840. temp64.val32.lower = chain_sg->Addr.lower;
  841. temp64.val32.upper = chain_sg->Addr.upper;
  842. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  843. }
  844. static void complete_scsi_command(struct CommandList *cp,
  845. int timeout, u32 tag)
  846. {
  847. struct scsi_cmnd *cmd;
  848. struct ctlr_info *h;
  849. struct ErrorInfo *ei;
  850. unsigned char sense_key;
  851. unsigned char asc; /* additional sense code */
  852. unsigned char ascq; /* additional sense code qualifier */
  853. ei = cp->err_info;
  854. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  855. h = cp->h;
  856. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  857. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  858. hpsa_unmap_sg_chain_block(h, cp);
  859. cmd->result = (DID_OK << 16); /* host byte */
  860. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  861. cmd->result |= ei->ScsiStatus;
  862. /* copy the sense data whether we need to or not. */
  863. memcpy(cmd->sense_buffer, ei->SenseInfo,
  864. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  865. SCSI_SENSE_BUFFERSIZE :
  866. ei->SenseLen);
  867. scsi_set_resid(cmd, ei->ResidualCnt);
  868. if (ei->CommandStatus == 0) {
  869. cmd->scsi_done(cmd);
  870. cmd_free(h, cp);
  871. return;
  872. }
  873. /* an error has occurred */
  874. switch (ei->CommandStatus) {
  875. case CMD_TARGET_STATUS:
  876. if (ei->ScsiStatus) {
  877. /* Get sense key */
  878. sense_key = 0xf & ei->SenseInfo[2];
  879. /* Get additional sense code */
  880. asc = ei->SenseInfo[12];
  881. /* Get addition sense code qualifier */
  882. ascq = ei->SenseInfo[13];
  883. }
  884. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  885. if (check_for_unit_attention(h, cp)) {
  886. cmd->result = DID_SOFT_ERROR << 16;
  887. break;
  888. }
  889. if (sense_key == ILLEGAL_REQUEST) {
  890. /*
  891. * SCSI REPORT_LUNS is commonly unsupported on
  892. * Smart Array. Suppress noisy complaint.
  893. */
  894. if (cp->Request.CDB[0] == REPORT_LUNS)
  895. break;
  896. /* If ASC/ASCQ indicate Logical Unit
  897. * Not Supported condition,
  898. */
  899. if ((asc == 0x25) && (ascq == 0x0)) {
  900. dev_warn(&h->pdev->dev, "cp %p "
  901. "has check condition\n", cp);
  902. break;
  903. }
  904. }
  905. if (sense_key == NOT_READY) {
  906. /* If Sense is Not Ready, Logical Unit
  907. * Not ready, Manual Intervention
  908. * required
  909. */
  910. if ((asc == 0x04) && (ascq == 0x03)) {
  911. dev_warn(&h->pdev->dev, "cp %p "
  912. "has check condition: unit "
  913. "not ready, manual "
  914. "intervention required\n", cp);
  915. break;
  916. }
  917. }
  918. if (sense_key == ABORTED_COMMAND) {
  919. /* Aborted command is retryable */
  920. dev_warn(&h->pdev->dev, "cp %p "
  921. "has check condition: aborted command: "
  922. "ASC: 0x%x, ASCQ: 0x%x\n",
  923. cp, asc, ascq);
  924. cmd->result = DID_SOFT_ERROR << 16;
  925. break;
  926. }
  927. /* Must be some other type of check condition */
  928. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  929. "unknown type: "
  930. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  931. "Returning result: 0x%x, "
  932. "cmd=[%02x %02x %02x %02x %02x "
  933. "%02x %02x %02x %02x %02x %02x "
  934. "%02x %02x %02x %02x %02x]\n",
  935. cp, sense_key, asc, ascq,
  936. cmd->result,
  937. cmd->cmnd[0], cmd->cmnd[1],
  938. cmd->cmnd[2], cmd->cmnd[3],
  939. cmd->cmnd[4], cmd->cmnd[5],
  940. cmd->cmnd[6], cmd->cmnd[7],
  941. cmd->cmnd[8], cmd->cmnd[9],
  942. cmd->cmnd[10], cmd->cmnd[11],
  943. cmd->cmnd[12], cmd->cmnd[13],
  944. cmd->cmnd[14], cmd->cmnd[15]);
  945. break;
  946. }
  947. /* Problem was not a check condition
  948. * Pass it up to the upper layers...
  949. */
  950. if (ei->ScsiStatus) {
  951. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  952. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  953. "Returning result: 0x%x\n",
  954. cp, ei->ScsiStatus,
  955. sense_key, asc, ascq,
  956. cmd->result);
  957. } else { /* scsi status is zero??? How??? */
  958. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  959. "Returning no connection.\n", cp),
  960. /* Ordinarily, this case should never happen,
  961. * but there is a bug in some released firmware
  962. * revisions that allows it to happen if, for
  963. * example, a 4100 backplane loses power and
  964. * the tape drive is in it. We assume that
  965. * it's a fatal error of some kind because we
  966. * can't show that it wasn't. We will make it
  967. * look like selection timeout since that is
  968. * the most common reason for this to occur,
  969. * and it's severe enough.
  970. */
  971. cmd->result = DID_NO_CONNECT << 16;
  972. }
  973. break;
  974. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  975. break;
  976. case CMD_DATA_OVERRUN:
  977. dev_warn(&h->pdev->dev, "cp %p has"
  978. " completed with data overrun "
  979. "reported\n", cp);
  980. break;
  981. case CMD_INVALID: {
  982. /* print_bytes(cp, sizeof(*cp), 1, 0);
  983. print_cmd(cp); */
  984. /* We get CMD_INVALID if you address a non-existent device
  985. * instead of a selection timeout (no response). You will
  986. * see this if you yank out a drive, then try to access it.
  987. * This is kind of a shame because it means that any other
  988. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  989. * missing target. */
  990. cmd->result = DID_NO_CONNECT << 16;
  991. }
  992. break;
  993. case CMD_PROTOCOL_ERR:
  994. dev_warn(&h->pdev->dev, "cp %p has "
  995. "protocol error \n", cp);
  996. break;
  997. case CMD_HARDWARE_ERR:
  998. cmd->result = DID_ERROR << 16;
  999. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1000. break;
  1001. case CMD_CONNECTION_LOST:
  1002. cmd->result = DID_ERROR << 16;
  1003. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1004. break;
  1005. case CMD_ABORTED:
  1006. cmd->result = DID_ABORT << 16;
  1007. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1008. cp, ei->ScsiStatus);
  1009. break;
  1010. case CMD_ABORT_FAILED:
  1011. cmd->result = DID_ERROR << 16;
  1012. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1013. break;
  1014. case CMD_UNSOLICITED_ABORT:
  1015. cmd->result = DID_RESET << 16;
  1016. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1017. "abort\n", cp);
  1018. break;
  1019. case CMD_TIMEOUT:
  1020. cmd->result = DID_TIME_OUT << 16;
  1021. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1022. break;
  1023. default:
  1024. cmd->result = DID_ERROR << 16;
  1025. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1026. cp, ei->CommandStatus);
  1027. }
  1028. cmd->scsi_done(cmd);
  1029. cmd_free(h, cp);
  1030. }
  1031. static int hpsa_scsi_detect(struct ctlr_info *h)
  1032. {
  1033. struct Scsi_Host *sh;
  1034. int error;
  1035. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1036. if (sh == NULL)
  1037. goto fail;
  1038. sh->io_port = 0;
  1039. sh->n_io_port = 0;
  1040. sh->this_id = -1;
  1041. sh->max_channel = 3;
  1042. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1043. sh->max_lun = HPSA_MAX_LUN;
  1044. sh->max_id = HPSA_MAX_LUN;
  1045. sh->can_queue = h->nr_cmds;
  1046. sh->cmd_per_lun = h->nr_cmds;
  1047. sh->sg_tablesize = h->maxsgentries;
  1048. h->scsi_host = sh;
  1049. sh->hostdata[0] = (unsigned long) h;
  1050. sh->irq = h->intr[PERF_MODE_INT];
  1051. sh->unique_id = sh->irq;
  1052. error = scsi_add_host(sh, &h->pdev->dev);
  1053. if (error)
  1054. goto fail_host_put;
  1055. scsi_scan_host(sh);
  1056. return 0;
  1057. fail_host_put:
  1058. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1059. " failed for controller %d\n", h->ctlr);
  1060. scsi_host_put(sh);
  1061. return error;
  1062. fail:
  1063. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1064. " failed for controller %d\n", h->ctlr);
  1065. return -ENOMEM;
  1066. }
  1067. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1068. struct CommandList *c, int sg_used, int data_direction)
  1069. {
  1070. int i;
  1071. union u64bit addr64;
  1072. for (i = 0; i < sg_used; i++) {
  1073. addr64.val32.lower = c->SG[i].Addr.lower;
  1074. addr64.val32.upper = c->SG[i].Addr.upper;
  1075. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1076. data_direction);
  1077. }
  1078. }
  1079. static void hpsa_map_one(struct pci_dev *pdev,
  1080. struct CommandList *cp,
  1081. unsigned char *buf,
  1082. size_t buflen,
  1083. int data_direction)
  1084. {
  1085. u64 addr64;
  1086. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1087. cp->Header.SGList = 0;
  1088. cp->Header.SGTotal = 0;
  1089. return;
  1090. }
  1091. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1092. cp->SG[0].Addr.lower =
  1093. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1094. cp->SG[0].Addr.upper =
  1095. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1096. cp->SG[0].Len = buflen;
  1097. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1098. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1099. }
  1100. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1101. struct CommandList *c)
  1102. {
  1103. DECLARE_COMPLETION_ONSTACK(wait);
  1104. c->waiting = &wait;
  1105. enqueue_cmd_and_start_io(h, c);
  1106. wait_for_completion(&wait);
  1107. }
  1108. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1109. struct CommandList *c, int data_direction)
  1110. {
  1111. int retry_count = 0;
  1112. do {
  1113. memset(c->err_info, 0, sizeof(c->err_info));
  1114. hpsa_scsi_do_simple_cmd_core(h, c);
  1115. retry_count++;
  1116. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1117. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1118. }
  1119. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1120. {
  1121. struct ErrorInfo *ei;
  1122. struct device *d = &cp->h->pdev->dev;
  1123. ei = cp->err_info;
  1124. switch (ei->CommandStatus) {
  1125. case CMD_TARGET_STATUS:
  1126. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1127. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1128. ei->ScsiStatus);
  1129. if (ei->ScsiStatus == 0)
  1130. dev_warn(d, "SCSI status is abnormally zero. "
  1131. "(probably indicates selection timeout "
  1132. "reported incorrectly due to a known "
  1133. "firmware bug, circa July, 2001.)\n");
  1134. break;
  1135. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1136. dev_info(d, "UNDERRUN\n");
  1137. break;
  1138. case CMD_DATA_OVERRUN:
  1139. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1140. break;
  1141. case CMD_INVALID: {
  1142. /* controller unfortunately reports SCSI passthru's
  1143. * to non-existent targets as invalid commands.
  1144. */
  1145. dev_warn(d, "cp %p is reported invalid (probably means "
  1146. "target device no longer present)\n", cp);
  1147. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1148. print_cmd(cp); */
  1149. }
  1150. break;
  1151. case CMD_PROTOCOL_ERR:
  1152. dev_warn(d, "cp %p has protocol error \n", cp);
  1153. break;
  1154. case CMD_HARDWARE_ERR:
  1155. /* cmd->result = DID_ERROR << 16; */
  1156. dev_warn(d, "cp %p had hardware error\n", cp);
  1157. break;
  1158. case CMD_CONNECTION_LOST:
  1159. dev_warn(d, "cp %p had connection lost\n", cp);
  1160. break;
  1161. case CMD_ABORTED:
  1162. dev_warn(d, "cp %p was aborted\n", cp);
  1163. break;
  1164. case CMD_ABORT_FAILED:
  1165. dev_warn(d, "cp %p reports abort failed\n", cp);
  1166. break;
  1167. case CMD_UNSOLICITED_ABORT:
  1168. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1169. break;
  1170. case CMD_TIMEOUT:
  1171. dev_warn(d, "cp %p timed out\n", cp);
  1172. break;
  1173. default:
  1174. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1175. ei->CommandStatus);
  1176. }
  1177. }
  1178. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1179. unsigned char page, unsigned char *buf,
  1180. unsigned char bufsize)
  1181. {
  1182. int rc = IO_OK;
  1183. struct CommandList *c;
  1184. struct ErrorInfo *ei;
  1185. c = cmd_special_alloc(h);
  1186. if (c == NULL) { /* trouble... */
  1187. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1188. return -ENOMEM;
  1189. }
  1190. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1191. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1192. ei = c->err_info;
  1193. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1194. hpsa_scsi_interpret_error(c);
  1195. rc = -1;
  1196. }
  1197. cmd_special_free(h, c);
  1198. return rc;
  1199. }
  1200. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1201. {
  1202. int rc = IO_OK;
  1203. struct CommandList *c;
  1204. struct ErrorInfo *ei;
  1205. c = cmd_special_alloc(h);
  1206. if (c == NULL) { /* trouble... */
  1207. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1208. return -ENOMEM;
  1209. }
  1210. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1211. hpsa_scsi_do_simple_cmd_core(h, c);
  1212. /* no unmap needed here because no data xfer. */
  1213. ei = c->err_info;
  1214. if (ei->CommandStatus != 0) {
  1215. hpsa_scsi_interpret_error(c);
  1216. rc = -1;
  1217. }
  1218. cmd_special_free(h, c);
  1219. return rc;
  1220. }
  1221. static void hpsa_get_raid_level(struct ctlr_info *h,
  1222. unsigned char *scsi3addr, unsigned char *raid_level)
  1223. {
  1224. int rc;
  1225. unsigned char *buf;
  1226. *raid_level = RAID_UNKNOWN;
  1227. buf = kzalloc(64, GFP_KERNEL);
  1228. if (!buf)
  1229. return;
  1230. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1231. if (rc == 0)
  1232. *raid_level = buf[8];
  1233. if (*raid_level > RAID_UNKNOWN)
  1234. *raid_level = RAID_UNKNOWN;
  1235. kfree(buf);
  1236. return;
  1237. }
  1238. /* Get the device id from inquiry page 0x83 */
  1239. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1240. unsigned char *device_id, int buflen)
  1241. {
  1242. int rc;
  1243. unsigned char *buf;
  1244. if (buflen > 16)
  1245. buflen = 16;
  1246. buf = kzalloc(64, GFP_KERNEL);
  1247. if (!buf)
  1248. return -1;
  1249. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1250. if (rc == 0)
  1251. memcpy(device_id, &buf[8], buflen);
  1252. kfree(buf);
  1253. return rc != 0;
  1254. }
  1255. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1256. struct ReportLUNdata *buf, int bufsize,
  1257. int extended_response)
  1258. {
  1259. int rc = IO_OK;
  1260. struct CommandList *c;
  1261. unsigned char scsi3addr[8];
  1262. struct ErrorInfo *ei;
  1263. c = cmd_special_alloc(h);
  1264. if (c == NULL) { /* trouble... */
  1265. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1266. return -1;
  1267. }
  1268. /* address the controller */
  1269. memset(scsi3addr, 0, sizeof(scsi3addr));
  1270. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1271. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1272. if (extended_response)
  1273. c->Request.CDB[1] = extended_response;
  1274. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1275. ei = c->err_info;
  1276. if (ei->CommandStatus != 0 &&
  1277. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1278. hpsa_scsi_interpret_error(c);
  1279. rc = -1;
  1280. }
  1281. cmd_special_free(h, c);
  1282. return rc;
  1283. }
  1284. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1285. struct ReportLUNdata *buf,
  1286. int bufsize, int extended_response)
  1287. {
  1288. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1289. }
  1290. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1291. struct ReportLUNdata *buf, int bufsize)
  1292. {
  1293. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1294. }
  1295. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1296. int bus, int target, int lun)
  1297. {
  1298. device->bus = bus;
  1299. device->target = target;
  1300. device->lun = lun;
  1301. }
  1302. static int hpsa_update_device_info(struct ctlr_info *h,
  1303. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1304. {
  1305. #define OBDR_TAPE_INQ_SIZE 49
  1306. unsigned char *inq_buff;
  1307. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1308. if (!inq_buff)
  1309. goto bail_out;
  1310. /* Do an inquiry to the device to see what it is. */
  1311. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1312. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1313. /* Inquiry failed (msg printed already) */
  1314. dev_err(&h->pdev->dev,
  1315. "hpsa_update_device_info: inquiry failed\n");
  1316. goto bail_out;
  1317. }
  1318. this_device->devtype = (inq_buff[0] & 0x1f);
  1319. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1320. memcpy(this_device->vendor, &inq_buff[8],
  1321. sizeof(this_device->vendor));
  1322. memcpy(this_device->model, &inq_buff[16],
  1323. sizeof(this_device->model));
  1324. memset(this_device->device_id, 0,
  1325. sizeof(this_device->device_id));
  1326. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1327. sizeof(this_device->device_id));
  1328. if (this_device->devtype == TYPE_DISK &&
  1329. is_logical_dev_addr_mode(scsi3addr))
  1330. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1331. else
  1332. this_device->raid_level = RAID_UNKNOWN;
  1333. kfree(inq_buff);
  1334. return 0;
  1335. bail_out:
  1336. kfree(inq_buff);
  1337. return 1;
  1338. }
  1339. static unsigned char *msa2xxx_model[] = {
  1340. "MSA2012",
  1341. "MSA2024",
  1342. "MSA2312",
  1343. "MSA2324",
  1344. NULL,
  1345. };
  1346. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1347. {
  1348. int i;
  1349. for (i = 0; msa2xxx_model[i]; i++)
  1350. if (strncmp(device->model, msa2xxx_model[i],
  1351. strlen(msa2xxx_model[i])) == 0)
  1352. return 1;
  1353. return 0;
  1354. }
  1355. /* Helper function to assign bus, target, lun mapping of devices.
  1356. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1357. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1358. * Logical drive target and lun are assigned at this time, but
  1359. * physical device lun and target assignment are deferred (assigned
  1360. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1361. */
  1362. static void figure_bus_target_lun(struct ctlr_info *h,
  1363. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1364. struct hpsa_scsi_dev_t *device)
  1365. {
  1366. u32 lunid;
  1367. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1368. /* logical device */
  1369. if (unlikely(is_scsi_rev_5(h))) {
  1370. /* p1210m, logical drives lun assignments
  1371. * match SCSI REPORT LUNS data.
  1372. */
  1373. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1374. *bus = 0;
  1375. *target = 0;
  1376. *lun = (lunid & 0x3fff) + 1;
  1377. } else {
  1378. /* not p1210m... */
  1379. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1380. if (is_msa2xxx(h, device)) {
  1381. /* msa2xxx way, put logicals on bus 1
  1382. * and match target/lun numbers box
  1383. * reports.
  1384. */
  1385. *bus = 1;
  1386. *target = (lunid >> 16) & 0x3fff;
  1387. *lun = lunid & 0x00ff;
  1388. } else {
  1389. /* Traditional smart array way. */
  1390. *bus = 0;
  1391. *lun = 0;
  1392. *target = lunid & 0x3fff;
  1393. }
  1394. }
  1395. } else {
  1396. /* physical device */
  1397. if (is_hba_lunid(lunaddrbytes))
  1398. if (unlikely(is_scsi_rev_5(h))) {
  1399. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1400. *target = 0;
  1401. *lun = 0;
  1402. return;
  1403. } else
  1404. *bus = 3; /* traditional smartarray */
  1405. else
  1406. *bus = 2; /* physical disk */
  1407. *target = -1;
  1408. *lun = -1; /* we will fill these in later. */
  1409. }
  1410. }
  1411. /*
  1412. * If there is no lun 0 on a target, linux won't find any devices.
  1413. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1414. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1415. * it for some reason. *tmpdevice is the target we're adding,
  1416. * this_device is a pointer into the current element of currentsd[]
  1417. * that we're building up in update_scsi_devices(), below.
  1418. * lunzerobits is a bitmap that tracks which targets already have a
  1419. * lun 0 assigned.
  1420. * Returns 1 if an enclosure was added, 0 if not.
  1421. */
  1422. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1423. struct hpsa_scsi_dev_t *tmpdevice,
  1424. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1425. int bus, int target, int lun, unsigned long lunzerobits[],
  1426. int *nmsa2xxx_enclosures)
  1427. {
  1428. unsigned char scsi3addr[8];
  1429. if (test_bit(target, lunzerobits))
  1430. return 0; /* There is already a lun 0 on this target. */
  1431. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1432. return 0; /* It's the logical targets that may lack lun 0. */
  1433. if (!is_msa2xxx(h, tmpdevice))
  1434. return 0; /* It's only the MSA2xxx that have this problem. */
  1435. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1436. return 0;
  1437. if (is_hba_lunid(scsi3addr))
  1438. return 0; /* Don't add the RAID controller here. */
  1439. if (is_scsi_rev_5(h))
  1440. return 0; /* p1210m doesn't need to do this. */
  1441. #define MAX_MSA2XXX_ENCLOSURES 32
  1442. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1443. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1444. "enclosures exceeded. Check your hardware "
  1445. "configuration.");
  1446. return 0;
  1447. }
  1448. memset(scsi3addr, 0, 8);
  1449. scsi3addr[3] = target;
  1450. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1451. return 0;
  1452. (*nmsa2xxx_enclosures)++;
  1453. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1454. set_bit(target, lunzerobits);
  1455. return 1;
  1456. }
  1457. /*
  1458. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1459. * logdev. The number of luns in physdev and logdev are returned in
  1460. * *nphysicals and *nlogicals, respectively.
  1461. * Returns 0 on success, -1 otherwise.
  1462. */
  1463. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1464. int reportlunsize,
  1465. struct ReportLUNdata *physdev, u32 *nphysicals,
  1466. struct ReportLUNdata *logdev, u32 *nlogicals)
  1467. {
  1468. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1469. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1470. return -1;
  1471. }
  1472. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1473. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1474. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1475. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1476. *nphysicals - HPSA_MAX_PHYS_LUN);
  1477. *nphysicals = HPSA_MAX_PHYS_LUN;
  1478. }
  1479. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1480. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1481. return -1;
  1482. }
  1483. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1484. /* Reject Logicals in excess of our max capability. */
  1485. if (*nlogicals > HPSA_MAX_LUN) {
  1486. dev_warn(&h->pdev->dev,
  1487. "maximum logical LUNs (%d) exceeded. "
  1488. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1489. *nlogicals - HPSA_MAX_LUN);
  1490. *nlogicals = HPSA_MAX_LUN;
  1491. }
  1492. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1493. dev_warn(&h->pdev->dev,
  1494. "maximum logical + physical LUNs (%d) exceeded. "
  1495. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1496. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1497. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1498. }
  1499. return 0;
  1500. }
  1501. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1502. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1503. struct ReportLUNdata *logdev_list)
  1504. {
  1505. /* Helper function, figure out where the LUN ID info is coming from
  1506. * given index i, lists of physical and logical devices, where in
  1507. * the list the raid controller is supposed to appear (first or last)
  1508. */
  1509. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1510. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1511. if (i == raid_ctlr_position)
  1512. return RAID_CTLR_LUNID;
  1513. if (i < logicals_start)
  1514. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1515. if (i < last_device)
  1516. return &logdev_list->LUN[i - nphysicals -
  1517. (raid_ctlr_position == 0)][0];
  1518. BUG();
  1519. return NULL;
  1520. }
  1521. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1522. {
  1523. /* the idea here is we could get notified
  1524. * that some devices have changed, so we do a report
  1525. * physical luns and report logical luns cmd, and adjust
  1526. * our list of devices accordingly.
  1527. *
  1528. * The scsi3addr's of devices won't change so long as the
  1529. * adapter is not reset. That means we can rescan and
  1530. * tell which devices we already know about, vs. new
  1531. * devices, vs. disappearing devices.
  1532. */
  1533. struct ReportLUNdata *physdev_list = NULL;
  1534. struct ReportLUNdata *logdev_list = NULL;
  1535. unsigned char *inq_buff = NULL;
  1536. u32 nphysicals = 0;
  1537. u32 nlogicals = 0;
  1538. u32 ndev_allocated = 0;
  1539. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1540. int ncurrent = 0;
  1541. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1542. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1543. int bus, target, lun;
  1544. int raid_ctlr_position;
  1545. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1546. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1547. GFP_KERNEL);
  1548. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1549. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1550. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1551. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1552. if (!currentsd || !physdev_list || !logdev_list ||
  1553. !inq_buff || !tmpdevice) {
  1554. dev_err(&h->pdev->dev, "out of memory\n");
  1555. goto out;
  1556. }
  1557. memset(lunzerobits, 0, sizeof(lunzerobits));
  1558. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1559. logdev_list, &nlogicals))
  1560. goto out;
  1561. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1562. * but each of them 4 times through different paths. The plus 1
  1563. * is for the RAID controller.
  1564. */
  1565. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1566. /* Allocate the per device structures */
  1567. for (i = 0; i < ndevs_to_allocate; i++) {
  1568. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1569. if (!currentsd[i]) {
  1570. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1571. __FILE__, __LINE__);
  1572. goto out;
  1573. }
  1574. ndev_allocated++;
  1575. }
  1576. if (unlikely(is_scsi_rev_5(h)))
  1577. raid_ctlr_position = 0;
  1578. else
  1579. raid_ctlr_position = nphysicals + nlogicals;
  1580. /* adjust our table of devices */
  1581. nmsa2xxx_enclosures = 0;
  1582. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1583. u8 *lunaddrbytes;
  1584. /* Figure out where the LUN ID info is coming from */
  1585. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1586. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1587. /* skip masked physical devices. */
  1588. if (lunaddrbytes[3] & 0xC0 &&
  1589. i < nphysicals + (raid_ctlr_position == 0))
  1590. continue;
  1591. /* Get device type, vendor, model, device id */
  1592. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1593. continue; /* skip it if we can't talk to it. */
  1594. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1595. tmpdevice);
  1596. this_device = currentsd[ncurrent];
  1597. /*
  1598. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1599. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1600. * is nonetheless an enclosure device there. We have to
  1601. * present that otherwise linux won't find anything if
  1602. * there is no lun 0.
  1603. */
  1604. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1605. lunaddrbytes, bus, target, lun, lunzerobits,
  1606. &nmsa2xxx_enclosures)) {
  1607. ncurrent++;
  1608. this_device = currentsd[ncurrent];
  1609. }
  1610. *this_device = *tmpdevice;
  1611. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1612. switch (this_device->devtype) {
  1613. case TYPE_ROM: {
  1614. /* We don't *really* support actual CD-ROM devices,
  1615. * just "One Button Disaster Recovery" tape drive
  1616. * which temporarily pretends to be a CD-ROM drive.
  1617. * So we check that the device is really an OBDR tape
  1618. * device by checking for "$DR-10" in bytes 43-48 of
  1619. * the inquiry data.
  1620. */
  1621. char obdr_sig[7];
  1622. #define OBDR_TAPE_SIG "$DR-10"
  1623. strncpy(obdr_sig, &inq_buff[43], 6);
  1624. obdr_sig[6] = '\0';
  1625. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1626. /* Not OBDR device, ignore it. */
  1627. break;
  1628. }
  1629. ncurrent++;
  1630. break;
  1631. case TYPE_DISK:
  1632. if (i < nphysicals)
  1633. break;
  1634. ncurrent++;
  1635. break;
  1636. case TYPE_TAPE:
  1637. case TYPE_MEDIUM_CHANGER:
  1638. ncurrent++;
  1639. break;
  1640. case TYPE_RAID:
  1641. /* Only present the Smartarray HBA as a RAID controller.
  1642. * If it's a RAID controller other than the HBA itself
  1643. * (an external RAID controller, MSA500 or similar)
  1644. * don't present it.
  1645. */
  1646. if (!is_hba_lunid(lunaddrbytes))
  1647. break;
  1648. ncurrent++;
  1649. break;
  1650. default:
  1651. break;
  1652. }
  1653. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1654. break;
  1655. }
  1656. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1657. out:
  1658. kfree(tmpdevice);
  1659. for (i = 0; i < ndev_allocated; i++)
  1660. kfree(currentsd[i]);
  1661. kfree(currentsd);
  1662. kfree(inq_buff);
  1663. kfree(physdev_list);
  1664. kfree(logdev_list);
  1665. }
  1666. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1667. * dma mapping and fills in the scatter gather entries of the
  1668. * hpsa command, cp.
  1669. */
  1670. static int hpsa_scatter_gather(struct ctlr_info *h,
  1671. struct CommandList *cp,
  1672. struct scsi_cmnd *cmd)
  1673. {
  1674. unsigned int len;
  1675. struct scatterlist *sg;
  1676. u64 addr64;
  1677. int use_sg, i, sg_index, chained;
  1678. struct SGDescriptor *curr_sg;
  1679. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1680. use_sg = scsi_dma_map(cmd);
  1681. if (use_sg < 0)
  1682. return use_sg;
  1683. if (!use_sg)
  1684. goto sglist_finished;
  1685. curr_sg = cp->SG;
  1686. chained = 0;
  1687. sg_index = 0;
  1688. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1689. if (i == h->max_cmd_sg_entries - 1 &&
  1690. use_sg > h->max_cmd_sg_entries) {
  1691. chained = 1;
  1692. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1693. sg_index = 0;
  1694. }
  1695. addr64 = (u64) sg_dma_address(sg);
  1696. len = sg_dma_len(sg);
  1697. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1698. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1699. curr_sg->Len = len;
  1700. curr_sg->Ext = 0; /* we are not chaining */
  1701. curr_sg++;
  1702. }
  1703. if (use_sg + chained > h->maxSG)
  1704. h->maxSG = use_sg + chained;
  1705. if (chained) {
  1706. cp->Header.SGList = h->max_cmd_sg_entries;
  1707. cp->Header.SGTotal = (u16) (use_sg + 1);
  1708. hpsa_map_sg_chain_block(h, cp);
  1709. return 0;
  1710. }
  1711. sglist_finished:
  1712. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1713. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1714. return 0;
  1715. }
  1716. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1717. void (*done)(struct scsi_cmnd *))
  1718. {
  1719. struct ctlr_info *h;
  1720. struct hpsa_scsi_dev_t *dev;
  1721. unsigned char scsi3addr[8];
  1722. struct CommandList *c;
  1723. unsigned long flags;
  1724. /* Get the ptr to our adapter structure out of cmd->host. */
  1725. h = sdev_to_hba(cmd->device);
  1726. dev = cmd->device->hostdata;
  1727. if (!dev) {
  1728. cmd->result = DID_NO_CONNECT << 16;
  1729. done(cmd);
  1730. return 0;
  1731. }
  1732. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1733. /* Need a lock as this is being allocated from the pool */
  1734. spin_lock_irqsave(&h->lock, flags);
  1735. c = cmd_alloc(h);
  1736. spin_unlock_irqrestore(&h->lock, flags);
  1737. if (c == NULL) { /* trouble... */
  1738. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1739. return SCSI_MLQUEUE_HOST_BUSY;
  1740. }
  1741. /* Fill in the command list header */
  1742. cmd->scsi_done = done; /* save this for use by completion code */
  1743. /* save c in case we have to abort it */
  1744. cmd->host_scribble = (unsigned char *) c;
  1745. c->cmd_type = CMD_SCSI;
  1746. c->scsi_cmd = cmd;
  1747. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1748. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1749. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1750. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1751. /* Fill in the request block... */
  1752. c->Request.Timeout = 0;
  1753. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1754. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1755. c->Request.CDBLen = cmd->cmd_len;
  1756. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1757. c->Request.Type.Type = TYPE_CMD;
  1758. c->Request.Type.Attribute = ATTR_SIMPLE;
  1759. switch (cmd->sc_data_direction) {
  1760. case DMA_TO_DEVICE:
  1761. c->Request.Type.Direction = XFER_WRITE;
  1762. break;
  1763. case DMA_FROM_DEVICE:
  1764. c->Request.Type.Direction = XFER_READ;
  1765. break;
  1766. case DMA_NONE:
  1767. c->Request.Type.Direction = XFER_NONE;
  1768. break;
  1769. case DMA_BIDIRECTIONAL:
  1770. /* This can happen if a buggy application does a scsi passthru
  1771. * and sets both inlen and outlen to non-zero. ( see
  1772. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1773. */
  1774. c->Request.Type.Direction = XFER_RSVD;
  1775. /* This is technically wrong, and hpsa controllers should
  1776. * reject it with CMD_INVALID, which is the most correct
  1777. * response, but non-fibre backends appear to let it
  1778. * slide by, and give the same results as if this field
  1779. * were set correctly. Either way is acceptable for
  1780. * our purposes here.
  1781. */
  1782. break;
  1783. default:
  1784. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1785. cmd->sc_data_direction);
  1786. BUG();
  1787. break;
  1788. }
  1789. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1790. cmd_free(h, c);
  1791. return SCSI_MLQUEUE_HOST_BUSY;
  1792. }
  1793. enqueue_cmd_and_start_io(h, c);
  1794. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1795. return 0;
  1796. }
  1797. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1798. static void hpsa_scan_start(struct Scsi_Host *sh)
  1799. {
  1800. struct ctlr_info *h = shost_to_hba(sh);
  1801. unsigned long flags;
  1802. /* wait until any scan already in progress is finished. */
  1803. while (1) {
  1804. spin_lock_irqsave(&h->scan_lock, flags);
  1805. if (h->scan_finished)
  1806. break;
  1807. spin_unlock_irqrestore(&h->scan_lock, flags);
  1808. wait_event(h->scan_wait_queue, h->scan_finished);
  1809. /* Note: We don't need to worry about a race between this
  1810. * thread and driver unload because the midlayer will
  1811. * have incremented the reference count, so unload won't
  1812. * happen if we're in here.
  1813. */
  1814. }
  1815. h->scan_finished = 0; /* mark scan as in progress */
  1816. spin_unlock_irqrestore(&h->scan_lock, flags);
  1817. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1818. spin_lock_irqsave(&h->scan_lock, flags);
  1819. h->scan_finished = 1; /* mark scan as finished. */
  1820. wake_up_all(&h->scan_wait_queue);
  1821. spin_unlock_irqrestore(&h->scan_lock, flags);
  1822. }
  1823. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1824. unsigned long elapsed_time)
  1825. {
  1826. struct ctlr_info *h = shost_to_hba(sh);
  1827. unsigned long flags;
  1828. int finished;
  1829. spin_lock_irqsave(&h->scan_lock, flags);
  1830. finished = h->scan_finished;
  1831. spin_unlock_irqrestore(&h->scan_lock, flags);
  1832. return finished;
  1833. }
  1834. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1835. int qdepth, int reason)
  1836. {
  1837. struct ctlr_info *h = sdev_to_hba(sdev);
  1838. if (reason != SCSI_QDEPTH_DEFAULT)
  1839. return -ENOTSUPP;
  1840. if (qdepth < 1)
  1841. qdepth = 1;
  1842. else
  1843. if (qdepth > h->nr_cmds)
  1844. qdepth = h->nr_cmds;
  1845. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1846. return sdev->queue_depth;
  1847. }
  1848. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1849. {
  1850. /* we are being forcibly unloaded, and may not refuse. */
  1851. scsi_remove_host(h->scsi_host);
  1852. scsi_host_put(h->scsi_host);
  1853. h->scsi_host = NULL;
  1854. }
  1855. static int hpsa_register_scsi(struct ctlr_info *h)
  1856. {
  1857. int rc;
  1858. rc = hpsa_scsi_detect(h);
  1859. if (rc != 0)
  1860. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1861. " hpsa_scsi_detect(), rc is %d\n", rc);
  1862. return rc;
  1863. }
  1864. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1865. unsigned char lunaddr[])
  1866. {
  1867. int rc = 0;
  1868. int count = 0;
  1869. int waittime = 1; /* seconds */
  1870. struct CommandList *c;
  1871. c = cmd_special_alloc(h);
  1872. if (!c) {
  1873. dev_warn(&h->pdev->dev, "out of memory in "
  1874. "wait_for_device_to_become_ready.\n");
  1875. return IO_ERROR;
  1876. }
  1877. /* Send test unit ready until device ready, or give up. */
  1878. while (count < HPSA_TUR_RETRY_LIMIT) {
  1879. /* Wait for a bit. do this first, because if we send
  1880. * the TUR right away, the reset will just abort it.
  1881. */
  1882. msleep(1000 * waittime);
  1883. count++;
  1884. /* Increase wait time with each try, up to a point. */
  1885. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1886. waittime = waittime * 2;
  1887. /* Send the Test Unit Ready */
  1888. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1889. hpsa_scsi_do_simple_cmd_core(h, c);
  1890. /* no unmap needed here because no data xfer. */
  1891. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1892. break;
  1893. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1894. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1895. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1896. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1897. break;
  1898. dev_warn(&h->pdev->dev, "waiting %d secs "
  1899. "for device to become ready.\n", waittime);
  1900. rc = 1; /* device not ready. */
  1901. }
  1902. if (rc)
  1903. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1904. else
  1905. dev_warn(&h->pdev->dev, "device is ready.\n");
  1906. cmd_special_free(h, c);
  1907. return rc;
  1908. }
  1909. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1910. * complaining. Doing a host- or bus-reset can't do anything good here.
  1911. */
  1912. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1913. {
  1914. int rc;
  1915. struct ctlr_info *h;
  1916. struct hpsa_scsi_dev_t *dev;
  1917. /* find the controller to which the command to be aborted was sent */
  1918. h = sdev_to_hba(scsicmd->device);
  1919. if (h == NULL) /* paranoia */
  1920. return FAILED;
  1921. dev = scsicmd->device->hostdata;
  1922. if (!dev) {
  1923. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1924. "device lookup failed.\n");
  1925. return FAILED;
  1926. }
  1927. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1928. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1929. /* send a reset to the SCSI LUN which the command was sent to */
  1930. rc = hpsa_send_reset(h, dev->scsi3addr);
  1931. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1932. return SUCCESS;
  1933. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1934. return FAILED;
  1935. }
  1936. /*
  1937. * For operations that cannot sleep, a command block is allocated at init,
  1938. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1939. * which ones are free or in use. Lock must be held when calling this.
  1940. * cmd_free() is the complement.
  1941. */
  1942. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1943. {
  1944. struct CommandList *c;
  1945. int i;
  1946. union u64bit temp64;
  1947. dma_addr_t cmd_dma_handle, err_dma_handle;
  1948. do {
  1949. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1950. if (i == h->nr_cmds)
  1951. return NULL;
  1952. } while (test_and_set_bit
  1953. (i & (BITS_PER_LONG - 1),
  1954. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1955. c = h->cmd_pool + i;
  1956. memset(c, 0, sizeof(*c));
  1957. cmd_dma_handle = h->cmd_pool_dhandle
  1958. + i * sizeof(*c);
  1959. c->err_info = h->errinfo_pool + i;
  1960. memset(c->err_info, 0, sizeof(*c->err_info));
  1961. err_dma_handle = h->errinfo_pool_dhandle
  1962. + i * sizeof(*c->err_info);
  1963. h->nr_allocs++;
  1964. c->cmdindex = i;
  1965. INIT_HLIST_NODE(&c->list);
  1966. c->busaddr = (u32) cmd_dma_handle;
  1967. temp64.val = (u64) err_dma_handle;
  1968. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1969. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1970. c->ErrDesc.Len = sizeof(*c->err_info);
  1971. c->h = h;
  1972. return c;
  1973. }
  1974. /* For operations that can wait for kmalloc to possibly sleep,
  1975. * this routine can be called. Lock need not be held to call
  1976. * cmd_special_alloc. cmd_special_free() is the complement.
  1977. */
  1978. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  1979. {
  1980. struct CommandList *c;
  1981. union u64bit temp64;
  1982. dma_addr_t cmd_dma_handle, err_dma_handle;
  1983. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  1984. if (c == NULL)
  1985. return NULL;
  1986. memset(c, 0, sizeof(*c));
  1987. c->cmdindex = -1;
  1988. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  1989. &err_dma_handle);
  1990. if (c->err_info == NULL) {
  1991. pci_free_consistent(h->pdev,
  1992. sizeof(*c), c, cmd_dma_handle);
  1993. return NULL;
  1994. }
  1995. memset(c->err_info, 0, sizeof(*c->err_info));
  1996. INIT_HLIST_NODE(&c->list);
  1997. c->busaddr = (u32) cmd_dma_handle;
  1998. temp64.val = (u64) err_dma_handle;
  1999. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2000. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2001. c->ErrDesc.Len = sizeof(*c->err_info);
  2002. c->h = h;
  2003. return c;
  2004. }
  2005. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2006. {
  2007. int i;
  2008. i = c - h->cmd_pool;
  2009. clear_bit(i & (BITS_PER_LONG - 1),
  2010. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2011. h->nr_frees++;
  2012. }
  2013. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2014. {
  2015. union u64bit temp64;
  2016. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2017. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2018. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2019. c->err_info, (dma_addr_t) temp64.val);
  2020. pci_free_consistent(h->pdev, sizeof(*c),
  2021. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2022. }
  2023. #ifdef CONFIG_COMPAT
  2024. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2025. {
  2026. IOCTL32_Command_struct __user *arg32 =
  2027. (IOCTL32_Command_struct __user *) arg;
  2028. IOCTL_Command_struct arg64;
  2029. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2030. int err;
  2031. u32 cp;
  2032. err = 0;
  2033. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2034. sizeof(arg64.LUN_info));
  2035. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2036. sizeof(arg64.Request));
  2037. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2038. sizeof(arg64.error_info));
  2039. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2040. err |= get_user(cp, &arg32->buf);
  2041. arg64.buf = compat_ptr(cp);
  2042. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2043. if (err)
  2044. return -EFAULT;
  2045. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2046. if (err)
  2047. return err;
  2048. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2049. sizeof(arg32->error_info));
  2050. if (err)
  2051. return -EFAULT;
  2052. return err;
  2053. }
  2054. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2055. int cmd, void *arg)
  2056. {
  2057. BIG_IOCTL32_Command_struct __user *arg32 =
  2058. (BIG_IOCTL32_Command_struct __user *) arg;
  2059. BIG_IOCTL_Command_struct arg64;
  2060. BIG_IOCTL_Command_struct __user *p =
  2061. compat_alloc_user_space(sizeof(arg64));
  2062. int err;
  2063. u32 cp;
  2064. err = 0;
  2065. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2066. sizeof(arg64.LUN_info));
  2067. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2068. sizeof(arg64.Request));
  2069. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2070. sizeof(arg64.error_info));
  2071. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2072. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2073. err |= get_user(cp, &arg32->buf);
  2074. arg64.buf = compat_ptr(cp);
  2075. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2076. if (err)
  2077. return -EFAULT;
  2078. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2079. if (err)
  2080. return err;
  2081. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2082. sizeof(arg32->error_info));
  2083. if (err)
  2084. return -EFAULT;
  2085. return err;
  2086. }
  2087. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2088. {
  2089. switch (cmd) {
  2090. case CCISS_GETPCIINFO:
  2091. case CCISS_GETINTINFO:
  2092. case CCISS_SETINTINFO:
  2093. case CCISS_GETNODENAME:
  2094. case CCISS_SETNODENAME:
  2095. case CCISS_GETHEARTBEAT:
  2096. case CCISS_GETBUSTYPES:
  2097. case CCISS_GETFIRMVER:
  2098. case CCISS_GETDRIVVER:
  2099. case CCISS_REVALIDVOLS:
  2100. case CCISS_DEREGDISK:
  2101. case CCISS_REGNEWDISK:
  2102. case CCISS_REGNEWD:
  2103. case CCISS_RESCANDISK:
  2104. case CCISS_GETLUNINFO:
  2105. return hpsa_ioctl(dev, cmd, arg);
  2106. case CCISS_PASSTHRU32:
  2107. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2108. case CCISS_BIG_PASSTHRU32:
  2109. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2110. default:
  2111. return -ENOIOCTLCMD;
  2112. }
  2113. }
  2114. #endif
  2115. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2116. {
  2117. struct hpsa_pci_info pciinfo;
  2118. if (!argp)
  2119. return -EINVAL;
  2120. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2121. pciinfo.bus = h->pdev->bus->number;
  2122. pciinfo.dev_fn = h->pdev->devfn;
  2123. pciinfo.board_id = h->board_id;
  2124. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2125. return -EFAULT;
  2126. return 0;
  2127. }
  2128. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2129. {
  2130. DriverVer_type DriverVer;
  2131. unsigned char vmaj, vmin, vsubmin;
  2132. int rc;
  2133. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2134. &vmaj, &vmin, &vsubmin);
  2135. if (rc != 3) {
  2136. dev_info(&h->pdev->dev, "driver version string '%s' "
  2137. "unrecognized.", HPSA_DRIVER_VERSION);
  2138. vmaj = 0;
  2139. vmin = 0;
  2140. vsubmin = 0;
  2141. }
  2142. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2143. if (!argp)
  2144. return -EINVAL;
  2145. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2146. return -EFAULT;
  2147. return 0;
  2148. }
  2149. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2150. {
  2151. IOCTL_Command_struct iocommand;
  2152. struct CommandList *c;
  2153. char *buff = NULL;
  2154. union u64bit temp64;
  2155. if (!argp)
  2156. return -EINVAL;
  2157. if (!capable(CAP_SYS_RAWIO))
  2158. return -EPERM;
  2159. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2160. return -EFAULT;
  2161. if ((iocommand.buf_size < 1) &&
  2162. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2163. return -EINVAL;
  2164. }
  2165. if (iocommand.buf_size > 0) {
  2166. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2167. if (buff == NULL)
  2168. return -EFAULT;
  2169. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2170. /* Copy the data into the buffer we created */
  2171. if (copy_from_user(buff, iocommand.buf,
  2172. iocommand.buf_size)) {
  2173. kfree(buff);
  2174. return -EFAULT;
  2175. }
  2176. } else {
  2177. memset(buff, 0, iocommand.buf_size);
  2178. }
  2179. }
  2180. c = cmd_special_alloc(h);
  2181. if (c == NULL) {
  2182. kfree(buff);
  2183. return -ENOMEM;
  2184. }
  2185. /* Fill in the command type */
  2186. c->cmd_type = CMD_IOCTL_PEND;
  2187. /* Fill in Command Header */
  2188. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2189. if (iocommand.buf_size > 0) { /* buffer to fill */
  2190. c->Header.SGList = 1;
  2191. c->Header.SGTotal = 1;
  2192. } else { /* no buffers to fill */
  2193. c->Header.SGList = 0;
  2194. c->Header.SGTotal = 0;
  2195. }
  2196. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2197. /* use the kernel address the cmd block for tag */
  2198. c->Header.Tag.lower = c->busaddr;
  2199. /* Fill in Request block */
  2200. memcpy(&c->Request, &iocommand.Request,
  2201. sizeof(c->Request));
  2202. /* Fill in the scatter gather information */
  2203. if (iocommand.buf_size > 0) {
  2204. temp64.val = pci_map_single(h->pdev, buff,
  2205. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2206. c->SG[0].Addr.lower = temp64.val32.lower;
  2207. c->SG[0].Addr.upper = temp64.val32.upper;
  2208. c->SG[0].Len = iocommand.buf_size;
  2209. c->SG[0].Ext = 0; /* we are not chaining*/
  2210. }
  2211. hpsa_scsi_do_simple_cmd_core(h, c);
  2212. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2213. check_ioctl_unit_attention(h, c);
  2214. /* Copy the error information out */
  2215. memcpy(&iocommand.error_info, c->err_info,
  2216. sizeof(iocommand.error_info));
  2217. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2218. kfree(buff);
  2219. cmd_special_free(h, c);
  2220. return -EFAULT;
  2221. }
  2222. if (iocommand.Request.Type.Direction == XFER_READ &&
  2223. iocommand.buf_size > 0) {
  2224. /* Copy the data out of the buffer we created */
  2225. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2226. kfree(buff);
  2227. cmd_special_free(h, c);
  2228. return -EFAULT;
  2229. }
  2230. }
  2231. kfree(buff);
  2232. cmd_special_free(h, c);
  2233. return 0;
  2234. }
  2235. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2236. {
  2237. BIG_IOCTL_Command_struct *ioc;
  2238. struct CommandList *c;
  2239. unsigned char **buff = NULL;
  2240. int *buff_size = NULL;
  2241. union u64bit temp64;
  2242. BYTE sg_used = 0;
  2243. int status = 0;
  2244. int i;
  2245. u32 left;
  2246. u32 sz;
  2247. BYTE __user *data_ptr;
  2248. if (!argp)
  2249. return -EINVAL;
  2250. if (!capable(CAP_SYS_RAWIO))
  2251. return -EPERM;
  2252. ioc = (BIG_IOCTL_Command_struct *)
  2253. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2254. if (!ioc) {
  2255. status = -ENOMEM;
  2256. goto cleanup1;
  2257. }
  2258. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2259. status = -EFAULT;
  2260. goto cleanup1;
  2261. }
  2262. if ((ioc->buf_size < 1) &&
  2263. (ioc->Request.Type.Direction != XFER_NONE)) {
  2264. status = -EINVAL;
  2265. goto cleanup1;
  2266. }
  2267. /* Check kmalloc limits using all SGs */
  2268. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2269. status = -EINVAL;
  2270. goto cleanup1;
  2271. }
  2272. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2273. status = -EINVAL;
  2274. goto cleanup1;
  2275. }
  2276. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2277. if (!buff) {
  2278. status = -ENOMEM;
  2279. goto cleanup1;
  2280. }
  2281. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2282. if (!buff_size) {
  2283. status = -ENOMEM;
  2284. goto cleanup1;
  2285. }
  2286. left = ioc->buf_size;
  2287. data_ptr = ioc->buf;
  2288. while (left) {
  2289. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2290. buff_size[sg_used] = sz;
  2291. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2292. if (buff[sg_used] == NULL) {
  2293. status = -ENOMEM;
  2294. goto cleanup1;
  2295. }
  2296. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2297. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2298. status = -ENOMEM;
  2299. goto cleanup1;
  2300. }
  2301. } else
  2302. memset(buff[sg_used], 0, sz);
  2303. left -= sz;
  2304. data_ptr += sz;
  2305. sg_used++;
  2306. }
  2307. c = cmd_special_alloc(h);
  2308. if (c == NULL) {
  2309. status = -ENOMEM;
  2310. goto cleanup1;
  2311. }
  2312. c->cmd_type = CMD_IOCTL_PEND;
  2313. c->Header.ReplyQueue = 0;
  2314. c->Header.SGList = c->Header.SGTotal = sg_used;
  2315. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2316. c->Header.Tag.lower = c->busaddr;
  2317. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2318. if (ioc->buf_size > 0) {
  2319. int i;
  2320. for (i = 0; i < sg_used; i++) {
  2321. temp64.val = pci_map_single(h->pdev, buff[i],
  2322. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2323. c->SG[i].Addr.lower = temp64.val32.lower;
  2324. c->SG[i].Addr.upper = temp64.val32.upper;
  2325. c->SG[i].Len = buff_size[i];
  2326. /* we are not chaining */
  2327. c->SG[i].Ext = 0;
  2328. }
  2329. }
  2330. hpsa_scsi_do_simple_cmd_core(h, c);
  2331. if (sg_used)
  2332. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2333. check_ioctl_unit_attention(h, c);
  2334. /* Copy the error information out */
  2335. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2336. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2337. cmd_special_free(h, c);
  2338. status = -EFAULT;
  2339. goto cleanup1;
  2340. }
  2341. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2342. /* Copy the data out of the buffer we created */
  2343. BYTE __user *ptr = ioc->buf;
  2344. for (i = 0; i < sg_used; i++) {
  2345. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2346. cmd_special_free(h, c);
  2347. status = -EFAULT;
  2348. goto cleanup1;
  2349. }
  2350. ptr += buff_size[i];
  2351. }
  2352. }
  2353. cmd_special_free(h, c);
  2354. status = 0;
  2355. cleanup1:
  2356. if (buff) {
  2357. for (i = 0; i < sg_used; i++)
  2358. kfree(buff[i]);
  2359. kfree(buff);
  2360. }
  2361. kfree(buff_size);
  2362. kfree(ioc);
  2363. return status;
  2364. }
  2365. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2366. struct CommandList *c)
  2367. {
  2368. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2369. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2370. (void) check_for_unit_attention(h, c);
  2371. }
  2372. /*
  2373. * ioctl
  2374. */
  2375. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2376. {
  2377. struct ctlr_info *h;
  2378. void __user *argp = (void __user *)arg;
  2379. h = sdev_to_hba(dev);
  2380. switch (cmd) {
  2381. case CCISS_DEREGDISK:
  2382. case CCISS_REGNEWDISK:
  2383. case CCISS_REGNEWD:
  2384. hpsa_scan_start(h->scsi_host);
  2385. return 0;
  2386. case CCISS_GETPCIINFO:
  2387. return hpsa_getpciinfo_ioctl(h, argp);
  2388. case CCISS_GETDRIVVER:
  2389. return hpsa_getdrivver_ioctl(h, argp);
  2390. case CCISS_PASSTHRU:
  2391. return hpsa_passthru_ioctl(h, argp);
  2392. case CCISS_BIG_PASSTHRU:
  2393. return hpsa_big_passthru_ioctl(h, argp);
  2394. default:
  2395. return -ENOTTY;
  2396. }
  2397. }
  2398. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2399. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2400. int cmd_type)
  2401. {
  2402. int pci_dir = XFER_NONE;
  2403. c->cmd_type = CMD_IOCTL_PEND;
  2404. c->Header.ReplyQueue = 0;
  2405. if (buff != NULL && size > 0) {
  2406. c->Header.SGList = 1;
  2407. c->Header.SGTotal = 1;
  2408. } else {
  2409. c->Header.SGList = 0;
  2410. c->Header.SGTotal = 0;
  2411. }
  2412. c->Header.Tag.lower = c->busaddr;
  2413. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2414. c->Request.Type.Type = cmd_type;
  2415. if (cmd_type == TYPE_CMD) {
  2416. switch (cmd) {
  2417. case HPSA_INQUIRY:
  2418. /* are we trying to read a vital product page */
  2419. if (page_code != 0) {
  2420. c->Request.CDB[1] = 0x01;
  2421. c->Request.CDB[2] = page_code;
  2422. }
  2423. c->Request.CDBLen = 6;
  2424. c->Request.Type.Attribute = ATTR_SIMPLE;
  2425. c->Request.Type.Direction = XFER_READ;
  2426. c->Request.Timeout = 0;
  2427. c->Request.CDB[0] = HPSA_INQUIRY;
  2428. c->Request.CDB[4] = size & 0xFF;
  2429. break;
  2430. case HPSA_REPORT_LOG:
  2431. case HPSA_REPORT_PHYS:
  2432. /* Talking to controller so It's a physical command
  2433. mode = 00 target = 0. Nothing to write.
  2434. */
  2435. c->Request.CDBLen = 12;
  2436. c->Request.Type.Attribute = ATTR_SIMPLE;
  2437. c->Request.Type.Direction = XFER_READ;
  2438. c->Request.Timeout = 0;
  2439. c->Request.CDB[0] = cmd;
  2440. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2441. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2442. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2443. c->Request.CDB[9] = size & 0xFF;
  2444. break;
  2445. case HPSA_CACHE_FLUSH:
  2446. c->Request.CDBLen = 12;
  2447. c->Request.Type.Attribute = ATTR_SIMPLE;
  2448. c->Request.Type.Direction = XFER_WRITE;
  2449. c->Request.Timeout = 0;
  2450. c->Request.CDB[0] = BMIC_WRITE;
  2451. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2452. break;
  2453. case TEST_UNIT_READY:
  2454. c->Request.CDBLen = 6;
  2455. c->Request.Type.Attribute = ATTR_SIMPLE;
  2456. c->Request.Type.Direction = XFER_NONE;
  2457. c->Request.Timeout = 0;
  2458. break;
  2459. default:
  2460. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2461. BUG();
  2462. return;
  2463. }
  2464. } else if (cmd_type == TYPE_MSG) {
  2465. switch (cmd) {
  2466. case HPSA_DEVICE_RESET_MSG:
  2467. c->Request.CDBLen = 16;
  2468. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2469. c->Request.Type.Attribute = ATTR_SIMPLE;
  2470. c->Request.Type.Direction = XFER_NONE;
  2471. c->Request.Timeout = 0; /* Don't time out */
  2472. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2473. c->Request.CDB[1] = 0x03; /* Reset target above */
  2474. /* If bytes 4-7 are zero, it means reset the */
  2475. /* LunID device */
  2476. c->Request.CDB[4] = 0x00;
  2477. c->Request.CDB[5] = 0x00;
  2478. c->Request.CDB[6] = 0x00;
  2479. c->Request.CDB[7] = 0x00;
  2480. break;
  2481. default:
  2482. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2483. cmd);
  2484. BUG();
  2485. }
  2486. } else {
  2487. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2488. BUG();
  2489. }
  2490. switch (c->Request.Type.Direction) {
  2491. case XFER_READ:
  2492. pci_dir = PCI_DMA_FROMDEVICE;
  2493. break;
  2494. case XFER_WRITE:
  2495. pci_dir = PCI_DMA_TODEVICE;
  2496. break;
  2497. case XFER_NONE:
  2498. pci_dir = PCI_DMA_NONE;
  2499. break;
  2500. default:
  2501. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2502. }
  2503. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2504. return;
  2505. }
  2506. /*
  2507. * Map (physical) PCI mem into (virtual) kernel space
  2508. */
  2509. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2510. {
  2511. ulong page_base = ((ulong) base) & PAGE_MASK;
  2512. ulong page_offs = ((ulong) base) - page_base;
  2513. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2514. return page_remapped ? (page_remapped + page_offs) : NULL;
  2515. }
  2516. /* Takes cmds off the submission queue and sends them to the hardware,
  2517. * then puts them on the queue of cmds waiting for completion.
  2518. */
  2519. static void start_io(struct ctlr_info *h)
  2520. {
  2521. struct CommandList *c;
  2522. while (!hlist_empty(&h->reqQ)) {
  2523. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2524. /* can't do anything if fifo is full */
  2525. if ((h->access.fifo_full(h))) {
  2526. dev_warn(&h->pdev->dev, "fifo full\n");
  2527. break;
  2528. }
  2529. /* Get the first entry from the Request Q */
  2530. removeQ(c);
  2531. h->Qdepth--;
  2532. /* Tell the controller execute command */
  2533. h->access.submit_command(h, c);
  2534. /* Put job onto the completed Q */
  2535. addQ(&h->cmpQ, c);
  2536. }
  2537. }
  2538. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2539. {
  2540. return h->access.command_completed(h);
  2541. }
  2542. static inline bool interrupt_pending(struct ctlr_info *h)
  2543. {
  2544. return h->access.intr_pending(h);
  2545. }
  2546. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2547. {
  2548. return (h->access.intr_pending(h) == 0) ||
  2549. (h->interrupts_enabled == 0);
  2550. }
  2551. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2552. u32 raw_tag)
  2553. {
  2554. if (unlikely(tag_index >= h->nr_cmds)) {
  2555. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2556. return 1;
  2557. }
  2558. return 0;
  2559. }
  2560. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2561. {
  2562. removeQ(c);
  2563. if (likely(c->cmd_type == CMD_SCSI))
  2564. complete_scsi_command(c, 0, raw_tag);
  2565. else if (c->cmd_type == CMD_IOCTL_PEND)
  2566. complete(c->waiting);
  2567. }
  2568. static inline u32 hpsa_tag_contains_index(u32 tag)
  2569. {
  2570. return tag & DIRECT_LOOKUP_BIT;
  2571. }
  2572. static inline u32 hpsa_tag_to_index(u32 tag)
  2573. {
  2574. return tag >> DIRECT_LOOKUP_SHIFT;
  2575. }
  2576. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2577. {
  2578. #define HPSA_ERROR_BITS 0x03
  2579. return tag & ~HPSA_ERROR_BITS;
  2580. }
  2581. /* process completion of an indexed ("direct lookup") command */
  2582. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2583. u32 raw_tag)
  2584. {
  2585. u32 tag_index;
  2586. struct CommandList *c;
  2587. tag_index = hpsa_tag_to_index(raw_tag);
  2588. if (bad_tag(h, tag_index, raw_tag))
  2589. return next_command(h);
  2590. c = h->cmd_pool + tag_index;
  2591. finish_cmd(c, raw_tag);
  2592. return next_command(h);
  2593. }
  2594. /* process completion of a non-indexed command */
  2595. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2596. u32 raw_tag)
  2597. {
  2598. u32 tag;
  2599. struct CommandList *c = NULL;
  2600. struct hlist_node *tmp;
  2601. tag = hpsa_tag_discard_error_bits(raw_tag);
  2602. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2603. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2604. finish_cmd(c, raw_tag);
  2605. return next_command(h);
  2606. }
  2607. }
  2608. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2609. return next_command(h);
  2610. }
  2611. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2612. {
  2613. struct ctlr_info *h = dev_id;
  2614. unsigned long flags;
  2615. u32 raw_tag;
  2616. if (interrupt_not_for_us(h))
  2617. return IRQ_NONE;
  2618. spin_lock_irqsave(&h->lock, flags);
  2619. while (interrupt_pending(h)) {
  2620. raw_tag = get_next_completion(h);
  2621. while (raw_tag != FIFO_EMPTY) {
  2622. if (hpsa_tag_contains_index(raw_tag))
  2623. raw_tag = process_indexed_cmd(h, raw_tag);
  2624. else
  2625. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2626. }
  2627. }
  2628. spin_unlock_irqrestore(&h->lock, flags);
  2629. return IRQ_HANDLED;
  2630. }
  2631. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2632. {
  2633. struct ctlr_info *h = dev_id;
  2634. unsigned long flags;
  2635. u32 raw_tag;
  2636. spin_lock_irqsave(&h->lock, flags);
  2637. raw_tag = get_next_completion(h);
  2638. while (raw_tag != FIFO_EMPTY) {
  2639. if (hpsa_tag_contains_index(raw_tag))
  2640. raw_tag = process_indexed_cmd(h, raw_tag);
  2641. else
  2642. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2643. }
  2644. spin_unlock_irqrestore(&h->lock, flags);
  2645. return IRQ_HANDLED;
  2646. }
  2647. /* Send a message CDB to the firmware. */
  2648. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2649. unsigned char type)
  2650. {
  2651. struct Command {
  2652. struct CommandListHeader CommandHeader;
  2653. struct RequestBlock Request;
  2654. struct ErrDescriptor ErrorDescriptor;
  2655. };
  2656. struct Command *cmd;
  2657. static const size_t cmd_sz = sizeof(*cmd) +
  2658. sizeof(cmd->ErrorDescriptor);
  2659. dma_addr_t paddr64;
  2660. uint32_t paddr32, tag;
  2661. void __iomem *vaddr;
  2662. int i, err;
  2663. vaddr = pci_ioremap_bar(pdev, 0);
  2664. if (vaddr == NULL)
  2665. return -ENOMEM;
  2666. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2667. * CCISS commands, so they must be allocated from the lower 4GiB of
  2668. * memory.
  2669. */
  2670. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2671. if (err) {
  2672. iounmap(vaddr);
  2673. return -ENOMEM;
  2674. }
  2675. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2676. if (cmd == NULL) {
  2677. iounmap(vaddr);
  2678. return -ENOMEM;
  2679. }
  2680. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2681. * although there's no guarantee, we assume that the address is at
  2682. * least 4-byte aligned (most likely, it's page-aligned).
  2683. */
  2684. paddr32 = paddr64;
  2685. cmd->CommandHeader.ReplyQueue = 0;
  2686. cmd->CommandHeader.SGList = 0;
  2687. cmd->CommandHeader.SGTotal = 0;
  2688. cmd->CommandHeader.Tag.lower = paddr32;
  2689. cmd->CommandHeader.Tag.upper = 0;
  2690. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2691. cmd->Request.CDBLen = 16;
  2692. cmd->Request.Type.Type = TYPE_MSG;
  2693. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2694. cmd->Request.Type.Direction = XFER_NONE;
  2695. cmd->Request.Timeout = 0; /* Don't time out */
  2696. cmd->Request.CDB[0] = opcode;
  2697. cmd->Request.CDB[1] = type;
  2698. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2699. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2700. cmd->ErrorDescriptor.Addr.upper = 0;
  2701. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2702. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2703. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2704. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2705. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2706. break;
  2707. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2708. }
  2709. iounmap(vaddr);
  2710. /* we leak the DMA buffer here ... no choice since the controller could
  2711. * still complete the command.
  2712. */
  2713. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2714. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2715. opcode, type);
  2716. return -ETIMEDOUT;
  2717. }
  2718. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2719. if (tag & HPSA_ERROR_BIT) {
  2720. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2721. opcode, type);
  2722. return -EIO;
  2723. }
  2724. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2725. opcode, type);
  2726. return 0;
  2727. }
  2728. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2729. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2730. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2731. void * __iomem vaddr, bool use_doorbell)
  2732. {
  2733. u16 pmcsr;
  2734. int pos;
  2735. if (use_doorbell) {
  2736. /* For everything after the P600, the PCI power state method
  2737. * of resetting the controller doesn't work, so we have this
  2738. * other way using the doorbell register.
  2739. */
  2740. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2741. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2742. msleep(1000);
  2743. } else { /* Try to do it the PCI power state way */
  2744. /* Quoting from the Open CISS Specification: "The Power
  2745. * Management Control/Status Register (CSR) controls the power
  2746. * state of the device. The normal operating state is D0,
  2747. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2748. * the controller, place the interface device in D3 then to D0,
  2749. * this causes a secondary PCI reset which will reset the
  2750. * controller." */
  2751. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2752. if (pos == 0) {
  2753. dev_err(&pdev->dev,
  2754. "hpsa_reset_controller: "
  2755. "PCI PM not supported\n");
  2756. return -ENODEV;
  2757. }
  2758. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2759. /* enter the D3hot power management state */
  2760. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2761. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2762. pmcsr |= PCI_D3hot;
  2763. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2764. msleep(500);
  2765. /* enter the D0 power management state */
  2766. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2767. pmcsr |= PCI_D0;
  2768. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2769. msleep(500);
  2770. }
  2771. return 0;
  2772. }
  2773. /* This does a hard reset of the controller using PCI power management
  2774. * states or the using the doorbell register.
  2775. */
  2776. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2777. {
  2778. u64 cfg_offset;
  2779. u32 cfg_base_addr;
  2780. u64 cfg_base_addr_index;
  2781. void __iomem *vaddr;
  2782. unsigned long paddr;
  2783. u32 misc_fw_support, active_transport;
  2784. int rc;
  2785. struct CfgTable __iomem *cfgtable;
  2786. bool use_doorbell;
  2787. u32 board_id;
  2788. u16 command_register;
  2789. /* For controllers as old as the P600, this is very nearly
  2790. * the same thing as
  2791. *
  2792. * pci_save_state(pci_dev);
  2793. * pci_set_power_state(pci_dev, PCI_D3hot);
  2794. * pci_set_power_state(pci_dev, PCI_D0);
  2795. * pci_restore_state(pci_dev);
  2796. *
  2797. * For controllers newer than the P600, the pci power state
  2798. * method of resetting doesn't work so we have another way
  2799. * using the doorbell register.
  2800. */
  2801. /* Exclude 640x boards. These are two pci devices in one slot
  2802. * which share a battery backed cache module. One controls the
  2803. * cache, the other accesses the cache through the one that controls
  2804. * it. If we reset the one controlling the cache, the other will
  2805. * likely not be happy. Just forbid resetting this conjoined mess.
  2806. * The 640x isn't really supported by hpsa anyway.
  2807. */
  2808. hpsa_lookup_board_id(pdev, &board_id);
  2809. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2810. return -ENOTSUPP;
  2811. /* Save the PCI command register */
  2812. pci_read_config_word(pdev, 4, &command_register);
  2813. /* Turn the board off. This is so that later pci_restore_state()
  2814. * won't turn the board on before the rest of config space is ready.
  2815. */
  2816. pci_disable_device(pdev);
  2817. pci_save_state(pdev);
  2818. /* find the first memory BAR, so we can find the cfg table */
  2819. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2820. if (rc)
  2821. return rc;
  2822. vaddr = remap_pci_mem(paddr, 0x250);
  2823. if (!vaddr)
  2824. return -ENOMEM;
  2825. /* find cfgtable in order to check if reset via doorbell is supported */
  2826. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2827. &cfg_base_addr_index, &cfg_offset);
  2828. if (rc)
  2829. goto unmap_vaddr;
  2830. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2831. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2832. if (!cfgtable) {
  2833. rc = -ENOMEM;
  2834. goto unmap_vaddr;
  2835. }
  2836. /* If reset via doorbell register is supported, use that. */
  2837. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2838. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2839. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2840. if (rc)
  2841. goto unmap_cfgtable;
  2842. pci_restore_state(pdev);
  2843. rc = pci_enable_device(pdev);
  2844. if (rc) {
  2845. dev_warn(&pdev->dev, "failed to enable device.\n");
  2846. goto unmap_cfgtable;
  2847. }
  2848. pci_write_config_word(pdev, 4, command_register);
  2849. /* Some devices (notably the HP Smart Array 5i Controller)
  2850. need a little pause here */
  2851. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2852. /* Wait for board to become not ready, then ready. */
  2853. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  2854. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  2855. if (rc)
  2856. dev_warn(&pdev->dev,
  2857. "failed waiting for board to become not ready\n");
  2858. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  2859. if (rc) {
  2860. dev_warn(&pdev->dev,
  2861. "failed waiting for board to become ready\n");
  2862. goto unmap_cfgtable;
  2863. }
  2864. dev_info(&pdev->dev, "board ready.\n");
  2865. /* Controller should be in simple mode at this point. If it's not,
  2866. * It means we're on one of those controllers which doesn't support
  2867. * the doorbell reset method and on which the PCI power management reset
  2868. * method doesn't work (P800, for example.)
  2869. * In those cases, pretend the reset worked and hope for the best.
  2870. */
  2871. active_transport = readl(&cfgtable->TransportActive);
  2872. if (active_transport & PERFORMANT_MODE) {
  2873. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2874. " proceeding anyway.\n");
  2875. rc = -ENOTSUPP;
  2876. }
  2877. unmap_cfgtable:
  2878. iounmap(cfgtable);
  2879. unmap_vaddr:
  2880. iounmap(vaddr);
  2881. return rc;
  2882. }
  2883. /*
  2884. * We cannot read the structure directly, for portability we must use
  2885. * the io functions.
  2886. * This is for debug only.
  2887. */
  2888. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2889. {
  2890. #ifdef HPSA_DEBUG
  2891. int i;
  2892. char temp_name[17];
  2893. dev_info(dev, "Controller Configuration information\n");
  2894. dev_info(dev, "------------------------------------\n");
  2895. for (i = 0; i < 4; i++)
  2896. temp_name[i] = readb(&(tb->Signature[i]));
  2897. temp_name[4] = '\0';
  2898. dev_info(dev, " Signature = %s\n", temp_name);
  2899. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2900. dev_info(dev, " Transport methods supported = 0x%x\n",
  2901. readl(&(tb->TransportSupport)));
  2902. dev_info(dev, " Transport methods active = 0x%x\n",
  2903. readl(&(tb->TransportActive)));
  2904. dev_info(dev, " Requested transport Method = 0x%x\n",
  2905. readl(&(tb->HostWrite.TransportRequest)));
  2906. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2907. readl(&(tb->HostWrite.CoalIntDelay)));
  2908. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2909. readl(&(tb->HostWrite.CoalIntCount)));
  2910. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2911. readl(&(tb->CmdsOutMax)));
  2912. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2913. for (i = 0; i < 16; i++)
  2914. temp_name[i] = readb(&(tb->ServerName[i]));
  2915. temp_name[16] = '\0';
  2916. dev_info(dev, " Server Name = %s\n", temp_name);
  2917. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2918. readl(&(tb->HeartBeat)));
  2919. #endif /* HPSA_DEBUG */
  2920. }
  2921. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2922. {
  2923. int i, offset, mem_type, bar_type;
  2924. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2925. return 0;
  2926. offset = 0;
  2927. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2928. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2929. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2930. offset += 4;
  2931. else {
  2932. mem_type = pci_resource_flags(pdev, i) &
  2933. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2934. switch (mem_type) {
  2935. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2936. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2937. offset += 4; /* 32 bit */
  2938. break;
  2939. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2940. offset += 8;
  2941. break;
  2942. default: /* reserved in PCI 2.2 */
  2943. dev_warn(&pdev->dev,
  2944. "base address is invalid\n");
  2945. return -1;
  2946. break;
  2947. }
  2948. }
  2949. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2950. return i + 1;
  2951. }
  2952. return -1;
  2953. }
  2954. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2955. * controllers that are capable. If not, we use IO-APIC mode.
  2956. */
  2957. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2958. {
  2959. #ifdef CONFIG_PCI_MSI
  2960. int err;
  2961. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2962. {0, 2}, {0, 3}
  2963. };
  2964. /* Some boards advertise MSI but don't really support it */
  2965. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2966. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2967. goto default_int_mode;
  2968. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2969. dev_info(&h->pdev->dev, "MSIX\n");
  2970. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  2971. if (!err) {
  2972. h->intr[0] = hpsa_msix_entries[0].vector;
  2973. h->intr[1] = hpsa_msix_entries[1].vector;
  2974. h->intr[2] = hpsa_msix_entries[2].vector;
  2975. h->intr[3] = hpsa_msix_entries[3].vector;
  2976. h->msix_vector = 1;
  2977. return;
  2978. }
  2979. if (err > 0) {
  2980. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  2981. "available\n", err);
  2982. goto default_int_mode;
  2983. } else {
  2984. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  2985. err);
  2986. goto default_int_mode;
  2987. }
  2988. }
  2989. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  2990. dev_info(&h->pdev->dev, "MSI\n");
  2991. if (!pci_enable_msi(h->pdev))
  2992. h->msi_vector = 1;
  2993. else
  2994. dev_warn(&h->pdev->dev, "MSI init failed\n");
  2995. }
  2996. default_int_mode:
  2997. #endif /* CONFIG_PCI_MSI */
  2998. /* if we get here we're going to use the default interrupt mode */
  2999. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3000. }
  3001. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3002. {
  3003. int i;
  3004. u32 subsystem_vendor_id, subsystem_device_id;
  3005. subsystem_vendor_id = pdev->subsystem_vendor;
  3006. subsystem_device_id = pdev->subsystem_device;
  3007. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3008. subsystem_vendor_id;
  3009. for (i = 0; i < ARRAY_SIZE(products); i++)
  3010. if (*board_id == products[i].board_id)
  3011. return i;
  3012. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3013. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3014. !hpsa_allow_any) {
  3015. dev_warn(&pdev->dev, "unrecognized board ID: "
  3016. "0x%08x, ignoring.\n", *board_id);
  3017. return -ENODEV;
  3018. }
  3019. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3020. }
  3021. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3022. {
  3023. u16 command;
  3024. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3025. return ((command & PCI_COMMAND_MEMORY) == 0);
  3026. }
  3027. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3028. unsigned long *memory_bar)
  3029. {
  3030. int i;
  3031. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3032. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3033. /* addressing mode bits already removed */
  3034. *memory_bar = pci_resource_start(pdev, i);
  3035. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3036. *memory_bar);
  3037. return 0;
  3038. }
  3039. dev_warn(&pdev->dev, "no memory BAR found\n");
  3040. return -ENODEV;
  3041. }
  3042. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3043. void __iomem *vaddr, int wait_for_ready)
  3044. {
  3045. int i, iterations;
  3046. u32 scratchpad;
  3047. if (wait_for_ready)
  3048. iterations = HPSA_BOARD_READY_ITERATIONS;
  3049. else
  3050. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3051. for (i = 0; i < iterations; i++) {
  3052. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3053. if (wait_for_ready) {
  3054. if (scratchpad == HPSA_FIRMWARE_READY)
  3055. return 0;
  3056. } else {
  3057. if (scratchpad != HPSA_FIRMWARE_READY)
  3058. return 0;
  3059. }
  3060. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3061. }
  3062. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3063. return -ENODEV;
  3064. }
  3065. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3066. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3067. u64 *cfg_offset)
  3068. {
  3069. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3070. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3071. *cfg_base_addr &= (u32) 0x0000ffff;
  3072. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3073. if (*cfg_base_addr_index == -1) {
  3074. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3075. return -ENODEV;
  3076. }
  3077. return 0;
  3078. }
  3079. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3080. {
  3081. u64 cfg_offset;
  3082. u32 cfg_base_addr;
  3083. u64 cfg_base_addr_index;
  3084. u32 trans_offset;
  3085. int rc;
  3086. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3087. &cfg_base_addr_index, &cfg_offset);
  3088. if (rc)
  3089. return rc;
  3090. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3091. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3092. if (!h->cfgtable)
  3093. return -ENOMEM;
  3094. /* Find performant mode table. */
  3095. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3096. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3097. cfg_base_addr_index)+cfg_offset+trans_offset,
  3098. sizeof(*h->transtable));
  3099. if (!h->transtable)
  3100. return -ENOMEM;
  3101. return 0;
  3102. }
  3103. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3104. {
  3105. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3106. /* Limit commands in memory limited kdump scenario. */
  3107. if (reset_devices && h->max_commands > 32)
  3108. h->max_commands = 32;
  3109. if (h->max_commands < 16) {
  3110. dev_warn(&h->pdev->dev, "Controller reports "
  3111. "max supported commands of %d, an obvious lie. "
  3112. "Using 16. Ensure that firmware is up to date.\n",
  3113. h->max_commands);
  3114. h->max_commands = 16;
  3115. }
  3116. }
  3117. /* Interrogate the hardware for some limits:
  3118. * max commands, max SG elements without chaining, and with chaining,
  3119. * SG chain block size, etc.
  3120. */
  3121. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3122. {
  3123. hpsa_get_max_perf_mode_cmds(h);
  3124. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3125. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3126. /*
  3127. * Limit in-command s/g elements to 32 save dma'able memory.
  3128. * Howvever spec says if 0, use 31
  3129. */
  3130. h->max_cmd_sg_entries = 31;
  3131. if (h->maxsgentries > 512) {
  3132. h->max_cmd_sg_entries = 32;
  3133. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3134. h->maxsgentries--; /* save one for chain pointer */
  3135. } else {
  3136. h->maxsgentries = 31; /* default to traditional values */
  3137. h->chainsize = 0;
  3138. }
  3139. }
  3140. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3141. {
  3142. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3143. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3144. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3145. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3146. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3147. return false;
  3148. }
  3149. return true;
  3150. }
  3151. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3152. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3153. {
  3154. #ifdef CONFIG_X86
  3155. u32 prefetch;
  3156. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3157. prefetch |= 0x100;
  3158. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3159. #endif
  3160. }
  3161. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3162. * in a prefetch beyond physical memory.
  3163. */
  3164. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3165. {
  3166. u32 dma_prefetch;
  3167. if (h->board_id != 0x3225103C)
  3168. return;
  3169. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3170. dma_prefetch |= 0x8000;
  3171. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3172. }
  3173. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3174. {
  3175. int i;
  3176. /* under certain very rare conditions, this can take awhile.
  3177. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3178. * as we enter this code.)
  3179. */
  3180. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3181. if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
  3182. break;
  3183. /* delay and try again */
  3184. msleep(10);
  3185. }
  3186. }
  3187. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3188. {
  3189. u32 trans_support;
  3190. trans_support = readl(&(h->cfgtable->TransportSupport));
  3191. if (!(trans_support & SIMPLE_MODE))
  3192. return -ENOTSUPP;
  3193. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3194. /* Update the field, and then ring the doorbell */
  3195. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3196. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3197. hpsa_wait_for_mode_change_ack(h);
  3198. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3199. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3200. dev_warn(&h->pdev->dev,
  3201. "unable to get board into simple mode\n");
  3202. return -ENODEV;
  3203. }
  3204. return 0;
  3205. }
  3206. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3207. {
  3208. int prod_index, err;
  3209. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3210. if (prod_index < 0)
  3211. return -ENODEV;
  3212. h->product_name = products[prod_index].product_name;
  3213. h->access = *(products[prod_index].access);
  3214. if (hpsa_board_disabled(h->pdev)) {
  3215. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3216. return -ENODEV;
  3217. }
  3218. err = pci_enable_device(h->pdev);
  3219. if (err) {
  3220. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3221. return err;
  3222. }
  3223. err = pci_request_regions(h->pdev, "hpsa");
  3224. if (err) {
  3225. dev_err(&h->pdev->dev,
  3226. "cannot obtain PCI resources, aborting\n");
  3227. return err;
  3228. }
  3229. hpsa_interrupt_mode(h);
  3230. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3231. if (err)
  3232. goto err_out_free_res;
  3233. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3234. if (!h->vaddr) {
  3235. err = -ENOMEM;
  3236. goto err_out_free_res;
  3237. }
  3238. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3239. if (err)
  3240. goto err_out_free_res;
  3241. err = hpsa_find_cfgtables(h);
  3242. if (err)
  3243. goto err_out_free_res;
  3244. hpsa_find_board_params(h);
  3245. if (!hpsa_CISS_signature_present(h)) {
  3246. err = -ENODEV;
  3247. goto err_out_free_res;
  3248. }
  3249. hpsa_enable_scsi_prefetch(h);
  3250. hpsa_p600_dma_prefetch_quirk(h);
  3251. err = hpsa_enter_simple_mode(h);
  3252. if (err)
  3253. goto err_out_free_res;
  3254. return 0;
  3255. err_out_free_res:
  3256. if (h->transtable)
  3257. iounmap(h->transtable);
  3258. if (h->cfgtable)
  3259. iounmap(h->cfgtable);
  3260. if (h->vaddr)
  3261. iounmap(h->vaddr);
  3262. /*
  3263. * Deliberately omit pci_disable_device(): it does something nasty to
  3264. * Smart Array controllers that pci_enable_device does not undo
  3265. */
  3266. pci_release_regions(h->pdev);
  3267. return err;
  3268. }
  3269. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3270. {
  3271. int rc;
  3272. #define HBA_INQUIRY_BYTE_COUNT 64
  3273. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3274. if (!h->hba_inquiry_data)
  3275. return;
  3276. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3277. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3278. if (rc != 0) {
  3279. kfree(h->hba_inquiry_data);
  3280. h->hba_inquiry_data = NULL;
  3281. }
  3282. }
  3283. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3284. {
  3285. int rc, i;
  3286. if (!reset_devices)
  3287. return 0;
  3288. /* Reset the controller with a PCI power-cycle or via doorbell */
  3289. rc = hpsa_kdump_hard_reset_controller(pdev);
  3290. /* -ENOTSUPP here means we cannot reset the controller
  3291. * but it's already (and still) up and running in
  3292. * "performant mode". Or, it might be 640x, which can't reset
  3293. * due to concerns about shared bbwc between 6402/6404 pair.
  3294. */
  3295. if (rc == -ENOTSUPP)
  3296. return 0; /* just try to do the kdump anyhow. */
  3297. if (rc)
  3298. return -ENODEV;
  3299. /* Now try to get the controller to respond to a no-op */
  3300. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3301. if (hpsa_noop(pdev) == 0)
  3302. break;
  3303. else
  3304. dev_warn(&pdev->dev, "no-op failed%s\n",
  3305. (i < 11 ? "; re-trying" : ""));
  3306. }
  3307. return 0;
  3308. }
  3309. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3310. const struct pci_device_id *ent)
  3311. {
  3312. int dac, rc;
  3313. struct ctlr_info *h;
  3314. if (number_of_controllers == 0)
  3315. printk(KERN_INFO DRIVER_NAME "\n");
  3316. rc = hpsa_init_reset_devices(pdev);
  3317. if (rc)
  3318. return rc;
  3319. /* Command structures must be aligned on a 32-byte boundary because
  3320. * the 5 lower bits of the address are used by the hardware. and by
  3321. * the driver. See comments in hpsa.h for more info.
  3322. */
  3323. #define COMMANDLIST_ALIGNMENT 32
  3324. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3325. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3326. if (!h)
  3327. return -ENOMEM;
  3328. h->pdev = pdev;
  3329. h->busy_initializing = 1;
  3330. INIT_HLIST_HEAD(&h->cmpQ);
  3331. INIT_HLIST_HEAD(&h->reqQ);
  3332. rc = hpsa_pci_init(h);
  3333. if (rc != 0)
  3334. goto clean1;
  3335. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3336. h->ctlr = number_of_controllers;
  3337. number_of_controllers++;
  3338. /* configure PCI DMA stuff */
  3339. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3340. if (rc == 0) {
  3341. dac = 1;
  3342. } else {
  3343. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3344. if (rc == 0) {
  3345. dac = 0;
  3346. } else {
  3347. dev_err(&pdev->dev, "no suitable DMA available\n");
  3348. goto clean1;
  3349. }
  3350. }
  3351. /* make sure the board interrupts are off */
  3352. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3353. if (h->msix_vector || h->msi_vector)
  3354. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3355. IRQF_DISABLED, h->devname, h);
  3356. else
  3357. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3358. IRQF_DISABLED, h->devname, h);
  3359. if (rc) {
  3360. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3361. h->intr[PERF_MODE_INT], h->devname);
  3362. goto clean2;
  3363. }
  3364. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3365. h->devname, pdev->device,
  3366. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3367. h->cmd_pool_bits =
  3368. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3369. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3370. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3371. h->nr_cmds * sizeof(*h->cmd_pool),
  3372. &(h->cmd_pool_dhandle));
  3373. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3374. h->nr_cmds * sizeof(*h->errinfo_pool),
  3375. &(h->errinfo_pool_dhandle));
  3376. if ((h->cmd_pool_bits == NULL)
  3377. || (h->cmd_pool == NULL)
  3378. || (h->errinfo_pool == NULL)) {
  3379. dev_err(&pdev->dev, "out of memory");
  3380. rc = -ENOMEM;
  3381. goto clean4;
  3382. }
  3383. if (hpsa_allocate_sg_chain_blocks(h))
  3384. goto clean4;
  3385. spin_lock_init(&h->lock);
  3386. spin_lock_init(&h->scan_lock);
  3387. init_waitqueue_head(&h->scan_wait_queue);
  3388. h->scan_finished = 1; /* no scan currently in progress */
  3389. pci_set_drvdata(pdev, h);
  3390. memset(h->cmd_pool_bits, 0,
  3391. ((h->nr_cmds + BITS_PER_LONG -
  3392. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3393. hpsa_scsi_setup(h);
  3394. /* Turn the interrupts on so we can service requests */
  3395. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3396. hpsa_put_ctlr_into_performant_mode(h);
  3397. hpsa_hba_inquiry(h);
  3398. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3399. h->busy_initializing = 0;
  3400. return 1;
  3401. clean4:
  3402. hpsa_free_sg_chain_blocks(h);
  3403. kfree(h->cmd_pool_bits);
  3404. if (h->cmd_pool)
  3405. pci_free_consistent(h->pdev,
  3406. h->nr_cmds * sizeof(struct CommandList),
  3407. h->cmd_pool, h->cmd_pool_dhandle);
  3408. if (h->errinfo_pool)
  3409. pci_free_consistent(h->pdev,
  3410. h->nr_cmds * sizeof(struct ErrorInfo),
  3411. h->errinfo_pool,
  3412. h->errinfo_pool_dhandle);
  3413. free_irq(h->intr[PERF_MODE_INT], h);
  3414. clean2:
  3415. clean1:
  3416. h->busy_initializing = 0;
  3417. kfree(h);
  3418. return rc;
  3419. }
  3420. static void hpsa_flush_cache(struct ctlr_info *h)
  3421. {
  3422. char *flush_buf;
  3423. struct CommandList *c;
  3424. flush_buf = kzalloc(4, GFP_KERNEL);
  3425. if (!flush_buf)
  3426. return;
  3427. c = cmd_special_alloc(h);
  3428. if (!c) {
  3429. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3430. goto out_of_memory;
  3431. }
  3432. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3433. RAID_CTLR_LUNID, TYPE_CMD);
  3434. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3435. if (c->err_info->CommandStatus != 0)
  3436. dev_warn(&h->pdev->dev,
  3437. "error flushing cache on controller\n");
  3438. cmd_special_free(h, c);
  3439. out_of_memory:
  3440. kfree(flush_buf);
  3441. }
  3442. static void hpsa_shutdown(struct pci_dev *pdev)
  3443. {
  3444. struct ctlr_info *h;
  3445. h = pci_get_drvdata(pdev);
  3446. /* Turn board interrupts off and send the flush cache command
  3447. * sendcmd will turn off interrupt, and send the flush...
  3448. * To write all data in the battery backed cache to disks
  3449. */
  3450. hpsa_flush_cache(h);
  3451. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3452. free_irq(h->intr[PERF_MODE_INT], h);
  3453. #ifdef CONFIG_PCI_MSI
  3454. if (h->msix_vector)
  3455. pci_disable_msix(h->pdev);
  3456. else if (h->msi_vector)
  3457. pci_disable_msi(h->pdev);
  3458. #endif /* CONFIG_PCI_MSI */
  3459. }
  3460. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3461. {
  3462. struct ctlr_info *h;
  3463. if (pci_get_drvdata(pdev) == NULL) {
  3464. dev_err(&pdev->dev, "unable to remove device \n");
  3465. return;
  3466. }
  3467. h = pci_get_drvdata(pdev);
  3468. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3469. hpsa_shutdown(pdev);
  3470. iounmap(h->vaddr);
  3471. iounmap(h->transtable);
  3472. iounmap(h->cfgtable);
  3473. hpsa_free_sg_chain_blocks(h);
  3474. pci_free_consistent(h->pdev,
  3475. h->nr_cmds * sizeof(struct CommandList),
  3476. h->cmd_pool, h->cmd_pool_dhandle);
  3477. pci_free_consistent(h->pdev,
  3478. h->nr_cmds * sizeof(struct ErrorInfo),
  3479. h->errinfo_pool, h->errinfo_pool_dhandle);
  3480. pci_free_consistent(h->pdev, h->reply_pool_size,
  3481. h->reply_pool, h->reply_pool_dhandle);
  3482. kfree(h->cmd_pool_bits);
  3483. kfree(h->blockFetchTable);
  3484. kfree(h->hba_inquiry_data);
  3485. /*
  3486. * Deliberately omit pci_disable_device(): it does something nasty to
  3487. * Smart Array controllers that pci_enable_device does not undo
  3488. */
  3489. pci_release_regions(pdev);
  3490. pci_set_drvdata(pdev, NULL);
  3491. kfree(h);
  3492. }
  3493. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3494. __attribute__((unused)) pm_message_t state)
  3495. {
  3496. return -ENOSYS;
  3497. }
  3498. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3499. {
  3500. return -ENOSYS;
  3501. }
  3502. static struct pci_driver hpsa_pci_driver = {
  3503. .name = "hpsa",
  3504. .probe = hpsa_init_one,
  3505. .remove = __devexit_p(hpsa_remove_one),
  3506. .id_table = hpsa_pci_device_id, /* id_table */
  3507. .shutdown = hpsa_shutdown,
  3508. .suspend = hpsa_suspend,
  3509. .resume = hpsa_resume,
  3510. };
  3511. /* Fill in bucket_map[], given nsgs (the max number of
  3512. * scatter gather elements supported) and bucket[],
  3513. * which is an array of 8 integers. The bucket[] array
  3514. * contains 8 different DMA transfer sizes (in 16
  3515. * byte increments) which the controller uses to fetch
  3516. * commands. This function fills in bucket_map[], which
  3517. * maps a given number of scatter gather elements to one of
  3518. * the 8 DMA transfer sizes. The point of it is to allow the
  3519. * controller to only do as much DMA as needed to fetch the
  3520. * command, with the DMA transfer size encoded in the lower
  3521. * bits of the command address.
  3522. */
  3523. static void calc_bucket_map(int bucket[], int num_buckets,
  3524. int nsgs, int *bucket_map)
  3525. {
  3526. int i, j, b, size;
  3527. /* even a command with 0 SGs requires 4 blocks */
  3528. #define MINIMUM_TRANSFER_BLOCKS 4
  3529. #define NUM_BUCKETS 8
  3530. /* Note, bucket_map must have nsgs+1 entries. */
  3531. for (i = 0; i <= nsgs; i++) {
  3532. /* Compute size of a command with i SG entries */
  3533. size = i + MINIMUM_TRANSFER_BLOCKS;
  3534. b = num_buckets; /* Assume the biggest bucket */
  3535. /* Find the bucket that is just big enough */
  3536. for (j = 0; j < 8; j++) {
  3537. if (bucket[j] >= size) {
  3538. b = j;
  3539. break;
  3540. }
  3541. }
  3542. /* for a command with i SG entries, use bucket b. */
  3543. bucket_map[i] = b;
  3544. }
  3545. }
  3546. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3547. {
  3548. int i;
  3549. unsigned long register_value;
  3550. /* This is a bit complicated. There are 8 registers on
  3551. * the controller which we write to to tell it 8 different
  3552. * sizes of commands which there may be. It's a way of
  3553. * reducing the DMA done to fetch each command. Encoded into
  3554. * each command's tag are 3 bits which communicate to the controller
  3555. * which of the eight sizes that command fits within. The size of
  3556. * each command depends on how many scatter gather entries there are.
  3557. * Each SG entry requires 16 bytes. The eight registers are programmed
  3558. * with the number of 16-byte blocks a command of that size requires.
  3559. * The smallest command possible requires 5 such 16 byte blocks.
  3560. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3561. * blocks. Note, this only extends to the SG entries contained
  3562. * within the command block, and does not extend to chained blocks
  3563. * of SG elements. bft[] contains the eight values we write to
  3564. * the registers. They are not evenly distributed, but have more
  3565. * sizes for small commands, and fewer sizes for larger commands.
  3566. */
  3567. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3568. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3569. /* 5 = 1 s/g entry or 4k
  3570. * 6 = 2 s/g entry or 8k
  3571. * 8 = 4 s/g entry or 16k
  3572. * 10 = 6 s/g entry or 24k
  3573. */
  3574. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3575. /* Controller spec: zero out this buffer. */
  3576. memset(h->reply_pool, 0, h->reply_pool_size);
  3577. h->reply_pool_head = h->reply_pool;
  3578. bft[7] = h->max_sg_entries + 4;
  3579. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3580. for (i = 0; i < 8; i++)
  3581. writel(bft[i], &h->transtable->BlockFetch[i]);
  3582. /* size of controller ring buffer */
  3583. writel(h->max_commands, &h->transtable->RepQSize);
  3584. writel(1, &h->transtable->RepQCount);
  3585. writel(0, &h->transtable->RepQCtrAddrLow32);
  3586. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3587. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3588. writel(0, &h->transtable->RepQAddr0High32);
  3589. writel(CFGTBL_Trans_Performant,
  3590. &(h->cfgtable->HostWrite.TransportRequest));
  3591. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3592. hpsa_wait_for_mode_change_ack(h);
  3593. register_value = readl(&(h->cfgtable->TransportActive));
  3594. if (!(register_value & CFGTBL_Trans_Performant)) {
  3595. dev_warn(&h->pdev->dev, "unable to get board into"
  3596. " performant mode\n");
  3597. return;
  3598. }
  3599. }
  3600. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3601. {
  3602. u32 trans_support;
  3603. trans_support = readl(&(h->cfgtable->TransportSupport));
  3604. if (!(trans_support & PERFORMANT_MODE))
  3605. return;
  3606. hpsa_get_max_perf_mode_cmds(h);
  3607. h->max_sg_entries = 32;
  3608. /* Performant mode ring buffer and supporting data structures */
  3609. h->reply_pool_size = h->max_commands * sizeof(u64);
  3610. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3611. &(h->reply_pool_dhandle));
  3612. /* Need a block fetch table for performant mode */
  3613. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3614. sizeof(u32)), GFP_KERNEL);
  3615. if ((h->reply_pool == NULL)
  3616. || (h->blockFetchTable == NULL))
  3617. goto clean_up;
  3618. hpsa_enter_performant_mode(h);
  3619. /* Change the access methods to the performant access methods */
  3620. h->access = SA5_performant_access;
  3621. h->transMethod = CFGTBL_Trans_Performant;
  3622. return;
  3623. clean_up:
  3624. if (h->reply_pool)
  3625. pci_free_consistent(h->pdev, h->reply_pool_size,
  3626. h->reply_pool, h->reply_pool_dhandle);
  3627. kfree(h->blockFetchTable);
  3628. }
  3629. /*
  3630. * This is it. Register the PCI driver information for the cards we control
  3631. * the OS will call our registered routines when it finds one of our cards.
  3632. */
  3633. static int __init hpsa_init(void)
  3634. {
  3635. return pci_register_driver(&hpsa_pci_driver);
  3636. }
  3637. static void __exit hpsa_cleanup(void)
  3638. {
  3639. pci_unregister_driver(&hpsa_pci_driver);
  3640. }
  3641. module_init(hpsa_init);
  3642. module_exit(hpsa_cleanup);