generic.c 10.0 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * Code common to all SA11x0 machines.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/gpio.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/pm.h>
  19. #include <linux/cpufreq.h>
  20. #include <linux/ioport.h>
  21. #include <linux/platform_device.h>
  22. #include <video/sa1100fb.h>
  23. #include <asm/div64.h>
  24. #include <mach/hardware.h>
  25. #include <asm/system.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/flash.h>
  28. #include <asm/irq.h>
  29. #include "generic.h"
  30. unsigned int reset_status;
  31. EXPORT_SYMBOL(reset_status);
  32. #define NR_FREQS 16
  33. /*
  34. * This table is setup for a 3.6864MHz Crystal.
  35. */
  36. static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  37. 590, /* 59.0 MHz */
  38. 737, /* 73.7 MHz */
  39. 885, /* 88.5 MHz */
  40. 1032, /* 103.2 MHz */
  41. 1180, /* 118.0 MHz */
  42. 1327, /* 132.7 MHz */
  43. 1475, /* 147.5 MHz */
  44. 1622, /* 162.2 MHz */
  45. 1769, /* 176.9 MHz */
  46. 1917, /* 191.7 MHz */
  47. 2064, /* 206.4 MHz */
  48. 2212, /* 221.2 MHz */
  49. 2359, /* 235.9 MHz */
  50. 2507, /* 250.7 MHz */
  51. 2654, /* 265.4 MHz */
  52. 2802 /* 280.2 MHz */
  53. };
  54. /* rounds up(!) */
  55. unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  56. {
  57. int i;
  58. khz /= 100;
  59. for (i = 0; i < NR_FREQS; i++)
  60. if (cclk_frequency_100khz[i] >= khz)
  61. break;
  62. return i;
  63. }
  64. unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  65. {
  66. unsigned int freq = 0;
  67. if (idx < NR_FREQS)
  68. freq = cclk_frequency_100khz[idx] * 100;
  69. return freq;
  70. }
  71. /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  72. * this platform, anyway.
  73. */
  74. int sa11x0_verify_speed(struct cpufreq_policy *policy)
  75. {
  76. unsigned int tmp;
  77. if (policy->cpu)
  78. return -EINVAL;
  79. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  80. /* make sure that at least one frequency is within the policy */
  81. tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  82. if (tmp > policy->max)
  83. policy->max = tmp;
  84. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  85. return 0;
  86. }
  87. unsigned int sa11x0_getspeed(unsigned int cpu)
  88. {
  89. if (cpu)
  90. return 0;
  91. return cclk_frequency_100khz[PPCR & 0xf] * 100;
  92. }
  93. /*
  94. * Default power-off for SA1100
  95. */
  96. static void sa1100_power_off(void)
  97. {
  98. mdelay(100);
  99. local_irq_disable();
  100. /* disable internal oscillator, float CS lines */
  101. PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
  102. /* enable wake-up on GPIO0 (Assabet...) */
  103. PWER = GFER = GRER = 1;
  104. /*
  105. * set scratchpad to zero, just in case it is used as a
  106. * restart address by the bootloader.
  107. */
  108. PSPR = 0;
  109. /* enter sleep mode */
  110. PMCR = PMCR_SF;
  111. }
  112. void sa11x0_restart(char mode, const char *cmd)
  113. {
  114. if (mode == 's') {
  115. /* Jump into ROM at address 0 */
  116. soft_restart(0);
  117. } else {
  118. /* Use on-chip reset capability */
  119. RSRR = RSRR_SWR;
  120. }
  121. }
  122. static void sa11x0_register_device(struct platform_device *dev, void *data)
  123. {
  124. int err;
  125. dev->dev.platform_data = data;
  126. err = platform_device_register(dev);
  127. if (err)
  128. printk(KERN_ERR "Unable to register device %s: %d\n",
  129. dev->name, err);
  130. }
  131. static struct resource sa11x0udc_resources[] = {
  132. [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
  133. [1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
  134. };
  135. static u64 sa11x0udc_dma_mask = 0xffffffffUL;
  136. static struct platform_device sa11x0udc_device = {
  137. .name = "sa11x0-udc",
  138. .id = -1,
  139. .dev = {
  140. .dma_mask = &sa11x0udc_dma_mask,
  141. .coherent_dma_mask = 0xffffffff,
  142. },
  143. .num_resources = ARRAY_SIZE(sa11x0udc_resources),
  144. .resource = sa11x0udc_resources,
  145. };
  146. static struct resource sa11x0uart1_resources[] = {
  147. [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
  148. [1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
  149. };
  150. static struct platform_device sa11x0uart1_device = {
  151. .name = "sa11x0-uart",
  152. .id = 1,
  153. .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
  154. .resource = sa11x0uart1_resources,
  155. };
  156. static struct resource sa11x0uart3_resources[] = {
  157. [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
  158. [1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
  159. };
  160. static struct platform_device sa11x0uart3_device = {
  161. .name = "sa11x0-uart",
  162. .id = 3,
  163. .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
  164. .resource = sa11x0uart3_resources,
  165. };
  166. static struct resource sa11x0mcp_resources[] = {
  167. [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
  168. [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
  169. [2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
  170. };
  171. static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
  172. static struct platform_device sa11x0mcp_device = {
  173. .name = "sa11x0-mcp",
  174. .id = -1,
  175. .dev = {
  176. .dma_mask = &sa11x0mcp_dma_mask,
  177. .coherent_dma_mask = 0xffffffff,
  178. },
  179. .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
  180. .resource = sa11x0mcp_resources,
  181. };
  182. void __init sa11x0_ppc_configure_mcp(void)
  183. {
  184. /* Setup the PPC unit for the MCP */
  185. PPDR &= ~PPC_RXD4;
  186. PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
  187. PSDR |= PPC_RXD4;
  188. PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  189. PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
  190. }
  191. void sa11x0_register_mcp(struct mcp_plat_data *data)
  192. {
  193. sa11x0_register_device(&sa11x0mcp_device, data);
  194. }
  195. static struct resource sa11x0ssp_resources[] = {
  196. [0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
  197. [1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
  198. };
  199. static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
  200. static struct platform_device sa11x0ssp_device = {
  201. .name = "sa11x0-ssp",
  202. .id = -1,
  203. .dev = {
  204. .dma_mask = &sa11x0ssp_dma_mask,
  205. .coherent_dma_mask = 0xffffffff,
  206. },
  207. .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
  208. .resource = sa11x0ssp_resources,
  209. };
  210. static struct resource sa11x0fb_resources[] = {
  211. [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
  212. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  213. };
  214. static struct platform_device sa11x0fb_device = {
  215. .name = "sa11x0-fb",
  216. .id = -1,
  217. .dev = {
  218. .coherent_dma_mask = 0xffffffff,
  219. },
  220. .num_resources = ARRAY_SIZE(sa11x0fb_resources),
  221. .resource = sa11x0fb_resources,
  222. };
  223. void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
  224. {
  225. sa11x0_register_device(&sa11x0fb_device, inf);
  226. }
  227. static struct platform_device sa11x0pcmcia_device = {
  228. .name = "sa11x0-pcmcia",
  229. .id = -1,
  230. };
  231. static struct platform_device sa11x0mtd_device = {
  232. .name = "sa1100-mtd",
  233. .id = -1,
  234. };
  235. void sa11x0_register_mtd(struct flash_platform_data *flash,
  236. struct resource *res, int nr)
  237. {
  238. flash->name = "sa1100";
  239. sa11x0mtd_device.resource = res;
  240. sa11x0mtd_device.num_resources = nr;
  241. sa11x0_register_device(&sa11x0mtd_device, flash);
  242. }
  243. static struct resource sa11x0ir_resources[] = {
  244. DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
  245. DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
  246. DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
  247. DEFINE_RES_IRQ(IRQ_Ser2ICP),
  248. };
  249. static struct platform_device sa11x0ir_device = {
  250. .name = "sa11x0-ir",
  251. .id = -1,
  252. .num_resources = ARRAY_SIZE(sa11x0ir_resources),
  253. .resource = sa11x0ir_resources,
  254. };
  255. void sa11x0_register_irda(struct irda_platform_data *irda)
  256. {
  257. sa11x0_register_device(&sa11x0ir_device, irda);
  258. }
  259. static struct platform_device sa11x0rtc_device = {
  260. .name = "sa1100-rtc",
  261. .id = -1,
  262. };
  263. static struct resource sa11x0dma_resources[] = {
  264. DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
  265. DEFINE_RES_IRQ(IRQ_DMA0),
  266. DEFINE_RES_IRQ(IRQ_DMA1),
  267. DEFINE_RES_IRQ(IRQ_DMA2),
  268. DEFINE_RES_IRQ(IRQ_DMA3),
  269. DEFINE_RES_IRQ(IRQ_DMA4),
  270. DEFINE_RES_IRQ(IRQ_DMA5),
  271. };
  272. static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
  273. static struct platform_device sa11x0dma_device = {
  274. .name = "sa11x0-dma",
  275. .id = -1,
  276. .dev = {
  277. .dma_mask = &sa11x0dma_dma_mask,
  278. .coherent_dma_mask = 0xffffffff,
  279. },
  280. .num_resources = ARRAY_SIZE(sa11x0dma_resources),
  281. .resource = sa11x0dma_resources,
  282. };
  283. static struct platform_device *sa11x0_devices[] __initdata = {
  284. &sa11x0udc_device,
  285. &sa11x0uart1_device,
  286. &sa11x0uart3_device,
  287. &sa11x0ssp_device,
  288. &sa11x0pcmcia_device,
  289. &sa11x0rtc_device,
  290. &sa11x0dma_device,
  291. };
  292. static int __init sa1100_init(void)
  293. {
  294. pm_power_off = sa1100_power_off;
  295. return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
  296. }
  297. arch_initcall(sa1100_init);
  298. /*
  299. * Common I/O mapping:
  300. *
  301. * Typically, static virtual address mappings are as follow:
  302. *
  303. * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
  304. * 0xf4000000-0xf4ffffff: SA-1111
  305. * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
  306. * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
  307. * 0xffff0000-0xffff0fff: SA1100 exception vectors
  308. * 0xffff2000-0xffff2fff: Minicache copy_user_page area
  309. *
  310. * Below 0xe8000000 is reserved for vm allocation.
  311. *
  312. * The machine specific code must provide the extra mapping beside the
  313. * default mapping provided here.
  314. */
  315. static struct map_desc standard_io_desc[] __initdata = {
  316. { /* PCM */
  317. .virtual = 0xf8000000,
  318. .pfn = __phys_to_pfn(0x80000000),
  319. .length = 0x00100000,
  320. .type = MT_DEVICE
  321. }, { /* SCM */
  322. .virtual = 0xfa000000,
  323. .pfn = __phys_to_pfn(0x90000000),
  324. .length = 0x00100000,
  325. .type = MT_DEVICE
  326. }, { /* MER */
  327. .virtual = 0xfc000000,
  328. .pfn = __phys_to_pfn(0xa0000000),
  329. .length = 0x00100000,
  330. .type = MT_DEVICE
  331. }, { /* LCD + DMA */
  332. .virtual = 0xfe000000,
  333. .pfn = __phys_to_pfn(0xb0000000),
  334. .length = 0x00200000,
  335. .type = MT_DEVICE
  336. },
  337. };
  338. void __init sa1100_map_io(void)
  339. {
  340. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  341. }
  342. /*
  343. * Disable the memory bus request/grant signals on the SA1110 to
  344. * ensure that we don't receive spurious memory requests. We set
  345. * the MBGNT signal false to ensure the SA1111 doesn't own the
  346. * SDRAM bus.
  347. */
  348. void sa1110_mb_disable(void)
  349. {
  350. unsigned long flags;
  351. local_irq_save(flags);
  352. PGSR &= ~GPIO_MBGNT;
  353. GPCR = GPIO_MBGNT;
  354. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  355. GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
  356. local_irq_restore(flags);
  357. }
  358. /*
  359. * If the system is going to use the SA-1111 DMA engines, set up
  360. * the memory bus request/grant pins.
  361. */
  362. void sa1110_mb_enable(void)
  363. {
  364. unsigned long flags;
  365. local_irq_save(flags);
  366. PGSR &= ~GPIO_MBGNT;
  367. GPCR = GPIO_MBGNT;
  368. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  369. GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
  370. TUCR |= TUCR_MR;
  371. local_irq_restore(flags);
  372. }