spu_base.c 18 KB

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  1. /*
  2. * Low-level SPU handling
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/module.h>
  26. #include <linux/poll.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/slab.h>
  29. #include <linux/wait.h>
  30. #include <asm/io.h>
  31. #include <asm/prom.h>
  32. #include <linux/mutex.h>
  33. #include <asm/spu.h>
  34. #include <asm/mmu_context.h>
  35. #include "interrupt.h"
  36. static int __spu_trap_invalid_dma(struct spu *spu)
  37. {
  38. pr_debug("%s\n", __FUNCTION__);
  39. force_sig(SIGBUS, /* info, */ current);
  40. return 0;
  41. }
  42. static int __spu_trap_dma_align(struct spu *spu)
  43. {
  44. pr_debug("%s\n", __FUNCTION__);
  45. force_sig(SIGBUS, /* info, */ current);
  46. return 0;
  47. }
  48. static int __spu_trap_error(struct spu *spu)
  49. {
  50. pr_debug("%s\n", __FUNCTION__);
  51. force_sig(SIGILL, /* info, */ current);
  52. return 0;
  53. }
  54. static void spu_restart_dma(struct spu *spu)
  55. {
  56. struct spu_priv2 __iomem *priv2 = spu->priv2;
  57. if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
  58. out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
  59. }
  60. static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
  61. {
  62. struct spu_priv2 __iomem *priv2 = spu->priv2;
  63. struct mm_struct *mm = spu->mm;
  64. u64 esid, vsid, llp;
  65. pr_debug("%s\n", __FUNCTION__);
  66. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  67. /* SLBs are pre-loaded for context switch, so
  68. * we should never get here!
  69. */
  70. printk("%s: invalid access during switch!\n", __func__);
  71. return 1;
  72. }
  73. if (!mm || (REGION_ID(ea) != USER_REGION_ID)) {
  74. /* Future: support kernel segments so that drivers
  75. * can use SPUs.
  76. */
  77. pr_debug("invalid region access at %016lx\n", ea);
  78. return 1;
  79. }
  80. esid = (ea & ESID_MASK) | SLB_ESID_V;
  81. #ifdef CONFIG_HUGETLB_PAGE
  82. if (in_hugepage_area(mm->context, ea))
  83. llp = mmu_psize_defs[mmu_huge_psize].sllp;
  84. else
  85. #endif
  86. llp = mmu_psize_defs[mmu_virtual_psize].sllp;
  87. vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
  88. SLB_VSID_USER | llp;
  89. out_be64(&priv2->slb_index_W, spu->slb_replace);
  90. out_be64(&priv2->slb_vsid_RW, vsid);
  91. out_be64(&priv2->slb_esid_RW, esid);
  92. spu->slb_replace++;
  93. if (spu->slb_replace >= 8)
  94. spu->slb_replace = 0;
  95. spu_restart_dma(spu);
  96. return 0;
  97. }
  98. extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
  99. static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
  100. {
  101. pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
  102. /* Handle kernel space hash faults immediately.
  103. User hash faults need to be deferred to process context. */
  104. if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
  105. && REGION_ID(ea) != USER_REGION_ID
  106. && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
  107. spu_restart_dma(spu);
  108. return 0;
  109. }
  110. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  111. printk("%s: invalid access during switch!\n", __func__);
  112. return 1;
  113. }
  114. spu->dar = ea;
  115. spu->dsisr = dsisr;
  116. mb();
  117. if (spu->stop_callback)
  118. spu->stop_callback(spu);
  119. return 0;
  120. }
  121. static int __spu_trap_mailbox(struct spu *spu)
  122. {
  123. if (spu->ibox_callback)
  124. spu->ibox_callback(spu);
  125. /* atomically disable SPU mailbox interrupts */
  126. spin_lock(&spu->register_lock);
  127. spu_int_mask_and(spu, 2, ~0x1);
  128. spin_unlock(&spu->register_lock);
  129. return 0;
  130. }
  131. static int __spu_trap_stop(struct spu *spu)
  132. {
  133. pr_debug("%s\n", __FUNCTION__);
  134. spu->stop_code = in_be32(&spu->problem->spu_status_R);
  135. if (spu->stop_callback)
  136. spu->stop_callback(spu);
  137. return 0;
  138. }
  139. static int __spu_trap_halt(struct spu *spu)
  140. {
  141. pr_debug("%s\n", __FUNCTION__);
  142. spu->stop_code = in_be32(&spu->problem->spu_status_R);
  143. if (spu->stop_callback)
  144. spu->stop_callback(spu);
  145. return 0;
  146. }
  147. static int __spu_trap_tag_group(struct spu *spu)
  148. {
  149. pr_debug("%s\n", __FUNCTION__);
  150. spu->mfc_callback(spu);
  151. return 0;
  152. }
  153. static int __spu_trap_spubox(struct spu *spu)
  154. {
  155. if (spu->wbox_callback)
  156. spu->wbox_callback(spu);
  157. /* atomically disable SPU mailbox interrupts */
  158. spin_lock(&spu->register_lock);
  159. spu_int_mask_and(spu, 2, ~0x10);
  160. spin_unlock(&spu->register_lock);
  161. return 0;
  162. }
  163. static irqreturn_t
  164. spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
  165. {
  166. struct spu *spu;
  167. spu = data;
  168. spu->class_0_pending = 1;
  169. if (spu->stop_callback)
  170. spu->stop_callback(spu);
  171. return IRQ_HANDLED;
  172. }
  173. int
  174. spu_irq_class_0_bottom(struct spu *spu)
  175. {
  176. unsigned long stat, mask;
  177. spu->class_0_pending = 0;
  178. mask = spu_int_mask_get(spu, 0);
  179. stat = spu_int_stat_get(spu, 0);
  180. stat &= mask;
  181. if (stat & 1) /* invalid MFC DMA */
  182. __spu_trap_invalid_dma(spu);
  183. if (stat & 2) /* invalid DMA alignment */
  184. __spu_trap_dma_align(spu);
  185. if (stat & 4) /* error on SPU */
  186. __spu_trap_error(spu);
  187. spu_int_stat_clear(spu, 0, stat);
  188. return (stat & 0x7) ? -EIO : 0;
  189. }
  190. EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
  191. static irqreturn_t
  192. spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
  193. {
  194. struct spu *spu;
  195. unsigned long stat, mask, dar, dsisr;
  196. spu = data;
  197. /* atomically read & clear class1 status. */
  198. spin_lock(&spu->register_lock);
  199. mask = spu_int_mask_get(spu, 1);
  200. stat = spu_int_stat_get(spu, 1) & mask;
  201. dar = spu_mfc_dar_get(spu);
  202. dsisr = spu_mfc_dsisr_get(spu);
  203. if (stat & 2) /* mapping fault */
  204. spu_mfc_dsisr_set(spu, 0ul);
  205. spu_int_stat_clear(spu, 1, stat);
  206. spin_unlock(&spu->register_lock);
  207. pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
  208. dar, dsisr);
  209. if (stat & 1) /* segment fault */
  210. __spu_trap_data_seg(spu, dar);
  211. if (stat & 2) { /* mapping fault */
  212. __spu_trap_data_map(spu, dar, dsisr);
  213. }
  214. if (stat & 4) /* ls compare & suspend on get */
  215. ;
  216. if (stat & 8) /* ls compare & suspend on put */
  217. ;
  218. return stat ? IRQ_HANDLED : IRQ_NONE;
  219. }
  220. EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom);
  221. static irqreturn_t
  222. spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
  223. {
  224. struct spu *spu;
  225. unsigned long stat;
  226. unsigned long mask;
  227. spu = data;
  228. stat = spu_int_stat_get(spu, 2);
  229. mask = spu_int_mask_get(spu, 2);
  230. pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
  231. stat &= mask;
  232. if (stat & 1) /* PPC core mailbox */
  233. __spu_trap_mailbox(spu);
  234. if (stat & 2) /* SPU stop-and-signal */
  235. __spu_trap_stop(spu);
  236. if (stat & 4) /* SPU halted */
  237. __spu_trap_halt(spu);
  238. if (stat & 8) /* DMA tag group complete */
  239. __spu_trap_tag_group(spu);
  240. if (stat & 0x10) /* SPU mailbox threshold */
  241. __spu_trap_spubox(spu);
  242. spu_int_stat_clear(spu, 2, stat);
  243. return stat ? IRQ_HANDLED : IRQ_NONE;
  244. }
  245. static int
  246. spu_request_irqs(struct spu *spu)
  247. {
  248. int ret;
  249. int irq_base;
  250. irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET;
  251. snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0", spu->number);
  252. ret = request_irq(irq_base + spu->isrc,
  253. spu_irq_class_0, SA_INTERRUPT, spu->irq_c0, spu);
  254. if (ret)
  255. goto out;
  256. snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1", spu->number);
  257. ret = request_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc,
  258. spu_irq_class_1, SA_INTERRUPT, spu->irq_c1, spu);
  259. if (ret)
  260. goto out1;
  261. snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2", spu->number);
  262. ret = request_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc,
  263. spu_irq_class_2, SA_INTERRUPT, spu->irq_c2, spu);
  264. if (ret)
  265. goto out2;
  266. goto out;
  267. out2:
  268. free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu);
  269. out1:
  270. free_irq(irq_base + spu->isrc, spu);
  271. out:
  272. return ret;
  273. }
  274. static void
  275. spu_free_irqs(struct spu *spu)
  276. {
  277. int irq_base;
  278. irq_base = IIC_NODE_STRIDE * spu->node + IIC_SPE_OFFSET;
  279. free_irq(irq_base + spu->isrc, spu);
  280. free_irq(irq_base + IIC_CLASS_STRIDE + spu->isrc, spu);
  281. free_irq(irq_base + 2*IIC_CLASS_STRIDE + spu->isrc, spu);
  282. }
  283. static LIST_HEAD(spu_list);
  284. static DEFINE_MUTEX(spu_mutex);
  285. static void spu_init_channels(struct spu *spu)
  286. {
  287. static const struct {
  288. unsigned channel;
  289. unsigned count;
  290. } zero_list[] = {
  291. { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
  292. { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
  293. }, count_list[] = {
  294. { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
  295. { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
  296. { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
  297. };
  298. struct spu_priv2 __iomem *priv2;
  299. int i;
  300. priv2 = spu->priv2;
  301. /* initialize all channel data to zero */
  302. for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
  303. int count;
  304. out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
  305. for (count = 0; count < zero_list[i].count; count++)
  306. out_be64(&priv2->spu_chnldata_RW, 0);
  307. }
  308. /* initialize channel counts to meaningful values */
  309. for (i = 0; i < ARRAY_SIZE(count_list); i++) {
  310. out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
  311. out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
  312. }
  313. }
  314. struct spu *spu_alloc(void)
  315. {
  316. struct spu *spu;
  317. mutex_lock(&spu_mutex);
  318. if (!list_empty(&spu_list)) {
  319. spu = list_entry(spu_list.next, struct spu, list);
  320. list_del_init(&spu->list);
  321. pr_debug("Got SPU %x %d\n", spu->isrc, spu->number);
  322. } else {
  323. pr_debug("No SPU left\n");
  324. spu = NULL;
  325. }
  326. mutex_unlock(&spu_mutex);
  327. if (spu)
  328. spu_init_channels(spu);
  329. return spu;
  330. }
  331. EXPORT_SYMBOL_GPL(spu_alloc);
  332. void spu_free(struct spu *spu)
  333. {
  334. mutex_lock(&spu_mutex);
  335. list_add_tail(&spu->list, &spu_list);
  336. mutex_unlock(&spu_mutex);
  337. }
  338. EXPORT_SYMBOL_GPL(spu_free);
  339. static int spu_handle_mm_fault(struct spu *spu)
  340. {
  341. struct mm_struct *mm = spu->mm;
  342. struct vm_area_struct *vma;
  343. u64 ea, dsisr, is_write;
  344. int ret;
  345. ea = spu->dar;
  346. dsisr = spu->dsisr;
  347. #if 0
  348. if (!IS_VALID_EA(ea)) {
  349. return -EFAULT;
  350. }
  351. #endif /* XXX */
  352. if (mm == NULL) {
  353. return -EFAULT;
  354. }
  355. if (mm->pgd == NULL) {
  356. return -EFAULT;
  357. }
  358. down_read(&mm->mmap_sem);
  359. vma = find_vma(mm, ea);
  360. if (!vma)
  361. goto bad_area;
  362. if (vma->vm_start <= ea)
  363. goto good_area;
  364. if (!(vma->vm_flags & VM_GROWSDOWN))
  365. goto bad_area;
  366. #if 0
  367. if (expand_stack(vma, ea))
  368. goto bad_area;
  369. #endif /* XXX */
  370. good_area:
  371. is_write = dsisr & MFC_DSISR_ACCESS_PUT;
  372. if (is_write) {
  373. if (!(vma->vm_flags & VM_WRITE))
  374. goto bad_area;
  375. } else {
  376. if (dsisr & MFC_DSISR_ACCESS_DENIED)
  377. goto bad_area;
  378. if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
  379. goto bad_area;
  380. }
  381. ret = 0;
  382. switch (handle_mm_fault(mm, vma, ea, is_write)) {
  383. case VM_FAULT_MINOR:
  384. current->min_flt++;
  385. break;
  386. case VM_FAULT_MAJOR:
  387. current->maj_flt++;
  388. break;
  389. case VM_FAULT_SIGBUS:
  390. ret = -EFAULT;
  391. goto bad_area;
  392. case VM_FAULT_OOM:
  393. ret = -ENOMEM;
  394. goto bad_area;
  395. default:
  396. BUG();
  397. }
  398. up_read(&mm->mmap_sem);
  399. return ret;
  400. bad_area:
  401. up_read(&mm->mmap_sem);
  402. return -EFAULT;
  403. }
  404. int spu_irq_class_1_bottom(struct spu *spu)
  405. {
  406. u64 ea, dsisr, access, error = 0UL;
  407. int ret = 0;
  408. ea = spu->dar;
  409. dsisr = spu->dsisr;
  410. if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
  411. u64 flags;
  412. access = (_PAGE_PRESENT | _PAGE_USER);
  413. access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
  414. local_irq_save(flags);
  415. if (hash_page(ea, access, 0x300) != 0)
  416. error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
  417. local_irq_restore(flags);
  418. }
  419. if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
  420. if ((ret = spu_handle_mm_fault(spu)) != 0)
  421. error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
  422. else
  423. error &= ~CLASS1_ENABLE_STORAGE_FAULT_INTR;
  424. }
  425. spu->dar = 0UL;
  426. spu->dsisr = 0UL;
  427. if (!error) {
  428. spu_restart_dma(spu);
  429. } else {
  430. __spu_trap_invalid_dma(spu);
  431. }
  432. return ret;
  433. }
  434. void spu_irq_setaffinity(struct spu *spu, int cpu)
  435. {
  436. u64 target = iic_get_target_id(cpu);
  437. u64 route = target << 48 | target << 32 | target << 16;
  438. spu_int_route_set(spu, route);
  439. }
  440. EXPORT_SYMBOL_GPL(spu_irq_setaffinity);
  441. static int __init find_spu_node_id(struct device_node *spe)
  442. {
  443. unsigned int *id;
  444. struct device_node *cpu;
  445. cpu = spe->parent->parent;
  446. id = (unsigned int *)get_property(cpu, "node-id", NULL);
  447. return id ? *id : 0;
  448. }
  449. static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
  450. const char *prop)
  451. {
  452. static DEFINE_MUTEX(add_spumem_mutex);
  453. struct address_prop {
  454. unsigned long address;
  455. unsigned int len;
  456. } __attribute__((packed)) *p;
  457. int proplen;
  458. unsigned long start_pfn, nr_pages;
  459. struct pglist_data *pgdata;
  460. struct zone *zone;
  461. int ret;
  462. p = (void*)get_property(spe, prop, &proplen);
  463. WARN_ON(proplen != sizeof (*p));
  464. start_pfn = p->address >> PAGE_SHIFT;
  465. nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
  466. pgdata = NODE_DATA(spu->nid);
  467. zone = pgdata->node_zones;
  468. /* XXX rethink locking here */
  469. mutex_lock(&add_spumem_mutex);
  470. ret = __add_pages(zone, start_pfn, nr_pages);
  471. mutex_unlock(&add_spumem_mutex);
  472. return ret;
  473. }
  474. static void __iomem * __init map_spe_prop(struct spu *spu,
  475. struct device_node *n, const char *name)
  476. {
  477. struct address_prop {
  478. unsigned long address;
  479. unsigned int len;
  480. } __attribute__((packed)) *prop;
  481. void *p;
  482. int proplen;
  483. void* ret = NULL;
  484. int err = 0;
  485. p = get_property(n, name, &proplen);
  486. if (proplen != sizeof (struct address_prop))
  487. return NULL;
  488. prop = p;
  489. err = cell_spuprop_present(spu, n, name);
  490. if (err && (err != -EEXIST))
  491. goto out;
  492. ret = ioremap(prop->address, prop->len);
  493. out:
  494. return ret;
  495. }
  496. static void spu_unmap(struct spu *spu)
  497. {
  498. iounmap(spu->priv2);
  499. iounmap(spu->priv1);
  500. iounmap(spu->problem);
  501. iounmap((u8 __iomem *)spu->local_store);
  502. }
  503. static int __init spu_map_device(struct spu *spu, struct device_node *node)
  504. {
  505. char *prop;
  506. int ret;
  507. ret = -ENODEV;
  508. prop = get_property(node, "isrc", NULL);
  509. if (!prop)
  510. goto out;
  511. spu->isrc = *(unsigned int *)prop;
  512. spu->name = get_property(node, "name", NULL);
  513. if (!spu->name)
  514. goto out;
  515. prop = get_property(node, "local-store", NULL);
  516. if (!prop)
  517. goto out;
  518. spu->local_store_phys = *(unsigned long *)prop;
  519. /* we use local store as ram, not io memory */
  520. spu->local_store = (void __force *)
  521. map_spe_prop(spu, node, "local-store");
  522. if (!spu->local_store)
  523. goto out;
  524. prop = get_property(node, "problem", NULL);
  525. if (!prop)
  526. goto out_unmap;
  527. spu->problem_phys = *(unsigned long *)prop;
  528. spu->problem= map_spe_prop(spu, node, "problem");
  529. if (!spu->problem)
  530. goto out_unmap;
  531. spu->priv1= map_spe_prop(spu, node, "priv1");
  532. /* priv1 is not available on a hypervisor */
  533. spu->priv2= map_spe_prop(spu, node, "priv2");
  534. if (!spu->priv2)
  535. goto out_unmap;
  536. ret = 0;
  537. goto out;
  538. out_unmap:
  539. spu_unmap(spu);
  540. out:
  541. return ret;
  542. }
  543. struct sysdev_class spu_sysdev_class = {
  544. set_kset_name("spu")
  545. };
  546. static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
  547. {
  548. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  549. return sprintf(buf, "%d\n", spu->isrc);
  550. }
  551. static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
  552. extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
  553. static int spu_create_sysdev(struct spu *spu)
  554. {
  555. int ret;
  556. spu->sysdev.id = spu->number;
  557. spu->sysdev.cls = &spu_sysdev_class;
  558. ret = sysdev_register(&spu->sysdev);
  559. if (ret) {
  560. printk(KERN_ERR "Can't register SPU %d with sysfs\n",
  561. spu->number);
  562. return ret;
  563. }
  564. sysdev_create_file(&spu->sysdev, &attr_isrc);
  565. sysfs_add_device_to_node(&spu->sysdev, spu->nid);
  566. return 0;
  567. }
  568. static void spu_destroy_sysdev(struct spu *spu)
  569. {
  570. sysdev_remove_file(&spu->sysdev, &attr_isrc);
  571. sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
  572. sysdev_unregister(&spu->sysdev);
  573. }
  574. static int __init create_spu(struct device_node *spe)
  575. {
  576. struct spu *spu;
  577. int ret;
  578. static int number;
  579. ret = -ENOMEM;
  580. spu = kmalloc(sizeof (*spu), GFP_KERNEL);
  581. if (!spu)
  582. goto out;
  583. ret = spu_map_device(spu, spe);
  584. if (ret)
  585. goto out_free;
  586. spu->node = find_spu_node_id(spe);
  587. spu->nid = of_node_to_nid(spe);
  588. if (spu->nid == -1)
  589. spu->nid = 0;
  590. spu->stop_code = 0;
  591. spu->slb_replace = 0;
  592. spu->mm = NULL;
  593. spu->ctx = NULL;
  594. spu->rq = NULL;
  595. spu->pid = 0;
  596. spu->class_0_pending = 0;
  597. spu->flags = 0UL;
  598. spu->dar = 0UL;
  599. spu->dsisr = 0UL;
  600. spin_lock_init(&spu->register_lock);
  601. spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
  602. spu_mfc_sr1_set(spu, 0x33);
  603. spu->ibox_callback = NULL;
  604. spu->wbox_callback = NULL;
  605. spu->stop_callback = NULL;
  606. spu->mfc_callback = NULL;
  607. mutex_lock(&spu_mutex);
  608. spu->number = number++;
  609. ret = spu_request_irqs(spu);
  610. if (ret)
  611. goto out_unmap;
  612. ret = spu_create_sysdev(spu);
  613. if (ret)
  614. goto out_free_irqs;
  615. list_add(&spu->list, &spu_list);
  616. mutex_unlock(&spu_mutex);
  617. pr_debug(KERN_DEBUG "Using SPE %s %02x %p %p %p %p %d\n",
  618. spu->name, spu->isrc, spu->local_store,
  619. spu->problem, spu->priv1, spu->priv2, spu->number);
  620. goto out;
  621. out_free_irqs:
  622. spu_free_irqs(spu);
  623. out_unmap:
  624. mutex_unlock(&spu_mutex);
  625. spu_unmap(spu);
  626. out_free:
  627. kfree(spu);
  628. out:
  629. return ret;
  630. }
  631. static void destroy_spu(struct spu *spu)
  632. {
  633. list_del_init(&spu->list);
  634. spu_destroy_sysdev(spu);
  635. spu_free_irqs(spu);
  636. spu_unmap(spu);
  637. kfree(spu);
  638. }
  639. static void cleanup_spu_base(void)
  640. {
  641. struct spu *spu, *tmp;
  642. mutex_lock(&spu_mutex);
  643. list_for_each_entry_safe(spu, tmp, &spu_list, list)
  644. destroy_spu(spu);
  645. mutex_unlock(&spu_mutex);
  646. sysdev_class_unregister(&spu_sysdev_class);
  647. }
  648. module_exit(cleanup_spu_base);
  649. static int __init init_spu_base(void)
  650. {
  651. struct device_node *node;
  652. int ret;
  653. /* create sysdev class for spus */
  654. ret = sysdev_class_register(&spu_sysdev_class);
  655. if (ret)
  656. return ret;
  657. ret = -ENODEV;
  658. for (node = of_find_node_by_type(NULL, "spe");
  659. node; node = of_find_node_by_type(node, "spe")) {
  660. ret = create_spu(node);
  661. if (ret) {
  662. printk(KERN_WARNING "%s: Error initializing %s\n",
  663. __FUNCTION__, node->name);
  664. cleanup_spu_base();
  665. break;
  666. }
  667. }
  668. /* in some old firmware versions, the spe is called 'spc', so we
  669. look for that as well */
  670. for (node = of_find_node_by_type(NULL, "spc");
  671. node; node = of_find_node_by_type(node, "spc")) {
  672. ret = create_spu(node);
  673. if (ret) {
  674. printk(KERN_WARNING "%s: Error initializing %s\n",
  675. __FUNCTION__, node->name);
  676. cleanup_spu_base();
  677. break;
  678. }
  679. }
  680. return ret;
  681. }
  682. module_init(init_spu_base);
  683. MODULE_LICENSE("GPL");
  684. MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");