regcache.c 10 KB

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  1. /*
  2. * Register cache access API
  3. *
  4. * Copyright 2011 Wolfson Microelectronics plc
  5. *
  6. * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/export.h>
  14. #include <trace/events/regmap.h>
  15. #include <linux/bsearch.h>
  16. #include <linux/sort.h>
  17. #include "internal.h"
  18. static const struct regcache_ops *cache_types[] = {
  19. &regcache_indexed_ops,
  20. &regcache_rbtree_ops,
  21. &regcache_lzo_ops,
  22. };
  23. static int regcache_hw_init(struct regmap *map)
  24. {
  25. int i, j;
  26. int ret;
  27. int count;
  28. unsigned int val;
  29. void *tmp_buf;
  30. if (!map->num_reg_defaults_raw)
  31. return -EINVAL;
  32. if (!map->reg_defaults_raw) {
  33. dev_warn(map->dev, "No cache defaults, reading back from HW\n");
  34. tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
  35. if (!tmp_buf)
  36. return -EINVAL;
  37. ret = regmap_bulk_read(map, 0, tmp_buf,
  38. map->num_reg_defaults_raw);
  39. if (ret < 0) {
  40. kfree(tmp_buf);
  41. return ret;
  42. }
  43. map->reg_defaults_raw = tmp_buf;
  44. map->cache_free = 1;
  45. }
  46. /* calculate the size of reg_defaults */
  47. for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
  48. val = regcache_get_val(map->reg_defaults_raw,
  49. i, map->cache_word_size);
  50. if (!val)
  51. continue;
  52. count++;
  53. }
  54. map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
  55. GFP_KERNEL);
  56. if (!map->reg_defaults) {
  57. ret = -ENOMEM;
  58. goto err_free;
  59. }
  60. /* fill the reg_defaults */
  61. map->num_reg_defaults = count;
  62. for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
  63. val = regcache_get_val(map->reg_defaults_raw,
  64. i, map->cache_word_size);
  65. if (!val)
  66. continue;
  67. map->reg_defaults[j].reg = i;
  68. map->reg_defaults[j].def = val;
  69. j++;
  70. }
  71. return 0;
  72. err_free:
  73. if (map->cache_free)
  74. kfree(map->reg_defaults_raw);
  75. return ret;
  76. }
  77. int regcache_init(struct regmap *map, const struct regmap_config *config)
  78. {
  79. int ret;
  80. int i;
  81. void *tmp_buf;
  82. if (map->cache_type == REGCACHE_NONE) {
  83. map->cache_bypass = true;
  84. return 0;
  85. }
  86. for (i = 0; i < ARRAY_SIZE(cache_types); i++)
  87. if (cache_types[i]->type == map->cache_type)
  88. break;
  89. if (i == ARRAY_SIZE(cache_types)) {
  90. dev_err(map->dev, "Could not match compress type: %d\n",
  91. map->cache_type);
  92. return -EINVAL;
  93. }
  94. map->num_reg_defaults = config->num_reg_defaults;
  95. map->num_reg_defaults_raw = config->num_reg_defaults_raw;
  96. map->reg_defaults_raw = config->reg_defaults_raw;
  97. map->cache_size_raw = (config->val_bits / 8) * config->num_reg_defaults_raw;
  98. map->cache_word_size = config->val_bits / 8;
  99. map->cache = NULL;
  100. map->cache_ops = cache_types[i];
  101. if (!map->cache_ops->read ||
  102. !map->cache_ops->write ||
  103. !map->cache_ops->name)
  104. return -EINVAL;
  105. /* We still need to ensure that the reg_defaults
  106. * won't vanish from under us. We'll need to make
  107. * a copy of it.
  108. */
  109. if (config->reg_defaults) {
  110. if (!map->num_reg_defaults)
  111. return -EINVAL;
  112. tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
  113. sizeof(struct reg_default), GFP_KERNEL);
  114. if (!tmp_buf)
  115. return -ENOMEM;
  116. map->reg_defaults = tmp_buf;
  117. } else if (map->num_reg_defaults_raw) {
  118. /* Some devices such as PMICs don't have cache defaults,
  119. * we cope with this by reading back the HW registers and
  120. * crafting the cache defaults by hand.
  121. */
  122. ret = regcache_hw_init(map);
  123. if (ret < 0)
  124. return ret;
  125. }
  126. if (!map->max_register)
  127. map->max_register = map->num_reg_defaults_raw;
  128. if (map->cache_ops->init) {
  129. dev_dbg(map->dev, "Initializing %s cache\n",
  130. map->cache_ops->name);
  131. ret = map->cache_ops->init(map);
  132. if (ret)
  133. goto err_free;
  134. }
  135. return 0;
  136. err_free:
  137. kfree(map->reg_defaults);
  138. if (map->cache_free)
  139. kfree(map->reg_defaults_raw);
  140. return ret;
  141. }
  142. void regcache_exit(struct regmap *map)
  143. {
  144. if (map->cache_type == REGCACHE_NONE)
  145. return;
  146. BUG_ON(!map->cache_ops);
  147. kfree(map->reg_defaults);
  148. if (map->cache_free)
  149. kfree(map->reg_defaults_raw);
  150. if (map->cache_ops->exit) {
  151. dev_dbg(map->dev, "Destroying %s cache\n",
  152. map->cache_ops->name);
  153. map->cache_ops->exit(map);
  154. }
  155. }
  156. /**
  157. * regcache_read: Fetch the value of a given register from the cache.
  158. *
  159. * @map: map to configure.
  160. * @reg: The register index.
  161. * @value: The value to be returned.
  162. *
  163. * Return a negative value on failure, 0 on success.
  164. */
  165. int regcache_read(struct regmap *map,
  166. unsigned int reg, unsigned int *value)
  167. {
  168. if (map->cache_type == REGCACHE_NONE)
  169. return -ENOSYS;
  170. BUG_ON(!map->cache_ops);
  171. if (!regmap_readable(map, reg))
  172. return -EIO;
  173. if (!regmap_volatile(map, reg))
  174. return map->cache_ops->read(map, reg, value);
  175. return -EINVAL;
  176. }
  177. EXPORT_SYMBOL_GPL(regcache_read);
  178. /**
  179. * regcache_write: Set the value of a given register in the cache.
  180. *
  181. * @map: map to configure.
  182. * @reg: The register index.
  183. * @value: The new register value.
  184. *
  185. * Return a negative value on failure, 0 on success.
  186. */
  187. int regcache_write(struct regmap *map,
  188. unsigned int reg, unsigned int value)
  189. {
  190. if (map->cache_type == REGCACHE_NONE)
  191. return 0;
  192. BUG_ON(!map->cache_ops);
  193. if (!regmap_writeable(map, reg))
  194. return -EIO;
  195. if (!regmap_volatile(map, reg))
  196. return map->cache_ops->write(map, reg, value);
  197. return 0;
  198. }
  199. EXPORT_SYMBOL_GPL(regcache_write);
  200. /**
  201. * regcache_sync: Sync the register cache with the hardware.
  202. *
  203. * @map: map to configure.
  204. *
  205. * Any registers that should not be synced should be marked as
  206. * volatile. In general drivers can choose not to use the provided
  207. * syncing functionality if they so require.
  208. *
  209. * Return a negative value on failure, 0 on success.
  210. */
  211. int regcache_sync(struct regmap *map)
  212. {
  213. int ret = 0;
  214. unsigned int val;
  215. unsigned int i;
  216. const char *name;
  217. unsigned int bypass;
  218. BUG_ON(!map->cache_ops);
  219. mutex_lock(&map->lock);
  220. /* Remember the initial bypass state */
  221. bypass = map->cache_bypass;
  222. dev_dbg(map->dev, "Syncing %s cache\n",
  223. map->cache_ops->name);
  224. name = map->cache_ops->name;
  225. trace_regcache_sync(map->dev, name, "start");
  226. if (!map->cache_dirty)
  227. goto out;
  228. if (map->cache_ops->sync) {
  229. ret = map->cache_ops->sync(map);
  230. } else {
  231. for (i = 0; i < map->num_reg_defaults; i++) {
  232. ret = regcache_read(map, i, &val);
  233. if (ret < 0)
  234. goto out;
  235. map->cache_bypass = 1;
  236. ret = _regmap_write(map, i, val);
  237. map->cache_bypass = 0;
  238. if (ret < 0)
  239. goto out;
  240. dev_dbg(map->dev, "Synced register %#x, value %#x\n",
  241. map->reg_defaults[i].reg,
  242. map->reg_defaults[i].def);
  243. }
  244. }
  245. out:
  246. trace_regcache_sync(map->dev, name, "stop");
  247. /* Restore the bypass state */
  248. map->cache_bypass = bypass;
  249. mutex_unlock(&map->lock);
  250. return ret;
  251. }
  252. EXPORT_SYMBOL_GPL(regcache_sync);
  253. /**
  254. * regcache_cache_only: Put a register map into cache only mode
  255. *
  256. * @map: map to configure
  257. * @cache_only: flag if changes should be written to the hardware
  258. *
  259. * When a register map is marked as cache only writes to the register
  260. * map API will only update the register cache, they will not cause
  261. * any hardware changes. This is useful for allowing portions of
  262. * drivers to act as though the device were functioning as normal when
  263. * it is disabled for power saving reasons.
  264. */
  265. void regcache_cache_only(struct regmap *map, bool enable)
  266. {
  267. mutex_lock(&map->lock);
  268. WARN_ON(map->cache_bypass && enable);
  269. map->cache_only = enable;
  270. mutex_unlock(&map->lock);
  271. }
  272. EXPORT_SYMBOL_GPL(regcache_cache_only);
  273. /**
  274. * regcache_mark_dirty: Mark the register cache as dirty
  275. *
  276. * @map: map to mark
  277. *
  278. * Mark the register cache as dirty, for example due to the device
  279. * having been powered down for suspend. If the cache is not marked
  280. * as dirty then the cache sync will be suppressed.
  281. */
  282. void regcache_mark_dirty(struct regmap *map)
  283. {
  284. mutex_lock(&map->lock);
  285. map->cache_dirty = true;
  286. mutex_unlock(&map->lock);
  287. }
  288. EXPORT_SYMBOL_GPL(regcache_mark_dirty);
  289. /**
  290. * regcache_cache_bypass: Put a register map into cache bypass mode
  291. *
  292. * @map: map to configure
  293. * @cache_bypass: flag if changes should not be written to the hardware
  294. *
  295. * When a register map is marked with the cache bypass option, writes
  296. * to the register map API will only update the hardware and not the
  297. * the cache directly. This is useful when syncing the cache back to
  298. * the hardware.
  299. */
  300. void regcache_cache_bypass(struct regmap *map, bool enable)
  301. {
  302. mutex_lock(&map->lock);
  303. WARN_ON(map->cache_only && enable);
  304. map->cache_bypass = enable;
  305. mutex_unlock(&map->lock);
  306. }
  307. EXPORT_SYMBOL_GPL(regcache_cache_bypass);
  308. bool regcache_set_val(void *base, unsigned int idx,
  309. unsigned int val, unsigned int word_size)
  310. {
  311. switch (word_size) {
  312. case 1: {
  313. u8 *cache = base;
  314. if (cache[idx] == val)
  315. return true;
  316. cache[idx] = val;
  317. break;
  318. }
  319. case 2: {
  320. u16 *cache = base;
  321. if (cache[idx] == val)
  322. return true;
  323. cache[idx] = val;
  324. break;
  325. }
  326. default:
  327. BUG();
  328. }
  329. /* unreachable */
  330. return false;
  331. }
  332. unsigned int regcache_get_val(const void *base, unsigned int idx,
  333. unsigned int word_size)
  334. {
  335. if (!base)
  336. return -EINVAL;
  337. switch (word_size) {
  338. case 1: {
  339. const u8 *cache = base;
  340. return cache[idx];
  341. }
  342. case 2: {
  343. const u16 *cache = base;
  344. return cache[idx];
  345. }
  346. default:
  347. BUG();
  348. }
  349. /* unreachable */
  350. return -1;
  351. }
  352. static int regcache_default_cmp(const void *a, const void *b)
  353. {
  354. const struct reg_default *_a = a;
  355. const struct reg_default *_b = b;
  356. return _a->reg - _b->reg;
  357. }
  358. int regcache_lookup_reg(struct regmap *map, unsigned int reg)
  359. {
  360. struct reg_default key;
  361. struct reg_default *r;
  362. key.reg = reg;
  363. key.def = 0;
  364. r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
  365. sizeof(struct reg_default), regcache_default_cmp);
  366. if (r)
  367. return r - map->reg_defaults;
  368. else
  369. return -ENOENT;
  370. }
  371. int regcache_insert_reg(struct regmap *map, unsigned int reg,
  372. unsigned int val)
  373. {
  374. void *tmp;
  375. tmp = krealloc(map->reg_defaults,
  376. (map->num_reg_defaults + 1) * sizeof(struct reg_default),
  377. GFP_KERNEL);
  378. if (!tmp)
  379. return -ENOMEM;
  380. map->reg_defaults = tmp;
  381. map->num_reg_defaults++;
  382. map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
  383. map->reg_defaults[map->num_reg_defaults - 1].def = val;
  384. sort(map->reg_defaults, map->num_reg_defaults,
  385. sizeof(struct reg_default), regcache_default_cmp, NULL);
  386. return 0;
  387. }