exynos5440.dtsi 3.8 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. clock: clock-controller@0x160000 {
  16. compatible = "samsung,exynos5440-clock";
  17. reg = <0x160000 0x1000>;
  18. #clock-cells = <1>;
  19. };
  20. gic:interrupt-controller@2E0000 {
  21. compatible = "arm,cortex-a15-gic";
  22. #interrupt-cells = <3>;
  23. interrupt-controller;
  24. reg = <0x2E1000 0x1000>,
  25. <0x2E2000 0x1000>,
  26. <0x2E4000 0x2000>,
  27. <0x2E6000 0x2000>;
  28. interrupts = <1 9 0xf04>;
  29. };
  30. cpus {
  31. #address-cells = <1>;
  32. #size-cells = <0>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a15";
  35. reg = <0>;
  36. };
  37. cpu@1 {
  38. compatible = "arm,cortex-a15";
  39. reg = <1>;
  40. };
  41. cpu@2 {
  42. compatible = "arm,cortex-a15";
  43. reg = <2>;
  44. };
  45. cpu@3 {
  46. compatible = "arm,cortex-a15";
  47. reg = <3>;
  48. };
  49. };
  50. timer {
  51. compatible = "arm,cortex-a15-timer",
  52. "arm,armv7-timer";
  53. interrupts = <1 13 0xf08>,
  54. <1 14 0xf08>,
  55. <1 11 0xf08>,
  56. <1 10 0xf08>;
  57. clock-frequency = <50000000>;
  58. };
  59. serial@B0000 {
  60. compatible = "samsung,exynos4210-uart";
  61. reg = <0xB0000 0x1000>;
  62. interrupts = <0 2 0>;
  63. clocks = <&clock 21>, <&clock 21>;
  64. clock-names = "uart", "clk_uart_baud0";
  65. };
  66. serial@C0000 {
  67. compatible = "samsung,exynos4210-uart";
  68. reg = <0xC0000 0x1000>;
  69. interrupts = <0 3 0>;
  70. clocks = <&clock 21>, <&clock 21>;
  71. clock-names = "uart", "clk_uart_baud0";
  72. };
  73. spi {
  74. compatible = "samsung,exynos4210-spi";
  75. reg = <0xD0000 0x1000>;
  76. interrupts = <0 4 0>;
  77. tx-dma-channel = <&pdma0 5>; /* preliminary */
  78. rx-dma-channel = <&pdma0 4>; /* preliminary */
  79. #address-cells = <1>;
  80. #size-cells = <0>;
  81. clocks = <&clock 21>, <&clock 16>;
  82. clock-names = "spi", "spi_busclk0";
  83. };
  84. pinctrl {
  85. compatible = "samsung,exynos5440-pinctrl";
  86. reg = <0xE0000 0x1000>;
  87. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
  88. <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
  89. interrupt-controller;
  90. #interrupt-cells = <2>;
  91. #gpio-cells = <2>;
  92. fan: fan {
  93. samsung,exynos5440-pin-function = <1>;
  94. };
  95. hdd_led0: hdd_led0 {
  96. samsung,exynos5440-pin-function = <2>;
  97. };
  98. hdd_led1: hdd_led1 {
  99. samsung,exynos5440-pin-function = <3>;
  100. };
  101. uart1: uart1 {
  102. samsung,exynos5440-pin-function = <4>;
  103. };
  104. };
  105. i2c@F0000 {
  106. compatible = "samsung,exynos5440-i2c";
  107. reg = <0xF0000 0x1000>;
  108. interrupts = <0 5 0>;
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. clocks = <&clock 21>;
  112. clock-names = "i2c";
  113. };
  114. i2c@100000 {
  115. compatible = "samsung,exynos5440-i2c";
  116. reg = <0x100000 0x1000>;
  117. interrupts = <0 6 0>;
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. clocks = <&clock 21>;
  121. clock-names = "i2c";
  122. };
  123. watchdog {
  124. compatible = "samsung,s3c2410-wdt";
  125. reg = <0x110000 0x1000>;
  126. interrupts = <0 1 0>;
  127. clocks = <&clock 21>;
  128. clock-names = "watchdog";
  129. };
  130. amba {
  131. #address-cells = <1>;
  132. #size-cells = <1>;
  133. compatible = "arm,amba-bus";
  134. interrupt-parent = <&gic>;
  135. ranges;
  136. pdma0: pdma@121A0000 {
  137. compatible = "arm,pl330", "arm,primecell";
  138. reg = <0x120000 0x1000>;
  139. interrupts = <0 34 0>;
  140. clocks = <&clock 21>;
  141. clock-names = "apb_pclk";
  142. #dma-cells = <1>;
  143. #dma-channels = <8>;
  144. #dma-requests = <32>;
  145. };
  146. pdma1: pdma@121B0000 {
  147. compatible = "arm,pl330", "arm,primecell";
  148. reg = <0x121000 0x1000>;
  149. interrupts = <0 35 0>;
  150. clocks = <&clock 21>;
  151. clock-names = "apb_pclk";
  152. #dma-cells = <1>;
  153. #dma-channels = <8>;
  154. #dma-requests = <32>;
  155. };
  156. };
  157. rtc {
  158. compatible = "samsung,s3c6410-rtc";
  159. reg = <0x130000 0x1000>;
  160. interrupts = <0 17 0>, <0 16 0>;
  161. clocks = <&clock 21>;
  162. clock-names = "rtc";
  163. };
  164. };