sun4d_irq.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601
  1. /*
  2. * arch/sparc/kernel/sun4d_irq.c:
  3. * SS1000/SC2000 interrupt handling.
  4. *
  5. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. * Heavily based on arch/sparc/kernel/irq.c.
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/linkage.h>
  10. #include <linux/kernel_stat.h>
  11. #include <linux/signal.h>
  12. #include <linux/sched.h>
  13. #include <linux/ptrace.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/slab.h>
  16. #include <linux/random.h>
  17. #include <linux/init.h>
  18. #include <linux/smp.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/seq_file.h>
  21. #include <asm/ptrace.h>
  22. #include <asm/processor.h>
  23. #include <asm/system.h>
  24. #include <asm/psr.h>
  25. #include <asm/smp.h>
  26. #include <asm/vaddrs.h>
  27. #include <asm/timer.h>
  28. #include <asm/openprom.h>
  29. #include <asm/oplib.h>
  30. #include <asm/traps.h>
  31. #include <asm/irq.h>
  32. #include <asm/io.h>
  33. #include <asm/pgalloc.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/sbus.h>
  36. #include <asm/sbi.h>
  37. #include <asm/cacheflush.h>
  38. #include <asm/irq_regs.h>
  39. #include "irq.h"
  40. /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
  41. /* #define DISTRIBUTE_IRQS */
  42. struct sun4d_timer_regs *sun4d_timers;
  43. #define TIMER_IRQ 10
  44. #define MAX_STATIC_ALLOC 4
  45. extern struct irqaction static_irqaction[MAX_STATIC_ALLOC];
  46. extern int static_irq_count;
  47. unsigned char cpu_leds[32];
  48. #ifdef CONFIG_SMP
  49. static unsigned char sbus_tid[32];
  50. #endif
  51. static struct irqaction *irq_action[NR_IRQS];
  52. extern spinlock_t irq_action_lock;
  53. static struct sbus_action {
  54. struct irqaction *action;
  55. /* For SMP this needs to be extended */
  56. } *sbus_actions;
  57. static int pil_to_sbus[] = {
  58. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  59. };
  60. static int sbus_to_pil[] = {
  61. 0, 2, 3, 5, 7, 9, 11, 13,
  62. };
  63. static int nsbi;
  64. #ifdef CONFIG_SMP
  65. DEFINE_SPINLOCK(sun4d_imsk_lock);
  66. #endif
  67. int show_sun4d_interrupts(struct seq_file *p, void *v)
  68. {
  69. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  70. struct irqaction * action;
  71. unsigned long flags;
  72. #ifdef CONFIG_SMP
  73. int x;
  74. #endif
  75. spin_lock_irqsave(&irq_action_lock, flags);
  76. if (i < NR_IRQS) {
  77. sbusl = pil_to_sbus[i];
  78. if (!sbusl) {
  79. action = *(i + irq_action);
  80. if (!action)
  81. goto out_unlock;
  82. } else {
  83. for (j = 0; j < nsbi; j++) {
  84. for (k = 0; k < 4; k++)
  85. if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action))
  86. goto found_it;
  87. }
  88. goto out_unlock;
  89. }
  90. found_it: seq_printf(p, "%3d: ", i);
  91. #ifndef CONFIG_SMP
  92. seq_printf(p, "%10u ", kstat_irqs(i));
  93. #else
  94. for_each_online_cpu(x)
  95. seq_printf(p, "%10u ",
  96. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  97. #endif
  98. seq_printf(p, "%c %s",
  99. (action->flags & IRQF_DISABLED) ? '+' : ' ',
  100. action->name);
  101. action = action->next;
  102. for (;;) {
  103. for (; action; action = action->next) {
  104. seq_printf(p, ",%s %s",
  105. (action->flags & IRQF_DISABLED) ? " +" : "",
  106. action->name);
  107. }
  108. if (!sbusl) break;
  109. k++;
  110. if (k < 4)
  111. action = sbus_actions [(j << 5) + (sbusl << 2) + k].action;
  112. else {
  113. j++;
  114. if (j == nsbi) break;
  115. k = 0;
  116. action = sbus_actions [(j << 5) + (sbusl << 2)].action;
  117. }
  118. }
  119. seq_putc(p, '\n');
  120. }
  121. out_unlock:
  122. spin_unlock_irqrestore(&irq_action_lock, flags);
  123. return 0;
  124. }
  125. void sun4d_free_irq(unsigned int irq, void *dev_id)
  126. {
  127. struct irqaction *action, **actionp;
  128. struct irqaction *tmp = NULL;
  129. unsigned long flags;
  130. spin_lock_irqsave(&irq_action_lock, flags);
  131. if (irq < 15)
  132. actionp = irq + irq_action;
  133. else
  134. actionp = &(sbus_actions[irq - (1 << 5)].action);
  135. action = *actionp;
  136. if (!action) {
  137. printk("Trying to free free IRQ%d\n",irq);
  138. goto out_unlock;
  139. }
  140. if (dev_id) {
  141. for (; action; action = action->next) {
  142. if (action->dev_id == dev_id)
  143. break;
  144. tmp = action;
  145. }
  146. if (!action) {
  147. printk("Trying to free free shared IRQ%d\n",irq);
  148. goto out_unlock;
  149. }
  150. } else if (action->flags & IRQF_SHARED) {
  151. printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
  152. goto out_unlock;
  153. }
  154. if (action->flags & SA_STATIC_ALLOC)
  155. {
  156. /* This interrupt is marked as specially allocated
  157. * so it is a bad idea to free it.
  158. */
  159. printk("Attempt to free statically allocated IRQ%d (%s)\n",
  160. irq, action->name);
  161. goto out_unlock;
  162. }
  163. if (action && tmp)
  164. tmp->next = action->next;
  165. else
  166. *actionp = action->next;
  167. spin_unlock_irqrestore(&irq_action_lock, flags);
  168. synchronize_irq(irq);
  169. spin_lock_irqsave(&irq_action_lock, flags);
  170. kfree(action);
  171. if (!(*actionp))
  172. __disable_irq(irq);
  173. out_unlock:
  174. spin_unlock_irqrestore(&irq_action_lock, flags);
  175. }
  176. extern void unexpected_irq(int, void *, struct pt_regs *);
  177. void sun4d_handler_irq(int irq, struct pt_regs * regs)
  178. {
  179. struct pt_regs *old_regs;
  180. struct irqaction * action;
  181. int cpu = smp_processor_id();
  182. /* SBUS IRQ level (1 - 7) */
  183. int sbusl = pil_to_sbus[irq];
  184. /* FIXME: Is this necessary?? */
  185. cc_get_ipen();
  186. cc_set_iclr(1 << irq);
  187. old_regs = set_irq_regs(regs);
  188. irq_enter();
  189. kstat_cpu(cpu).irqs[irq]++;
  190. if (!sbusl) {
  191. action = *(irq + irq_action);
  192. if (!action)
  193. unexpected_irq(irq, NULL, regs);
  194. do {
  195. action->handler(irq, action->dev_id);
  196. action = action->next;
  197. } while (action);
  198. } else {
  199. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  200. int sbino;
  201. struct sbus_action *actionp;
  202. unsigned mask, slot;
  203. int sbil = (sbusl << 2);
  204. bw_clear_intr_mask(sbusl, bus_mask);
  205. /* Loop for each pending SBI */
  206. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  207. if (bus_mask & 1) {
  208. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  209. mask &= (0xf << sbil);
  210. actionp = sbus_actions + (sbino << 5) + (sbil);
  211. /* Loop for each pending SBI slot */
  212. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  213. if (mask & slot) {
  214. mask &= ~slot;
  215. action = actionp->action;
  216. if (!action)
  217. unexpected_irq(irq, NULL, regs);
  218. do {
  219. action->handler(irq, action->dev_id);
  220. action = action->next;
  221. } while (action);
  222. release_sbi(SBI2DEVID(sbino), slot);
  223. }
  224. }
  225. }
  226. irq_exit();
  227. set_irq_regs(old_regs);
  228. }
  229. unsigned int sun4d_build_irq(struct sbus_dev *sdev, int irq)
  230. {
  231. int sbusl = pil_to_sbus[irq];
  232. if (sbusl)
  233. return ((sdev->bus->board + 1) << 5) + (sbusl << 2) + sdev->slot;
  234. else
  235. return irq;
  236. }
  237. static unsigned int sun4d_sbint_to_irq(struct sbus_dev *sdev,
  238. unsigned int sbint)
  239. {
  240. if (sbint >= sizeof(sbus_to_pil)) {
  241. printk(KERN_ERR "%s: bogus SBINT %d\n", sdev->prom_name, sbint);
  242. BUG();
  243. }
  244. return sun4d_build_irq(sdev, sbus_to_pil[sbint]);
  245. }
  246. int sun4d_request_irq(unsigned int irq,
  247. irq_handler_t handler,
  248. unsigned long irqflags, const char * devname, void *dev_id)
  249. {
  250. struct irqaction *action, *tmp = NULL, **actionp;
  251. unsigned long flags;
  252. int ret;
  253. if(irq > 14 && irq < (1 << 5)) {
  254. ret = -EINVAL;
  255. goto out;
  256. }
  257. if (!handler) {
  258. ret = -EINVAL;
  259. goto out;
  260. }
  261. spin_lock_irqsave(&irq_action_lock, flags);
  262. if (irq >= (1 << 5))
  263. actionp = &(sbus_actions[irq - (1 << 5)].action);
  264. else
  265. actionp = irq + irq_action;
  266. action = *actionp;
  267. if (action) {
  268. if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
  269. for (tmp = action; tmp->next; tmp = tmp->next);
  270. } else {
  271. ret = -EBUSY;
  272. goto out_unlock;
  273. }
  274. if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
  275. printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
  276. ret = -EBUSY;
  277. goto out_unlock;
  278. }
  279. action = NULL; /* Or else! */
  280. }
  281. /* If this is flagged as statically allocated then we use our
  282. * private struct which is never freed.
  283. */
  284. if (irqflags & SA_STATIC_ALLOC) {
  285. if (static_irq_count < MAX_STATIC_ALLOC)
  286. action = &static_irqaction[static_irq_count++];
  287. else
  288. printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
  289. }
  290. if (action == NULL)
  291. action = kmalloc(sizeof(struct irqaction),
  292. GFP_ATOMIC);
  293. if (!action) {
  294. ret = -ENOMEM;
  295. goto out_unlock;
  296. }
  297. action->handler = handler;
  298. action->flags = irqflags;
  299. cpus_clear(action->mask);
  300. action->name = devname;
  301. action->next = NULL;
  302. action->dev_id = dev_id;
  303. if (tmp)
  304. tmp->next = action;
  305. else
  306. *actionp = action;
  307. __enable_irq(irq);
  308. ret = 0;
  309. out_unlock:
  310. spin_unlock_irqrestore(&irq_action_lock, flags);
  311. out:
  312. return ret;
  313. }
  314. static void sun4d_disable_irq(unsigned int irq)
  315. {
  316. #ifdef CONFIG_SMP
  317. int tid = sbus_tid[(irq >> 5) - 1];
  318. unsigned long flags;
  319. #endif
  320. if (irq < NR_IRQS) return;
  321. #ifdef CONFIG_SMP
  322. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  323. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  324. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  325. #else
  326. cc_set_imsk(cc_get_imsk() | (1 << sbus_to_pil[(irq >> 2) & 7]));
  327. #endif
  328. }
  329. static void sun4d_enable_irq(unsigned int irq)
  330. {
  331. #ifdef CONFIG_SMP
  332. int tid = sbus_tid[(irq >> 5) - 1];
  333. unsigned long flags;
  334. #endif
  335. if (irq < NR_IRQS) return;
  336. #ifdef CONFIG_SMP
  337. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  338. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  339. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  340. #else
  341. cc_set_imsk(cc_get_imsk() & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  342. #endif
  343. }
  344. #ifdef CONFIG_SMP
  345. static void sun4d_set_cpu_int(int cpu, int level)
  346. {
  347. sun4d_send_ipi(cpu, level);
  348. }
  349. static void sun4d_clear_ipi(int cpu, int level)
  350. {
  351. }
  352. static void sun4d_set_udt(int cpu)
  353. {
  354. }
  355. /* Setup IRQ distribution scheme. */
  356. void __init sun4d_distribute_irqs(void)
  357. {
  358. struct device_node *dp;
  359. #ifdef DISTRIBUTE_IRQS
  360. cpumask_t sbus_serving_map;
  361. sbus_serving_map = cpu_present_map;
  362. for_each_node_by_name(dp, "sbi") {
  363. int board = of_getintprop_default(dp, "board#", 0);
  364. if ((board * 2) == boot_cpu_id && cpu_isset(board * 2 + 1, cpu_present_map))
  365. sbus_tid[board] = (board * 2 + 1);
  366. else if (cpu_isset(board * 2, cpu_present_map))
  367. sbus_tid[board] = (board * 2);
  368. else if (cpu_isset(board * 2 + 1, cpu_present_map))
  369. sbus_tid[board] = (board * 2 + 1);
  370. else
  371. sbus_tid[board] = 0xff;
  372. if (sbus_tid[board] != 0xff)
  373. cpu_clear(sbus_tid[board], sbus_serving_map);
  374. }
  375. for_each_node_by_name(dp, "sbi") {
  376. int board = of_getintprop_default(dp, "board#", 0);
  377. if (sbus_tid[board] == 0xff) {
  378. int i = 31;
  379. if (cpus_empty(sbus_serving_map))
  380. sbus_serving_map = cpu_present_map;
  381. while (cpu_isset(i, sbus_serving_map))
  382. i--;
  383. sbus_tid[board] = i;
  384. cpu_clear(i, sbus_serving_map);
  385. }
  386. }
  387. for_each_node_by_name(dp, "sbi") {
  388. int devid = of_getintprop_default(dp, "device-id", 0);
  389. int board = of_getintprop_default(dp, "board#", 0);
  390. printk("sbus%d IRQs directed to CPU%d\n", board, sbus_tid[board]);
  391. set_sbi_tid(devid, sbus_tid[board] << 3);
  392. }
  393. #else
  394. int cpuid = cpu_logical_map(1);
  395. if (cpuid == -1)
  396. cpuid = cpu_logical_map(0);
  397. for_each_node_by_name(dp, "sbi") {
  398. int devid = of_getintprop_default(dp, "device-id", 0);
  399. int board = of_getintprop_default(dp, "board#", 0);
  400. sbus_tid[board] = cpuid;
  401. set_sbi_tid(devid, cpuid << 3);
  402. }
  403. printk("All sbus IRQs directed to CPU%d\n", cpuid);
  404. #endif
  405. }
  406. #endif
  407. static void sun4d_clear_clock_irq(void)
  408. {
  409. volatile unsigned int clear_intr;
  410. clear_intr = sun4d_timers->l10_timer_limit;
  411. }
  412. static void sun4d_clear_profile_irq(int cpu)
  413. {
  414. bw_get_prof_limit(cpu);
  415. }
  416. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  417. {
  418. bw_set_prof_limit(cpu, limit);
  419. }
  420. static void __init sun4d_init_timers(irq_handler_t counter_fn)
  421. {
  422. int irq;
  423. int cpu;
  424. struct resource r;
  425. int mid;
  426. /* Map the User Timer registers. */
  427. memset(&r, 0, sizeof(r));
  428. #ifdef CONFIG_SMP
  429. r.start = CSR_BASE(boot_cpu_id)+BW_TIMER_LIMIT;
  430. #else
  431. r.start = CSR_BASE(0)+BW_TIMER_LIMIT;
  432. #endif
  433. r.flags = 0xf;
  434. sun4d_timers = (struct sun4d_timer_regs *) sbus_ioremap(&r, 0,
  435. PAGE_SIZE, "user timer");
  436. sun4d_timers->l10_timer_limit = (((1000000/HZ) + 1) << 10);
  437. master_l10_counter = &sun4d_timers->l10_cur_count;
  438. master_l10_limit = &sun4d_timers->l10_timer_limit;
  439. irq = request_irq(TIMER_IRQ,
  440. counter_fn,
  441. (IRQF_DISABLED | SA_STATIC_ALLOC),
  442. "timer", NULL);
  443. if (irq) {
  444. prom_printf("time_init: unable to attach IRQ%d\n",TIMER_IRQ);
  445. prom_halt();
  446. }
  447. /* Enable user timer free run for CPU 0 in BW */
  448. /* bw_set_ctrl(0, bw_get_ctrl(0) | BW_CTRL_USER_TIMER); */
  449. cpu = 0;
  450. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  451. sun4d_load_profile_irq(mid >> 3, 0);
  452. cpu++;
  453. }
  454. #ifdef CONFIG_SMP
  455. {
  456. unsigned long flags;
  457. extern unsigned long lvl14_save[4];
  458. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  459. extern unsigned int real_irq_entry[], smp4d_ticker[];
  460. extern unsigned int patchme_maybe_smp_msg[];
  461. /* Adjust so that we jump directly to smp4d_ticker */
  462. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  463. /* For SMP we use the level 14 ticker, however the bootup code
  464. * has copied the firmware's level 14 vector into the boot cpu's
  465. * trap table, we must fix this now or we get squashed.
  466. */
  467. local_irq_save(flags);
  468. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  469. trap_table->inst_one = lvl14_save[0];
  470. trap_table->inst_two = lvl14_save[1];
  471. trap_table->inst_three = lvl14_save[2];
  472. trap_table->inst_four = lvl14_save[3];
  473. local_flush_cache_all();
  474. local_irq_restore(flags);
  475. }
  476. #endif
  477. }
  478. void __init sun4d_init_sbi_irq(void)
  479. {
  480. struct device_node *dp;
  481. nsbi = 0;
  482. for_each_node_by_name(dp, "sbi")
  483. nsbi++;
  484. sbus_actions = kzalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  485. if (!sbus_actions) {
  486. prom_printf("SUN4D: Cannot allocate sbus_actions, halting.\n");
  487. prom_halt();
  488. }
  489. for_each_node_by_name(dp, "sbi") {
  490. int devid = of_getintprop_default(dp, "device-id", 0);
  491. int board = of_getintprop_default(dp, "board#", 0);
  492. unsigned int mask;
  493. #ifdef CONFIG_SMP
  494. {
  495. extern unsigned char boot_cpu_id;
  496. set_sbi_tid(devid, boot_cpu_id << 3);
  497. sbus_tid[board] = boot_cpu_id;
  498. }
  499. #endif
  500. /* Get rid of pending irqs from PROM */
  501. mask = acquire_sbi(devid, 0xffffffff);
  502. if (mask) {
  503. printk ("Clearing pending IRQs %08x on SBI %d\n", mask, board);
  504. release_sbi(devid, mask);
  505. }
  506. }
  507. }
  508. void __init sun4d_init_IRQ(void)
  509. {
  510. local_irq_disable();
  511. BTFIXUPSET_CALL(sbint_to_irq, sun4d_sbint_to_irq, BTFIXUPCALL_NORM);
  512. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  513. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  514. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  515. BTFIXUPSET_CALL(clear_profile_irq, sun4d_clear_profile_irq, BTFIXUPCALL_NORM);
  516. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  517. sparc_init_timers = sun4d_init_timers;
  518. #ifdef CONFIG_SMP
  519. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  520. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  521. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  522. #endif
  523. /* Cannot enable interrupts until OBP ticker is disabled. */
  524. }