x86.c 80 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. *
  8. * Authors:
  9. * Avi Kivity <avi@qumranet.com>
  10. * Yaniv Kamay <yaniv@qumranet.com>
  11. *
  12. * This work is licensed under the terms of the GNU GPL, version 2. See
  13. * the COPYING file in the top-level directory.
  14. *
  15. */
  16. #include <linux/kvm_host.h>
  17. #include "irq.h"
  18. #include "mmu.h"
  19. #include <linux/clocksource.h>
  20. #include <linux/kvm.h>
  21. #include <linux/fs.h>
  22. #include <linux/vmalloc.h>
  23. #include <linux/module.h>
  24. #include <linux/mman.h>
  25. #include <linux/highmem.h>
  26. #include <asm/uaccess.h>
  27. #include <asm/msr.h>
  28. #include <asm/desc.h>
  29. #define MAX_IO_MSRS 256
  30. #define CR0_RESERVED_BITS \
  31. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  32. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  33. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  34. #define CR4_RESERVED_BITS \
  35. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  36. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  37. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  38. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  39. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  40. /* EFER defaults:
  41. * - enable syscall per default because its emulated by KVM
  42. * - enable LME and LMA per default on 64 bit KVM
  43. */
  44. #ifdef CONFIG_X86_64
  45. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  46. #else
  47. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  48. #endif
  49. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  50. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  51. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  52. struct kvm_cpuid_entry2 __user *entries);
  53. struct kvm_x86_ops *kvm_x86_ops;
  54. struct kvm_stats_debugfs_item debugfs_entries[] = {
  55. { "pf_fixed", VCPU_STAT(pf_fixed) },
  56. { "pf_guest", VCPU_STAT(pf_guest) },
  57. { "tlb_flush", VCPU_STAT(tlb_flush) },
  58. { "invlpg", VCPU_STAT(invlpg) },
  59. { "exits", VCPU_STAT(exits) },
  60. { "io_exits", VCPU_STAT(io_exits) },
  61. { "mmio_exits", VCPU_STAT(mmio_exits) },
  62. { "signal_exits", VCPU_STAT(signal_exits) },
  63. { "irq_window", VCPU_STAT(irq_window_exits) },
  64. { "halt_exits", VCPU_STAT(halt_exits) },
  65. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  66. { "hypercalls", VCPU_STAT(hypercalls) },
  67. { "request_irq", VCPU_STAT(request_irq_exits) },
  68. { "irq_exits", VCPU_STAT(irq_exits) },
  69. { "host_state_reload", VCPU_STAT(host_state_reload) },
  70. { "efer_reload", VCPU_STAT(efer_reload) },
  71. { "fpu_reload", VCPU_STAT(fpu_reload) },
  72. { "insn_emulation", VCPU_STAT(insn_emulation) },
  73. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  74. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  75. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  76. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  77. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  78. { "mmu_flooded", VM_STAT(mmu_flooded) },
  79. { "mmu_recycled", VM_STAT(mmu_recycled) },
  80. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  81. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  82. { "largepages", VM_STAT(lpages) },
  83. { NULL }
  84. };
  85. unsigned long segment_base(u16 selector)
  86. {
  87. struct descriptor_table gdt;
  88. struct desc_struct *d;
  89. unsigned long table_base;
  90. unsigned long v;
  91. if (selector == 0)
  92. return 0;
  93. asm("sgdt %0" : "=m"(gdt));
  94. table_base = gdt.base;
  95. if (selector & 4) { /* from ldt */
  96. u16 ldt_selector;
  97. asm("sldt %0" : "=g"(ldt_selector));
  98. table_base = segment_base(ldt_selector);
  99. }
  100. d = (struct desc_struct *)(table_base + (selector & ~7));
  101. v = d->base0 | ((unsigned long)d->base1 << 16) |
  102. ((unsigned long)d->base2 << 24);
  103. #ifdef CONFIG_X86_64
  104. if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  105. v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
  106. #endif
  107. return v;
  108. }
  109. EXPORT_SYMBOL_GPL(segment_base);
  110. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  111. {
  112. if (irqchip_in_kernel(vcpu->kvm))
  113. return vcpu->arch.apic_base;
  114. else
  115. return vcpu->arch.apic_base;
  116. }
  117. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  118. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  119. {
  120. /* TODO: reserve bits check */
  121. if (irqchip_in_kernel(vcpu->kvm))
  122. kvm_lapic_set_base(vcpu, data);
  123. else
  124. vcpu->arch.apic_base = data;
  125. }
  126. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  127. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  128. {
  129. WARN_ON(vcpu->arch.exception.pending);
  130. vcpu->arch.exception.pending = true;
  131. vcpu->arch.exception.has_error_code = false;
  132. vcpu->arch.exception.nr = nr;
  133. }
  134. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  135. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  136. u32 error_code)
  137. {
  138. ++vcpu->stat.pf_guest;
  139. if (vcpu->arch.exception.pending) {
  140. if (vcpu->arch.exception.nr == PF_VECTOR) {
  141. printk(KERN_DEBUG "kvm: inject_page_fault:"
  142. " double fault 0x%lx\n", addr);
  143. vcpu->arch.exception.nr = DF_VECTOR;
  144. vcpu->arch.exception.error_code = 0;
  145. } else if (vcpu->arch.exception.nr == DF_VECTOR) {
  146. /* triple fault -> shutdown */
  147. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  148. }
  149. return;
  150. }
  151. vcpu->arch.cr2 = addr;
  152. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  153. }
  154. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  155. {
  156. WARN_ON(vcpu->arch.exception.pending);
  157. vcpu->arch.exception.pending = true;
  158. vcpu->arch.exception.has_error_code = true;
  159. vcpu->arch.exception.nr = nr;
  160. vcpu->arch.exception.error_code = error_code;
  161. }
  162. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  163. static void __queue_exception(struct kvm_vcpu *vcpu)
  164. {
  165. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  166. vcpu->arch.exception.has_error_code,
  167. vcpu->arch.exception.error_code);
  168. }
  169. /*
  170. * Load the pae pdptrs. Return true is they are all valid.
  171. */
  172. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  173. {
  174. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  175. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  176. int i;
  177. int ret;
  178. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  179. down_read(&vcpu->kvm->slots_lock);
  180. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  181. offset * sizeof(u64), sizeof(pdpte));
  182. if (ret < 0) {
  183. ret = 0;
  184. goto out;
  185. }
  186. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  187. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  188. ret = 0;
  189. goto out;
  190. }
  191. }
  192. ret = 1;
  193. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  194. out:
  195. up_read(&vcpu->kvm->slots_lock);
  196. return ret;
  197. }
  198. EXPORT_SYMBOL_GPL(load_pdptrs);
  199. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  200. {
  201. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  202. bool changed = true;
  203. int r;
  204. if (is_long_mode(vcpu) || !is_pae(vcpu))
  205. return false;
  206. down_read(&vcpu->kvm->slots_lock);
  207. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  208. if (r < 0)
  209. goto out;
  210. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  211. out:
  212. up_read(&vcpu->kvm->slots_lock);
  213. return changed;
  214. }
  215. void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  216. {
  217. if (cr0 & CR0_RESERVED_BITS) {
  218. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  219. cr0, vcpu->arch.cr0);
  220. kvm_inject_gp(vcpu, 0);
  221. return;
  222. }
  223. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  224. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  225. kvm_inject_gp(vcpu, 0);
  226. return;
  227. }
  228. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  229. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  230. "and a clear PE flag\n");
  231. kvm_inject_gp(vcpu, 0);
  232. return;
  233. }
  234. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  235. #ifdef CONFIG_X86_64
  236. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  237. int cs_db, cs_l;
  238. if (!is_pae(vcpu)) {
  239. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  240. "in long mode while PAE is disabled\n");
  241. kvm_inject_gp(vcpu, 0);
  242. return;
  243. }
  244. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  245. if (cs_l) {
  246. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  247. "in long mode while CS.L == 1\n");
  248. kvm_inject_gp(vcpu, 0);
  249. return;
  250. }
  251. } else
  252. #endif
  253. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  254. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  255. "reserved bits\n");
  256. kvm_inject_gp(vcpu, 0);
  257. return;
  258. }
  259. }
  260. kvm_x86_ops->set_cr0(vcpu, cr0);
  261. vcpu->arch.cr0 = cr0;
  262. kvm_mmu_reset_context(vcpu);
  263. return;
  264. }
  265. EXPORT_SYMBOL_GPL(kvm_set_cr0);
  266. void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  267. {
  268. kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  269. }
  270. EXPORT_SYMBOL_GPL(kvm_lmsw);
  271. void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  272. {
  273. if (cr4 & CR4_RESERVED_BITS) {
  274. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  275. kvm_inject_gp(vcpu, 0);
  276. return;
  277. }
  278. if (is_long_mode(vcpu)) {
  279. if (!(cr4 & X86_CR4_PAE)) {
  280. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  281. "in long mode\n");
  282. kvm_inject_gp(vcpu, 0);
  283. return;
  284. }
  285. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  286. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  287. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  288. kvm_inject_gp(vcpu, 0);
  289. return;
  290. }
  291. if (cr4 & X86_CR4_VMXE) {
  292. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  293. kvm_inject_gp(vcpu, 0);
  294. return;
  295. }
  296. kvm_x86_ops->set_cr4(vcpu, cr4);
  297. vcpu->arch.cr4 = cr4;
  298. kvm_mmu_reset_context(vcpu);
  299. }
  300. EXPORT_SYMBOL_GPL(kvm_set_cr4);
  301. void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  302. {
  303. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  304. kvm_mmu_flush_tlb(vcpu);
  305. return;
  306. }
  307. if (is_long_mode(vcpu)) {
  308. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  309. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  310. kvm_inject_gp(vcpu, 0);
  311. return;
  312. }
  313. } else {
  314. if (is_pae(vcpu)) {
  315. if (cr3 & CR3_PAE_RESERVED_BITS) {
  316. printk(KERN_DEBUG
  317. "set_cr3: #GP, reserved bits\n");
  318. kvm_inject_gp(vcpu, 0);
  319. return;
  320. }
  321. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  322. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  323. "reserved bits\n");
  324. kvm_inject_gp(vcpu, 0);
  325. return;
  326. }
  327. }
  328. /*
  329. * We don't check reserved bits in nonpae mode, because
  330. * this isn't enforced, and VMware depends on this.
  331. */
  332. }
  333. down_read(&vcpu->kvm->slots_lock);
  334. /*
  335. * Does the new cr3 value map to physical memory? (Note, we
  336. * catch an invalid cr3 even in real-mode, because it would
  337. * cause trouble later on when we turn on paging anyway.)
  338. *
  339. * A real CPU would silently accept an invalid cr3 and would
  340. * attempt to use it - with largely undefined (and often hard
  341. * to debug) behavior on the guest side.
  342. */
  343. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  344. kvm_inject_gp(vcpu, 0);
  345. else {
  346. vcpu->arch.cr3 = cr3;
  347. vcpu->arch.mmu.new_cr3(vcpu);
  348. }
  349. up_read(&vcpu->kvm->slots_lock);
  350. }
  351. EXPORT_SYMBOL_GPL(kvm_set_cr3);
  352. void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  353. {
  354. if (cr8 & CR8_RESERVED_BITS) {
  355. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  356. kvm_inject_gp(vcpu, 0);
  357. return;
  358. }
  359. if (irqchip_in_kernel(vcpu->kvm))
  360. kvm_lapic_set_tpr(vcpu, cr8);
  361. else
  362. vcpu->arch.cr8 = cr8;
  363. }
  364. EXPORT_SYMBOL_GPL(kvm_set_cr8);
  365. unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
  366. {
  367. if (irqchip_in_kernel(vcpu->kvm))
  368. return kvm_lapic_get_cr8(vcpu);
  369. else
  370. return vcpu->arch.cr8;
  371. }
  372. EXPORT_SYMBOL_GPL(kvm_get_cr8);
  373. /*
  374. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  375. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  376. *
  377. * This list is modified at module load time to reflect the
  378. * capabilities of the host cpu.
  379. */
  380. static u32 msrs_to_save[] = {
  381. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  382. MSR_K6_STAR,
  383. #ifdef CONFIG_X86_64
  384. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  385. #endif
  386. MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
  387. MSR_IA32_PERF_STATUS,
  388. };
  389. static unsigned num_msrs_to_save;
  390. static u32 emulated_msrs[] = {
  391. MSR_IA32_MISC_ENABLE,
  392. };
  393. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  394. {
  395. if (efer & efer_reserved_bits) {
  396. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  397. efer);
  398. kvm_inject_gp(vcpu, 0);
  399. return;
  400. }
  401. if (is_paging(vcpu)
  402. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  403. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  404. kvm_inject_gp(vcpu, 0);
  405. return;
  406. }
  407. kvm_x86_ops->set_efer(vcpu, efer);
  408. efer &= ~EFER_LMA;
  409. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  410. vcpu->arch.shadow_efer = efer;
  411. }
  412. void kvm_enable_efer_bits(u64 mask)
  413. {
  414. efer_reserved_bits &= ~mask;
  415. }
  416. EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
  417. /*
  418. * Writes msr value into into the appropriate "register".
  419. * Returns 0 on success, non-0 otherwise.
  420. * Assumes vcpu_load() was already called.
  421. */
  422. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  423. {
  424. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  425. }
  426. /*
  427. * Adapt set_msr() to msr_io()'s calling convention
  428. */
  429. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  430. {
  431. return kvm_set_msr(vcpu, index, *data);
  432. }
  433. static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
  434. {
  435. static int version;
  436. struct kvm_wall_clock wc;
  437. struct timespec wc_ts;
  438. if (!wall_clock)
  439. return;
  440. version++;
  441. down_read(&kvm->slots_lock);
  442. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  443. wc_ts = current_kernel_time();
  444. wc.wc_sec = wc_ts.tv_sec;
  445. wc.wc_nsec = wc_ts.tv_nsec;
  446. wc.wc_version = version;
  447. kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
  448. version++;
  449. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  450. up_read(&kvm->slots_lock);
  451. }
  452. static void kvm_write_guest_time(struct kvm_vcpu *v)
  453. {
  454. struct timespec ts;
  455. unsigned long flags;
  456. struct kvm_vcpu_arch *vcpu = &v->arch;
  457. void *shared_kaddr;
  458. if ((!vcpu->time_page))
  459. return;
  460. /* Keep irq disabled to prevent changes to the clock */
  461. local_irq_save(flags);
  462. kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
  463. &vcpu->hv_clock.tsc_timestamp);
  464. ktime_get_ts(&ts);
  465. local_irq_restore(flags);
  466. /* With all the info we got, fill in the values */
  467. vcpu->hv_clock.system_time = ts.tv_nsec +
  468. (NSEC_PER_SEC * (u64)ts.tv_sec);
  469. /*
  470. * The interface expects us to write an even number signaling that the
  471. * update is finished. Since the guest won't see the intermediate
  472. * state, we just write "2" at the end
  473. */
  474. vcpu->hv_clock.version = 2;
  475. shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
  476. memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
  477. sizeof(vcpu->hv_clock));
  478. kunmap_atomic(shared_kaddr, KM_USER0);
  479. mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
  480. }
  481. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  482. {
  483. switch (msr) {
  484. case MSR_EFER:
  485. set_efer(vcpu, data);
  486. break;
  487. case MSR_IA32_MC0_STATUS:
  488. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  489. __FUNCTION__, data);
  490. break;
  491. case MSR_IA32_MCG_STATUS:
  492. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  493. __FUNCTION__, data);
  494. break;
  495. case MSR_IA32_MCG_CTL:
  496. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  497. __FUNCTION__, data);
  498. break;
  499. case MSR_IA32_UCODE_REV:
  500. case MSR_IA32_UCODE_WRITE:
  501. case 0x200 ... 0x2ff: /* MTRRs */
  502. break;
  503. case MSR_IA32_APICBASE:
  504. kvm_set_apic_base(vcpu, data);
  505. break;
  506. case MSR_IA32_MISC_ENABLE:
  507. vcpu->arch.ia32_misc_enable_msr = data;
  508. break;
  509. case MSR_KVM_WALL_CLOCK:
  510. vcpu->kvm->arch.wall_clock = data;
  511. kvm_write_wall_clock(vcpu->kvm, data);
  512. break;
  513. case MSR_KVM_SYSTEM_TIME: {
  514. if (vcpu->arch.time_page) {
  515. kvm_release_page_dirty(vcpu->arch.time_page);
  516. vcpu->arch.time_page = NULL;
  517. }
  518. vcpu->arch.time = data;
  519. /* we verify if the enable bit is set... */
  520. if (!(data & 1))
  521. break;
  522. /* ...but clean it before doing the actual write */
  523. vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
  524. vcpu->arch.hv_clock.tsc_to_system_mul =
  525. clocksource_khz2mult(tsc_khz, 22);
  526. vcpu->arch.hv_clock.tsc_shift = 22;
  527. down_read(&current->mm->mmap_sem);
  528. down_read(&vcpu->kvm->slots_lock);
  529. vcpu->arch.time_page =
  530. gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
  531. up_read(&vcpu->kvm->slots_lock);
  532. up_read(&current->mm->mmap_sem);
  533. if (is_error_page(vcpu->arch.time_page)) {
  534. kvm_release_page_clean(vcpu->arch.time_page);
  535. vcpu->arch.time_page = NULL;
  536. }
  537. kvm_write_guest_time(vcpu);
  538. break;
  539. }
  540. default:
  541. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  542. return 1;
  543. }
  544. return 0;
  545. }
  546. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  547. /*
  548. * Reads an msr value (of 'msr_index') into 'pdata'.
  549. * Returns 0 on success, non-0 otherwise.
  550. * Assumes vcpu_load() was already called.
  551. */
  552. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  553. {
  554. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  555. }
  556. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  557. {
  558. u64 data;
  559. switch (msr) {
  560. case 0xc0010010: /* SYSCFG */
  561. case 0xc0010015: /* HWCR */
  562. case MSR_IA32_PLATFORM_ID:
  563. case MSR_IA32_P5_MC_ADDR:
  564. case MSR_IA32_P5_MC_TYPE:
  565. case MSR_IA32_MC0_CTL:
  566. case MSR_IA32_MCG_STATUS:
  567. case MSR_IA32_MCG_CAP:
  568. case MSR_IA32_MCG_CTL:
  569. case MSR_IA32_MC0_MISC:
  570. case MSR_IA32_MC0_MISC+4:
  571. case MSR_IA32_MC0_MISC+8:
  572. case MSR_IA32_MC0_MISC+12:
  573. case MSR_IA32_MC0_MISC+16:
  574. case MSR_IA32_UCODE_REV:
  575. case MSR_IA32_EBL_CR_POWERON:
  576. /* MTRR registers */
  577. case 0xfe:
  578. case 0x200 ... 0x2ff:
  579. data = 0;
  580. break;
  581. case 0xcd: /* fsb frequency */
  582. data = 3;
  583. break;
  584. case MSR_IA32_APICBASE:
  585. data = kvm_get_apic_base(vcpu);
  586. break;
  587. case MSR_IA32_MISC_ENABLE:
  588. data = vcpu->arch.ia32_misc_enable_msr;
  589. break;
  590. case MSR_IA32_PERF_STATUS:
  591. /* TSC increment by tick */
  592. data = 1000ULL;
  593. /* CPU multiplier */
  594. data |= (((uint64_t)4ULL) << 40);
  595. break;
  596. case MSR_EFER:
  597. data = vcpu->arch.shadow_efer;
  598. break;
  599. case MSR_KVM_WALL_CLOCK:
  600. data = vcpu->kvm->arch.wall_clock;
  601. break;
  602. case MSR_KVM_SYSTEM_TIME:
  603. data = vcpu->arch.time;
  604. break;
  605. default:
  606. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  607. return 1;
  608. }
  609. *pdata = data;
  610. return 0;
  611. }
  612. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  613. /*
  614. * Read or write a bunch of msrs. All parameters are kernel addresses.
  615. *
  616. * @return number of msrs set successfully.
  617. */
  618. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  619. struct kvm_msr_entry *entries,
  620. int (*do_msr)(struct kvm_vcpu *vcpu,
  621. unsigned index, u64 *data))
  622. {
  623. int i;
  624. vcpu_load(vcpu);
  625. for (i = 0; i < msrs->nmsrs; ++i)
  626. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  627. break;
  628. vcpu_put(vcpu);
  629. return i;
  630. }
  631. /*
  632. * Read or write a bunch of msrs. Parameters are user addresses.
  633. *
  634. * @return number of msrs set successfully.
  635. */
  636. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  637. int (*do_msr)(struct kvm_vcpu *vcpu,
  638. unsigned index, u64 *data),
  639. int writeback)
  640. {
  641. struct kvm_msrs msrs;
  642. struct kvm_msr_entry *entries;
  643. int r, n;
  644. unsigned size;
  645. r = -EFAULT;
  646. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  647. goto out;
  648. r = -E2BIG;
  649. if (msrs.nmsrs >= MAX_IO_MSRS)
  650. goto out;
  651. r = -ENOMEM;
  652. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  653. entries = vmalloc(size);
  654. if (!entries)
  655. goto out;
  656. r = -EFAULT;
  657. if (copy_from_user(entries, user_msrs->entries, size))
  658. goto out_free;
  659. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  660. if (r < 0)
  661. goto out_free;
  662. r = -EFAULT;
  663. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  664. goto out_free;
  665. r = n;
  666. out_free:
  667. vfree(entries);
  668. out:
  669. return r;
  670. }
  671. /*
  672. * Make sure that a cpu that is being hot-unplugged does not have any vcpus
  673. * cached on it.
  674. */
  675. void decache_vcpus_on_cpu(int cpu)
  676. {
  677. struct kvm *vm;
  678. struct kvm_vcpu *vcpu;
  679. int i;
  680. spin_lock(&kvm_lock);
  681. list_for_each_entry(vm, &vm_list, vm_list)
  682. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  683. vcpu = vm->vcpus[i];
  684. if (!vcpu)
  685. continue;
  686. /*
  687. * If the vcpu is locked, then it is running on some
  688. * other cpu and therefore it is not cached on the
  689. * cpu in question.
  690. *
  691. * If it's not locked, check the last cpu it executed
  692. * on.
  693. */
  694. if (mutex_trylock(&vcpu->mutex)) {
  695. if (vcpu->cpu == cpu) {
  696. kvm_x86_ops->vcpu_decache(vcpu);
  697. vcpu->cpu = -1;
  698. }
  699. mutex_unlock(&vcpu->mutex);
  700. }
  701. }
  702. spin_unlock(&kvm_lock);
  703. }
  704. int kvm_dev_ioctl_check_extension(long ext)
  705. {
  706. int r;
  707. switch (ext) {
  708. case KVM_CAP_IRQCHIP:
  709. case KVM_CAP_HLT:
  710. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  711. case KVM_CAP_USER_MEMORY:
  712. case KVM_CAP_SET_TSS_ADDR:
  713. case KVM_CAP_EXT_CPUID:
  714. case KVM_CAP_CLOCKSOURCE:
  715. r = 1;
  716. break;
  717. case KVM_CAP_VAPIC:
  718. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  719. break;
  720. case KVM_CAP_NR_VCPUS:
  721. r = KVM_MAX_VCPUS;
  722. break;
  723. case KVM_CAP_NR_MEMSLOTS:
  724. r = KVM_MEMORY_SLOTS;
  725. break;
  726. default:
  727. r = 0;
  728. break;
  729. }
  730. return r;
  731. }
  732. long kvm_arch_dev_ioctl(struct file *filp,
  733. unsigned int ioctl, unsigned long arg)
  734. {
  735. void __user *argp = (void __user *)arg;
  736. long r;
  737. switch (ioctl) {
  738. case KVM_GET_MSR_INDEX_LIST: {
  739. struct kvm_msr_list __user *user_msr_list = argp;
  740. struct kvm_msr_list msr_list;
  741. unsigned n;
  742. r = -EFAULT;
  743. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  744. goto out;
  745. n = msr_list.nmsrs;
  746. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  747. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  748. goto out;
  749. r = -E2BIG;
  750. if (n < num_msrs_to_save)
  751. goto out;
  752. r = -EFAULT;
  753. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  754. num_msrs_to_save * sizeof(u32)))
  755. goto out;
  756. if (copy_to_user(user_msr_list->indices
  757. + num_msrs_to_save * sizeof(u32),
  758. &emulated_msrs,
  759. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  760. goto out;
  761. r = 0;
  762. break;
  763. }
  764. case KVM_GET_SUPPORTED_CPUID: {
  765. struct kvm_cpuid2 __user *cpuid_arg = argp;
  766. struct kvm_cpuid2 cpuid;
  767. r = -EFAULT;
  768. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  769. goto out;
  770. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  771. cpuid_arg->entries);
  772. if (r)
  773. goto out;
  774. r = -EFAULT;
  775. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  776. goto out;
  777. r = 0;
  778. break;
  779. }
  780. default:
  781. r = -EINVAL;
  782. }
  783. out:
  784. return r;
  785. }
  786. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  787. {
  788. kvm_x86_ops->vcpu_load(vcpu, cpu);
  789. kvm_write_guest_time(vcpu);
  790. }
  791. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  792. {
  793. kvm_x86_ops->vcpu_put(vcpu);
  794. kvm_put_guest_fpu(vcpu);
  795. }
  796. static int is_efer_nx(void)
  797. {
  798. u64 efer;
  799. rdmsrl(MSR_EFER, efer);
  800. return efer & EFER_NX;
  801. }
  802. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  803. {
  804. int i;
  805. struct kvm_cpuid_entry2 *e, *entry;
  806. entry = NULL;
  807. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  808. e = &vcpu->arch.cpuid_entries[i];
  809. if (e->function == 0x80000001) {
  810. entry = e;
  811. break;
  812. }
  813. }
  814. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  815. entry->edx &= ~(1 << 20);
  816. printk(KERN_INFO "kvm: guest NX capability removed\n");
  817. }
  818. }
  819. /* when an old userspace process fills a new kernel module */
  820. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  821. struct kvm_cpuid *cpuid,
  822. struct kvm_cpuid_entry __user *entries)
  823. {
  824. int r, i;
  825. struct kvm_cpuid_entry *cpuid_entries;
  826. r = -E2BIG;
  827. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  828. goto out;
  829. r = -ENOMEM;
  830. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  831. if (!cpuid_entries)
  832. goto out;
  833. r = -EFAULT;
  834. if (copy_from_user(cpuid_entries, entries,
  835. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  836. goto out_free;
  837. for (i = 0; i < cpuid->nent; i++) {
  838. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  839. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  840. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  841. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  842. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  843. vcpu->arch.cpuid_entries[i].index = 0;
  844. vcpu->arch.cpuid_entries[i].flags = 0;
  845. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  846. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  847. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  848. }
  849. vcpu->arch.cpuid_nent = cpuid->nent;
  850. cpuid_fix_nx_cap(vcpu);
  851. r = 0;
  852. out_free:
  853. vfree(cpuid_entries);
  854. out:
  855. return r;
  856. }
  857. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  858. struct kvm_cpuid2 *cpuid,
  859. struct kvm_cpuid_entry2 __user *entries)
  860. {
  861. int r;
  862. r = -E2BIG;
  863. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  864. goto out;
  865. r = -EFAULT;
  866. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  867. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  868. goto out;
  869. vcpu->arch.cpuid_nent = cpuid->nent;
  870. return 0;
  871. out:
  872. return r;
  873. }
  874. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  875. struct kvm_cpuid2 *cpuid,
  876. struct kvm_cpuid_entry2 __user *entries)
  877. {
  878. int r;
  879. r = -E2BIG;
  880. if (cpuid->nent < vcpu->arch.cpuid_nent)
  881. goto out;
  882. r = -EFAULT;
  883. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  884. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  885. goto out;
  886. return 0;
  887. out:
  888. cpuid->nent = vcpu->arch.cpuid_nent;
  889. return r;
  890. }
  891. static inline u32 bit(int bitno)
  892. {
  893. return 1 << (bitno & 31);
  894. }
  895. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  896. u32 index)
  897. {
  898. entry->function = function;
  899. entry->index = index;
  900. cpuid_count(entry->function, entry->index,
  901. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  902. entry->flags = 0;
  903. }
  904. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  905. u32 index, int *nent, int maxnent)
  906. {
  907. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  908. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  909. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  910. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  911. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  912. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  913. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  914. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  915. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  916. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  917. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  918. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  919. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  920. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  921. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  922. bit(X86_FEATURE_PGE) |
  923. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  924. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  925. bit(X86_FEATURE_SYSCALL) |
  926. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  927. #ifdef CONFIG_X86_64
  928. bit(X86_FEATURE_LM) |
  929. #endif
  930. bit(X86_FEATURE_MMXEXT) |
  931. bit(X86_FEATURE_3DNOWEXT) |
  932. bit(X86_FEATURE_3DNOW);
  933. const u32 kvm_supported_word3_x86_features =
  934. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  935. const u32 kvm_supported_word6_x86_features =
  936. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  937. /* all func 2 cpuid_count() should be called on the same cpu */
  938. get_cpu();
  939. do_cpuid_1_ent(entry, function, index);
  940. ++*nent;
  941. switch (function) {
  942. case 0:
  943. entry->eax = min(entry->eax, (u32)0xb);
  944. break;
  945. case 1:
  946. entry->edx &= kvm_supported_word0_x86_features;
  947. entry->ecx &= kvm_supported_word3_x86_features;
  948. break;
  949. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  950. * may return different values. This forces us to get_cpu() before
  951. * issuing the first command, and also to emulate this annoying behavior
  952. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  953. case 2: {
  954. int t, times = entry->eax & 0xff;
  955. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  956. for (t = 1; t < times && *nent < maxnent; ++t) {
  957. do_cpuid_1_ent(&entry[t], function, 0);
  958. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  959. ++*nent;
  960. }
  961. break;
  962. }
  963. /* function 4 and 0xb have additional index. */
  964. case 4: {
  965. int i, cache_type;
  966. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  967. /* read more entries until cache_type is zero */
  968. for (i = 1; *nent < maxnent; ++i) {
  969. cache_type = entry[i - 1].eax & 0x1f;
  970. if (!cache_type)
  971. break;
  972. do_cpuid_1_ent(&entry[i], function, i);
  973. entry[i].flags |=
  974. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  975. ++*nent;
  976. }
  977. break;
  978. }
  979. case 0xb: {
  980. int i, level_type;
  981. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  982. /* read more entries until level_type is zero */
  983. for (i = 1; *nent < maxnent; ++i) {
  984. level_type = entry[i - 1].ecx & 0xff;
  985. if (!level_type)
  986. break;
  987. do_cpuid_1_ent(&entry[i], function, i);
  988. entry[i].flags |=
  989. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  990. ++*nent;
  991. }
  992. break;
  993. }
  994. case 0x80000000:
  995. entry->eax = min(entry->eax, 0x8000001a);
  996. break;
  997. case 0x80000001:
  998. entry->edx &= kvm_supported_word1_x86_features;
  999. entry->ecx &= kvm_supported_word6_x86_features;
  1000. break;
  1001. }
  1002. put_cpu();
  1003. }
  1004. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  1005. struct kvm_cpuid_entry2 __user *entries)
  1006. {
  1007. struct kvm_cpuid_entry2 *cpuid_entries;
  1008. int limit, nent = 0, r = -E2BIG;
  1009. u32 func;
  1010. if (cpuid->nent < 1)
  1011. goto out;
  1012. r = -ENOMEM;
  1013. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  1014. if (!cpuid_entries)
  1015. goto out;
  1016. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  1017. limit = cpuid_entries[0].eax;
  1018. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  1019. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1020. &nent, cpuid->nent);
  1021. r = -E2BIG;
  1022. if (nent >= cpuid->nent)
  1023. goto out_free;
  1024. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  1025. limit = cpuid_entries[nent - 1].eax;
  1026. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  1027. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1028. &nent, cpuid->nent);
  1029. r = -EFAULT;
  1030. if (copy_to_user(entries, cpuid_entries,
  1031. nent * sizeof(struct kvm_cpuid_entry2)))
  1032. goto out_free;
  1033. cpuid->nent = nent;
  1034. r = 0;
  1035. out_free:
  1036. vfree(cpuid_entries);
  1037. out:
  1038. return r;
  1039. }
  1040. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  1041. struct kvm_lapic_state *s)
  1042. {
  1043. vcpu_load(vcpu);
  1044. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  1045. vcpu_put(vcpu);
  1046. return 0;
  1047. }
  1048. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  1049. struct kvm_lapic_state *s)
  1050. {
  1051. vcpu_load(vcpu);
  1052. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  1053. kvm_apic_post_state_restore(vcpu);
  1054. vcpu_put(vcpu);
  1055. return 0;
  1056. }
  1057. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  1058. struct kvm_interrupt *irq)
  1059. {
  1060. if (irq->irq < 0 || irq->irq >= 256)
  1061. return -EINVAL;
  1062. if (irqchip_in_kernel(vcpu->kvm))
  1063. return -ENXIO;
  1064. vcpu_load(vcpu);
  1065. set_bit(irq->irq, vcpu->arch.irq_pending);
  1066. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  1067. vcpu_put(vcpu);
  1068. return 0;
  1069. }
  1070. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  1071. struct kvm_tpr_access_ctl *tac)
  1072. {
  1073. if (tac->flags)
  1074. return -EINVAL;
  1075. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  1076. return 0;
  1077. }
  1078. long kvm_arch_vcpu_ioctl(struct file *filp,
  1079. unsigned int ioctl, unsigned long arg)
  1080. {
  1081. struct kvm_vcpu *vcpu = filp->private_data;
  1082. void __user *argp = (void __user *)arg;
  1083. int r;
  1084. switch (ioctl) {
  1085. case KVM_GET_LAPIC: {
  1086. struct kvm_lapic_state lapic;
  1087. memset(&lapic, 0, sizeof lapic);
  1088. r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic);
  1089. if (r)
  1090. goto out;
  1091. r = -EFAULT;
  1092. if (copy_to_user(argp, &lapic, sizeof lapic))
  1093. goto out;
  1094. r = 0;
  1095. break;
  1096. }
  1097. case KVM_SET_LAPIC: {
  1098. struct kvm_lapic_state lapic;
  1099. r = -EFAULT;
  1100. if (copy_from_user(&lapic, argp, sizeof lapic))
  1101. goto out;
  1102. r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);;
  1103. if (r)
  1104. goto out;
  1105. r = 0;
  1106. break;
  1107. }
  1108. case KVM_INTERRUPT: {
  1109. struct kvm_interrupt irq;
  1110. r = -EFAULT;
  1111. if (copy_from_user(&irq, argp, sizeof irq))
  1112. goto out;
  1113. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1114. if (r)
  1115. goto out;
  1116. r = 0;
  1117. break;
  1118. }
  1119. case KVM_SET_CPUID: {
  1120. struct kvm_cpuid __user *cpuid_arg = argp;
  1121. struct kvm_cpuid cpuid;
  1122. r = -EFAULT;
  1123. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1124. goto out;
  1125. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1126. if (r)
  1127. goto out;
  1128. break;
  1129. }
  1130. case KVM_SET_CPUID2: {
  1131. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1132. struct kvm_cpuid2 cpuid;
  1133. r = -EFAULT;
  1134. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1135. goto out;
  1136. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1137. cpuid_arg->entries);
  1138. if (r)
  1139. goto out;
  1140. break;
  1141. }
  1142. case KVM_GET_CPUID2: {
  1143. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1144. struct kvm_cpuid2 cpuid;
  1145. r = -EFAULT;
  1146. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1147. goto out;
  1148. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1149. cpuid_arg->entries);
  1150. if (r)
  1151. goto out;
  1152. r = -EFAULT;
  1153. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1154. goto out;
  1155. r = 0;
  1156. break;
  1157. }
  1158. case KVM_GET_MSRS:
  1159. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1160. break;
  1161. case KVM_SET_MSRS:
  1162. r = msr_io(vcpu, argp, do_set_msr, 0);
  1163. break;
  1164. case KVM_TPR_ACCESS_REPORTING: {
  1165. struct kvm_tpr_access_ctl tac;
  1166. r = -EFAULT;
  1167. if (copy_from_user(&tac, argp, sizeof tac))
  1168. goto out;
  1169. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1170. if (r)
  1171. goto out;
  1172. r = -EFAULT;
  1173. if (copy_to_user(argp, &tac, sizeof tac))
  1174. goto out;
  1175. r = 0;
  1176. break;
  1177. };
  1178. case KVM_SET_VAPIC_ADDR: {
  1179. struct kvm_vapic_addr va;
  1180. r = -EINVAL;
  1181. if (!irqchip_in_kernel(vcpu->kvm))
  1182. goto out;
  1183. r = -EFAULT;
  1184. if (copy_from_user(&va, argp, sizeof va))
  1185. goto out;
  1186. r = 0;
  1187. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1188. break;
  1189. }
  1190. default:
  1191. r = -EINVAL;
  1192. }
  1193. out:
  1194. return r;
  1195. }
  1196. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1197. {
  1198. int ret;
  1199. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1200. return -1;
  1201. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1202. return ret;
  1203. }
  1204. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1205. u32 kvm_nr_mmu_pages)
  1206. {
  1207. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1208. return -EINVAL;
  1209. down_write(&kvm->slots_lock);
  1210. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1211. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1212. up_write(&kvm->slots_lock);
  1213. return 0;
  1214. }
  1215. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1216. {
  1217. return kvm->arch.n_alloc_mmu_pages;
  1218. }
  1219. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1220. {
  1221. int i;
  1222. struct kvm_mem_alias *alias;
  1223. for (i = 0; i < kvm->arch.naliases; ++i) {
  1224. alias = &kvm->arch.aliases[i];
  1225. if (gfn >= alias->base_gfn
  1226. && gfn < alias->base_gfn + alias->npages)
  1227. return alias->target_gfn + gfn - alias->base_gfn;
  1228. }
  1229. return gfn;
  1230. }
  1231. /*
  1232. * Set a new alias region. Aliases map a portion of physical memory into
  1233. * another portion. This is useful for memory windows, for example the PC
  1234. * VGA region.
  1235. */
  1236. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1237. struct kvm_memory_alias *alias)
  1238. {
  1239. int r, n;
  1240. struct kvm_mem_alias *p;
  1241. r = -EINVAL;
  1242. /* General sanity checks */
  1243. if (alias->memory_size & (PAGE_SIZE - 1))
  1244. goto out;
  1245. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1246. goto out;
  1247. if (alias->slot >= KVM_ALIAS_SLOTS)
  1248. goto out;
  1249. if (alias->guest_phys_addr + alias->memory_size
  1250. < alias->guest_phys_addr)
  1251. goto out;
  1252. if (alias->target_phys_addr + alias->memory_size
  1253. < alias->target_phys_addr)
  1254. goto out;
  1255. down_write(&kvm->slots_lock);
  1256. p = &kvm->arch.aliases[alias->slot];
  1257. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1258. p->npages = alias->memory_size >> PAGE_SHIFT;
  1259. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1260. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1261. if (kvm->arch.aliases[n - 1].npages)
  1262. break;
  1263. kvm->arch.naliases = n;
  1264. kvm_mmu_zap_all(kvm);
  1265. up_write(&kvm->slots_lock);
  1266. return 0;
  1267. out:
  1268. return r;
  1269. }
  1270. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1271. {
  1272. int r;
  1273. r = 0;
  1274. switch (chip->chip_id) {
  1275. case KVM_IRQCHIP_PIC_MASTER:
  1276. memcpy(&chip->chip.pic,
  1277. &pic_irqchip(kvm)->pics[0],
  1278. sizeof(struct kvm_pic_state));
  1279. break;
  1280. case KVM_IRQCHIP_PIC_SLAVE:
  1281. memcpy(&chip->chip.pic,
  1282. &pic_irqchip(kvm)->pics[1],
  1283. sizeof(struct kvm_pic_state));
  1284. break;
  1285. case KVM_IRQCHIP_IOAPIC:
  1286. memcpy(&chip->chip.ioapic,
  1287. ioapic_irqchip(kvm),
  1288. sizeof(struct kvm_ioapic_state));
  1289. break;
  1290. default:
  1291. r = -EINVAL;
  1292. break;
  1293. }
  1294. return r;
  1295. }
  1296. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1297. {
  1298. int r;
  1299. r = 0;
  1300. switch (chip->chip_id) {
  1301. case KVM_IRQCHIP_PIC_MASTER:
  1302. memcpy(&pic_irqchip(kvm)->pics[0],
  1303. &chip->chip.pic,
  1304. sizeof(struct kvm_pic_state));
  1305. break;
  1306. case KVM_IRQCHIP_PIC_SLAVE:
  1307. memcpy(&pic_irqchip(kvm)->pics[1],
  1308. &chip->chip.pic,
  1309. sizeof(struct kvm_pic_state));
  1310. break;
  1311. case KVM_IRQCHIP_IOAPIC:
  1312. memcpy(ioapic_irqchip(kvm),
  1313. &chip->chip.ioapic,
  1314. sizeof(struct kvm_ioapic_state));
  1315. break;
  1316. default:
  1317. r = -EINVAL;
  1318. break;
  1319. }
  1320. kvm_pic_update_irq(pic_irqchip(kvm));
  1321. return r;
  1322. }
  1323. /*
  1324. * Get (and clear) the dirty memory log for a memory slot.
  1325. */
  1326. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1327. struct kvm_dirty_log *log)
  1328. {
  1329. int r;
  1330. int n;
  1331. struct kvm_memory_slot *memslot;
  1332. int is_dirty = 0;
  1333. down_write(&kvm->slots_lock);
  1334. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1335. if (r)
  1336. goto out;
  1337. /* If nothing is dirty, don't bother messing with page tables. */
  1338. if (is_dirty) {
  1339. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1340. kvm_flush_remote_tlbs(kvm);
  1341. memslot = &kvm->memslots[log->slot];
  1342. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1343. memset(memslot->dirty_bitmap, 0, n);
  1344. }
  1345. r = 0;
  1346. out:
  1347. up_write(&kvm->slots_lock);
  1348. return r;
  1349. }
  1350. long kvm_arch_vm_ioctl(struct file *filp,
  1351. unsigned int ioctl, unsigned long arg)
  1352. {
  1353. struct kvm *kvm = filp->private_data;
  1354. void __user *argp = (void __user *)arg;
  1355. int r = -EINVAL;
  1356. switch (ioctl) {
  1357. case KVM_SET_TSS_ADDR:
  1358. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1359. if (r < 0)
  1360. goto out;
  1361. break;
  1362. case KVM_SET_MEMORY_REGION: {
  1363. struct kvm_memory_region kvm_mem;
  1364. struct kvm_userspace_memory_region kvm_userspace_mem;
  1365. r = -EFAULT;
  1366. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1367. goto out;
  1368. kvm_userspace_mem.slot = kvm_mem.slot;
  1369. kvm_userspace_mem.flags = kvm_mem.flags;
  1370. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1371. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1372. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1373. if (r)
  1374. goto out;
  1375. break;
  1376. }
  1377. case KVM_SET_NR_MMU_PAGES:
  1378. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1379. if (r)
  1380. goto out;
  1381. break;
  1382. case KVM_GET_NR_MMU_PAGES:
  1383. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1384. break;
  1385. case KVM_SET_MEMORY_ALIAS: {
  1386. struct kvm_memory_alias alias;
  1387. r = -EFAULT;
  1388. if (copy_from_user(&alias, argp, sizeof alias))
  1389. goto out;
  1390. r = kvm_vm_ioctl_set_memory_alias(kvm, &alias);
  1391. if (r)
  1392. goto out;
  1393. break;
  1394. }
  1395. case KVM_CREATE_IRQCHIP:
  1396. r = -ENOMEM;
  1397. kvm->arch.vpic = kvm_create_pic(kvm);
  1398. if (kvm->arch.vpic) {
  1399. r = kvm_ioapic_init(kvm);
  1400. if (r) {
  1401. kfree(kvm->arch.vpic);
  1402. kvm->arch.vpic = NULL;
  1403. goto out;
  1404. }
  1405. } else
  1406. goto out;
  1407. break;
  1408. case KVM_IRQ_LINE: {
  1409. struct kvm_irq_level irq_event;
  1410. r = -EFAULT;
  1411. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1412. goto out;
  1413. if (irqchip_in_kernel(kvm)) {
  1414. mutex_lock(&kvm->lock);
  1415. if (irq_event.irq < 16)
  1416. kvm_pic_set_irq(pic_irqchip(kvm),
  1417. irq_event.irq,
  1418. irq_event.level);
  1419. kvm_ioapic_set_irq(kvm->arch.vioapic,
  1420. irq_event.irq,
  1421. irq_event.level);
  1422. mutex_unlock(&kvm->lock);
  1423. r = 0;
  1424. }
  1425. break;
  1426. }
  1427. case KVM_GET_IRQCHIP: {
  1428. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1429. struct kvm_irqchip chip;
  1430. r = -EFAULT;
  1431. if (copy_from_user(&chip, argp, sizeof chip))
  1432. goto out;
  1433. r = -ENXIO;
  1434. if (!irqchip_in_kernel(kvm))
  1435. goto out;
  1436. r = kvm_vm_ioctl_get_irqchip(kvm, &chip);
  1437. if (r)
  1438. goto out;
  1439. r = -EFAULT;
  1440. if (copy_to_user(argp, &chip, sizeof chip))
  1441. goto out;
  1442. r = 0;
  1443. break;
  1444. }
  1445. case KVM_SET_IRQCHIP: {
  1446. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1447. struct kvm_irqchip chip;
  1448. r = -EFAULT;
  1449. if (copy_from_user(&chip, argp, sizeof chip))
  1450. goto out;
  1451. r = -ENXIO;
  1452. if (!irqchip_in_kernel(kvm))
  1453. goto out;
  1454. r = kvm_vm_ioctl_set_irqchip(kvm, &chip);
  1455. if (r)
  1456. goto out;
  1457. r = 0;
  1458. break;
  1459. }
  1460. default:
  1461. ;
  1462. }
  1463. out:
  1464. return r;
  1465. }
  1466. static void kvm_init_msr_list(void)
  1467. {
  1468. u32 dummy[2];
  1469. unsigned i, j;
  1470. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1471. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1472. continue;
  1473. if (j < i)
  1474. msrs_to_save[j] = msrs_to_save[i];
  1475. j++;
  1476. }
  1477. num_msrs_to_save = j;
  1478. }
  1479. /*
  1480. * Only apic need an MMIO device hook, so shortcut now..
  1481. */
  1482. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1483. gpa_t addr)
  1484. {
  1485. struct kvm_io_device *dev;
  1486. if (vcpu->arch.apic) {
  1487. dev = &vcpu->arch.apic->dev;
  1488. if (dev->in_range(dev, addr))
  1489. return dev;
  1490. }
  1491. return NULL;
  1492. }
  1493. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1494. gpa_t addr)
  1495. {
  1496. struct kvm_io_device *dev;
  1497. dev = vcpu_find_pervcpu_dev(vcpu, addr);
  1498. if (dev == NULL)
  1499. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr);
  1500. return dev;
  1501. }
  1502. int emulator_read_std(unsigned long addr,
  1503. void *val,
  1504. unsigned int bytes,
  1505. struct kvm_vcpu *vcpu)
  1506. {
  1507. void *data = val;
  1508. int r = X86EMUL_CONTINUE;
  1509. down_read(&vcpu->kvm->slots_lock);
  1510. while (bytes) {
  1511. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1512. unsigned offset = addr & (PAGE_SIZE-1);
  1513. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1514. int ret;
  1515. if (gpa == UNMAPPED_GVA) {
  1516. r = X86EMUL_PROPAGATE_FAULT;
  1517. goto out;
  1518. }
  1519. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1520. if (ret < 0) {
  1521. r = X86EMUL_UNHANDLEABLE;
  1522. goto out;
  1523. }
  1524. bytes -= tocopy;
  1525. data += tocopy;
  1526. addr += tocopy;
  1527. }
  1528. out:
  1529. up_read(&vcpu->kvm->slots_lock);
  1530. return r;
  1531. }
  1532. EXPORT_SYMBOL_GPL(emulator_read_std);
  1533. static int emulator_read_emulated(unsigned long addr,
  1534. void *val,
  1535. unsigned int bytes,
  1536. struct kvm_vcpu *vcpu)
  1537. {
  1538. struct kvm_io_device *mmio_dev;
  1539. gpa_t gpa;
  1540. if (vcpu->mmio_read_completed) {
  1541. memcpy(val, vcpu->mmio_data, bytes);
  1542. vcpu->mmio_read_completed = 0;
  1543. return X86EMUL_CONTINUE;
  1544. }
  1545. down_read(&vcpu->kvm->slots_lock);
  1546. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1547. up_read(&vcpu->kvm->slots_lock);
  1548. /* For APIC access vmexit */
  1549. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1550. goto mmio;
  1551. if (emulator_read_std(addr, val, bytes, vcpu)
  1552. == X86EMUL_CONTINUE)
  1553. return X86EMUL_CONTINUE;
  1554. if (gpa == UNMAPPED_GVA)
  1555. return X86EMUL_PROPAGATE_FAULT;
  1556. mmio:
  1557. /*
  1558. * Is this MMIO handled locally?
  1559. */
  1560. mutex_lock(&vcpu->kvm->lock);
  1561. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1562. if (mmio_dev) {
  1563. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1564. mutex_unlock(&vcpu->kvm->lock);
  1565. return X86EMUL_CONTINUE;
  1566. }
  1567. mutex_unlock(&vcpu->kvm->lock);
  1568. vcpu->mmio_needed = 1;
  1569. vcpu->mmio_phys_addr = gpa;
  1570. vcpu->mmio_size = bytes;
  1571. vcpu->mmio_is_write = 0;
  1572. return X86EMUL_UNHANDLEABLE;
  1573. }
  1574. static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1575. const void *val, int bytes)
  1576. {
  1577. int ret;
  1578. down_read(&vcpu->kvm->slots_lock);
  1579. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1580. if (ret < 0) {
  1581. up_read(&vcpu->kvm->slots_lock);
  1582. return 0;
  1583. }
  1584. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1585. up_read(&vcpu->kvm->slots_lock);
  1586. return 1;
  1587. }
  1588. static int emulator_write_emulated_onepage(unsigned long addr,
  1589. const void *val,
  1590. unsigned int bytes,
  1591. struct kvm_vcpu *vcpu)
  1592. {
  1593. struct kvm_io_device *mmio_dev;
  1594. gpa_t gpa;
  1595. down_read(&vcpu->kvm->slots_lock);
  1596. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1597. up_read(&vcpu->kvm->slots_lock);
  1598. if (gpa == UNMAPPED_GVA) {
  1599. kvm_inject_page_fault(vcpu, addr, 2);
  1600. return X86EMUL_PROPAGATE_FAULT;
  1601. }
  1602. /* For APIC access vmexit */
  1603. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1604. goto mmio;
  1605. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1606. return X86EMUL_CONTINUE;
  1607. mmio:
  1608. /*
  1609. * Is this MMIO handled locally?
  1610. */
  1611. mutex_lock(&vcpu->kvm->lock);
  1612. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa);
  1613. if (mmio_dev) {
  1614. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1615. mutex_unlock(&vcpu->kvm->lock);
  1616. return X86EMUL_CONTINUE;
  1617. }
  1618. mutex_unlock(&vcpu->kvm->lock);
  1619. vcpu->mmio_needed = 1;
  1620. vcpu->mmio_phys_addr = gpa;
  1621. vcpu->mmio_size = bytes;
  1622. vcpu->mmio_is_write = 1;
  1623. memcpy(vcpu->mmio_data, val, bytes);
  1624. return X86EMUL_CONTINUE;
  1625. }
  1626. int emulator_write_emulated(unsigned long addr,
  1627. const void *val,
  1628. unsigned int bytes,
  1629. struct kvm_vcpu *vcpu)
  1630. {
  1631. /* Crossing a page boundary? */
  1632. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1633. int rc, now;
  1634. now = -addr & ~PAGE_MASK;
  1635. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1636. if (rc != X86EMUL_CONTINUE)
  1637. return rc;
  1638. addr += now;
  1639. val += now;
  1640. bytes -= now;
  1641. }
  1642. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  1643. }
  1644. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  1645. static int emulator_cmpxchg_emulated(unsigned long addr,
  1646. const void *old,
  1647. const void *new,
  1648. unsigned int bytes,
  1649. struct kvm_vcpu *vcpu)
  1650. {
  1651. static int reported;
  1652. if (!reported) {
  1653. reported = 1;
  1654. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  1655. }
  1656. #ifndef CONFIG_X86_64
  1657. /* guests cmpxchg8b have to be emulated atomically */
  1658. if (bytes == 8) {
  1659. gpa_t gpa;
  1660. struct page *page;
  1661. char *kaddr;
  1662. u64 val;
  1663. down_read(&vcpu->kvm->slots_lock);
  1664. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1665. if (gpa == UNMAPPED_GVA ||
  1666. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1667. goto emul_write;
  1668. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  1669. goto emul_write;
  1670. val = *(u64 *)new;
  1671. down_read(&current->mm->mmap_sem);
  1672. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1673. up_read(&current->mm->mmap_sem);
  1674. kaddr = kmap_atomic(page, KM_USER0);
  1675. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  1676. kunmap_atomic(kaddr, KM_USER0);
  1677. kvm_release_page_dirty(page);
  1678. emul_write:
  1679. up_read(&vcpu->kvm->slots_lock);
  1680. }
  1681. #endif
  1682. return emulator_write_emulated(addr, new, bytes, vcpu);
  1683. }
  1684. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  1685. {
  1686. return kvm_x86_ops->get_segment_base(vcpu, seg);
  1687. }
  1688. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  1689. {
  1690. return X86EMUL_CONTINUE;
  1691. }
  1692. int emulate_clts(struct kvm_vcpu *vcpu)
  1693. {
  1694. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  1695. return X86EMUL_CONTINUE;
  1696. }
  1697. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  1698. {
  1699. struct kvm_vcpu *vcpu = ctxt->vcpu;
  1700. switch (dr) {
  1701. case 0 ... 3:
  1702. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  1703. return X86EMUL_CONTINUE;
  1704. default:
  1705. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr);
  1706. return X86EMUL_UNHANDLEABLE;
  1707. }
  1708. }
  1709. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  1710. {
  1711. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  1712. int exception;
  1713. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  1714. if (exception) {
  1715. /* FIXME: better handling */
  1716. return X86EMUL_UNHANDLEABLE;
  1717. }
  1718. return X86EMUL_CONTINUE;
  1719. }
  1720. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  1721. {
  1722. static int reported;
  1723. u8 opcodes[4];
  1724. unsigned long rip = vcpu->arch.rip;
  1725. unsigned long rip_linear;
  1726. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  1727. if (reported)
  1728. return;
  1729. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  1730. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  1731. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  1732. reported = 1;
  1733. }
  1734. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  1735. static struct x86_emulate_ops emulate_ops = {
  1736. .read_std = emulator_read_std,
  1737. .read_emulated = emulator_read_emulated,
  1738. .write_emulated = emulator_write_emulated,
  1739. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  1740. };
  1741. int emulate_instruction(struct kvm_vcpu *vcpu,
  1742. struct kvm_run *run,
  1743. unsigned long cr2,
  1744. u16 error_code,
  1745. int emulation_type)
  1746. {
  1747. int r;
  1748. struct decode_cache *c;
  1749. vcpu->arch.mmio_fault_cr2 = cr2;
  1750. kvm_x86_ops->cache_regs(vcpu);
  1751. vcpu->mmio_is_write = 0;
  1752. vcpu->arch.pio.string = 0;
  1753. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  1754. int cs_db, cs_l;
  1755. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  1756. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  1757. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  1758. vcpu->arch.emulate_ctxt.mode =
  1759. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  1760. ? X86EMUL_MODE_REAL : cs_l
  1761. ? X86EMUL_MODE_PROT64 : cs_db
  1762. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  1763. if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) {
  1764. vcpu->arch.emulate_ctxt.cs_base = 0;
  1765. vcpu->arch.emulate_ctxt.ds_base = 0;
  1766. vcpu->arch.emulate_ctxt.es_base = 0;
  1767. vcpu->arch.emulate_ctxt.ss_base = 0;
  1768. } else {
  1769. vcpu->arch.emulate_ctxt.cs_base =
  1770. get_segment_base(vcpu, VCPU_SREG_CS);
  1771. vcpu->arch.emulate_ctxt.ds_base =
  1772. get_segment_base(vcpu, VCPU_SREG_DS);
  1773. vcpu->arch.emulate_ctxt.es_base =
  1774. get_segment_base(vcpu, VCPU_SREG_ES);
  1775. vcpu->arch.emulate_ctxt.ss_base =
  1776. get_segment_base(vcpu, VCPU_SREG_SS);
  1777. }
  1778. vcpu->arch.emulate_ctxt.gs_base =
  1779. get_segment_base(vcpu, VCPU_SREG_GS);
  1780. vcpu->arch.emulate_ctxt.fs_base =
  1781. get_segment_base(vcpu, VCPU_SREG_FS);
  1782. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1783. /* Reject the instructions other than VMCALL/VMMCALL when
  1784. * try to emulate invalid opcode */
  1785. c = &vcpu->arch.emulate_ctxt.decode;
  1786. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  1787. (!(c->twobyte && c->b == 0x01 &&
  1788. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  1789. c->modrm_mod == 3 && c->modrm_rm == 1)))
  1790. return EMULATE_FAIL;
  1791. ++vcpu->stat.insn_emulation;
  1792. if (r) {
  1793. ++vcpu->stat.insn_emulation_fail;
  1794. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1795. return EMULATE_DONE;
  1796. return EMULATE_FAIL;
  1797. }
  1798. }
  1799. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  1800. if (vcpu->arch.pio.string)
  1801. return EMULATE_DO_MMIO;
  1802. if ((r || vcpu->mmio_is_write) && run) {
  1803. run->exit_reason = KVM_EXIT_MMIO;
  1804. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  1805. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  1806. run->mmio.len = vcpu->mmio_size;
  1807. run->mmio.is_write = vcpu->mmio_is_write;
  1808. }
  1809. if (r) {
  1810. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  1811. return EMULATE_DONE;
  1812. if (!vcpu->mmio_needed) {
  1813. kvm_report_emulation_failure(vcpu, "mmio");
  1814. return EMULATE_FAIL;
  1815. }
  1816. return EMULATE_DO_MMIO;
  1817. }
  1818. kvm_x86_ops->decache_regs(vcpu);
  1819. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  1820. if (vcpu->mmio_is_write) {
  1821. vcpu->mmio_needed = 0;
  1822. return EMULATE_DO_MMIO;
  1823. }
  1824. return EMULATE_DONE;
  1825. }
  1826. EXPORT_SYMBOL_GPL(emulate_instruction);
  1827. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  1828. {
  1829. int i;
  1830. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  1831. if (vcpu->arch.pio.guest_pages[i]) {
  1832. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  1833. vcpu->arch.pio.guest_pages[i] = NULL;
  1834. }
  1835. }
  1836. static int pio_copy_data(struct kvm_vcpu *vcpu)
  1837. {
  1838. void *p = vcpu->arch.pio_data;
  1839. void *q;
  1840. unsigned bytes;
  1841. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  1842. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  1843. PAGE_KERNEL);
  1844. if (!q) {
  1845. free_pio_guest_pages(vcpu);
  1846. return -ENOMEM;
  1847. }
  1848. q += vcpu->arch.pio.guest_page_offset;
  1849. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  1850. if (vcpu->arch.pio.in)
  1851. memcpy(q, p, bytes);
  1852. else
  1853. memcpy(p, q, bytes);
  1854. q -= vcpu->arch.pio.guest_page_offset;
  1855. vunmap(q);
  1856. free_pio_guest_pages(vcpu);
  1857. return 0;
  1858. }
  1859. int complete_pio(struct kvm_vcpu *vcpu)
  1860. {
  1861. struct kvm_pio_request *io = &vcpu->arch.pio;
  1862. long delta;
  1863. int r;
  1864. kvm_x86_ops->cache_regs(vcpu);
  1865. if (!io->string) {
  1866. if (io->in)
  1867. memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data,
  1868. io->size);
  1869. } else {
  1870. if (io->in) {
  1871. r = pio_copy_data(vcpu);
  1872. if (r) {
  1873. kvm_x86_ops->cache_regs(vcpu);
  1874. return r;
  1875. }
  1876. }
  1877. delta = 1;
  1878. if (io->rep) {
  1879. delta *= io->cur_count;
  1880. /*
  1881. * The size of the register should really depend on
  1882. * current address size.
  1883. */
  1884. vcpu->arch.regs[VCPU_REGS_RCX] -= delta;
  1885. }
  1886. if (io->down)
  1887. delta = -delta;
  1888. delta *= io->size;
  1889. if (io->in)
  1890. vcpu->arch.regs[VCPU_REGS_RDI] += delta;
  1891. else
  1892. vcpu->arch.regs[VCPU_REGS_RSI] += delta;
  1893. }
  1894. kvm_x86_ops->decache_regs(vcpu);
  1895. io->count -= io->cur_count;
  1896. io->cur_count = 0;
  1897. return 0;
  1898. }
  1899. static void kernel_pio(struct kvm_io_device *pio_dev,
  1900. struct kvm_vcpu *vcpu,
  1901. void *pd)
  1902. {
  1903. /* TODO: String I/O for in kernel device */
  1904. mutex_lock(&vcpu->kvm->lock);
  1905. if (vcpu->arch.pio.in)
  1906. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  1907. vcpu->arch.pio.size,
  1908. pd);
  1909. else
  1910. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  1911. vcpu->arch.pio.size,
  1912. pd);
  1913. mutex_unlock(&vcpu->kvm->lock);
  1914. }
  1915. static void pio_string_write(struct kvm_io_device *pio_dev,
  1916. struct kvm_vcpu *vcpu)
  1917. {
  1918. struct kvm_pio_request *io = &vcpu->arch.pio;
  1919. void *pd = vcpu->arch.pio_data;
  1920. int i;
  1921. mutex_lock(&vcpu->kvm->lock);
  1922. for (i = 0; i < io->cur_count; i++) {
  1923. kvm_iodevice_write(pio_dev, io->port,
  1924. io->size,
  1925. pd);
  1926. pd += io->size;
  1927. }
  1928. mutex_unlock(&vcpu->kvm->lock);
  1929. }
  1930. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  1931. gpa_t addr)
  1932. {
  1933. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr);
  1934. }
  1935. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1936. int size, unsigned port)
  1937. {
  1938. struct kvm_io_device *pio_dev;
  1939. vcpu->run->exit_reason = KVM_EXIT_IO;
  1940. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1941. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1942. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1943. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  1944. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1945. vcpu->arch.pio.in = in;
  1946. vcpu->arch.pio.string = 0;
  1947. vcpu->arch.pio.down = 0;
  1948. vcpu->arch.pio.guest_page_offset = 0;
  1949. vcpu->arch.pio.rep = 0;
  1950. kvm_x86_ops->cache_regs(vcpu);
  1951. memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4);
  1952. kvm_x86_ops->decache_regs(vcpu);
  1953. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1954. pio_dev = vcpu_find_pio_dev(vcpu, port);
  1955. if (pio_dev) {
  1956. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  1957. complete_pio(vcpu);
  1958. return 1;
  1959. }
  1960. return 0;
  1961. }
  1962. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  1963. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  1964. int size, unsigned long count, int down,
  1965. gva_t address, int rep, unsigned port)
  1966. {
  1967. unsigned now, in_page;
  1968. int i, ret = 0;
  1969. int nr_pages = 1;
  1970. struct page *page;
  1971. struct kvm_io_device *pio_dev;
  1972. vcpu->run->exit_reason = KVM_EXIT_IO;
  1973. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  1974. vcpu->run->io.size = vcpu->arch.pio.size = size;
  1975. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  1976. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  1977. vcpu->run->io.port = vcpu->arch.pio.port = port;
  1978. vcpu->arch.pio.in = in;
  1979. vcpu->arch.pio.string = 1;
  1980. vcpu->arch.pio.down = down;
  1981. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  1982. vcpu->arch.pio.rep = rep;
  1983. if (!count) {
  1984. kvm_x86_ops->skip_emulated_instruction(vcpu);
  1985. return 1;
  1986. }
  1987. if (!down)
  1988. in_page = PAGE_SIZE - offset_in_page(address);
  1989. else
  1990. in_page = offset_in_page(address) + size;
  1991. now = min(count, (unsigned long)in_page / size);
  1992. if (!now) {
  1993. /*
  1994. * String I/O straddles page boundary. Pin two guest pages
  1995. * so that we satisfy atomicity constraints. Do just one
  1996. * transaction to avoid complexity.
  1997. */
  1998. nr_pages = 2;
  1999. now = 1;
  2000. }
  2001. if (down) {
  2002. /*
  2003. * String I/O in reverse. Yuck. Kill the guest, fix later.
  2004. */
  2005. pr_unimpl(vcpu, "guest string pio down\n");
  2006. kvm_inject_gp(vcpu, 0);
  2007. return 1;
  2008. }
  2009. vcpu->run->io.count = now;
  2010. vcpu->arch.pio.cur_count = now;
  2011. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  2012. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2013. for (i = 0; i < nr_pages; ++i) {
  2014. down_read(&vcpu->kvm->slots_lock);
  2015. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  2016. vcpu->arch.pio.guest_pages[i] = page;
  2017. up_read(&vcpu->kvm->slots_lock);
  2018. if (!page) {
  2019. kvm_inject_gp(vcpu, 0);
  2020. free_pio_guest_pages(vcpu);
  2021. return 1;
  2022. }
  2023. }
  2024. pio_dev = vcpu_find_pio_dev(vcpu, port);
  2025. if (!vcpu->arch.pio.in) {
  2026. /* string PIO write */
  2027. ret = pio_copy_data(vcpu);
  2028. if (ret >= 0 && pio_dev) {
  2029. pio_string_write(pio_dev, vcpu);
  2030. complete_pio(vcpu);
  2031. if (vcpu->arch.pio.count == 0)
  2032. ret = 1;
  2033. }
  2034. } else if (pio_dev)
  2035. pr_unimpl(vcpu, "no string pio read support yet, "
  2036. "port %x size %d count %ld\n",
  2037. port, size, count);
  2038. return ret;
  2039. }
  2040. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  2041. int kvm_arch_init(void *opaque)
  2042. {
  2043. int r;
  2044. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  2045. if (kvm_x86_ops) {
  2046. printk(KERN_ERR "kvm: already loaded the other module\n");
  2047. r = -EEXIST;
  2048. goto out;
  2049. }
  2050. if (!ops->cpu_has_kvm_support()) {
  2051. printk(KERN_ERR "kvm: no hardware support\n");
  2052. r = -EOPNOTSUPP;
  2053. goto out;
  2054. }
  2055. if (ops->disabled_by_bios()) {
  2056. printk(KERN_ERR "kvm: disabled by bios\n");
  2057. r = -EOPNOTSUPP;
  2058. goto out;
  2059. }
  2060. r = kvm_mmu_module_init();
  2061. if (r)
  2062. goto out;
  2063. kvm_init_msr_list();
  2064. kvm_x86_ops = ops;
  2065. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  2066. return 0;
  2067. out:
  2068. return r;
  2069. }
  2070. void kvm_arch_exit(void)
  2071. {
  2072. kvm_x86_ops = NULL;
  2073. kvm_mmu_module_exit();
  2074. }
  2075. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  2076. {
  2077. ++vcpu->stat.halt_exits;
  2078. if (irqchip_in_kernel(vcpu->kvm)) {
  2079. vcpu->arch.mp_state = VCPU_MP_STATE_HALTED;
  2080. kvm_vcpu_block(vcpu);
  2081. if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE)
  2082. return -EINTR;
  2083. return 1;
  2084. } else {
  2085. vcpu->run->exit_reason = KVM_EXIT_HLT;
  2086. return 0;
  2087. }
  2088. }
  2089. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  2090. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  2091. {
  2092. unsigned long nr, a0, a1, a2, a3, ret;
  2093. kvm_x86_ops->cache_regs(vcpu);
  2094. nr = vcpu->arch.regs[VCPU_REGS_RAX];
  2095. a0 = vcpu->arch.regs[VCPU_REGS_RBX];
  2096. a1 = vcpu->arch.regs[VCPU_REGS_RCX];
  2097. a2 = vcpu->arch.regs[VCPU_REGS_RDX];
  2098. a3 = vcpu->arch.regs[VCPU_REGS_RSI];
  2099. if (!is_long_mode(vcpu)) {
  2100. nr &= 0xFFFFFFFF;
  2101. a0 &= 0xFFFFFFFF;
  2102. a1 &= 0xFFFFFFFF;
  2103. a2 &= 0xFFFFFFFF;
  2104. a3 &= 0xFFFFFFFF;
  2105. }
  2106. switch (nr) {
  2107. case KVM_HC_VAPIC_POLL_IRQ:
  2108. ret = 0;
  2109. break;
  2110. default:
  2111. ret = -KVM_ENOSYS;
  2112. break;
  2113. }
  2114. vcpu->arch.regs[VCPU_REGS_RAX] = ret;
  2115. kvm_x86_ops->decache_regs(vcpu);
  2116. ++vcpu->stat.hypercalls;
  2117. return 0;
  2118. }
  2119. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2120. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2121. {
  2122. char instruction[3];
  2123. int ret = 0;
  2124. /*
  2125. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2126. * to ensure that the updated hypercall appears atomically across all
  2127. * VCPUs.
  2128. */
  2129. kvm_mmu_zap_all(vcpu->kvm);
  2130. kvm_x86_ops->cache_regs(vcpu);
  2131. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2132. if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu)
  2133. != X86EMUL_CONTINUE)
  2134. ret = -EFAULT;
  2135. return ret;
  2136. }
  2137. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2138. {
  2139. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2140. }
  2141. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2142. {
  2143. struct descriptor_table dt = { limit, base };
  2144. kvm_x86_ops->set_gdt(vcpu, &dt);
  2145. }
  2146. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2147. {
  2148. struct descriptor_table dt = { limit, base };
  2149. kvm_x86_ops->set_idt(vcpu, &dt);
  2150. }
  2151. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2152. unsigned long *rflags)
  2153. {
  2154. kvm_lmsw(vcpu, msw);
  2155. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2156. }
  2157. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2158. {
  2159. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2160. switch (cr) {
  2161. case 0:
  2162. return vcpu->arch.cr0;
  2163. case 2:
  2164. return vcpu->arch.cr2;
  2165. case 3:
  2166. return vcpu->arch.cr3;
  2167. case 4:
  2168. return vcpu->arch.cr4;
  2169. case 8:
  2170. return kvm_get_cr8(vcpu);
  2171. default:
  2172. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2173. return 0;
  2174. }
  2175. }
  2176. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2177. unsigned long *rflags)
  2178. {
  2179. switch (cr) {
  2180. case 0:
  2181. kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2182. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2183. break;
  2184. case 2:
  2185. vcpu->arch.cr2 = val;
  2186. break;
  2187. case 3:
  2188. kvm_set_cr3(vcpu, val);
  2189. break;
  2190. case 4:
  2191. kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2192. break;
  2193. case 8:
  2194. kvm_set_cr8(vcpu, val & 0xfUL);
  2195. break;
  2196. default:
  2197. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr);
  2198. }
  2199. }
  2200. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2201. {
  2202. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2203. int j, nent = vcpu->arch.cpuid_nent;
  2204. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2205. /* when no next entry is found, the current entry[i] is reselected */
  2206. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2207. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2208. if (ej->function == e->function) {
  2209. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2210. return j;
  2211. }
  2212. }
  2213. return 0; /* silence gcc, even though control never reaches here */
  2214. }
  2215. /* find an entry with matching function, matching index (if needed), and that
  2216. * should be read next (if it's stateful) */
  2217. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2218. u32 function, u32 index)
  2219. {
  2220. if (e->function != function)
  2221. return 0;
  2222. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2223. return 0;
  2224. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2225. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2226. return 0;
  2227. return 1;
  2228. }
  2229. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2230. {
  2231. int i;
  2232. u32 function, index;
  2233. struct kvm_cpuid_entry2 *e, *best;
  2234. kvm_x86_ops->cache_regs(vcpu);
  2235. function = vcpu->arch.regs[VCPU_REGS_RAX];
  2236. index = vcpu->arch.regs[VCPU_REGS_RCX];
  2237. vcpu->arch.regs[VCPU_REGS_RAX] = 0;
  2238. vcpu->arch.regs[VCPU_REGS_RBX] = 0;
  2239. vcpu->arch.regs[VCPU_REGS_RCX] = 0;
  2240. vcpu->arch.regs[VCPU_REGS_RDX] = 0;
  2241. best = NULL;
  2242. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2243. e = &vcpu->arch.cpuid_entries[i];
  2244. if (is_matching_cpuid_entry(e, function, index)) {
  2245. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2246. move_to_next_stateful_cpuid_entry(vcpu, i);
  2247. best = e;
  2248. break;
  2249. }
  2250. /*
  2251. * Both basic or both extended?
  2252. */
  2253. if (((e->function ^ function) & 0x80000000) == 0)
  2254. if (!best || e->function > best->function)
  2255. best = e;
  2256. }
  2257. if (best) {
  2258. vcpu->arch.regs[VCPU_REGS_RAX] = best->eax;
  2259. vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx;
  2260. vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx;
  2261. vcpu->arch.regs[VCPU_REGS_RDX] = best->edx;
  2262. }
  2263. kvm_x86_ops->decache_regs(vcpu);
  2264. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2265. }
  2266. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2267. /*
  2268. * Check if userspace requested an interrupt window, and that the
  2269. * interrupt window is open.
  2270. *
  2271. * No need to exit to userspace if we already have an interrupt queued.
  2272. */
  2273. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2274. struct kvm_run *kvm_run)
  2275. {
  2276. return (!vcpu->arch.irq_summary &&
  2277. kvm_run->request_interrupt_window &&
  2278. vcpu->arch.interrupt_window_open &&
  2279. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2280. }
  2281. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2282. struct kvm_run *kvm_run)
  2283. {
  2284. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2285. kvm_run->cr8 = kvm_get_cr8(vcpu);
  2286. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2287. if (irqchip_in_kernel(vcpu->kvm))
  2288. kvm_run->ready_for_interrupt_injection = 1;
  2289. else
  2290. kvm_run->ready_for_interrupt_injection =
  2291. (vcpu->arch.interrupt_window_open &&
  2292. vcpu->arch.irq_summary == 0);
  2293. }
  2294. static void vapic_enter(struct kvm_vcpu *vcpu)
  2295. {
  2296. struct kvm_lapic *apic = vcpu->arch.apic;
  2297. struct page *page;
  2298. if (!apic || !apic->vapic_addr)
  2299. return;
  2300. down_read(&current->mm->mmap_sem);
  2301. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2302. up_read(&current->mm->mmap_sem);
  2303. vcpu->arch.apic->vapic_page = page;
  2304. }
  2305. static void vapic_exit(struct kvm_vcpu *vcpu)
  2306. {
  2307. struct kvm_lapic *apic = vcpu->arch.apic;
  2308. if (!apic || !apic->vapic_addr)
  2309. return;
  2310. kvm_release_page_dirty(apic->vapic_page);
  2311. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2312. }
  2313. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2314. {
  2315. int r;
  2316. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) {
  2317. pr_debug("vcpu %d received sipi with vector # %x\n",
  2318. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2319. kvm_lapic_reset(vcpu);
  2320. r = kvm_x86_ops->vcpu_reset(vcpu);
  2321. if (r)
  2322. return r;
  2323. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2324. }
  2325. vapic_enter(vcpu);
  2326. preempted:
  2327. if (vcpu->guest_debug.enabled)
  2328. kvm_x86_ops->guest_debug_pre(vcpu);
  2329. again:
  2330. if (vcpu->requests)
  2331. if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
  2332. kvm_mmu_unload(vcpu);
  2333. r = kvm_mmu_reload(vcpu);
  2334. if (unlikely(r))
  2335. goto out;
  2336. if (vcpu->requests) {
  2337. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2338. __kvm_migrate_apic_timer(vcpu);
  2339. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2340. &vcpu->requests)) {
  2341. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2342. r = 0;
  2343. goto out;
  2344. }
  2345. if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
  2346. kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
  2347. r = 0;
  2348. goto out;
  2349. }
  2350. }
  2351. kvm_inject_pending_timer_irqs(vcpu);
  2352. preempt_disable();
  2353. kvm_x86_ops->prepare_guest_switch(vcpu);
  2354. kvm_load_guest_fpu(vcpu);
  2355. local_irq_disable();
  2356. if (need_resched()) {
  2357. local_irq_enable();
  2358. preempt_enable();
  2359. r = 1;
  2360. goto out;
  2361. }
  2362. if (vcpu->requests)
  2363. if (test_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) {
  2364. local_irq_enable();
  2365. preempt_enable();
  2366. r = 1;
  2367. goto out;
  2368. }
  2369. if (signal_pending(current)) {
  2370. local_irq_enable();
  2371. preempt_enable();
  2372. r = -EINTR;
  2373. kvm_run->exit_reason = KVM_EXIT_INTR;
  2374. ++vcpu->stat.signal_exits;
  2375. goto out;
  2376. }
  2377. if (vcpu->arch.exception.pending)
  2378. __queue_exception(vcpu);
  2379. else if (irqchip_in_kernel(vcpu->kvm))
  2380. kvm_x86_ops->inject_pending_irq(vcpu);
  2381. else
  2382. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2383. kvm_lapic_sync_to_vapic(vcpu);
  2384. vcpu->guest_mode = 1;
  2385. kvm_guest_enter();
  2386. if (vcpu->requests)
  2387. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2388. kvm_x86_ops->tlb_flush(vcpu);
  2389. kvm_x86_ops->run(vcpu, kvm_run);
  2390. vcpu->guest_mode = 0;
  2391. local_irq_enable();
  2392. ++vcpu->stat.exits;
  2393. /*
  2394. * We must have an instruction between local_irq_enable() and
  2395. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2396. * the interrupt shadow. The stat.exits increment will do nicely.
  2397. * But we need to prevent reordering, hence this barrier():
  2398. */
  2399. barrier();
  2400. kvm_guest_exit();
  2401. preempt_enable();
  2402. /*
  2403. * Profile KVM exit RIPs:
  2404. */
  2405. if (unlikely(prof_on == KVM_PROFILING)) {
  2406. kvm_x86_ops->cache_regs(vcpu);
  2407. profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip);
  2408. }
  2409. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2410. vcpu->arch.exception.pending = false;
  2411. kvm_lapic_sync_from_vapic(vcpu);
  2412. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2413. if (r > 0) {
  2414. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2415. r = -EINTR;
  2416. kvm_run->exit_reason = KVM_EXIT_INTR;
  2417. ++vcpu->stat.request_irq_exits;
  2418. goto out;
  2419. }
  2420. if (!need_resched())
  2421. goto again;
  2422. }
  2423. out:
  2424. if (r > 0) {
  2425. kvm_resched(vcpu);
  2426. goto preempted;
  2427. }
  2428. post_kvm_run_save(vcpu, kvm_run);
  2429. vapic_exit(vcpu);
  2430. return r;
  2431. }
  2432. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2433. {
  2434. int r;
  2435. sigset_t sigsaved;
  2436. vcpu_load(vcpu);
  2437. if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) {
  2438. kvm_vcpu_block(vcpu);
  2439. vcpu_put(vcpu);
  2440. return -EAGAIN;
  2441. }
  2442. if (vcpu->sigset_active)
  2443. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2444. /* re-sync apic's tpr */
  2445. if (!irqchip_in_kernel(vcpu->kvm))
  2446. kvm_set_cr8(vcpu, kvm_run->cr8);
  2447. if (vcpu->arch.pio.cur_count) {
  2448. r = complete_pio(vcpu);
  2449. if (r)
  2450. goto out;
  2451. }
  2452. #if CONFIG_HAS_IOMEM
  2453. if (vcpu->mmio_needed) {
  2454. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2455. vcpu->mmio_read_completed = 1;
  2456. vcpu->mmio_needed = 0;
  2457. r = emulate_instruction(vcpu, kvm_run,
  2458. vcpu->arch.mmio_fault_cr2, 0,
  2459. EMULTYPE_NO_DECODE);
  2460. if (r == EMULATE_DO_MMIO) {
  2461. /*
  2462. * Read-modify-write. Back to userspace.
  2463. */
  2464. r = 0;
  2465. goto out;
  2466. }
  2467. }
  2468. #endif
  2469. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) {
  2470. kvm_x86_ops->cache_regs(vcpu);
  2471. vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret;
  2472. kvm_x86_ops->decache_regs(vcpu);
  2473. }
  2474. r = __vcpu_run(vcpu, kvm_run);
  2475. out:
  2476. if (vcpu->sigset_active)
  2477. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2478. vcpu_put(vcpu);
  2479. return r;
  2480. }
  2481. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2482. {
  2483. vcpu_load(vcpu);
  2484. kvm_x86_ops->cache_regs(vcpu);
  2485. regs->rax = vcpu->arch.regs[VCPU_REGS_RAX];
  2486. regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX];
  2487. regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX];
  2488. regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX];
  2489. regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI];
  2490. regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI];
  2491. regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP];
  2492. regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP];
  2493. #ifdef CONFIG_X86_64
  2494. regs->r8 = vcpu->arch.regs[VCPU_REGS_R8];
  2495. regs->r9 = vcpu->arch.regs[VCPU_REGS_R9];
  2496. regs->r10 = vcpu->arch.regs[VCPU_REGS_R10];
  2497. regs->r11 = vcpu->arch.regs[VCPU_REGS_R11];
  2498. regs->r12 = vcpu->arch.regs[VCPU_REGS_R12];
  2499. regs->r13 = vcpu->arch.regs[VCPU_REGS_R13];
  2500. regs->r14 = vcpu->arch.regs[VCPU_REGS_R14];
  2501. regs->r15 = vcpu->arch.regs[VCPU_REGS_R15];
  2502. #endif
  2503. regs->rip = vcpu->arch.rip;
  2504. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2505. /*
  2506. * Don't leak debug flags in case they were set for guest debugging
  2507. */
  2508. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2509. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2510. vcpu_put(vcpu);
  2511. return 0;
  2512. }
  2513. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2514. {
  2515. vcpu_load(vcpu);
  2516. vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax;
  2517. vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx;
  2518. vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx;
  2519. vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx;
  2520. vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi;
  2521. vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi;
  2522. vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp;
  2523. vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp;
  2524. #ifdef CONFIG_X86_64
  2525. vcpu->arch.regs[VCPU_REGS_R8] = regs->r8;
  2526. vcpu->arch.regs[VCPU_REGS_R9] = regs->r9;
  2527. vcpu->arch.regs[VCPU_REGS_R10] = regs->r10;
  2528. vcpu->arch.regs[VCPU_REGS_R11] = regs->r11;
  2529. vcpu->arch.regs[VCPU_REGS_R12] = regs->r12;
  2530. vcpu->arch.regs[VCPU_REGS_R13] = regs->r13;
  2531. vcpu->arch.regs[VCPU_REGS_R14] = regs->r14;
  2532. vcpu->arch.regs[VCPU_REGS_R15] = regs->r15;
  2533. #endif
  2534. vcpu->arch.rip = regs->rip;
  2535. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2536. kvm_x86_ops->decache_regs(vcpu);
  2537. vcpu_put(vcpu);
  2538. return 0;
  2539. }
  2540. static void get_segment(struct kvm_vcpu *vcpu,
  2541. struct kvm_segment *var, int seg)
  2542. {
  2543. kvm_x86_ops->get_segment(vcpu, var, seg);
  2544. }
  2545. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2546. {
  2547. struct kvm_segment cs;
  2548. get_segment(vcpu, &cs, VCPU_SREG_CS);
  2549. *db = cs.db;
  2550. *l = cs.l;
  2551. }
  2552. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2553. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2554. struct kvm_sregs *sregs)
  2555. {
  2556. struct descriptor_table dt;
  2557. int pending_vec;
  2558. vcpu_load(vcpu);
  2559. get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2560. get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2561. get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2562. get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2563. get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2564. get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2565. get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2566. get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2567. kvm_x86_ops->get_idt(vcpu, &dt);
  2568. sregs->idt.limit = dt.limit;
  2569. sregs->idt.base = dt.base;
  2570. kvm_x86_ops->get_gdt(vcpu, &dt);
  2571. sregs->gdt.limit = dt.limit;
  2572. sregs->gdt.base = dt.base;
  2573. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2574. sregs->cr0 = vcpu->arch.cr0;
  2575. sregs->cr2 = vcpu->arch.cr2;
  2576. sregs->cr3 = vcpu->arch.cr3;
  2577. sregs->cr4 = vcpu->arch.cr4;
  2578. sregs->cr8 = kvm_get_cr8(vcpu);
  2579. sregs->efer = vcpu->arch.shadow_efer;
  2580. sregs->apic_base = kvm_get_apic_base(vcpu);
  2581. if (irqchip_in_kernel(vcpu->kvm)) {
  2582. memset(sregs->interrupt_bitmap, 0,
  2583. sizeof sregs->interrupt_bitmap);
  2584. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2585. if (pending_vec >= 0)
  2586. set_bit(pending_vec,
  2587. (unsigned long *)sregs->interrupt_bitmap);
  2588. } else
  2589. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2590. sizeof sregs->interrupt_bitmap);
  2591. vcpu_put(vcpu);
  2592. return 0;
  2593. }
  2594. static void set_segment(struct kvm_vcpu *vcpu,
  2595. struct kvm_segment *var, int seg)
  2596. {
  2597. kvm_x86_ops->set_segment(vcpu, var, seg);
  2598. }
  2599. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  2600. struct kvm_sregs *sregs)
  2601. {
  2602. int mmu_reset_needed = 0;
  2603. int i, pending_vec, max_bits;
  2604. struct descriptor_table dt;
  2605. vcpu_load(vcpu);
  2606. dt.limit = sregs->idt.limit;
  2607. dt.base = sregs->idt.base;
  2608. kvm_x86_ops->set_idt(vcpu, &dt);
  2609. dt.limit = sregs->gdt.limit;
  2610. dt.base = sregs->gdt.base;
  2611. kvm_x86_ops->set_gdt(vcpu, &dt);
  2612. vcpu->arch.cr2 = sregs->cr2;
  2613. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  2614. vcpu->arch.cr3 = sregs->cr3;
  2615. kvm_set_cr8(vcpu, sregs->cr8);
  2616. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  2617. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  2618. kvm_set_apic_base(vcpu, sregs->apic_base);
  2619. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2620. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  2621. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  2622. vcpu->arch.cr0 = sregs->cr0;
  2623. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  2624. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  2625. if (!is_long_mode(vcpu) && is_pae(vcpu))
  2626. load_pdptrs(vcpu, vcpu->arch.cr3);
  2627. if (mmu_reset_needed)
  2628. kvm_mmu_reset_context(vcpu);
  2629. if (!irqchip_in_kernel(vcpu->kvm)) {
  2630. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  2631. sizeof vcpu->arch.irq_pending);
  2632. vcpu->arch.irq_summary = 0;
  2633. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  2634. if (vcpu->arch.irq_pending[i])
  2635. __set_bit(i, &vcpu->arch.irq_summary);
  2636. } else {
  2637. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  2638. pending_vec = find_first_bit(
  2639. (const unsigned long *)sregs->interrupt_bitmap,
  2640. max_bits);
  2641. /* Only pending external irq is handled here */
  2642. if (pending_vec < max_bits) {
  2643. kvm_x86_ops->set_irq(vcpu, pending_vec);
  2644. pr_debug("Set back pending irq %d\n",
  2645. pending_vec);
  2646. }
  2647. }
  2648. set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2649. set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2650. set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2651. set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2652. set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2653. set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2654. set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2655. set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2656. vcpu_put(vcpu);
  2657. return 0;
  2658. }
  2659. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  2660. struct kvm_debug_guest *dbg)
  2661. {
  2662. int r;
  2663. vcpu_load(vcpu);
  2664. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  2665. vcpu_put(vcpu);
  2666. return r;
  2667. }
  2668. /*
  2669. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  2670. * we have asm/x86/processor.h
  2671. */
  2672. struct fxsave {
  2673. u16 cwd;
  2674. u16 swd;
  2675. u16 twd;
  2676. u16 fop;
  2677. u64 rip;
  2678. u64 rdp;
  2679. u32 mxcsr;
  2680. u32 mxcsr_mask;
  2681. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  2682. #ifdef CONFIG_X86_64
  2683. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  2684. #else
  2685. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  2686. #endif
  2687. };
  2688. /*
  2689. * Translate a guest virtual address to a guest physical address.
  2690. */
  2691. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  2692. struct kvm_translation *tr)
  2693. {
  2694. unsigned long vaddr = tr->linear_address;
  2695. gpa_t gpa;
  2696. vcpu_load(vcpu);
  2697. down_read(&vcpu->kvm->slots_lock);
  2698. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  2699. up_read(&vcpu->kvm->slots_lock);
  2700. tr->physical_address = gpa;
  2701. tr->valid = gpa != UNMAPPED_GVA;
  2702. tr->writeable = 1;
  2703. tr->usermode = 0;
  2704. vcpu_put(vcpu);
  2705. return 0;
  2706. }
  2707. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2708. {
  2709. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2710. vcpu_load(vcpu);
  2711. memcpy(fpu->fpr, fxsave->st_space, 128);
  2712. fpu->fcw = fxsave->cwd;
  2713. fpu->fsw = fxsave->swd;
  2714. fpu->ftwx = fxsave->twd;
  2715. fpu->last_opcode = fxsave->fop;
  2716. fpu->last_ip = fxsave->rip;
  2717. fpu->last_dp = fxsave->rdp;
  2718. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  2719. vcpu_put(vcpu);
  2720. return 0;
  2721. }
  2722. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  2723. {
  2724. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  2725. vcpu_load(vcpu);
  2726. memcpy(fxsave->st_space, fpu->fpr, 128);
  2727. fxsave->cwd = fpu->fcw;
  2728. fxsave->swd = fpu->fsw;
  2729. fxsave->twd = fpu->ftwx;
  2730. fxsave->fop = fpu->last_opcode;
  2731. fxsave->rip = fpu->last_ip;
  2732. fxsave->rdp = fpu->last_dp;
  2733. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  2734. vcpu_put(vcpu);
  2735. return 0;
  2736. }
  2737. void fx_init(struct kvm_vcpu *vcpu)
  2738. {
  2739. unsigned after_mxcsr_mask;
  2740. /* Initialize guest FPU by resetting ours and saving into guest's */
  2741. preempt_disable();
  2742. fx_save(&vcpu->arch.host_fx_image);
  2743. fpu_init();
  2744. fx_save(&vcpu->arch.guest_fx_image);
  2745. fx_restore(&vcpu->arch.host_fx_image);
  2746. preempt_enable();
  2747. vcpu->arch.cr0 |= X86_CR0_ET;
  2748. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  2749. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  2750. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  2751. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  2752. }
  2753. EXPORT_SYMBOL_GPL(fx_init);
  2754. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  2755. {
  2756. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  2757. return;
  2758. vcpu->guest_fpu_loaded = 1;
  2759. fx_save(&vcpu->arch.host_fx_image);
  2760. fx_restore(&vcpu->arch.guest_fx_image);
  2761. }
  2762. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  2763. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  2764. {
  2765. if (!vcpu->guest_fpu_loaded)
  2766. return;
  2767. vcpu->guest_fpu_loaded = 0;
  2768. fx_save(&vcpu->arch.guest_fx_image);
  2769. fx_restore(&vcpu->arch.host_fx_image);
  2770. ++vcpu->stat.fpu_reload;
  2771. }
  2772. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  2773. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  2774. {
  2775. kvm_x86_ops->vcpu_free(vcpu);
  2776. }
  2777. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  2778. unsigned int id)
  2779. {
  2780. return kvm_x86_ops->vcpu_create(kvm, id);
  2781. }
  2782. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  2783. {
  2784. int r;
  2785. /* We do fxsave: this must be aligned. */
  2786. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  2787. vcpu_load(vcpu);
  2788. r = kvm_arch_vcpu_reset(vcpu);
  2789. if (r == 0)
  2790. r = kvm_mmu_setup(vcpu);
  2791. vcpu_put(vcpu);
  2792. if (r < 0)
  2793. goto free_vcpu;
  2794. return 0;
  2795. free_vcpu:
  2796. kvm_x86_ops->vcpu_free(vcpu);
  2797. return r;
  2798. }
  2799. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  2800. {
  2801. vcpu_load(vcpu);
  2802. kvm_mmu_unload(vcpu);
  2803. vcpu_put(vcpu);
  2804. kvm_x86_ops->vcpu_free(vcpu);
  2805. }
  2806. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  2807. {
  2808. return kvm_x86_ops->vcpu_reset(vcpu);
  2809. }
  2810. void kvm_arch_hardware_enable(void *garbage)
  2811. {
  2812. kvm_x86_ops->hardware_enable(garbage);
  2813. }
  2814. void kvm_arch_hardware_disable(void *garbage)
  2815. {
  2816. kvm_x86_ops->hardware_disable(garbage);
  2817. }
  2818. int kvm_arch_hardware_setup(void)
  2819. {
  2820. return kvm_x86_ops->hardware_setup();
  2821. }
  2822. void kvm_arch_hardware_unsetup(void)
  2823. {
  2824. kvm_x86_ops->hardware_unsetup();
  2825. }
  2826. void kvm_arch_check_processor_compat(void *rtn)
  2827. {
  2828. kvm_x86_ops->check_processor_compatibility(rtn);
  2829. }
  2830. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  2831. {
  2832. struct page *page;
  2833. struct kvm *kvm;
  2834. int r;
  2835. BUG_ON(vcpu->kvm == NULL);
  2836. kvm = vcpu->kvm;
  2837. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2838. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  2839. vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE;
  2840. else
  2841. vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED;
  2842. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  2843. if (!page) {
  2844. r = -ENOMEM;
  2845. goto fail;
  2846. }
  2847. vcpu->arch.pio_data = page_address(page);
  2848. r = kvm_mmu_create(vcpu);
  2849. if (r < 0)
  2850. goto fail_free_pio_data;
  2851. if (irqchip_in_kernel(kvm)) {
  2852. r = kvm_create_lapic(vcpu);
  2853. if (r < 0)
  2854. goto fail_mmu_destroy;
  2855. }
  2856. return 0;
  2857. fail_mmu_destroy:
  2858. kvm_mmu_destroy(vcpu);
  2859. fail_free_pio_data:
  2860. free_page((unsigned long)vcpu->arch.pio_data);
  2861. fail:
  2862. return r;
  2863. }
  2864. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  2865. {
  2866. kvm_free_lapic(vcpu);
  2867. kvm_mmu_destroy(vcpu);
  2868. free_page((unsigned long)vcpu->arch.pio_data);
  2869. }
  2870. struct kvm *kvm_arch_create_vm(void)
  2871. {
  2872. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  2873. if (!kvm)
  2874. return ERR_PTR(-ENOMEM);
  2875. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  2876. return kvm;
  2877. }
  2878. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  2879. {
  2880. vcpu_load(vcpu);
  2881. kvm_mmu_unload(vcpu);
  2882. vcpu_put(vcpu);
  2883. }
  2884. static void kvm_free_vcpus(struct kvm *kvm)
  2885. {
  2886. unsigned int i;
  2887. /*
  2888. * Unpin any mmu pages first.
  2889. */
  2890. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  2891. if (kvm->vcpus[i])
  2892. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  2893. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  2894. if (kvm->vcpus[i]) {
  2895. kvm_arch_vcpu_free(kvm->vcpus[i]);
  2896. kvm->vcpus[i] = NULL;
  2897. }
  2898. }
  2899. }
  2900. void kvm_arch_destroy_vm(struct kvm *kvm)
  2901. {
  2902. kfree(kvm->arch.vpic);
  2903. kfree(kvm->arch.vioapic);
  2904. kvm_free_vcpus(kvm);
  2905. kvm_free_physmem(kvm);
  2906. kfree(kvm);
  2907. }
  2908. int kvm_arch_set_memory_region(struct kvm *kvm,
  2909. struct kvm_userspace_memory_region *mem,
  2910. struct kvm_memory_slot old,
  2911. int user_alloc)
  2912. {
  2913. int npages = mem->memory_size >> PAGE_SHIFT;
  2914. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  2915. /*To keep backward compatibility with older userspace,
  2916. *x86 needs to hanlde !user_alloc case.
  2917. */
  2918. if (!user_alloc) {
  2919. if (npages && !old.rmap) {
  2920. down_write(&current->mm->mmap_sem);
  2921. memslot->userspace_addr = do_mmap(NULL, 0,
  2922. npages * PAGE_SIZE,
  2923. PROT_READ | PROT_WRITE,
  2924. MAP_SHARED | MAP_ANONYMOUS,
  2925. 0);
  2926. up_write(&current->mm->mmap_sem);
  2927. if (IS_ERR((void *)memslot->userspace_addr))
  2928. return PTR_ERR((void *)memslot->userspace_addr);
  2929. } else {
  2930. if (!old.user_alloc && old.rmap) {
  2931. int ret;
  2932. down_write(&current->mm->mmap_sem);
  2933. ret = do_munmap(current->mm, old.userspace_addr,
  2934. old.npages * PAGE_SIZE);
  2935. up_write(&current->mm->mmap_sem);
  2936. if (ret < 0)
  2937. printk(KERN_WARNING
  2938. "kvm_vm_ioctl_set_memory_region: "
  2939. "failed to munmap memory\n");
  2940. }
  2941. }
  2942. }
  2943. if (!kvm->arch.n_requested_mmu_pages) {
  2944. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  2945. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  2946. }
  2947. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  2948. kvm_flush_remote_tlbs(kvm);
  2949. return 0;
  2950. }
  2951. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  2952. {
  2953. return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE
  2954. || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED;
  2955. }
  2956. static void vcpu_kick_intr(void *info)
  2957. {
  2958. #ifdef DEBUG
  2959. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  2960. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  2961. #endif
  2962. }
  2963. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  2964. {
  2965. int ipi_pcpu = vcpu->cpu;
  2966. if (waitqueue_active(&vcpu->wq)) {
  2967. wake_up_interruptible(&vcpu->wq);
  2968. ++vcpu->stat.halt_wakeup;
  2969. }
  2970. if (vcpu->guest_mode)
  2971. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0);
  2972. }