lpfc_init.c 54 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/delay.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/idr.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/kthread.h>
  27. #include <linux/pci.h>
  28. #include <linux/spinlock.h>
  29. #include <scsi/scsi.h>
  30. #include <scsi/scsi_device.h>
  31. #include <scsi/scsi_host.h>
  32. #include <scsi/scsi_transport_fc.h>
  33. #include "lpfc_hw.h"
  34. #include "lpfc_sli.h"
  35. #include "lpfc_disc.h"
  36. #include "lpfc_scsi.h"
  37. #include "lpfc.h"
  38. #include "lpfc_logmsg.h"
  39. #include "lpfc_crtn.h"
  40. #include "lpfc_version.h"
  41. static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
  42. static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
  43. static int lpfc_post_rcv_buf(struct lpfc_hba *);
  44. static struct scsi_transport_template *lpfc_transport_template = NULL;
  45. static DEFINE_IDR(lpfc_hba_index);
  46. /************************************************************************/
  47. /* */
  48. /* lpfc_config_port_prep */
  49. /* This routine will do LPFC initialization prior to the */
  50. /* CONFIG_PORT mailbox command. This will be initialized */
  51. /* as a SLI layer callback routine. */
  52. /* This routine returns 0 on success or -ERESTART if it wants */
  53. /* the SLI layer to reset the HBA and try again. Any */
  54. /* other return value indicates an error. */
  55. /* */
  56. /************************************************************************/
  57. int
  58. lpfc_config_port_prep(struct lpfc_hba * phba)
  59. {
  60. lpfc_vpd_t *vp = &phba->vpd;
  61. int i = 0, rc;
  62. LPFC_MBOXQ_t *pmb;
  63. MAILBOX_t *mb;
  64. char *lpfc_vpd_data = NULL;
  65. uint16_t offset = 0;
  66. static char licensed[56] =
  67. "key unlock for use with gnu public licensed code only\0";
  68. pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  69. if (!pmb) {
  70. phba->hba_state = LPFC_HBA_ERROR;
  71. return -ENOMEM;
  72. }
  73. mb = &pmb->mb;
  74. phba->hba_state = LPFC_INIT_MBX_CMDS;
  75. if (lpfc_is_LC_HBA(phba->pcidev->device)) {
  76. uint32_t *ptext = (uint32_t *) licensed;
  77. for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
  78. *ptext = cpu_to_be32(*ptext);
  79. lpfc_read_nv(phba, pmb);
  80. memset((char*)mb->un.varRDnvp.rsvd3, 0,
  81. sizeof (mb->un.varRDnvp.rsvd3));
  82. memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
  83. sizeof (licensed));
  84. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  85. if (rc != MBX_SUCCESS) {
  86. lpfc_printf_log(phba,
  87. KERN_ERR,
  88. LOG_MBOX,
  89. "%d:0324 Config Port initialization "
  90. "error, mbxCmd x%x READ_NVPARM, "
  91. "mbxStatus x%x\n",
  92. phba->brd_no,
  93. mb->mbxCommand, mb->mbxStatus);
  94. mempool_free(pmb, phba->mbox_mem_pool);
  95. return -ERESTART;
  96. }
  97. memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
  98. sizeof (mb->un.varRDnvp.nodename));
  99. }
  100. /* Setup and issue mailbox READ REV command */
  101. lpfc_read_rev(phba, pmb);
  102. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  103. if (rc != MBX_SUCCESS) {
  104. lpfc_printf_log(phba,
  105. KERN_ERR,
  106. LOG_INIT,
  107. "%d:0439 Adapter failed to init, mbxCmd x%x "
  108. "READ_REV, mbxStatus x%x\n",
  109. phba->brd_no,
  110. mb->mbxCommand, mb->mbxStatus);
  111. mempool_free( pmb, phba->mbox_mem_pool);
  112. return -ERESTART;
  113. }
  114. /*
  115. * The value of rr must be 1 since the driver set the cv field to 1.
  116. * This setting requires the FW to set all revision fields.
  117. */
  118. if (mb->un.varRdRev.rr == 0) {
  119. vp->rev.rBit = 0;
  120. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  121. "%d:0440 Adapter failed to init, READ_REV has "
  122. "missing revision information.\n",
  123. phba->brd_no);
  124. mempool_free(pmb, phba->mbox_mem_pool);
  125. return -ERESTART;
  126. }
  127. /* Save information as VPD data */
  128. vp->rev.rBit = 1;
  129. vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
  130. memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
  131. vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
  132. memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
  133. vp->rev.biuRev = mb->un.varRdRev.biuRev;
  134. vp->rev.smRev = mb->un.varRdRev.smRev;
  135. vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
  136. vp->rev.endecRev = mb->un.varRdRev.endecRev;
  137. vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
  138. vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
  139. vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
  140. vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
  141. vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
  142. vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
  143. if (lpfc_is_LC_HBA(phba->pcidev->device))
  144. memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
  145. sizeof (phba->RandomData));
  146. /* Get adapter VPD information */
  147. pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
  148. if (!pmb->context2)
  149. goto out_free_mbox;
  150. lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
  151. if (!lpfc_vpd_data)
  152. goto out_free_context2;
  153. do {
  154. lpfc_dump_mem(phba, pmb, offset);
  155. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  156. if (rc != MBX_SUCCESS) {
  157. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  158. "%d:0441 VPD not present on adapter, "
  159. "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
  160. phba->brd_no,
  161. mb->mbxCommand, mb->mbxStatus);
  162. mb->un.varDmp.word_cnt = 0;
  163. }
  164. if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
  165. mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
  166. lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
  167. mb->un.varDmp.word_cnt);
  168. offset += mb->un.varDmp.word_cnt;
  169. } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
  170. lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
  171. kfree(lpfc_vpd_data);
  172. out_free_context2:
  173. kfree(pmb->context2);
  174. out_free_mbox:
  175. mempool_free(pmb, phba->mbox_mem_pool);
  176. return 0;
  177. }
  178. /************************************************************************/
  179. /* */
  180. /* lpfc_config_port_post */
  181. /* This routine will do LPFC initialization after the */
  182. /* CONFIG_PORT mailbox command. This will be initialized */
  183. /* as a SLI layer callback routine. */
  184. /* This routine returns 0 on success. Any other return value */
  185. /* indicates an error. */
  186. /* */
  187. /************************************************************************/
  188. int
  189. lpfc_config_port_post(struct lpfc_hba * phba)
  190. {
  191. LPFC_MBOXQ_t *pmb;
  192. MAILBOX_t *mb;
  193. struct lpfc_dmabuf *mp;
  194. struct lpfc_sli *psli = &phba->sli;
  195. uint32_t status, timeout;
  196. int i, j, rc;
  197. pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  198. if (!pmb) {
  199. phba->hba_state = LPFC_HBA_ERROR;
  200. return -ENOMEM;
  201. }
  202. mb = &pmb->mb;
  203. lpfc_config_link(phba, pmb);
  204. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  205. if (rc != MBX_SUCCESS) {
  206. lpfc_printf_log(phba,
  207. KERN_ERR,
  208. LOG_INIT,
  209. "%d:0447 Adapter failed init, mbxCmd x%x "
  210. "CONFIG_LINK mbxStatus x%x\n",
  211. phba->brd_no,
  212. mb->mbxCommand, mb->mbxStatus);
  213. phba->hba_state = LPFC_HBA_ERROR;
  214. mempool_free( pmb, phba->mbox_mem_pool);
  215. return -EIO;
  216. }
  217. /* Get login parameters for NID. */
  218. lpfc_read_sparam(phba, pmb);
  219. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  220. lpfc_printf_log(phba,
  221. KERN_ERR,
  222. LOG_INIT,
  223. "%d:0448 Adapter failed init, mbxCmd x%x "
  224. "READ_SPARM mbxStatus x%x\n",
  225. phba->brd_no,
  226. mb->mbxCommand, mb->mbxStatus);
  227. phba->hba_state = LPFC_HBA_ERROR;
  228. mp = (struct lpfc_dmabuf *) pmb->context1;
  229. mempool_free( pmb, phba->mbox_mem_pool);
  230. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  231. kfree(mp);
  232. return -EIO;
  233. }
  234. mp = (struct lpfc_dmabuf *) pmb->context1;
  235. memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
  236. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  237. kfree(mp);
  238. pmb->context1 = NULL;
  239. memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
  240. sizeof (struct lpfc_name));
  241. memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
  242. sizeof (struct lpfc_name));
  243. /* If no serial number in VPD data, use low 6 bytes of WWNN */
  244. /* This should be consolidated into parse_vpd ? - mr */
  245. if (phba->SerialNumber[0] == 0) {
  246. uint8_t *outptr;
  247. outptr = &phba->fc_nodename.u.s.IEEE[0];
  248. for (i = 0; i < 12; i++) {
  249. status = *outptr++;
  250. j = ((status & 0xf0) >> 4);
  251. if (j <= 9)
  252. phba->SerialNumber[i] =
  253. (char)((uint8_t) 0x30 + (uint8_t) j);
  254. else
  255. phba->SerialNumber[i] =
  256. (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
  257. i++;
  258. j = (status & 0xf);
  259. if (j <= 9)
  260. phba->SerialNumber[i] =
  261. (char)((uint8_t) 0x30 + (uint8_t) j);
  262. else
  263. phba->SerialNumber[i] =
  264. (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
  265. }
  266. }
  267. /* This should turn on DELAYED ABTS for ELS timeouts */
  268. lpfc_set_slim(phba, pmb, 0x052198, 0x1);
  269. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  270. phba->hba_state = LPFC_HBA_ERROR;
  271. mempool_free( pmb, phba->mbox_mem_pool);
  272. return -EIO;
  273. }
  274. lpfc_read_config(phba, pmb);
  275. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  276. lpfc_printf_log(phba,
  277. KERN_ERR,
  278. LOG_INIT,
  279. "%d:0453 Adapter failed to init, mbxCmd x%x "
  280. "READ_CONFIG, mbxStatus x%x\n",
  281. phba->brd_no,
  282. mb->mbxCommand, mb->mbxStatus);
  283. phba->hba_state = LPFC_HBA_ERROR;
  284. mempool_free( pmb, phba->mbox_mem_pool);
  285. return -EIO;
  286. }
  287. /* Reset the DFT_HBA_Q_DEPTH to the max xri */
  288. if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
  289. phba->cfg_hba_queue_depth =
  290. mb->un.varRdConfig.max_xri + 1;
  291. phba->lmt = mb->un.varRdConfig.lmt;
  292. /* Get the default values for Model Name and Description */
  293. lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
  294. if ((phba->cfg_link_speed > LINK_SPEED_10G)
  295. || ((phba->cfg_link_speed == LINK_SPEED_1G)
  296. && !(phba->lmt & LMT_1Gb))
  297. || ((phba->cfg_link_speed == LINK_SPEED_2G)
  298. && !(phba->lmt & LMT_2Gb))
  299. || ((phba->cfg_link_speed == LINK_SPEED_4G)
  300. && !(phba->lmt & LMT_4Gb))
  301. || ((phba->cfg_link_speed == LINK_SPEED_8G)
  302. && !(phba->lmt & LMT_8Gb))
  303. || ((phba->cfg_link_speed == LINK_SPEED_10G)
  304. && !(phba->lmt & LMT_10Gb))) {
  305. /* Reset link speed to auto */
  306. lpfc_printf_log(phba,
  307. KERN_WARNING,
  308. LOG_LINK_EVENT,
  309. "%d:1302 Invalid speed for this board: "
  310. "Reset link speed to auto: x%x\n",
  311. phba->brd_no,
  312. phba->cfg_link_speed);
  313. phba->cfg_link_speed = LINK_SPEED_AUTO;
  314. }
  315. phba->hba_state = LPFC_LINK_DOWN;
  316. /* Only process IOCBs on ring 0 till hba_state is READY */
  317. if (psli->ring[psli->ip_ring].cmdringaddr)
  318. psli->ring[psli->ip_ring].flag |= LPFC_STOP_IOCB_EVENT;
  319. if (psli->ring[psli->fcp_ring].cmdringaddr)
  320. psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
  321. if (psli->ring[psli->next_ring].cmdringaddr)
  322. psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
  323. /* Post receive buffers for desired rings */
  324. lpfc_post_rcv_buf(phba);
  325. /* Enable appropriate host interrupts */
  326. spin_lock_irq(phba->host->host_lock);
  327. status = readl(phba->HCregaddr);
  328. status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
  329. if (psli->num_rings > 0)
  330. status |= HC_R0INT_ENA;
  331. if (psli->num_rings > 1)
  332. status |= HC_R1INT_ENA;
  333. if (psli->num_rings > 2)
  334. status |= HC_R2INT_ENA;
  335. if (psli->num_rings > 3)
  336. status |= HC_R3INT_ENA;
  337. if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
  338. (phba->cfg_poll & DISABLE_FCP_RING_INT))
  339. status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  340. writel(status, phba->HCregaddr);
  341. readl(phba->HCregaddr); /* flush */
  342. spin_unlock_irq(phba->host->host_lock);
  343. /*
  344. * Setup the ring 0 (els) timeout handler
  345. */
  346. timeout = phba->fc_ratov << 1;
  347. phba->els_tmofunc.expires = jiffies + HZ * timeout;
  348. add_timer(&phba->els_tmofunc);
  349. lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
  350. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  351. if (lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT) != MBX_SUCCESS) {
  352. lpfc_printf_log(phba,
  353. KERN_ERR,
  354. LOG_INIT,
  355. "%d:0454 Adapter failed to init, mbxCmd x%x "
  356. "INIT_LINK, mbxStatus x%x\n",
  357. phba->brd_no,
  358. mb->mbxCommand, mb->mbxStatus);
  359. /* Clear all interrupt enable conditions */
  360. writel(0, phba->HCregaddr);
  361. readl(phba->HCregaddr); /* flush */
  362. /* Clear all pending interrupts */
  363. writel(0xffffffff, phba->HAregaddr);
  364. readl(phba->HAregaddr); /* flush */
  365. phba->hba_state = LPFC_HBA_ERROR;
  366. mempool_free(pmb, phba->mbox_mem_pool);
  367. return -EIO;
  368. }
  369. /* MBOX buffer will be freed in mbox compl */
  370. i = 0;
  371. while ((phba->hba_state != LPFC_HBA_READY) ||
  372. (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
  373. ((phba->fc_map_cnt == 0) && (i<2)) ||
  374. (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
  375. /* Check every second for 30 retries. */
  376. i++;
  377. if (i > 30) {
  378. break;
  379. }
  380. if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
  381. /* The link is down. Set linkdown timeout */
  382. break;
  383. }
  384. /* Delay for 1 second to give discovery time to complete. */
  385. msleep(1000);
  386. }
  387. /* Since num_disc_nodes keys off of PLOGI, delay a bit to let
  388. * any potential PRLIs to flush thru the SLI sub-system.
  389. */
  390. msleep(50);
  391. return (0);
  392. }
  393. /************************************************************************/
  394. /* */
  395. /* lpfc_hba_down_prep */
  396. /* This routine will do LPFC uninitialization before the */
  397. /* HBA is reset when bringing down the SLI Layer. This will be */
  398. /* initialized as a SLI layer callback routine. */
  399. /* This routine returns 0 on success. Any other return value */
  400. /* indicates an error. */
  401. /* */
  402. /************************************************************************/
  403. int
  404. lpfc_hba_down_prep(struct lpfc_hba * phba)
  405. {
  406. /* Disable interrupts */
  407. writel(0, phba->HCregaddr);
  408. readl(phba->HCregaddr); /* flush */
  409. /* Cleanup potential discovery resources */
  410. lpfc_els_flush_rscn(phba);
  411. lpfc_els_flush_cmd(phba);
  412. lpfc_disc_flush_list(phba);
  413. /* Disable SLI2 since we disabled interrupts */
  414. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  415. return (0);
  416. }
  417. /************************************************************************/
  418. /* */
  419. /* lpfc_hba_down_post */
  420. /* This routine will do uninitialization after the HBA is reset */
  421. /* when bringing down the SLI Layer. */
  422. /* This routine returns 0 on success. Any other return value */
  423. /* indicates an error. */
  424. /* */
  425. /************************************************************************/
  426. int
  427. lpfc_hba_down_post(struct lpfc_hba * phba)
  428. {
  429. struct lpfc_sli *psli = &phba->sli;
  430. struct lpfc_sli_ring *pring;
  431. struct lpfc_dmabuf *mp, *next_mp;
  432. int i;
  433. /* Cleanup preposted buffers on the ELS ring */
  434. pring = &psli->ring[LPFC_ELS_RING];
  435. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  436. list_del(&mp->list);
  437. pring->postbufq_cnt--;
  438. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  439. kfree(mp);
  440. }
  441. for (i = 0; i < psli->num_rings; i++) {
  442. pring = &psli->ring[i];
  443. lpfc_sli_abort_iocb_ring(phba, pring);
  444. }
  445. return 0;
  446. }
  447. /************************************************************************/
  448. /* */
  449. /* lpfc_handle_eratt */
  450. /* This routine will handle processing a Host Attention */
  451. /* Error Status event. This will be initialized */
  452. /* as a SLI layer callback routine. */
  453. /* */
  454. /************************************************************************/
  455. void
  456. lpfc_handle_eratt(struct lpfc_hba * phba)
  457. {
  458. struct lpfc_sli *psli = &phba->sli;
  459. struct lpfc_sli_ring *pring;
  460. if (phba->work_hs & HS_FFER6) {
  461. /* Re-establishing Link */
  462. lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
  463. "%d:1301 Re-establishing Link "
  464. "Data: x%x x%x x%x\n",
  465. phba->brd_no, phba->work_hs,
  466. phba->work_status[0], phba->work_status[1]);
  467. spin_lock_irq(phba->host->host_lock);
  468. phba->fc_flag |= FC_ESTABLISH_LINK;
  469. spin_unlock_irq(phba->host->host_lock);
  470. /*
  471. * Firmware stops when it triggled erratt with HS_FFER6.
  472. * That could cause the I/Os dropped by the firmware.
  473. * Error iocb (I/O) on txcmplq and let the SCSI layer
  474. * retry it after re-establishing link.
  475. */
  476. pring = &psli->ring[psli->fcp_ring];
  477. lpfc_sli_abort_iocb_ring(phba, pring);
  478. /*
  479. * There was a firmware error. Take the hba offline and then
  480. * attempt to restart it.
  481. */
  482. lpfc_offline(phba);
  483. lpfc_sli_brdrestart(phba);
  484. if (lpfc_online(phba) == 0) { /* Initialize the HBA */
  485. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  486. return;
  487. }
  488. } else {
  489. /* The if clause above forces this code path when the status
  490. * failure is a value other than FFER6. Do not call the offline
  491. * twice. This is the adapter hardware error path.
  492. */
  493. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  494. "%d:0457 Adapter Hardware Error "
  495. "Data: x%x x%x x%x\n",
  496. phba->brd_no, phba->work_hs,
  497. phba->work_status[0], phba->work_status[1]);
  498. lpfc_offline(phba);
  499. phba->hba_state = LPFC_HBA_ERROR;
  500. lpfc_hba_down_post(phba);
  501. }
  502. }
  503. /************************************************************************/
  504. /* */
  505. /* lpfc_handle_latt */
  506. /* This routine will handle processing a Host Attention */
  507. /* Link Status event. This will be initialized */
  508. /* as a SLI layer callback routine. */
  509. /* */
  510. /************************************************************************/
  511. void
  512. lpfc_handle_latt(struct lpfc_hba * phba)
  513. {
  514. struct lpfc_sli *psli = &phba->sli;
  515. LPFC_MBOXQ_t *pmb;
  516. volatile uint32_t control;
  517. struct lpfc_dmabuf *mp;
  518. int rc = -ENOMEM;
  519. pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  520. if (!pmb)
  521. goto lpfc_handle_latt_err_exit;
  522. mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
  523. if (!mp)
  524. goto lpfc_handle_latt_free_pmb;
  525. mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
  526. if (!mp->virt)
  527. goto lpfc_handle_latt_free_mp;
  528. rc = -EIO;
  529. /* Cleanup any outstanding ELS commands */
  530. lpfc_els_flush_cmd(phba);
  531. psli->slistat.link_event++;
  532. lpfc_read_la(phba, pmb, mp);
  533. pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
  534. rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
  535. if (rc == MBX_NOT_FINISHED)
  536. goto lpfc_handle_latt_free_mp;
  537. /* Clear Link Attention in HA REG */
  538. spin_lock_irq(phba->host->host_lock);
  539. writel(HA_LATT, phba->HAregaddr);
  540. readl(phba->HAregaddr); /* flush */
  541. spin_unlock_irq(phba->host->host_lock);
  542. return;
  543. lpfc_handle_latt_free_mp:
  544. kfree(mp);
  545. lpfc_handle_latt_free_pmb:
  546. kfree(pmb);
  547. lpfc_handle_latt_err_exit:
  548. /* Enable Link attention interrupts */
  549. spin_lock_irq(phba->host->host_lock);
  550. psli->sli_flag |= LPFC_PROCESS_LA;
  551. control = readl(phba->HCregaddr);
  552. control |= HC_LAINT_ENA;
  553. writel(control, phba->HCregaddr);
  554. readl(phba->HCregaddr); /* flush */
  555. /* Clear Link Attention in HA REG */
  556. writel(HA_LATT, phba->HAregaddr);
  557. readl(phba->HAregaddr); /* flush */
  558. spin_unlock_irq(phba->host->host_lock);
  559. lpfc_linkdown(phba);
  560. phba->hba_state = LPFC_HBA_ERROR;
  561. /* The other case is an error from issue_mbox */
  562. if (rc == -ENOMEM)
  563. lpfc_printf_log(phba,
  564. KERN_WARNING,
  565. LOG_MBOX,
  566. "%d:0300 READ_LA: no buffers\n",
  567. phba->brd_no);
  568. return;
  569. }
  570. /************************************************************************/
  571. /* */
  572. /* lpfc_parse_vpd */
  573. /* This routine will parse the VPD data */
  574. /* */
  575. /************************************************************************/
  576. static int
  577. lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
  578. {
  579. uint8_t lenlo, lenhi;
  580. uint32_t Length;
  581. int i, j;
  582. int finished = 0;
  583. int index = 0;
  584. if (!vpd)
  585. return 0;
  586. /* Vital Product */
  587. lpfc_printf_log(phba,
  588. KERN_INFO,
  589. LOG_INIT,
  590. "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
  591. phba->brd_no,
  592. (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
  593. (uint32_t) vpd[3]);
  594. while (!finished && (index < (len - 4))) {
  595. switch (vpd[index]) {
  596. case 0x82:
  597. case 0x91:
  598. index += 1;
  599. lenlo = vpd[index];
  600. index += 1;
  601. lenhi = vpd[index];
  602. index += 1;
  603. i = ((((unsigned short)lenhi) << 8) + lenlo);
  604. index += i;
  605. break;
  606. case 0x90:
  607. index += 1;
  608. lenlo = vpd[index];
  609. index += 1;
  610. lenhi = vpd[index];
  611. index += 1;
  612. Length = ((((unsigned short)lenhi) << 8) + lenlo);
  613. if (Length > len - index)
  614. Length = len - index;
  615. while (Length > 0) {
  616. /* Look for Serial Number */
  617. if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
  618. index += 2;
  619. i = vpd[index];
  620. index += 1;
  621. j = 0;
  622. Length -= (3+i);
  623. while(i--) {
  624. phba->SerialNumber[j++] = vpd[index++];
  625. if (j == 31)
  626. break;
  627. }
  628. phba->SerialNumber[j] = 0;
  629. continue;
  630. }
  631. else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
  632. phba->vpd_flag |= VPD_MODEL_DESC;
  633. index += 2;
  634. i = vpd[index];
  635. index += 1;
  636. j = 0;
  637. Length -= (3+i);
  638. while(i--) {
  639. phba->ModelDesc[j++] = vpd[index++];
  640. if (j == 255)
  641. break;
  642. }
  643. phba->ModelDesc[j] = 0;
  644. continue;
  645. }
  646. else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
  647. phba->vpd_flag |= VPD_MODEL_NAME;
  648. index += 2;
  649. i = vpd[index];
  650. index += 1;
  651. j = 0;
  652. Length -= (3+i);
  653. while(i--) {
  654. phba->ModelName[j++] = vpd[index++];
  655. if (j == 79)
  656. break;
  657. }
  658. phba->ModelName[j] = 0;
  659. continue;
  660. }
  661. else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
  662. phba->vpd_flag |= VPD_PROGRAM_TYPE;
  663. index += 2;
  664. i = vpd[index];
  665. index += 1;
  666. j = 0;
  667. Length -= (3+i);
  668. while(i--) {
  669. phba->ProgramType[j++] = vpd[index++];
  670. if (j == 255)
  671. break;
  672. }
  673. phba->ProgramType[j] = 0;
  674. continue;
  675. }
  676. else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
  677. phba->vpd_flag |= VPD_PORT;
  678. index += 2;
  679. i = vpd[index];
  680. index += 1;
  681. j = 0;
  682. Length -= (3+i);
  683. while(i--) {
  684. phba->Port[j++] = vpd[index++];
  685. if (j == 19)
  686. break;
  687. }
  688. phba->Port[j] = 0;
  689. continue;
  690. }
  691. else {
  692. index += 2;
  693. i = vpd[index];
  694. index += 1;
  695. index += i;
  696. Length -= (3 + i);
  697. }
  698. }
  699. finished = 0;
  700. break;
  701. case 0x78:
  702. finished = 1;
  703. break;
  704. default:
  705. index ++;
  706. break;
  707. }
  708. }
  709. return(1);
  710. }
  711. static void
  712. lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
  713. {
  714. lpfc_vpd_t *vp;
  715. uint16_t dev_id = phba->pcidev->device;
  716. uint16_t dev_subid = phba->pcidev->subsystem_device;
  717. uint8_t hdrtype;
  718. int max_speed;
  719. char * ports;
  720. struct {
  721. char * name;
  722. int max_speed;
  723. char * ports;
  724. char * bus;
  725. } m;
  726. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  727. ports = (hdrtype == 0x80) ? "2-port " : "";
  728. if (mdp && mdp[0] != '\0'
  729. && descp && descp[0] != '\0')
  730. return;
  731. if (phba->lmt & LMT_10Gb)
  732. max_speed = 10;
  733. else if (phba->lmt & LMT_8Gb)
  734. max_speed = 8;
  735. else if (phba->lmt & LMT_4Gb)
  736. max_speed = 4;
  737. else if (phba->lmt & LMT_2Gb)
  738. max_speed = 2;
  739. else
  740. max_speed = 1;
  741. vp = &phba->vpd;
  742. switch (dev_id) {
  743. case PCI_DEVICE_ID_FIREFLY:
  744. m = (typeof(m)){"LP6000", max_speed, "", "PCI"};
  745. break;
  746. case PCI_DEVICE_ID_SUPERFLY:
  747. if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
  748. m = (typeof(m)){"LP7000", max_speed, "", "PCI"};
  749. else
  750. m = (typeof(m)){"LP7000E", max_speed, "", "PCI"};
  751. break;
  752. case PCI_DEVICE_ID_DRAGONFLY:
  753. m = (typeof(m)){"LP8000", max_speed, "", "PCI"};
  754. break;
  755. case PCI_DEVICE_ID_CENTAUR:
  756. if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
  757. m = (typeof(m)){"LP9002", max_speed, "", "PCI"};
  758. else
  759. m = (typeof(m)){"LP9000", max_speed, "", "PCI"};
  760. break;
  761. case PCI_DEVICE_ID_RFLY:
  762. m = (typeof(m)){"LP952", max_speed, "", "PCI"};
  763. break;
  764. case PCI_DEVICE_ID_PEGASUS:
  765. m = (typeof(m)){"LP9802", max_speed, "", "PCI-X"};
  766. break;
  767. case PCI_DEVICE_ID_THOR:
  768. if (hdrtype == 0x80)
  769. m = (typeof(m)){"LP10000DC",
  770. max_speed, ports, "PCI-X"};
  771. else
  772. m = (typeof(m)){"LP10000",
  773. max_speed, ports, "PCI-X"};
  774. break;
  775. case PCI_DEVICE_ID_VIPER:
  776. m = (typeof(m)){"LPX1000", max_speed, "", "PCI-X"};
  777. break;
  778. case PCI_DEVICE_ID_PFLY:
  779. m = (typeof(m)){"LP982", max_speed, "", "PCI-X"};
  780. break;
  781. case PCI_DEVICE_ID_TFLY:
  782. if (hdrtype == 0x80)
  783. m = (typeof(m)){"LP1050DC", max_speed, ports, "PCI-X"};
  784. else
  785. m = (typeof(m)){"LP1050", max_speed, ports, "PCI-X"};
  786. break;
  787. case PCI_DEVICE_ID_HELIOS:
  788. if (hdrtype == 0x80)
  789. m = (typeof(m)){"LP11002", max_speed, ports, "PCI-X2"};
  790. else
  791. m = (typeof(m)){"LP11000", max_speed, ports, "PCI-X2"};
  792. break;
  793. case PCI_DEVICE_ID_HELIOS_SCSP:
  794. m = (typeof(m)){"LP11000-SP", max_speed, ports, "PCI-X2"};
  795. break;
  796. case PCI_DEVICE_ID_HELIOS_DCSP:
  797. m = (typeof(m)){"LP11002-SP", max_speed, ports, "PCI-X2"};
  798. break;
  799. case PCI_DEVICE_ID_NEPTUNE:
  800. if (hdrtype == 0x80)
  801. m = (typeof(m)){"LPe1002", max_speed, ports, "PCIe"};
  802. else
  803. m = (typeof(m)){"LPe1000", max_speed, ports, "PCIe"};
  804. break;
  805. case PCI_DEVICE_ID_NEPTUNE_SCSP:
  806. m = (typeof(m)){"LPe1000-SP", max_speed, ports, "PCIe"};
  807. break;
  808. case PCI_DEVICE_ID_NEPTUNE_DCSP:
  809. m = (typeof(m)){"LPe1002-SP", max_speed, ports, "PCIe"};
  810. break;
  811. case PCI_DEVICE_ID_BMID:
  812. m = (typeof(m)){"LP1150", max_speed, ports, "PCI-X2"};
  813. break;
  814. case PCI_DEVICE_ID_BSMB:
  815. m = (typeof(m)){"LP111", max_speed, ports, "PCI-X2"};
  816. break;
  817. case PCI_DEVICE_ID_ZEPHYR:
  818. if (hdrtype == 0x80)
  819. m = (typeof(m)){"LPe11002", max_speed, ports, "PCIe"};
  820. else
  821. m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
  822. break;
  823. case PCI_DEVICE_ID_ZEPHYR_SCSP:
  824. m = (typeof(m)){"LPe11000", max_speed, ports, "PCIe"};
  825. break;
  826. case PCI_DEVICE_ID_ZEPHYR_DCSP:
  827. m = (typeof(m)){"LPe11002-SP", max_speed, ports, "PCIe"};
  828. break;
  829. case PCI_DEVICE_ID_ZMID:
  830. m = (typeof(m)){"LPe1150", max_speed, ports, "PCIe"};
  831. break;
  832. case PCI_DEVICE_ID_ZSMB:
  833. m = (typeof(m)){"LPe111", max_speed, ports, "PCIe"};
  834. break;
  835. case PCI_DEVICE_ID_LP101:
  836. m = (typeof(m)){"LP101", max_speed, ports, "PCI-X"};
  837. break;
  838. case PCI_DEVICE_ID_LP10000S:
  839. m = (typeof(m)){"LP10000-S", max_speed, ports, "PCI"};
  840. break;
  841. case PCI_DEVICE_ID_LP11000S:
  842. case PCI_DEVICE_ID_LPE11000S:
  843. switch (dev_subid) {
  844. case PCI_SUBSYSTEM_ID_LP11000S:
  845. m = (typeof(m)){"LP11000-S", max_speed,
  846. ports, "PCI-X2"};
  847. break;
  848. case PCI_SUBSYSTEM_ID_LP11002S:
  849. m = (typeof(m)){"LP11002-S", max_speed,
  850. ports, "PCI-X2"};
  851. break;
  852. case PCI_SUBSYSTEM_ID_LPE11000S:
  853. m = (typeof(m)){"LPe11000-S", max_speed,
  854. ports, "PCIe"};
  855. break;
  856. case PCI_SUBSYSTEM_ID_LPE11002S:
  857. m = (typeof(m)){"LPe11002-S", max_speed,
  858. ports, "PCIe"};
  859. break;
  860. case PCI_SUBSYSTEM_ID_LPE11010S:
  861. m = (typeof(m)){"LPe11010-S", max_speed,
  862. "10-port ", "PCIe"};
  863. break;
  864. default:
  865. break;
  866. }
  867. break;
  868. default:
  869. break;
  870. }
  871. if (mdp && mdp[0] == '\0')
  872. snprintf(mdp, 79,"%s", m.name);
  873. if (descp && descp[0] == '\0')
  874. snprintf(descp, 255,
  875. "Emulex %s %dGb %s%s Fibre Channel Adapter",
  876. m.name, m.max_speed, m.ports, m.bus);
  877. }
  878. /**************************************************/
  879. /* lpfc_post_buffer */
  880. /* */
  881. /* This routine will post count buffers to the */
  882. /* ring with the QUE_RING_BUF_CN command. This */
  883. /* allows 3 buffers / command to be posted. */
  884. /* Returns the number of buffers NOT posted. */
  885. /**************************************************/
  886. int
  887. lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
  888. int type)
  889. {
  890. IOCB_t *icmd;
  891. struct lpfc_iocbq *iocb;
  892. struct lpfc_dmabuf *mp1, *mp2;
  893. cnt += pring->missbufcnt;
  894. /* While there are buffers to post */
  895. while (cnt > 0) {
  896. /* Allocate buffer for command iocb */
  897. spin_lock_irq(phba->host->host_lock);
  898. iocb = lpfc_sli_get_iocbq(phba);
  899. spin_unlock_irq(phba->host->host_lock);
  900. if (iocb == NULL) {
  901. pring->missbufcnt = cnt;
  902. return cnt;
  903. }
  904. icmd = &iocb->iocb;
  905. /* 2 buffers can be posted per command */
  906. /* Allocate buffer to post */
  907. mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
  908. if (mp1)
  909. mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
  910. &mp1->phys);
  911. if (mp1 == 0 || mp1->virt == 0) {
  912. kfree(mp1);
  913. spin_lock_irq(phba->host->host_lock);
  914. lpfc_sli_release_iocbq(phba, iocb);
  915. spin_unlock_irq(phba->host->host_lock);
  916. pring->missbufcnt = cnt;
  917. return cnt;
  918. }
  919. INIT_LIST_HEAD(&mp1->list);
  920. /* Allocate buffer to post */
  921. if (cnt > 1) {
  922. mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
  923. if (mp2)
  924. mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
  925. &mp2->phys);
  926. if (mp2 == 0 || mp2->virt == 0) {
  927. kfree(mp2);
  928. lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
  929. kfree(mp1);
  930. spin_lock_irq(phba->host->host_lock);
  931. lpfc_sli_release_iocbq(phba, iocb);
  932. spin_unlock_irq(phba->host->host_lock);
  933. pring->missbufcnt = cnt;
  934. return cnt;
  935. }
  936. INIT_LIST_HEAD(&mp2->list);
  937. } else {
  938. mp2 = NULL;
  939. }
  940. icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
  941. icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
  942. icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
  943. icmd->ulpBdeCount = 1;
  944. cnt--;
  945. if (mp2) {
  946. icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
  947. icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
  948. icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
  949. cnt--;
  950. icmd->ulpBdeCount = 2;
  951. }
  952. icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
  953. icmd->ulpLe = 1;
  954. spin_lock_irq(phba->host->host_lock);
  955. if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
  956. lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
  957. kfree(mp1);
  958. cnt++;
  959. if (mp2) {
  960. lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
  961. kfree(mp2);
  962. cnt++;
  963. }
  964. lpfc_sli_release_iocbq(phba, iocb);
  965. pring->missbufcnt = cnt;
  966. spin_unlock_irq(phba->host->host_lock);
  967. return cnt;
  968. }
  969. spin_unlock_irq(phba->host->host_lock);
  970. lpfc_sli_ringpostbuf_put(phba, pring, mp1);
  971. if (mp2) {
  972. lpfc_sli_ringpostbuf_put(phba, pring, mp2);
  973. }
  974. }
  975. pring->missbufcnt = 0;
  976. return 0;
  977. }
  978. /************************************************************************/
  979. /* */
  980. /* lpfc_post_rcv_buf */
  981. /* This routine post initial rcv buffers to the configured rings */
  982. /* */
  983. /************************************************************************/
  984. static int
  985. lpfc_post_rcv_buf(struct lpfc_hba * phba)
  986. {
  987. struct lpfc_sli *psli = &phba->sli;
  988. /* Ring 0, ELS / CT buffers */
  989. lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
  990. /* Ring 2 - FCP no buffers needed */
  991. return 0;
  992. }
  993. #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
  994. /************************************************************************/
  995. /* */
  996. /* lpfc_sha_init */
  997. /* */
  998. /************************************************************************/
  999. static void
  1000. lpfc_sha_init(uint32_t * HashResultPointer)
  1001. {
  1002. HashResultPointer[0] = 0x67452301;
  1003. HashResultPointer[1] = 0xEFCDAB89;
  1004. HashResultPointer[2] = 0x98BADCFE;
  1005. HashResultPointer[3] = 0x10325476;
  1006. HashResultPointer[4] = 0xC3D2E1F0;
  1007. }
  1008. /************************************************************************/
  1009. /* */
  1010. /* lpfc_sha_iterate */
  1011. /* */
  1012. /************************************************************************/
  1013. static void
  1014. lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
  1015. {
  1016. int t;
  1017. uint32_t TEMP;
  1018. uint32_t A, B, C, D, E;
  1019. t = 16;
  1020. do {
  1021. HashWorkingPointer[t] =
  1022. S(1,
  1023. HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
  1024. 8] ^
  1025. HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
  1026. } while (++t <= 79);
  1027. t = 0;
  1028. A = HashResultPointer[0];
  1029. B = HashResultPointer[1];
  1030. C = HashResultPointer[2];
  1031. D = HashResultPointer[3];
  1032. E = HashResultPointer[4];
  1033. do {
  1034. if (t < 20) {
  1035. TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
  1036. } else if (t < 40) {
  1037. TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
  1038. } else if (t < 60) {
  1039. TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
  1040. } else {
  1041. TEMP = (B ^ C ^ D) + 0xCA62C1D6;
  1042. }
  1043. TEMP += S(5, A) + E + HashWorkingPointer[t];
  1044. E = D;
  1045. D = C;
  1046. C = S(30, B);
  1047. B = A;
  1048. A = TEMP;
  1049. } while (++t <= 79);
  1050. HashResultPointer[0] += A;
  1051. HashResultPointer[1] += B;
  1052. HashResultPointer[2] += C;
  1053. HashResultPointer[3] += D;
  1054. HashResultPointer[4] += E;
  1055. }
  1056. /************************************************************************/
  1057. /* */
  1058. /* lpfc_challenge_key */
  1059. /* */
  1060. /************************************************************************/
  1061. static void
  1062. lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
  1063. {
  1064. *HashWorking = (*RandomChallenge ^ *HashWorking);
  1065. }
  1066. /************************************************************************/
  1067. /* */
  1068. /* lpfc_hba_init */
  1069. /* */
  1070. /************************************************************************/
  1071. void
  1072. lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
  1073. {
  1074. int t;
  1075. uint32_t *HashWorking;
  1076. uint32_t *pwwnn = phba->wwnn;
  1077. HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
  1078. if (!HashWorking)
  1079. return;
  1080. memset(HashWorking, 0, (80 * sizeof(uint32_t)));
  1081. HashWorking[0] = HashWorking[78] = *pwwnn++;
  1082. HashWorking[1] = HashWorking[79] = *pwwnn;
  1083. for (t = 0; t < 7; t++)
  1084. lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
  1085. lpfc_sha_init(hbainit);
  1086. lpfc_sha_iterate(hbainit, HashWorking);
  1087. kfree(HashWorking);
  1088. }
  1089. static void
  1090. lpfc_cleanup(struct lpfc_hba * phba, uint32_t save_bind)
  1091. {
  1092. struct lpfc_nodelist *ndlp, *next_ndlp;
  1093. /* clean up phba - lpfc specific */
  1094. lpfc_can_disctmo(phba);
  1095. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
  1096. nlp_listp) {
  1097. lpfc_nlp_remove(phba, ndlp);
  1098. }
  1099. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
  1100. nlp_listp) {
  1101. lpfc_nlp_remove(phba, ndlp);
  1102. }
  1103. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
  1104. nlp_listp) {
  1105. lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
  1106. }
  1107. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
  1108. nlp_listp) {
  1109. lpfc_nlp_remove(phba, ndlp);
  1110. }
  1111. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
  1112. nlp_listp) {
  1113. lpfc_nlp_remove(phba, ndlp);
  1114. }
  1115. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
  1116. nlp_listp) {
  1117. lpfc_nlp_remove(phba, ndlp);
  1118. }
  1119. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
  1120. nlp_listp) {
  1121. lpfc_nlp_remove(phba, ndlp);
  1122. }
  1123. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
  1124. nlp_listp) {
  1125. lpfc_nlp_remove(phba, ndlp);
  1126. }
  1127. INIT_LIST_HEAD(&phba->fc_nlpmap_list);
  1128. INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
  1129. INIT_LIST_HEAD(&phba->fc_unused_list);
  1130. INIT_LIST_HEAD(&phba->fc_plogi_list);
  1131. INIT_LIST_HEAD(&phba->fc_adisc_list);
  1132. INIT_LIST_HEAD(&phba->fc_reglogin_list);
  1133. INIT_LIST_HEAD(&phba->fc_prli_list);
  1134. INIT_LIST_HEAD(&phba->fc_npr_list);
  1135. phba->fc_map_cnt = 0;
  1136. phba->fc_unmap_cnt = 0;
  1137. phba->fc_plogi_cnt = 0;
  1138. phba->fc_adisc_cnt = 0;
  1139. phba->fc_reglogin_cnt = 0;
  1140. phba->fc_prli_cnt = 0;
  1141. phba->fc_npr_cnt = 0;
  1142. phba->fc_unused_cnt= 0;
  1143. return;
  1144. }
  1145. static void
  1146. lpfc_establish_link_tmo(unsigned long ptr)
  1147. {
  1148. struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
  1149. unsigned long iflag;
  1150. /* Re-establishing Link, timer expired */
  1151. lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
  1152. "%d:1300 Re-establishing Link, timer expired "
  1153. "Data: x%x x%x\n",
  1154. phba->brd_no, phba->fc_flag, phba->hba_state);
  1155. spin_lock_irqsave(phba->host->host_lock, iflag);
  1156. phba->fc_flag &= ~FC_ESTABLISH_LINK;
  1157. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1158. }
  1159. static int
  1160. lpfc_stop_timer(struct lpfc_hba * phba)
  1161. {
  1162. struct lpfc_sli *psli = &phba->sli;
  1163. /* Instead of a timer, this has been converted to a
  1164. * deferred procedding list.
  1165. */
  1166. while (!list_empty(&phba->freebufList)) {
  1167. struct lpfc_dmabuf *mp = NULL;
  1168. list_remove_head((&phba->freebufList), mp,
  1169. struct lpfc_dmabuf, list);
  1170. if (mp) {
  1171. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  1172. kfree(mp);
  1173. }
  1174. }
  1175. del_timer_sync(&phba->fcp_poll_timer);
  1176. del_timer_sync(&phba->fc_estabtmo);
  1177. del_timer_sync(&phba->fc_disctmo);
  1178. del_timer_sync(&phba->fc_fdmitmo);
  1179. del_timer_sync(&phba->els_tmofunc);
  1180. psli = &phba->sli;
  1181. del_timer_sync(&psli->mbox_tmo);
  1182. return(1);
  1183. }
  1184. int
  1185. lpfc_online(struct lpfc_hba * phba)
  1186. {
  1187. if (!phba)
  1188. return 0;
  1189. if (!(phba->fc_flag & FC_OFFLINE_MODE))
  1190. return 0;
  1191. lpfc_printf_log(phba,
  1192. KERN_WARNING,
  1193. LOG_INIT,
  1194. "%d:0458 Bring Adapter online\n",
  1195. phba->brd_no);
  1196. if (!lpfc_sli_queue_setup(phba))
  1197. return 1;
  1198. if (lpfc_sli_hba_setup(phba)) /* Initialize the HBA */
  1199. return 1;
  1200. spin_lock_irq(phba->host->host_lock);
  1201. phba->fc_flag &= ~FC_OFFLINE_MODE;
  1202. spin_unlock_irq(phba->host->host_lock);
  1203. return 0;
  1204. }
  1205. int
  1206. lpfc_offline(struct lpfc_hba * phba)
  1207. {
  1208. struct lpfc_sli_ring *pring;
  1209. struct lpfc_sli *psli;
  1210. unsigned long iflag;
  1211. int i = 0;
  1212. if (!phba)
  1213. return 0;
  1214. if (phba->fc_flag & FC_OFFLINE_MODE)
  1215. return 0;
  1216. psli = &phba->sli;
  1217. pring = &psli->ring[psli->fcp_ring];
  1218. lpfc_linkdown(phba);
  1219. /* The linkdown event takes 30 seconds to timeout. */
  1220. while (pring->txcmplq_cnt) {
  1221. mdelay(10);
  1222. if (i++ > 3000)
  1223. break;
  1224. }
  1225. /* stop all timers associated with this hba */
  1226. lpfc_stop_timer(phba);
  1227. phba->work_hba_events = 0;
  1228. lpfc_printf_log(phba,
  1229. KERN_WARNING,
  1230. LOG_INIT,
  1231. "%d:0460 Bring Adapter offline\n",
  1232. phba->brd_no);
  1233. /* Bring down the SLI Layer and cleanup. The HBA is offline
  1234. now. */
  1235. lpfc_sli_hba_down(phba);
  1236. lpfc_cleanup(phba, 1);
  1237. spin_lock_irqsave(phba->host->host_lock, iflag);
  1238. phba->fc_flag |= FC_OFFLINE_MODE;
  1239. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1240. return 0;
  1241. }
  1242. /******************************************************************************
  1243. * Function name: lpfc_scsi_free
  1244. *
  1245. * Description: Called from lpfc_pci_remove_one free internal driver resources
  1246. *
  1247. ******************************************************************************/
  1248. static int
  1249. lpfc_scsi_free(struct lpfc_hba * phba)
  1250. {
  1251. struct lpfc_scsi_buf *sb, *sb_next;
  1252. struct lpfc_iocbq *io, *io_next;
  1253. spin_lock_irq(phba->host->host_lock);
  1254. /* Release all the lpfc_scsi_bufs maintained by this host. */
  1255. list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
  1256. list_del(&sb->list);
  1257. pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
  1258. sb->dma_handle);
  1259. kfree(sb);
  1260. phba->total_scsi_bufs--;
  1261. }
  1262. /* Release all the lpfc_iocbq entries maintained by this host. */
  1263. list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
  1264. list_del(&io->list);
  1265. kfree(io);
  1266. phba->total_iocbq_bufs--;
  1267. }
  1268. spin_unlock_irq(phba->host->host_lock);
  1269. return 0;
  1270. }
  1271. static int __devinit
  1272. lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
  1273. {
  1274. struct Scsi_Host *host;
  1275. struct lpfc_hba *phba;
  1276. struct lpfc_sli *psli;
  1277. struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
  1278. unsigned long bar0map_len, bar2map_len;
  1279. int error = -ENODEV, retval;
  1280. int i;
  1281. uint16_t iotag;
  1282. if (pci_enable_device(pdev))
  1283. goto out;
  1284. if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
  1285. goto out_disable_device;
  1286. host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
  1287. if (!host)
  1288. goto out_release_regions;
  1289. phba = (struct lpfc_hba*)host->hostdata;
  1290. memset(phba, 0, sizeof (struct lpfc_hba));
  1291. phba->host = host;
  1292. phba->fc_flag |= FC_LOADING;
  1293. phba->pcidev = pdev;
  1294. /* Assign an unused board number */
  1295. if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
  1296. goto out_put_host;
  1297. error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
  1298. if (error)
  1299. goto out_put_host;
  1300. host->unique_id = phba->brd_no;
  1301. init_MUTEX(&phba->hba_can_block);
  1302. INIT_LIST_HEAD(&phba->ctrspbuflist);
  1303. INIT_LIST_HEAD(&phba->rnidrspbuflist);
  1304. INIT_LIST_HEAD(&phba->freebufList);
  1305. /* Initialize timers used by driver */
  1306. init_timer(&phba->fc_estabtmo);
  1307. phba->fc_estabtmo.function = lpfc_establish_link_tmo;
  1308. phba->fc_estabtmo.data = (unsigned long)phba;
  1309. init_timer(&phba->fc_disctmo);
  1310. phba->fc_disctmo.function = lpfc_disc_timeout;
  1311. phba->fc_disctmo.data = (unsigned long)phba;
  1312. init_timer(&phba->fc_fdmitmo);
  1313. phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
  1314. phba->fc_fdmitmo.data = (unsigned long)phba;
  1315. init_timer(&phba->els_tmofunc);
  1316. phba->els_tmofunc.function = lpfc_els_timeout;
  1317. phba->els_tmofunc.data = (unsigned long)phba;
  1318. psli = &phba->sli;
  1319. init_timer(&psli->mbox_tmo);
  1320. psli->mbox_tmo.function = lpfc_mbox_timeout;
  1321. psli->mbox_tmo.data = (unsigned long)phba;
  1322. init_timer(&phba->fcp_poll_timer);
  1323. phba->fcp_poll_timer.function = lpfc_poll_timeout;
  1324. phba->fcp_poll_timer.data = (unsigned long)phba;
  1325. /*
  1326. * Get all the module params for configuring this host and then
  1327. * establish the host parameters.
  1328. */
  1329. lpfc_get_cfgparam(phba);
  1330. host->max_id = LPFC_MAX_TARGET;
  1331. host->max_lun = phba->cfg_max_luns;
  1332. host->this_id = -1;
  1333. /* Initialize all internally managed lists. */
  1334. INIT_LIST_HEAD(&phba->fc_nlpmap_list);
  1335. INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
  1336. INIT_LIST_HEAD(&phba->fc_unused_list);
  1337. INIT_LIST_HEAD(&phba->fc_plogi_list);
  1338. INIT_LIST_HEAD(&phba->fc_adisc_list);
  1339. INIT_LIST_HEAD(&phba->fc_reglogin_list);
  1340. INIT_LIST_HEAD(&phba->fc_prli_list);
  1341. INIT_LIST_HEAD(&phba->fc_npr_list);
  1342. pci_set_master(pdev);
  1343. retval = pci_set_mwi(pdev);
  1344. if (retval)
  1345. dev_printk(KERN_WARNING, &pdev->dev,
  1346. "Warning: pci_set_mwi returned %d\n", retval);
  1347. if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
  1348. if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
  1349. goto out_idr_remove;
  1350. /*
  1351. * Get the bus address of Bar0 and Bar2 and the number of bytes
  1352. * required by each mapping.
  1353. */
  1354. phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
  1355. bar0map_len = pci_resource_len(phba->pcidev, 0);
  1356. phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
  1357. bar2map_len = pci_resource_len(phba->pcidev, 2);
  1358. /* Map HBA SLIM to a kernel virtual address. */
  1359. phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
  1360. if (!phba->slim_memmap_p) {
  1361. error = -ENODEV;
  1362. dev_printk(KERN_ERR, &pdev->dev,
  1363. "ioremap failed for SLIM memory.\n");
  1364. goto out_idr_remove;
  1365. }
  1366. /* Map HBA Control Registers to a kernel virtual address. */
  1367. phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
  1368. if (!phba->ctrl_regs_memmap_p) {
  1369. error = -ENODEV;
  1370. dev_printk(KERN_ERR, &pdev->dev,
  1371. "ioremap failed for HBA control registers.\n");
  1372. goto out_iounmap_slim;
  1373. }
  1374. /* Allocate memory for SLI-2 structures */
  1375. phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
  1376. &phba->slim2p_mapping, GFP_KERNEL);
  1377. if (!phba->slim2p)
  1378. goto out_iounmap;
  1379. memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
  1380. /* Initialize the SLI Layer to run with lpfc HBAs. */
  1381. lpfc_sli_setup(phba);
  1382. lpfc_sli_queue_setup(phba);
  1383. error = lpfc_mem_alloc(phba);
  1384. if (error)
  1385. goto out_free_slim;
  1386. /* Initialize and populate the iocb list per host. */
  1387. INIT_LIST_HEAD(&phba->lpfc_iocb_list);
  1388. for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
  1389. iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
  1390. if (iocbq_entry == NULL) {
  1391. printk(KERN_ERR "%s: only allocated %d iocbs of "
  1392. "expected %d count. Unloading driver.\n",
  1393. __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
  1394. error = -ENOMEM;
  1395. goto out_free_iocbq;
  1396. }
  1397. memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
  1398. iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
  1399. if (iotag == 0) {
  1400. kfree (iocbq_entry);
  1401. printk(KERN_ERR "%s: failed to allocate IOTAG. "
  1402. "Unloading driver.\n",
  1403. __FUNCTION__);
  1404. error = -ENOMEM;
  1405. goto out_free_iocbq;
  1406. }
  1407. spin_lock_irq(phba->host->host_lock);
  1408. list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
  1409. phba->total_iocbq_bufs++;
  1410. spin_unlock_irq(phba->host->host_lock);
  1411. }
  1412. /* Initialize HBA structure */
  1413. phba->fc_edtov = FF_DEF_EDTOV;
  1414. phba->fc_ratov = FF_DEF_RATOV;
  1415. phba->fc_altov = FF_DEF_ALTOV;
  1416. phba->fc_arbtov = FF_DEF_ARBTOV;
  1417. INIT_LIST_HEAD(&phba->work_list);
  1418. phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
  1419. phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
  1420. /* Startup the kernel thread for this host adapter. */
  1421. phba->worker_thread = kthread_run(lpfc_do_work, phba,
  1422. "lpfc_worker_%d", phba->brd_no);
  1423. if (IS_ERR(phba->worker_thread)) {
  1424. error = PTR_ERR(phba->worker_thread);
  1425. goto out_free_iocbq;
  1426. }
  1427. /* We can rely on a queue depth attribute only after SLI HBA setup */
  1428. host->can_queue = phba->cfg_hba_queue_depth - 10;
  1429. /* Tell the midlayer we support 16 byte commands */
  1430. host->max_cmd_len = 16;
  1431. /* Initialize the list of scsi buffers used by driver for scsi IO. */
  1432. spin_lock_init(&phba->scsi_buf_list_lock);
  1433. INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
  1434. host->transportt = lpfc_transport_template;
  1435. pci_set_drvdata(pdev, host);
  1436. error = scsi_add_host(host, &pdev->dev);
  1437. if (error)
  1438. goto out_kthread_stop;
  1439. error = lpfc_alloc_sysfs_attr(phba);
  1440. if (error)
  1441. goto out_kthread_stop;
  1442. error = request_irq(phba->pcidev->irq, lpfc_intr_handler, SA_SHIRQ,
  1443. LPFC_DRIVER_NAME, phba);
  1444. if (error) {
  1445. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1446. "%d:0451 Enable interrupt handler failed\n",
  1447. phba->brd_no);
  1448. goto out_free_sysfs_attr;
  1449. }
  1450. phba->MBslimaddr = phba->slim_memmap_p;
  1451. phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
  1452. phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
  1453. phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
  1454. phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
  1455. error = lpfc_sli_hba_setup(phba);
  1456. if (error)
  1457. goto out_free_irq;
  1458. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  1459. spin_lock_irq(phba->host->host_lock);
  1460. lpfc_poll_start_timer(phba);
  1461. spin_unlock_irq(phba->host->host_lock);
  1462. }
  1463. /*
  1464. * set fixed host attributes
  1465. * Must done after lpfc_sli_hba_setup()
  1466. */
  1467. fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
  1468. fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
  1469. fc_host_supported_classes(host) = FC_COS_CLASS3;
  1470. memset(fc_host_supported_fc4s(host), 0,
  1471. sizeof(fc_host_supported_fc4s(host)));
  1472. fc_host_supported_fc4s(host)[2] = 1;
  1473. fc_host_supported_fc4s(host)[7] = 1;
  1474. lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
  1475. fc_host_supported_speeds(host) = 0;
  1476. if (phba->lmt & LMT_10Gb)
  1477. fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
  1478. if (phba->lmt & LMT_4Gb)
  1479. fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
  1480. if (phba->lmt & LMT_2Gb)
  1481. fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
  1482. if (phba->lmt & LMT_1Gb)
  1483. fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
  1484. fc_host_maxframe_size(host) =
  1485. ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
  1486. (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
  1487. /* This value is also unchanging */
  1488. memset(fc_host_active_fc4s(host), 0,
  1489. sizeof(fc_host_active_fc4s(host)));
  1490. fc_host_active_fc4s(host)[2] = 1;
  1491. fc_host_active_fc4s(host)[7] = 1;
  1492. spin_lock_irq(phba->host->host_lock);
  1493. phba->fc_flag &= ~FC_LOADING;
  1494. spin_unlock_irq(phba->host->host_lock);
  1495. return 0;
  1496. out_free_irq:
  1497. lpfc_stop_timer(phba);
  1498. phba->work_hba_events = 0;
  1499. free_irq(phba->pcidev->irq, phba);
  1500. out_free_sysfs_attr:
  1501. lpfc_free_sysfs_attr(phba);
  1502. out_kthread_stop:
  1503. kthread_stop(phba->worker_thread);
  1504. out_free_iocbq:
  1505. list_for_each_entry_safe(iocbq_entry, iocbq_next,
  1506. &phba->lpfc_iocb_list, list) {
  1507. spin_lock_irq(phba->host->host_lock);
  1508. kfree(iocbq_entry);
  1509. phba->total_iocbq_bufs--;
  1510. spin_unlock_irq(phba->host->host_lock);
  1511. }
  1512. lpfc_mem_free(phba);
  1513. out_free_slim:
  1514. dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
  1515. phba->slim2p_mapping);
  1516. out_iounmap:
  1517. iounmap(phba->ctrl_regs_memmap_p);
  1518. out_iounmap_slim:
  1519. iounmap(phba->slim_memmap_p);
  1520. out_idr_remove:
  1521. idr_remove(&lpfc_hba_index, phba->brd_no);
  1522. out_put_host:
  1523. scsi_host_put(host);
  1524. out_release_regions:
  1525. pci_release_regions(pdev);
  1526. out_disable_device:
  1527. pci_disable_device(pdev);
  1528. out:
  1529. return error;
  1530. }
  1531. static void __devexit
  1532. lpfc_pci_remove_one(struct pci_dev *pdev)
  1533. {
  1534. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1535. struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
  1536. unsigned long iflag;
  1537. lpfc_free_sysfs_attr(phba);
  1538. spin_lock_irqsave(phba->host->host_lock, iflag);
  1539. phba->fc_flag |= FC_UNLOADING;
  1540. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1541. fc_remove_host(phba->host);
  1542. scsi_remove_host(phba->host);
  1543. kthread_stop(phba->worker_thread);
  1544. /*
  1545. * Bring down the SLI Layer. This step disable all interrupts,
  1546. * clears the rings, discards all mailbox commands, and resets
  1547. * the HBA.
  1548. */
  1549. lpfc_sli_hba_down(phba);
  1550. lpfc_sli_brdrestart(phba);
  1551. /* Release the irq reservation */
  1552. free_irq(phba->pcidev->irq, phba);
  1553. lpfc_cleanup(phba, 0);
  1554. lpfc_stop_timer(phba);
  1555. phba->work_hba_events = 0;
  1556. /*
  1557. * Call scsi_free before mem_free since scsi bufs are released to their
  1558. * corresponding pools here.
  1559. */
  1560. lpfc_scsi_free(phba);
  1561. lpfc_mem_free(phba);
  1562. /* Free resources associated with SLI2 interface */
  1563. dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
  1564. phba->slim2p, phba->slim2p_mapping);
  1565. /* unmap adapter SLIM and Control Registers */
  1566. iounmap(phba->ctrl_regs_memmap_p);
  1567. iounmap(phba->slim_memmap_p);
  1568. pci_release_regions(phba->pcidev);
  1569. pci_disable_device(phba->pcidev);
  1570. idr_remove(&lpfc_hba_index, phba->brd_no);
  1571. scsi_host_put(phba->host);
  1572. pci_set_drvdata(pdev, NULL);
  1573. }
  1574. static struct pci_device_id lpfc_id_table[] = {
  1575. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
  1576. PCI_ANY_ID, PCI_ANY_ID, },
  1577. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
  1578. PCI_ANY_ID, PCI_ANY_ID, },
  1579. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
  1580. PCI_ANY_ID, PCI_ANY_ID, },
  1581. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
  1582. PCI_ANY_ID, PCI_ANY_ID, },
  1583. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
  1584. PCI_ANY_ID, PCI_ANY_ID, },
  1585. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
  1586. PCI_ANY_ID, PCI_ANY_ID, },
  1587. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
  1588. PCI_ANY_ID, PCI_ANY_ID, },
  1589. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
  1590. PCI_ANY_ID, PCI_ANY_ID, },
  1591. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
  1592. PCI_ANY_ID, PCI_ANY_ID, },
  1593. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
  1594. PCI_ANY_ID, PCI_ANY_ID, },
  1595. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
  1596. PCI_ANY_ID, PCI_ANY_ID, },
  1597. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
  1598. PCI_ANY_ID, PCI_ANY_ID, },
  1599. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
  1600. PCI_ANY_ID, PCI_ANY_ID, },
  1601. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
  1602. PCI_ANY_ID, PCI_ANY_ID, },
  1603. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
  1604. PCI_ANY_ID, PCI_ANY_ID, },
  1605. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
  1606. PCI_ANY_ID, PCI_ANY_ID, },
  1607. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
  1608. PCI_ANY_ID, PCI_ANY_ID, },
  1609. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
  1610. PCI_ANY_ID, PCI_ANY_ID, },
  1611. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
  1612. PCI_ANY_ID, PCI_ANY_ID, },
  1613. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
  1614. PCI_ANY_ID, PCI_ANY_ID, },
  1615. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
  1616. PCI_ANY_ID, PCI_ANY_ID, },
  1617. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
  1618. PCI_ANY_ID, PCI_ANY_ID, },
  1619. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
  1620. PCI_ANY_ID, PCI_ANY_ID, },
  1621. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
  1622. PCI_ANY_ID, PCI_ANY_ID, },
  1623. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
  1624. PCI_ANY_ID, PCI_ANY_ID, },
  1625. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
  1626. PCI_ANY_ID, PCI_ANY_ID, },
  1627. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
  1628. PCI_ANY_ID, PCI_ANY_ID, },
  1629. { 0 }
  1630. };
  1631. MODULE_DEVICE_TABLE(pci, lpfc_id_table);
  1632. static struct pci_driver lpfc_driver = {
  1633. .name = LPFC_DRIVER_NAME,
  1634. .id_table = lpfc_id_table,
  1635. .probe = lpfc_pci_probe_one,
  1636. .remove = __devexit_p(lpfc_pci_remove_one),
  1637. };
  1638. static int __init
  1639. lpfc_init(void)
  1640. {
  1641. int error = 0;
  1642. printk(LPFC_MODULE_DESC "\n");
  1643. printk(LPFC_COPYRIGHT "\n");
  1644. lpfc_transport_template =
  1645. fc_attach_transport(&lpfc_transport_functions);
  1646. if (!lpfc_transport_template)
  1647. return -ENOMEM;
  1648. error = pci_register_driver(&lpfc_driver);
  1649. if (error)
  1650. fc_release_transport(lpfc_transport_template);
  1651. return error;
  1652. }
  1653. static void __exit
  1654. lpfc_exit(void)
  1655. {
  1656. pci_unregister_driver(&lpfc_driver);
  1657. fc_release_transport(lpfc_transport_template);
  1658. }
  1659. module_init(lpfc_init);
  1660. module_exit(lpfc_exit);
  1661. MODULE_LICENSE("GPL");
  1662. MODULE_DESCRIPTION(LPFC_MODULE_DESC);
  1663. MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
  1664. MODULE_VERSION("0:" LPFC_DRIVER_VERSION);