qla_init.c 145 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. static void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. struct scsi_qla_host *vha = sp->fcport->vha;
  62. del_timer(&iocb->timer);
  63. kfree(iocb);
  64. kfree(ctx);
  65. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  66. QLA_VHA_MARK_NOT_BUSY(vha);
  67. }
  68. inline srb_t *
  69. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  70. unsigned long tmo)
  71. {
  72. srb_t *sp = NULL;
  73. struct qla_hw_data *ha = vha->hw;
  74. struct srb_ctx *ctx;
  75. struct srb_iocb *iocb;
  76. uint8_t bail;
  77. QLA_VHA_MARK_BUSY(vha, bail);
  78. if (bail)
  79. return NULL;
  80. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  81. if (!sp)
  82. goto done;
  83. ctx = kzalloc(size, GFP_KERNEL);
  84. if (!ctx) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. goto done;
  88. }
  89. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  90. if (!iocb) {
  91. mempool_free(sp, ha->srb_mempool);
  92. sp = NULL;
  93. kfree(ctx);
  94. goto done;
  95. }
  96. memset(sp, 0, sizeof(*sp));
  97. sp->fcport = fcport;
  98. sp->ctx = ctx;
  99. ctx->u.iocb_cmd = iocb;
  100. iocb->free = qla2x00_ctx_sp_free;
  101. init_timer(&iocb->timer);
  102. if (!tmo)
  103. goto done;
  104. iocb->timer.expires = jiffies + tmo * HZ;
  105. iocb->timer.data = (unsigned long)sp;
  106. iocb->timer.function = qla2x00_ctx_sp_timeout;
  107. add_timer(&iocb->timer);
  108. done:
  109. if (!sp)
  110. QLA_VHA_MARK_NOT_BUSY(vha);
  111. return sp;
  112. }
  113. /* Asynchronous Login/Logout Routines -------------------------------------- */
  114. static inline unsigned long
  115. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  116. {
  117. unsigned long tmo;
  118. struct qla_hw_data *ha = vha->hw;
  119. /* Firmware should use switch negotiated r_a_tov for timeout. */
  120. tmo = ha->r_a_tov / 10 * 2;
  121. if (!IS_FWI2_CAPABLE(ha)) {
  122. /*
  123. * Except for earlier ISPs where the timeout is seeded from the
  124. * initialization control block.
  125. */
  126. tmo = ha->login_timeout;
  127. }
  128. return tmo;
  129. }
  130. static void
  131. qla2x00_async_iocb_timeout(srb_t *sp)
  132. {
  133. fc_port_t *fcport = sp->fcport;
  134. struct srb_ctx *ctx = sp->ctx;
  135. DEBUG2(printk(KERN_WARNING
  136. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  137. fcport->vha->host_no, sp->handle,
  138. ctx->name, fcport->d_id.b.domain,
  139. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  140. fcport->flags &= ~FCF_ASYNC_SENT;
  141. if (ctx->type == SRB_LOGIN_CMD) {
  142. struct srb_iocb *lio = ctx->u.iocb_cmd;
  143. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  144. /* Retry as needed. */
  145. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  146. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  147. QLA_LOGIO_LOGIN_RETRIED : 0;
  148. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  149. lio->u.logio.data);
  150. }
  151. }
  152. static void
  153. qla2x00_async_login_ctx_done(srb_t *sp)
  154. {
  155. struct srb_ctx *ctx = sp->ctx;
  156. struct srb_iocb *lio = ctx->u.iocb_cmd;
  157. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  158. lio->u.logio.data);
  159. lio->free(sp);
  160. }
  161. int
  162. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  163. uint16_t *data)
  164. {
  165. srb_t *sp;
  166. struct srb_ctx *ctx;
  167. struct srb_iocb *lio;
  168. int rval;
  169. rval = QLA_FUNCTION_FAILED;
  170. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  171. qla2x00_get_async_timeout(vha) + 2);
  172. if (!sp)
  173. goto done;
  174. ctx = sp->ctx;
  175. ctx->type = SRB_LOGIN_CMD;
  176. ctx->name = "login";
  177. lio = ctx->u.iocb_cmd;
  178. lio->timeout = qla2x00_async_iocb_timeout;
  179. lio->done = qla2x00_async_login_ctx_done;
  180. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  181. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  182. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  183. rval = qla2x00_start_sp(sp);
  184. if (rval != QLA_SUCCESS)
  185. goto done_free_sp;
  186. DEBUG2(printk(KERN_DEBUG
  187. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  188. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  189. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  190. fcport->login_retry));
  191. return rval;
  192. done_free_sp:
  193. lio->free(sp);
  194. done:
  195. return rval;
  196. }
  197. static void
  198. qla2x00_async_logout_ctx_done(srb_t *sp)
  199. {
  200. struct srb_ctx *ctx = sp->ctx;
  201. struct srb_iocb *lio = ctx->u.iocb_cmd;
  202. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  203. lio->u.logio.data);
  204. lio->free(sp);
  205. }
  206. int
  207. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  208. {
  209. srb_t *sp;
  210. struct srb_ctx *ctx;
  211. struct srb_iocb *lio;
  212. int rval;
  213. rval = QLA_FUNCTION_FAILED;
  214. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  215. qla2x00_get_async_timeout(vha) + 2);
  216. if (!sp)
  217. goto done;
  218. ctx = sp->ctx;
  219. ctx->type = SRB_LOGOUT_CMD;
  220. ctx->name = "logout";
  221. lio = ctx->u.iocb_cmd;
  222. lio->timeout = qla2x00_async_iocb_timeout;
  223. lio->done = qla2x00_async_logout_ctx_done;
  224. rval = qla2x00_start_sp(sp);
  225. if (rval != QLA_SUCCESS)
  226. goto done_free_sp;
  227. DEBUG2(printk(KERN_DEBUG
  228. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  229. fcport->vha->host_no, sp->handle, fcport->loop_id,
  230. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  231. return rval;
  232. done_free_sp:
  233. lio->free(sp);
  234. done:
  235. return rval;
  236. }
  237. static void
  238. qla2x00_async_adisc_ctx_done(srb_t *sp)
  239. {
  240. struct srb_ctx *ctx = sp->ctx;
  241. struct srb_iocb *lio = ctx->u.iocb_cmd;
  242. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  243. lio->u.logio.data);
  244. lio->free(sp);
  245. }
  246. int
  247. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  248. uint16_t *data)
  249. {
  250. srb_t *sp;
  251. struct srb_ctx *ctx;
  252. struct srb_iocb *lio;
  253. int rval;
  254. rval = QLA_FUNCTION_FAILED;
  255. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  256. qla2x00_get_async_timeout(vha) + 2);
  257. if (!sp)
  258. goto done;
  259. ctx = sp->ctx;
  260. ctx->type = SRB_ADISC_CMD;
  261. ctx->name = "adisc";
  262. lio = ctx->u.iocb_cmd;
  263. lio->timeout = qla2x00_async_iocb_timeout;
  264. lio->done = qla2x00_async_adisc_ctx_done;
  265. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  266. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  267. rval = qla2x00_start_sp(sp);
  268. if (rval != QLA_SUCCESS)
  269. goto done_free_sp;
  270. DEBUG2(printk(KERN_DEBUG
  271. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  272. fcport->vha->host_no, sp->handle, fcport->loop_id,
  273. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  274. return rval;
  275. done_free_sp:
  276. lio->free(sp);
  277. done:
  278. return rval;
  279. }
  280. static void
  281. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  282. {
  283. struct srb_ctx *ctx = sp->ctx;
  284. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  285. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  286. iocb->free(sp);
  287. }
  288. int
  289. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  290. uint32_t tag)
  291. {
  292. struct scsi_qla_host *vha = fcport->vha;
  293. srb_t *sp;
  294. struct srb_ctx *ctx;
  295. struct srb_iocb *tcf;
  296. int rval;
  297. rval = QLA_FUNCTION_FAILED;
  298. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  299. qla2x00_get_async_timeout(vha) + 2);
  300. if (!sp)
  301. goto done;
  302. ctx = sp->ctx;
  303. ctx->type = SRB_TM_CMD;
  304. ctx->name = "tmf";
  305. tcf = ctx->u.iocb_cmd;
  306. tcf->u.tmf.flags = flags;
  307. tcf->u.tmf.lun = lun;
  308. tcf->u.tmf.data = tag;
  309. tcf->timeout = qla2x00_async_iocb_timeout;
  310. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  311. rval = qla2x00_start_sp(sp);
  312. if (rval != QLA_SUCCESS)
  313. goto done_free_sp;
  314. DEBUG2(printk(KERN_DEBUG
  315. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  316. fcport->vha->host_no, sp->handle, fcport->loop_id,
  317. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  318. return rval;
  319. done_free_sp:
  320. tcf->free(sp);
  321. done:
  322. return rval;
  323. }
  324. void
  325. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  326. uint16_t *data)
  327. {
  328. int rval;
  329. switch (data[0]) {
  330. case MBS_COMMAND_COMPLETE:
  331. if (fcport->flags & FCF_FCP2_DEVICE) {
  332. fcport->flags |= FCF_ASYNC_SENT;
  333. qla2x00_post_async_adisc_work(vha, fcport, data);
  334. break;
  335. }
  336. qla2x00_update_fcport(vha, fcport);
  337. break;
  338. case MBS_COMMAND_ERROR:
  339. fcport->flags &= ~FCF_ASYNC_SENT;
  340. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  341. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  342. else
  343. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  344. break;
  345. case MBS_PORT_ID_USED:
  346. fcport->loop_id = data[1];
  347. qla2x00_post_async_logout_work(vha, fcport, NULL);
  348. qla2x00_post_async_login_work(vha, fcport, NULL);
  349. break;
  350. case MBS_LOOP_ID_USED:
  351. fcport->loop_id++;
  352. rval = qla2x00_find_new_loop_id(vha, fcport);
  353. if (rval != QLA_SUCCESS) {
  354. fcport->flags &= ~FCF_ASYNC_SENT;
  355. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  356. break;
  357. }
  358. qla2x00_post_async_login_work(vha, fcport, NULL);
  359. break;
  360. }
  361. return;
  362. }
  363. void
  364. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  365. uint16_t *data)
  366. {
  367. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  368. return;
  369. }
  370. void
  371. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  372. uint16_t *data)
  373. {
  374. if (data[0] == MBS_COMMAND_COMPLETE) {
  375. qla2x00_update_fcport(vha, fcport);
  376. return;
  377. }
  378. /* Retry login. */
  379. fcport->flags &= ~FCF_ASYNC_SENT;
  380. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  381. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  382. else
  383. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  384. return;
  385. }
  386. void
  387. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  388. struct srb_iocb *iocb)
  389. {
  390. int rval;
  391. uint32_t flags;
  392. uint16_t lun;
  393. flags = iocb->u.tmf.flags;
  394. lun = (uint16_t)iocb->u.tmf.lun;
  395. /* Issue Marker IOCB */
  396. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  397. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  398. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  399. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  400. DEBUG2_3_11(printk(KERN_WARNING
  401. "%s(%ld): TM IOCB failed (%x).\n",
  402. __func__, vha->host_no, rval));
  403. }
  404. return;
  405. }
  406. /****************************************************************************/
  407. /* QLogic ISP2x00 Hardware Support Functions. */
  408. /****************************************************************************/
  409. /*
  410. * qla2x00_initialize_adapter
  411. * Initialize board.
  412. *
  413. * Input:
  414. * ha = adapter block pointer.
  415. *
  416. * Returns:
  417. * 0 = success
  418. */
  419. int
  420. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  421. {
  422. int rval;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct req_que *req = ha->req_q_map[0];
  425. /* Clear adapter flags. */
  426. vha->flags.online = 0;
  427. ha->flags.chip_reset_done = 0;
  428. vha->flags.reset_active = 0;
  429. ha->flags.pci_channel_io_perm_failure = 0;
  430. ha->flags.eeh_busy = 0;
  431. ha->flags.thermal_supported = 1;
  432. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  433. atomic_set(&vha->loop_state, LOOP_DOWN);
  434. vha->device_flags = DFLG_NO_CABLE;
  435. vha->dpc_flags = 0;
  436. vha->flags.management_server_logged_in = 0;
  437. vha->marker_needed = 0;
  438. ha->isp_abort_cnt = 0;
  439. ha->beacon_blink_led = 0;
  440. set_bit(0, ha->req_qid_map);
  441. set_bit(0, ha->rsp_qid_map);
  442. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  443. rval = ha->isp_ops->pci_config(vha);
  444. if (rval) {
  445. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  446. vha->host_no));
  447. return (rval);
  448. }
  449. ha->isp_ops->reset_chip(vha);
  450. rval = qla2xxx_get_flash_info(vha);
  451. if (rval) {
  452. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  453. vha->host_no));
  454. return (rval);
  455. }
  456. ha->isp_ops->get_flash_version(vha, req->ring);
  457. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  458. ha->isp_ops->nvram_config(vha);
  459. if (ha->flags.disable_serdes) {
  460. /* Mask HBA via NVRAM settings? */
  461. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  462. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  463. vha->port_name[0], vha->port_name[1],
  464. vha->port_name[2], vha->port_name[3],
  465. vha->port_name[4], vha->port_name[5],
  466. vha->port_name[6], vha->port_name[7]);
  467. return QLA_FUNCTION_FAILED;
  468. }
  469. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  470. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  471. rval = ha->isp_ops->chip_diag(vha);
  472. if (rval)
  473. return (rval);
  474. rval = qla2x00_setup_chip(vha);
  475. if (rval)
  476. return (rval);
  477. }
  478. if (IS_QLA84XX(ha)) {
  479. ha->cs84xx = qla84xx_get_chip(vha);
  480. if (!ha->cs84xx) {
  481. qla_printk(KERN_ERR, ha,
  482. "Unable to configure ISP84XX.\n");
  483. return QLA_FUNCTION_FAILED;
  484. }
  485. }
  486. rval = qla2x00_init_rings(vha);
  487. ha->flags.chip_reset_done = 1;
  488. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  489. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  490. rval = qla84xx_init_chip(vha);
  491. if (rval != QLA_SUCCESS) {
  492. qla_printk(KERN_ERR, ha,
  493. "Unable to initialize ISP84XX.\n");
  494. qla84xx_put_chip(vha);
  495. }
  496. }
  497. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  498. qla24xx_read_fcp_prio_cfg(vha);
  499. return (rval);
  500. }
  501. /**
  502. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  503. * @ha: HA context
  504. *
  505. * Returns 0 on success.
  506. */
  507. int
  508. qla2100_pci_config(scsi_qla_host_t *vha)
  509. {
  510. uint16_t w;
  511. unsigned long flags;
  512. struct qla_hw_data *ha = vha->hw;
  513. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  514. pci_set_master(ha->pdev);
  515. pci_try_set_mwi(ha->pdev);
  516. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  517. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  518. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  519. pci_disable_rom(ha->pdev);
  520. /* Get PCI bus information. */
  521. spin_lock_irqsave(&ha->hardware_lock, flags);
  522. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  523. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  524. return QLA_SUCCESS;
  525. }
  526. /**
  527. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  528. * @ha: HA context
  529. *
  530. * Returns 0 on success.
  531. */
  532. int
  533. qla2300_pci_config(scsi_qla_host_t *vha)
  534. {
  535. uint16_t w;
  536. unsigned long flags = 0;
  537. uint32_t cnt;
  538. struct qla_hw_data *ha = vha->hw;
  539. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  540. pci_set_master(ha->pdev);
  541. pci_try_set_mwi(ha->pdev);
  542. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  543. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  544. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  545. w &= ~PCI_COMMAND_INTX_DISABLE;
  546. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  547. /*
  548. * If this is a 2300 card and not 2312, reset the
  549. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  550. * the 2310 also reports itself as a 2300 so we need to get the
  551. * fb revision level -- a 6 indicates it really is a 2300 and
  552. * not a 2310.
  553. */
  554. if (IS_QLA2300(ha)) {
  555. spin_lock_irqsave(&ha->hardware_lock, flags);
  556. /* Pause RISC. */
  557. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  558. for (cnt = 0; cnt < 30000; cnt++) {
  559. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  560. break;
  561. udelay(10);
  562. }
  563. /* Select FPM registers. */
  564. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  565. RD_REG_WORD(&reg->ctrl_status);
  566. /* Get the fb rev level */
  567. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  568. if (ha->fb_rev == FPM_2300)
  569. pci_clear_mwi(ha->pdev);
  570. /* Deselect FPM registers. */
  571. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  572. RD_REG_WORD(&reg->ctrl_status);
  573. /* Release RISC module. */
  574. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  575. for (cnt = 0; cnt < 30000; cnt++) {
  576. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  577. break;
  578. udelay(10);
  579. }
  580. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  581. }
  582. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  583. pci_disable_rom(ha->pdev);
  584. /* Get PCI bus information. */
  585. spin_lock_irqsave(&ha->hardware_lock, flags);
  586. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  587. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  588. return QLA_SUCCESS;
  589. }
  590. /**
  591. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  592. * @ha: HA context
  593. *
  594. * Returns 0 on success.
  595. */
  596. int
  597. qla24xx_pci_config(scsi_qla_host_t *vha)
  598. {
  599. uint16_t w;
  600. unsigned long flags = 0;
  601. struct qla_hw_data *ha = vha->hw;
  602. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  603. pci_set_master(ha->pdev);
  604. pci_try_set_mwi(ha->pdev);
  605. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  606. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  607. w &= ~PCI_COMMAND_INTX_DISABLE;
  608. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  609. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  610. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  611. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  612. pcix_set_mmrbc(ha->pdev, 2048);
  613. /* PCIe -- adjust Maximum Read Request Size (2048). */
  614. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  615. pcie_set_readrq(ha->pdev, 2048);
  616. pci_disable_rom(ha->pdev);
  617. ha->chip_revision = ha->pdev->revision;
  618. /* Get PCI bus information. */
  619. spin_lock_irqsave(&ha->hardware_lock, flags);
  620. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  621. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  622. return QLA_SUCCESS;
  623. }
  624. /**
  625. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  626. * @ha: HA context
  627. *
  628. * Returns 0 on success.
  629. */
  630. int
  631. qla25xx_pci_config(scsi_qla_host_t *vha)
  632. {
  633. uint16_t w;
  634. struct qla_hw_data *ha = vha->hw;
  635. pci_set_master(ha->pdev);
  636. pci_try_set_mwi(ha->pdev);
  637. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  638. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  639. w &= ~PCI_COMMAND_INTX_DISABLE;
  640. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  641. /* PCIe -- adjust Maximum Read Request Size (2048). */
  642. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  643. pcie_set_readrq(ha->pdev, 2048);
  644. pci_disable_rom(ha->pdev);
  645. ha->chip_revision = ha->pdev->revision;
  646. return QLA_SUCCESS;
  647. }
  648. /**
  649. * qla2x00_isp_firmware() - Choose firmware image.
  650. * @ha: HA context
  651. *
  652. * Returns 0 on success.
  653. */
  654. static int
  655. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  656. {
  657. int rval;
  658. uint16_t loop_id, topo, sw_cap;
  659. uint8_t domain, area, al_pa;
  660. struct qla_hw_data *ha = vha->hw;
  661. /* Assume loading risc code */
  662. rval = QLA_FUNCTION_FAILED;
  663. if (ha->flags.disable_risc_code_load) {
  664. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  665. vha->host_no));
  666. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  667. /* Verify checksum of loaded RISC code. */
  668. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  669. if (rval == QLA_SUCCESS) {
  670. /* And, verify we are not in ROM code. */
  671. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  672. &area, &domain, &topo, &sw_cap);
  673. }
  674. }
  675. if (rval) {
  676. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  677. vha->host_no));
  678. }
  679. return (rval);
  680. }
  681. /**
  682. * qla2x00_reset_chip() - Reset ISP chip.
  683. * @ha: HA context
  684. *
  685. * Returns 0 on success.
  686. */
  687. void
  688. qla2x00_reset_chip(scsi_qla_host_t *vha)
  689. {
  690. unsigned long flags = 0;
  691. struct qla_hw_data *ha = vha->hw;
  692. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  693. uint32_t cnt;
  694. uint16_t cmd;
  695. if (unlikely(pci_channel_offline(ha->pdev)))
  696. return;
  697. ha->isp_ops->disable_intrs(ha);
  698. spin_lock_irqsave(&ha->hardware_lock, flags);
  699. /* Turn off master enable */
  700. cmd = 0;
  701. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  702. cmd &= ~PCI_COMMAND_MASTER;
  703. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  704. if (!IS_QLA2100(ha)) {
  705. /* Pause RISC. */
  706. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  707. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  708. for (cnt = 0; cnt < 30000; cnt++) {
  709. if ((RD_REG_WORD(&reg->hccr) &
  710. HCCR_RISC_PAUSE) != 0)
  711. break;
  712. udelay(100);
  713. }
  714. } else {
  715. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  716. udelay(10);
  717. }
  718. /* Select FPM registers. */
  719. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  720. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  721. /* FPM Soft Reset. */
  722. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  723. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  724. /* Toggle Fpm Reset. */
  725. if (!IS_QLA2200(ha)) {
  726. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  727. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  728. }
  729. /* Select frame buffer registers. */
  730. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  731. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  732. /* Reset frame buffer FIFOs. */
  733. if (IS_QLA2200(ha)) {
  734. WRT_FB_CMD_REG(ha, reg, 0xa000);
  735. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  736. } else {
  737. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  738. /* Read back fb_cmd until zero or 3 seconds max */
  739. for (cnt = 0; cnt < 3000; cnt++) {
  740. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  741. break;
  742. udelay(100);
  743. }
  744. }
  745. /* Select RISC module registers. */
  746. WRT_REG_WORD(&reg->ctrl_status, 0);
  747. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  748. /* Reset RISC processor. */
  749. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  750. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  751. /* Release RISC processor. */
  752. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  753. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  754. }
  755. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  756. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  757. /* Reset ISP chip. */
  758. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  759. /* Wait for RISC to recover from reset. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  761. /*
  762. * It is necessary to for a delay here since the card doesn't
  763. * respond to PCI reads during a reset. On some architectures
  764. * this will result in an MCA.
  765. */
  766. udelay(20);
  767. for (cnt = 30000; cnt; cnt--) {
  768. if ((RD_REG_WORD(&reg->ctrl_status) &
  769. CSR_ISP_SOFT_RESET) == 0)
  770. break;
  771. udelay(100);
  772. }
  773. } else
  774. udelay(10);
  775. /* Reset RISC processor. */
  776. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  777. WRT_REG_WORD(&reg->semaphore, 0);
  778. /* Release RISC processor. */
  779. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  780. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  781. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  782. for (cnt = 0; cnt < 30000; cnt++) {
  783. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  784. break;
  785. udelay(100);
  786. }
  787. } else
  788. udelay(100);
  789. /* Turn on master enable */
  790. cmd |= PCI_COMMAND_MASTER;
  791. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  792. /* Disable RISC pause on FPM parity error. */
  793. if (!IS_QLA2100(ha)) {
  794. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  795. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  796. }
  797. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  798. }
  799. /**
  800. * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
  801. *
  802. * Returns 0 on success.
  803. */
  804. int
  805. qla81xx_reset_mpi(scsi_qla_host_t *vha)
  806. {
  807. uint16_t mb[4] = {0x1010, 0, 1, 0};
  808. return qla81xx_write_mpi_register(vha, mb);
  809. }
  810. /**
  811. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  812. * @ha: HA context
  813. *
  814. * Returns 0 on success.
  815. */
  816. static inline void
  817. qla24xx_reset_risc(scsi_qla_host_t *vha)
  818. {
  819. unsigned long flags = 0;
  820. struct qla_hw_data *ha = vha->hw;
  821. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  822. uint32_t cnt, d2;
  823. uint16_t wd;
  824. static int abts_cnt; /* ISP abort retry counts */
  825. spin_lock_irqsave(&ha->hardware_lock, flags);
  826. /* Reset RISC. */
  827. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  828. for (cnt = 0; cnt < 30000; cnt++) {
  829. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  830. break;
  831. udelay(10);
  832. }
  833. WRT_REG_DWORD(&reg->ctrl_status,
  834. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  835. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  836. udelay(100);
  837. /* Wait for firmware to complete NVRAM accesses. */
  838. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  839. for (cnt = 10000 ; cnt && d2; cnt--) {
  840. udelay(5);
  841. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  842. barrier();
  843. }
  844. /* Wait for soft-reset to complete. */
  845. d2 = RD_REG_DWORD(&reg->ctrl_status);
  846. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  847. udelay(5);
  848. d2 = RD_REG_DWORD(&reg->ctrl_status);
  849. barrier();
  850. }
  851. /* If required, do an MPI FW reset now */
  852. if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
  853. if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
  854. if (++abts_cnt < 5) {
  855. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  856. set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
  857. } else {
  858. /*
  859. * We exhausted the ISP abort retries. We have to
  860. * set the board offline.
  861. */
  862. abts_cnt = 0;
  863. vha->flags.online = 0;
  864. }
  865. }
  866. }
  867. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  868. RD_REG_DWORD(&reg->hccr);
  869. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  870. RD_REG_DWORD(&reg->hccr);
  871. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  872. RD_REG_DWORD(&reg->hccr);
  873. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  874. for (cnt = 6000000 ; cnt && d2; cnt--) {
  875. udelay(5);
  876. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  877. barrier();
  878. }
  879. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  880. if (IS_NOPOLLING_TYPE(ha))
  881. ha->isp_ops->enable_intrs(ha);
  882. }
  883. /**
  884. * qla24xx_reset_chip() - Reset ISP24xx chip.
  885. * @ha: HA context
  886. *
  887. * Returns 0 on success.
  888. */
  889. void
  890. qla24xx_reset_chip(scsi_qla_host_t *vha)
  891. {
  892. struct qla_hw_data *ha = vha->hw;
  893. if (pci_channel_offline(ha->pdev) &&
  894. ha->flags.pci_channel_io_perm_failure) {
  895. return;
  896. }
  897. ha->isp_ops->disable_intrs(ha);
  898. /* Perform RISC reset. */
  899. qla24xx_reset_risc(vha);
  900. }
  901. /**
  902. * qla2x00_chip_diag() - Test chip for proper operation.
  903. * @ha: HA context
  904. *
  905. * Returns 0 on success.
  906. */
  907. int
  908. qla2x00_chip_diag(scsi_qla_host_t *vha)
  909. {
  910. int rval;
  911. struct qla_hw_data *ha = vha->hw;
  912. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  913. unsigned long flags = 0;
  914. uint16_t data;
  915. uint32_t cnt;
  916. uint16_t mb[5];
  917. struct req_que *req = ha->req_q_map[0];
  918. /* Assume a failed state */
  919. rval = QLA_FUNCTION_FAILED;
  920. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  921. vha->host_no, (u_long)&reg->flash_address));
  922. spin_lock_irqsave(&ha->hardware_lock, flags);
  923. /* Reset ISP chip. */
  924. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  925. /*
  926. * We need to have a delay here since the card will not respond while
  927. * in reset causing an MCA on some architectures.
  928. */
  929. udelay(20);
  930. data = qla2x00_debounce_register(&reg->ctrl_status);
  931. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  932. udelay(5);
  933. data = RD_REG_WORD(&reg->ctrl_status);
  934. barrier();
  935. }
  936. if (!cnt)
  937. goto chip_diag_failed;
  938. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  939. vha->host_no));
  940. /* Reset RISC processor. */
  941. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  942. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  943. /* Workaround for QLA2312 PCI parity error */
  944. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  945. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  946. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  947. udelay(5);
  948. data = RD_MAILBOX_REG(ha, reg, 0);
  949. barrier();
  950. }
  951. } else
  952. udelay(10);
  953. if (!cnt)
  954. goto chip_diag_failed;
  955. /* Check product ID of chip */
  956. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  957. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  958. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  959. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  960. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  961. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  962. mb[3] != PROD_ID_3) {
  963. qla_printk(KERN_WARNING, ha,
  964. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  965. goto chip_diag_failed;
  966. }
  967. ha->product_id[0] = mb[1];
  968. ha->product_id[1] = mb[2];
  969. ha->product_id[2] = mb[3];
  970. ha->product_id[3] = mb[4];
  971. /* Adjust fw RISC transfer size */
  972. if (req->length > 1024)
  973. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  974. else
  975. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  976. req->length;
  977. if (IS_QLA2200(ha) &&
  978. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  979. /* Limit firmware transfer size with a 2200A */
  980. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  981. vha->host_no));
  982. ha->device_type |= DT_ISP2200A;
  983. ha->fw_transfer_size = 128;
  984. }
  985. /* Wrap Incoming Mailboxes Test. */
  986. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  987. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  988. rval = qla2x00_mbx_reg_test(vha);
  989. if (rval) {
  990. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  991. vha->host_no));
  992. qla_printk(KERN_WARNING, ha,
  993. "Failed mailbox send register test\n");
  994. }
  995. else {
  996. /* Flag a successful rval */
  997. rval = QLA_SUCCESS;
  998. }
  999. spin_lock_irqsave(&ha->hardware_lock, flags);
  1000. chip_diag_failed:
  1001. if (rval)
  1002. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1003. "****\n", vha->host_no));
  1004. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1005. return (rval);
  1006. }
  1007. /**
  1008. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1009. * @ha: HA context
  1010. *
  1011. * Returns 0 on success.
  1012. */
  1013. int
  1014. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1015. {
  1016. int rval;
  1017. struct qla_hw_data *ha = vha->hw;
  1018. struct req_que *req = ha->req_q_map[0];
  1019. if (IS_QLA82XX(ha))
  1020. return QLA_SUCCESS;
  1021. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1022. rval = qla2x00_mbx_reg_test(vha);
  1023. if (rval) {
  1024. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1025. vha->host_no));
  1026. qla_printk(KERN_WARNING, ha,
  1027. "Failed mailbox send register test\n");
  1028. } else {
  1029. /* Flag a successful rval */
  1030. rval = QLA_SUCCESS;
  1031. }
  1032. return rval;
  1033. }
  1034. void
  1035. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1036. {
  1037. int rval;
  1038. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1039. eft_size, fce_size, mq_size;
  1040. dma_addr_t tc_dma;
  1041. void *tc;
  1042. struct qla_hw_data *ha = vha->hw;
  1043. struct req_que *req = ha->req_q_map[0];
  1044. struct rsp_que *rsp = ha->rsp_q_map[0];
  1045. if (ha->fw_dump) {
  1046. qla_printk(KERN_WARNING, ha,
  1047. "Firmware dump previously allocated.\n");
  1048. return;
  1049. }
  1050. ha->fw_dumped = 0;
  1051. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1052. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1053. fixed_size = sizeof(struct qla2100_fw_dump);
  1054. } else if (IS_QLA23XX(ha)) {
  1055. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1056. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1057. sizeof(uint16_t);
  1058. } else if (IS_FWI2_CAPABLE(ha)) {
  1059. if (IS_QLA81XX(ha))
  1060. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1061. else if (IS_QLA25XX(ha))
  1062. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1063. else
  1064. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1065. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1066. sizeof(uint32_t);
  1067. if (ha->mqenable)
  1068. mq_size = sizeof(struct qla2xxx_mq_chain);
  1069. /* Allocate memory for Fibre Channel Event Buffer. */
  1070. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1071. goto try_eft;
  1072. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1073. GFP_KERNEL);
  1074. if (!tc) {
  1075. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1076. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1077. goto try_eft;
  1078. }
  1079. memset(tc, 0, FCE_SIZE);
  1080. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1081. ha->fce_mb, &ha->fce_bufs);
  1082. if (rval) {
  1083. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1084. "FCE (%d).\n", rval);
  1085. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1086. tc_dma);
  1087. ha->flags.fce_enabled = 0;
  1088. goto try_eft;
  1089. }
  1090. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1091. FCE_SIZE / 1024);
  1092. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1093. ha->flags.fce_enabled = 1;
  1094. ha->fce_dma = tc_dma;
  1095. ha->fce = tc;
  1096. try_eft:
  1097. /* Allocate memory for Extended Trace Buffer. */
  1098. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1099. GFP_KERNEL);
  1100. if (!tc) {
  1101. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1102. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1103. goto cont_alloc;
  1104. }
  1105. memset(tc, 0, EFT_SIZE);
  1106. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1107. if (rval) {
  1108. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1109. "EFT (%d).\n", rval);
  1110. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1111. tc_dma);
  1112. goto cont_alloc;
  1113. }
  1114. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1115. EFT_SIZE / 1024);
  1116. eft_size = EFT_SIZE;
  1117. ha->eft_dma = tc_dma;
  1118. ha->eft = tc;
  1119. }
  1120. cont_alloc:
  1121. req_q_size = req->length * sizeof(request_t);
  1122. rsp_q_size = rsp->length * sizeof(response_t);
  1123. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1124. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1125. ha->chain_offset = dump_size;
  1126. dump_size += mq_size + fce_size;
  1127. ha->fw_dump = vmalloc(dump_size);
  1128. if (!ha->fw_dump) {
  1129. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1130. "firmware dump!!!\n", dump_size / 1024);
  1131. if (ha->fce) {
  1132. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  1133. ha->fce_dma);
  1134. ha->fce = NULL;
  1135. ha->fce_dma = 0;
  1136. }
  1137. if (ha->eft) {
  1138. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1139. ha->eft_dma);
  1140. ha->eft = NULL;
  1141. ha->eft_dma = 0;
  1142. }
  1143. return;
  1144. }
  1145. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1146. dump_size / 1024);
  1147. ha->fw_dump_len = dump_size;
  1148. ha->fw_dump->signature[0] = 'Q';
  1149. ha->fw_dump->signature[1] = 'L';
  1150. ha->fw_dump->signature[2] = 'G';
  1151. ha->fw_dump->signature[3] = 'C';
  1152. ha->fw_dump->version = __constant_htonl(1);
  1153. ha->fw_dump->fixed_size = htonl(fixed_size);
  1154. ha->fw_dump->mem_size = htonl(mem_size);
  1155. ha->fw_dump->req_q_size = htonl(req_q_size);
  1156. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1157. ha->fw_dump->eft_size = htonl(eft_size);
  1158. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1159. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1160. ha->fw_dump->header_size =
  1161. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1162. }
  1163. static int
  1164. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1165. {
  1166. #define MPS_MASK 0xe0
  1167. int rval;
  1168. uint16_t dc;
  1169. uint32_t dw;
  1170. struct qla_hw_data *ha = vha->hw;
  1171. if (!IS_QLA81XX(vha->hw))
  1172. return QLA_SUCCESS;
  1173. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1174. if (rval != QLA_SUCCESS) {
  1175. DEBUG2(qla_printk(KERN_WARNING, ha,
  1176. "Sync-MPI: Unable to acquire semaphore.\n"));
  1177. goto done;
  1178. }
  1179. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1180. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1181. if (rval != QLA_SUCCESS) {
  1182. DEBUG2(qla_printk(KERN_WARNING, ha,
  1183. "Sync-MPI: Unable to read sync.\n"));
  1184. goto done_release;
  1185. }
  1186. dc &= MPS_MASK;
  1187. if (dc == (dw & MPS_MASK))
  1188. goto done_release;
  1189. dw &= ~MPS_MASK;
  1190. dw |= dc;
  1191. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1192. if (rval != QLA_SUCCESS) {
  1193. DEBUG2(qla_printk(KERN_WARNING, ha,
  1194. "Sync-MPI: Unable to gain sync.\n"));
  1195. }
  1196. done_release:
  1197. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1198. if (rval != QLA_SUCCESS) {
  1199. DEBUG2(qla_printk(KERN_WARNING, ha,
  1200. "Sync-MPI: Unable to release semaphore.\n"));
  1201. }
  1202. done:
  1203. return rval;
  1204. }
  1205. /**
  1206. * qla2x00_setup_chip() - Load and start RISC firmware.
  1207. * @ha: HA context
  1208. *
  1209. * Returns 0 on success.
  1210. */
  1211. static int
  1212. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1213. {
  1214. int rval;
  1215. uint32_t srisc_address = 0;
  1216. struct qla_hw_data *ha = vha->hw;
  1217. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1218. unsigned long flags;
  1219. uint16_t fw_major_version;
  1220. if (IS_QLA82XX(ha)) {
  1221. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1222. if (rval == QLA_SUCCESS) {
  1223. qla2x00_stop_firmware(vha);
  1224. goto enable_82xx_npiv;
  1225. } else
  1226. goto failed;
  1227. }
  1228. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1229. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1230. spin_lock_irqsave(&ha->hardware_lock, flags);
  1231. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1232. RD_REG_WORD(&reg->hccr);
  1233. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1234. }
  1235. qla81xx_mpi_sync(vha);
  1236. /* Load firmware sequences */
  1237. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1238. if (rval == QLA_SUCCESS) {
  1239. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1240. "code.\n", vha->host_no));
  1241. rval = qla2x00_verify_checksum(vha, srisc_address);
  1242. if (rval == QLA_SUCCESS) {
  1243. /* Start firmware execution. */
  1244. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1245. "firmware.\n", vha->host_no));
  1246. rval = qla2x00_execute_fw(vha, srisc_address);
  1247. /* Retrieve firmware information. */
  1248. if (rval == QLA_SUCCESS) {
  1249. enable_82xx_npiv:
  1250. fw_major_version = ha->fw_major_version;
  1251. rval = qla2x00_get_fw_version(vha,
  1252. &ha->fw_major_version,
  1253. &ha->fw_minor_version,
  1254. &ha->fw_subminor_version,
  1255. &ha->fw_attributes, &ha->fw_memory_size,
  1256. ha->mpi_version, &ha->mpi_capabilities,
  1257. ha->phy_version);
  1258. if (rval != QLA_SUCCESS)
  1259. goto failed;
  1260. ha->flags.npiv_supported = 0;
  1261. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1262. (ha->fw_attributes & BIT_2)) {
  1263. ha->flags.npiv_supported = 1;
  1264. if ((!ha->max_npiv_vports) ||
  1265. ((ha->max_npiv_vports + 1) %
  1266. MIN_MULTI_ID_FABRIC))
  1267. ha->max_npiv_vports =
  1268. MIN_MULTI_ID_FABRIC - 1;
  1269. }
  1270. qla2x00_get_resource_cnts(vha, NULL,
  1271. &ha->fw_xcb_count, NULL, NULL,
  1272. &ha->max_npiv_vports, NULL);
  1273. if (!fw_major_version && ql2xallocfwdump) {
  1274. if (!IS_QLA82XX(ha))
  1275. qla2x00_alloc_fw_dump(vha);
  1276. }
  1277. }
  1278. } else {
  1279. DEBUG2(printk(KERN_INFO
  1280. "scsi(%ld): ISP Firmware failed checksum.\n",
  1281. vha->host_no));
  1282. }
  1283. }
  1284. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1285. /* Enable proper parity. */
  1286. spin_lock_irqsave(&ha->hardware_lock, flags);
  1287. if (IS_QLA2300(ha))
  1288. /* SRAM parity */
  1289. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1290. else
  1291. /* SRAM, Instruction RAM and GP RAM parity */
  1292. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1293. RD_REG_WORD(&reg->hccr);
  1294. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1295. }
  1296. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1297. uint32_t size;
  1298. rval = qla81xx_fac_get_sector_size(vha, &size);
  1299. if (rval == QLA_SUCCESS) {
  1300. ha->flags.fac_supported = 1;
  1301. ha->fdt_block_size = size << 2;
  1302. } else {
  1303. qla_printk(KERN_ERR, ha,
  1304. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1305. ha->fw_major_version, ha->fw_minor_version,
  1306. ha->fw_subminor_version);
  1307. }
  1308. }
  1309. failed:
  1310. if (rval) {
  1311. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1312. vha->host_no));
  1313. }
  1314. return (rval);
  1315. }
  1316. /**
  1317. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1318. * @ha: HA context
  1319. *
  1320. * Beginning of request ring has initialization control block already built
  1321. * by nvram config routine.
  1322. *
  1323. * Returns 0 on success.
  1324. */
  1325. void
  1326. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1327. {
  1328. uint16_t cnt;
  1329. response_t *pkt;
  1330. rsp->ring_ptr = rsp->ring;
  1331. rsp->ring_index = 0;
  1332. rsp->status_srb = NULL;
  1333. pkt = rsp->ring_ptr;
  1334. for (cnt = 0; cnt < rsp->length; cnt++) {
  1335. pkt->signature = RESPONSE_PROCESSED;
  1336. pkt++;
  1337. }
  1338. }
  1339. /**
  1340. * qla2x00_update_fw_options() - Read and process firmware options.
  1341. * @ha: HA context
  1342. *
  1343. * Returns 0 on success.
  1344. */
  1345. void
  1346. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1347. {
  1348. uint16_t swing, emphasis, tx_sens, rx_sens;
  1349. struct qla_hw_data *ha = vha->hw;
  1350. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1351. qla2x00_get_fw_options(vha, ha->fw_options);
  1352. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1353. return;
  1354. /* Serial Link options. */
  1355. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1356. vha->host_no));
  1357. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1358. sizeof(ha->fw_seriallink_options)));
  1359. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1360. if (ha->fw_seriallink_options[3] & BIT_2) {
  1361. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1362. /* 1G settings */
  1363. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1364. emphasis = (ha->fw_seriallink_options[2] &
  1365. (BIT_4 | BIT_3)) >> 3;
  1366. tx_sens = ha->fw_seriallink_options[0] &
  1367. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1368. rx_sens = (ha->fw_seriallink_options[0] &
  1369. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1370. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1371. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1372. if (rx_sens == 0x0)
  1373. rx_sens = 0x3;
  1374. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1375. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1376. ha->fw_options[10] |= BIT_5 |
  1377. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1378. (tx_sens & (BIT_1 | BIT_0));
  1379. /* 2G settings */
  1380. swing = (ha->fw_seriallink_options[2] &
  1381. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1382. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1383. tx_sens = ha->fw_seriallink_options[1] &
  1384. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1385. rx_sens = (ha->fw_seriallink_options[1] &
  1386. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1387. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1388. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1389. if (rx_sens == 0x0)
  1390. rx_sens = 0x3;
  1391. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1392. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1393. ha->fw_options[11] |= BIT_5 |
  1394. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1395. (tx_sens & (BIT_1 | BIT_0));
  1396. }
  1397. /* FCP2 options. */
  1398. /* Return command IOCBs without waiting for an ABTS to complete. */
  1399. ha->fw_options[3] |= BIT_13;
  1400. /* LED scheme. */
  1401. if (ha->flags.enable_led_scheme)
  1402. ha->fw_options[2] |= BIT_12;
  1403. /* Detect ISP6312. */
  1404. if (IS_QLA6312(ha))
  1405. ha->fw_options[2] |= BIT_13;
  1406. /* Update firmware options. */
  1407. qla2x00_set_fw_options(vha, ha->fw_options);
  1408. }
  1409. void
  1410. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1411. {
  1412. int rval;
  1413. struct qla_hw_data *ha = vha->hw;
  1414. if (IS_QLA82XX(ha))
  1415. return;
  1416. /* Update Serial Link options. */
  1417. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1418. return;
  1419. rval = qla2x00_set_serdes_params(vha,
  1420. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1421. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1422. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1423. if (rval != QLA_SUCCESS) {
  1424. qla_printk(KERN_WARNING, ha,
  1425. "Unable to update Serial Link options (%x).\n", rval);
  1426. }
  1427. }
  1428. void
  1429. qla2x00_config_rings(struct scsi_qla_host *vha)
  1430. {
  1431. struct qla_hw_data *ha = vha->hw;
  1432. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1433. struct req_que *req = ha->req_q_map[0];
  1434. struct rsp_que *rsp = ha->rsp_q_map[0];
  1435. /* Setup ring parameters in initialization control block. */
  1436. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1437. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1438. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1439. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1440. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1441. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1442. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1443. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1444. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1445. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1446. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1447. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1448. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1449. }
  1450. void
  1451. qla24xx_config_rings(struct scsi_qla_host *vha)
  1452. {
  1453. struct qla_hw_data *ha = vha->hw;
  1454. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1455. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1456. struct qla_msix_entry *msix;
  1457. struct init_cb_24xx *icb;
  1458. uint16_t rid = 0;
  1459. struct req_que *req = ha->req_q_map[0];
  1460. struct rsp_que *rsp = ha->rsp_q_map[0];
  1461. /* Setup ring parameters in initialization control block. */
  1462. icb = (struct init_cb_24xx *)ha->init_cb;
  1463. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1464. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1465. icb->request_q_length = cpu_to_le16(req->length);
  1466. icb->response_q_length = cpu_to_le16(rsp->length);
  1467. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1468. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1469. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1470. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1471. if (ha->mqenable) {
  1472. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1473. icb->rid = __constant_cpu_to_le16(rid);
  1474. if (ha->flags.msix_enabled) {
  1475. msix = &ha->msix_entries[1];
  1476. DEBUG2_17(printk(KERN_INFO
  1477. "Registering vector 0x%x for base que\n", msix->entry));
  1478. icb->msix = cpu_to_le16(msix->entry);
  1479. }
  1480. /* Use alternate PCI bus number */
  1481. if (MSB(rid))
  1482. icb->firmware_options_2 |=
  1483. __constant_cpu_to_le32(BIT_19);
  1484. /* Use alternate PCI devfn */
  1485. if (LSB(rid))
  1486. icb->firmware_options_2 |=
  1487. __constant_cpu_to_le32(BIT_18);
  1488. /* Use Disable MSIX Handshake mode for capable adapters */
  1489. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1490. icb->firmware_options_2 &=
  1491. __constant_cpu_to_le32(~BIT_22);
  1492. ha->flags.disable_msix_handshake = 1;
  1493. qla_printk(KERN_INFO, ha,
  1494. "MSIX Handshake Disable Mode turned on\n");
  1495. } else {
  1496. icb->firmware_options_2 |=
  1497. __constant_cpu_to_le32(BIT_22);
  1498. }
  1499. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1500. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1501. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1502. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1503. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1504. } else {
  1505. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1506. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1507. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1508. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1509. }
  1510. /* PCI posting */
  1511. RD_REG_DWORD(&ioreg->hccr);
  1512. }
  1513. /**
  1514. * qla2x00_init_rings() - Initializes firmware.
  1515. * @ha: HA context
  1516. *
  1517. * Beginning of request ring has initialization control block already built
  1518. * by nvram config routine.
  1519. *
  1520. * Returns 0 on success.
  1521. */
  1522. static int
  1523. qla2x00_init_rings(scsi_qla_host_t *vha)
  1524. {
  1525. int rval;
  1526. unsigned long flags = 0;
  1527. int cnt, que;
  1528. struct qla_hw_data *ha = vha->hw;
  1529. struct req_que *req;
  1530. struct rsp_que *rsp;
  1531. struct scsi_qla_host *vp;
  1532. struct mid_init_cb_24xx *mid_init_cb =
  1533. (struct mid_init_cb_24xx *) ha->init_cb;
  1534. spin_lock_irqsave(&ha->hardware_lock, flags);
  1535. /* Clear outstanding commands array. */
  1536. for (que = 0; que < ha->max_req_queues; que++) {
  1537. req = ha->req_q_map[que];
  1538. if (!req)
  1539. continue;
  1540. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1541. req->outstanding_cmds[cnt] = NULL;
  1542. req->current_outstanding_cmd = 1;
  1543. /* Initialize firmware. */
  1544. req->ring_ptr = req->ring;
  1545. req->ring_index = 0;
  1546. req->cnt = req->length;
  1547. }
  1548. for (que = 0; que < ha->max_rsp_queues; que++) {
  1549. rsp = ha->rsp_q_map[que];
  1550. if (!rsp)
  1551. continue;
  1552. /* Initialize response queue entries */
  1553. qla2x00_init_response_q_entries(rsp);
  1554. }
  1555. spin_lock(&ha->vport_slock);
  1556. /* Clear RSCN queue. */
  1557. list_for_each_entry(vp, &ha->vp_list, list) {
  1558. vp->rscn_in_ptr = 0;
  1559. vp->rscn_out_ptr = 0;
  1560. }
  1561. spin_unlock(&ha->vport_slock);
  1562. ha->isp_ops->config_rings(vha);
  1563. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1564. /* Update any ISP specific firmware options before initialization. */
  1565. ha->isp_ops->update_fw_options(vha);
  1566. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1567. if (ha->flags.npiv_supported) {
  1568. if (ha->operating_mode == LOOP)
  1569. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1570. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1571. }
  1572. if (IS_FWI2_CAPABLE(ha)) {
  1573. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1574. mid_init_cb->init_cb.execution_throttle =
  1575. cpu_to_le16(ha->fw_xcb_count);
  1576. }
  1577. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1578. if (rval) {
  1579. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1580. vha->host_no));
  1581. } else {
  1582. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1583. vha->host_no));
  1584. }
  1585. return (rval);
  1586. }
  1587. /**
  1588. * qla2x00_fw_ready() - Waits for firmware ready.
  1589. * @ha: HA context
  1590. *
  1591. * Returns 0 on success.
  1592. */
  1593. static int
  1594. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1595. {
  1596. int rval;
  1597. unsigned long wtime, mtime, cs84xx_time;
  1598. uint16_t min_wait; /* Minimum wait time if loop is down */
  1599. uint16_t wait_time; /* Wait time if loop is coming ready */
  1600. uint16_t state[5];
  1601. struct qla_hw_data *ha = vha->hw;
  1602. rval = QLA_SUCCESS;
  1603. /* 20 seconds for loop down. */
  1604. min_wait = 20;
  1605. /*
  1606. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1607. * our own processing.
  1608. */
  1609. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1610. wait_time = min_wait;
  1611. }
  1612. /* Min wait time if loop down */
  1613. mtime = jiffies + (min_wait * HZ);
  1614. /* wait time before firmware ready */
  1615. wtime = jiffies + (wait_time * HZ);
  1616. /* Wait for ISP to finish LIP */
  1617. if (!vha->flags.init_done)
  1618. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1619. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1620. vha->host_no));
  1621. do {
  1622. rval = qla2x00_get_firmware_state(vha, state);
  1623. if (rval == QLA_SUCCESS) {
  1624. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1625. vha->device_flags &= ~DFLG_NO_CABLE;
  1626. }
  1627. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1628. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1629. "84xx=%x.\n", vha->host_no, state[0],
  1630. state[2]));
  1631. if ((state[2] & FSTATE_LOGGED_IN) &&
  1632. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1633. DEBUG16(printk("scsi(%ld): Sending "
  1634. "verify iocb.\n", vha->host_no));
  1635. cs84xx_time = jiffies;
  1636. rval = qla84xx_init_chip(vha);
  1637. if (rval != QLA_SUCCESS)
  1638. break;
  1639. /* Add time taken to initialize. */
  1640. cs84xx_time = jiffies - cs84xx_time;
  1641. wtime += cs84xx_time;
  1642. mtime += cs84xx_time;
  1643. DEBUG16(printk("scsi(%ld): Increasing "
  1644. "wait time by %ld. New time %ld\n",
  1645. vha->host_no, cs84xx_time, wtime));
  1646. }
  1647. } else if (state[0] == FSTATE_READY) {
  1648. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1649. vha->host_no));
  1650. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1651. &ha->login_timeout, &ha->r_a_tov);
  1652. rval = QLA_SUCCESS;
  1653. break;
  1654. }
  1655. rval = QLA_FUNCTION_FAILED;
  1656. if (atomic_read(&vha->loop_down_timer) &&
  1657. state[0] != FSTATE_READY) {
  1658. /* Loop down. Timeout on min_wait for states
  1659. * other than Wait for Login.
  1660. */
  1661. if (time_after_eq(jiffies, mtime)) {
  1662. qla_printk(KERN_INFO, ha,
  1663. "Cable is unplugged...\n");
  1664. vha->device_flags |= DFLG_NO_CABLE;
  1665. break;
  1666. }
  1667. }
  1668. } else {
  1669. /* Mailbox cmd failed. Timeout on min_wait. */
  1670. if (time_after_eq(jiffies, mtime) ||
  1671. ha->flags.isp82xx_fw_hung)
  1672. break;
  1673. }
  1674. if (time_after_eq(jiffies, wtime))
  1675. break;
  1676. /* Delay for a while */
  1677. msleep(500);
  1678. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1679. vha->host_no, state[0], jiffies));
  1680. } while (1);
  1681. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1682. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1683. jiffies));
  1684. if (rval) {
  1685. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1686. vha->host_no));
  1687. }
  1688. return (rval);
  1689. }
  1690. /*
  1691. * qla2x00_configure_hba
  1692. * Setup adapter context.
  1693. *
  1694. * Input:
  1695. * ha = adapter state pointer.
  1696. *
  1697. * Returns:
  1698. * 0 = success
  1699. *
  1700. * Context:
  1701. * Kernel context.
  1702. */
  1703. static int
  1704. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1705. {
  1706. int rval;
  1707. uint16_t loop_id;
  1708. uint16_t topo;
  1709. uint16_t sw_cap;
  1710. uint8_t al_pa;
  1711. uint8_t area;
  1712. uint8_t domain;
  1713. char connect_type[22];
  1714. struct qla_hw_data *ha = vha->hw;
  1715. /* Get host addresses. */
  1716. rval = qla2x00_get_adapter_id(vha,
  1717. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1718. if (rval != QLA_SUCCESS) {
  1719. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1720. IS_QLA8XXX_TYPE(ha) ||
  1721. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1722. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1723. __func__, vha->host_no));
  1724. } else {
  1725. qla_printk(KERN_WARNING, ha,
  1726. "ERROR -- Unable to get host loop ID.\n");
  1727. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1728. }
  1729. return (rval);
  1730. }
  1731. if (topo == 4) {
  1732. qla_printk(KERN_INFO, ha,
  1733. "Cannot get topology - retrying.\n");
  1734. return (QLA_FUNCTION_FAILED);
  1735. }
  1736. vha->loop_id = loop_id;
  1737. /* initialize */
  1738. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1739. ha->operating_mode = LOOP;
  1740. ha->switch_cap = 0;
  1741. switch (topo) {
  1742. case 0:
  1743. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1744. vha->host_no));
  1745. ha->current_topology = ISP_CFG_NL;
  1746. strcpy(connect_type, "(Loop)");
  1747. break;
  1748. case 1:
  1749. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1750. vha->host_no));
  1751. ha->switch_cap = sw_cap;
  1752. ha->current_topology = ISP_CFG_FL;
  1753. strcpy(connect_type, "(FL_Port)");
  1754. break;
  1755. case 2:
  1756. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1757. vha->host_no));
  1758. ha->operating_mode = P2P;
  1759. ha->current_topology = ISP_CFG_N;
  1760. strcpy(connect_type, "(N_Port-to-N_Port)");
  1761. break;
  1762. case 3:
  1763. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1764. vha->host_no));
  1765. ha->switch_cap = sw_cap;
  1766. ha->operating_mode = P2P;
  1767. ha->current_topology = ISP_CFG_F;
  1768. strcpy(connect_type, "(F_Port)");
  1769. break;
  1770. default:
  1771. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1772. "Using NL.\n",
  1773. vha->host_no, topo));
  1774. ha->current_topology = ISP_CFG_NL;
  1775. strcpy(connect_type, "(Loop)");
  1776. break;
  1777. }
  1778. /* Save Host port and loop ID. */
  1779. /* byte order - Big Endian */
  1780. vha->d_id.b.domain = domain;
  1781. vha->d_id.b.area = area;
  1782. vha->d_id.b.al_pa = al_pa;
  1783. if (!vha->flags.init_done)
  1784. qla_printk(KERN_INFO, ha,
  1785. "Topology - %s, Host Loop address 0x%x\n",
  1786. connect_type, vha->loop_id);
  1787. if (rval) {
  1788. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1789. } else {
  1790. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1791. }
  1792. return(rval);
  1793. }
  1794. inline void
  1795. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1796. char *def)
  1797. {
  1798. char *st, *en;
  1799. uint16_t index;
  1800. struct qla_hw_data *ha = vha->hw;
  1801. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1802. !IS_QLA8XXX_TYPE(ha);
  1803. if (memcmp(model, BINZERO, len) != 0) {
  1804. strncpy(ha->model_number, model, len);
  1805. st = en = ha->model_number;
  1806. en += len - 1;
  1807. while (en > st) {
  1808. if (*en != 0x20 && *en != 0x00)
  1809. break;
  1810. *en-- = '\0';
  1811. }
  1812. index = (ha->pdev->subsystem_device & 0xff);
  1813. if (use_tbl &&
  1814. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1815. index < QLA_MODEL_NAMES)
  1816. strncpy(ha->model_desc,
  1817. qla2x00_model_name[index * 2 + 1],
  1818. sizeof(ha->model_desc) - 1);
  1819. } else {
  1820. index = (ha->pdev->subsystem_device & 0xff);
  1821. if (use_tbl &&
  1822. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1823. index < QLA_MODEL_NAMES) {
  1824. strcpy(ha->model_number,
  1825. qla2x00_model_name[index * 2]);
  1826. strncpy(ha->model_desc,
  1827. qla2x00_model_name[index * 2 + 1],
  1828. sizeof(ha->model_desc) - 1);
  1829. } else {
  1830. strcpy(ha->model_number, def);
  1831. }
  1832. }
  1833. if (IS_FWI2_CAPABLE(ha))
  1834. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1835. sizeof(ha->model_desc));
  1836. }
  1837. /* On sparc systems, obtain port and node WWN from firmware
  1838. * properties.
  1839. */
  1840. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1841. {
  1842. #ifdef CONFIG_SPARC
  1843. struct qla_hw_data *ha = vha->hw;
  1844. struct pci_dev *pdev = ha->pdev;
  1845. struct device_node *dp = pci_device_to_OF_node(pdev);
  1846. const u8 *val;
  1847. int len;
  1848. val = of_get_property(dp, "port-wwn", &len);
  1849. if (val && len >= WWN_SIZE)
  1850. memcpy(nv->port_name, val, WWN_SIZE);
  1851. val = of_get_property(dp, "node-wwn", &len);
  1852. if (val && len >= WWN_SIZE)
  1853. memcpy(nv->node_name, val, WWN_SIZE);
  1854. #endif
  1855. }
  1856. /*
  1857. * NVRAM configuration for ISP 2xxx
  1858. *
  1859. * Input:
  1860. * ha = adapter block pointer.
  1861. *
  1862. * Output:
  1863. * initialization control block in response_ring
  1864. * host adapters parameters in host adapter block
  1865. *
  1866. * Returns:
  1867. * 0 = success.
  1868. */
  1869. int
  1870. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1871. {
  1872. int rval;
  1873. uint8_t chksum = 0;
  1874. uint16_t cnt;
  1875. uint8_t *dptr1, *dptr2;
  1876. struct qla_hw_data *ha = vha->hw;
  1877. init_cb_t *icb = ha->init_cb;
  1878. nvram_t *nv = ha->nvram;
  1879. uint8_t *ptr = ha->nvram;
  1880. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1881. rval = QLA_SUCCESS;
  1882. /* Determine NVRAM starting address. */
  1883. ha->nvram_size = sizeof(nvram_t);
  1884. ha->nvram_base = 0;
  1885. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1886. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1887. ha->nvram_base = 0x80;
  1888. /* Get NVRAM data and calculate checksum. */
  1889. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1890. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1891. chksum += *ptr++;
  1892. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1893. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1894. /* Bad NVRAM data, set defaults parameters. */
  1895. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1896. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1897. /* Reset NVRAM data. */
  1898. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1899. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1900. nv->nvram_version);
  1901. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1902. "invalid -- WWPN) defaults.\n");
  1903. /*
  1904. * Set default initialization control block.
  1905. */
  1906. memset(nv, 0, ha->nvram_size);
  1907. nv->parameter_block_version = ICB_VERSION;
  1908. if (IS_QLA23XX(ha)) {
  1909. nv->firmware_options[0] = BIT_2 | BIT_1;
  1910. nv->firmware_options[1] = BIT_7 | BIT_5;
  1911. nv->add_firmware_options[0] = BIT_5;
  1912. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1913. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1914. nv->special_options[1] = BIT_7;
  1915. } else if (IS_QLA2200(ha)) {
  1916. nv->firmware_options[0] = BIT_2 | BIT_1;
  1917. nv->firmware_options[1] = BIT_7 | BIT_5;
  1918. nv->add_firmware_options[0] = BIT_5;
  1919. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1920. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1921. } else if (IS_QLA2100(ha)) {
  1922. nv->firmware_options[0] = BIT_3 | BIT_1;
  1923. nv->firmware_options[1] = BIT_5;
  1924. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1925. }
  1926. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1927. nv->execution_throttle = __constant_cpu_to_le16(16);
  1928. nv->retry_count = 8;
  1929. nv->retry_delay = 1;
  1930. nv->port_name[0] = 33;
  1931. nv->port_name[3] = 224;
  1932. nv->port_name[4] = 139;
  1933. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1934. nv->login_timeout = 4;
  1935. /*
  1936. * Set default host adapter parameters
  1937. */
  1938. nv->host_p[1] = BIT_2;
  1939. nv->reset_delay = 5;
  1940. nv->port_down_retry_count = 8;
  1941. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1942. nv->link_down_timeout = 60;
  1943. rval = 1;
  1944. }
  1945. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1946. /*
  1947. * The SN2 does not provide BIOS emulation which means you can't change
  1948. * potentially bogus BIOS settings. Force the use of default settings
  1949. * for link rate and frame size. Hope that the rest of the settings
  1950. * are valid.
  1951. */
  1952. if (ia64_platform_is("sn2")) {
  1953. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1954. if (IS_QLA23XX(ha))
  1955. nv->special_options[1] = BIT_7;
  1956. }
  1957. #endif
  1958. /* Reset Initialization control block */
  1959. memset(icb, 0, ha->init_cb_size);
  1960. /*
  1961. * Setup driver NVRAM options.
  1962. */
  1963. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1964. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1965. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1966. nv->firmware_options[1] &= ~BIT_4;
  1967. if (IS_QLA23XX(ha)) {
  1968. nv->firmware_options[0] |= BIT_2;
  1969. nv->firmware_options[0] &= ~BIT_3;
  1970. nv->firmware_options[0] &= ~BIT_6;
  1971. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1972. if (IS_QLA2300(ha)) {
  1973. if (ha->fb_rev == FPM_2310) {
  1974. strcpy(ha->model_number, "QLA2310");
  1975. } else {
  1976. strcpy(ha->model_number, "QLA2300");
  1977. }
  1978. } else {
  1979. qla2x00_set_model_info(vha, nv->model_number,
  1980. sizeof(nv->model_number), "QLA23xx");
  1981. }
  1982. } else if (IS_QLA2200(ha)) {
  1983. nv->firmware_options[0] |= BIT_2;
  1984. /*
  1985. * 'Point-to-point preferred, else loop' is not a safe
  1986. * connection mode setting.
  1987. */
  1988. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1989. (BIT_5 | BIT_4)) {
  1990. /* Force 'loop preferred, else point-to-point'. */
  1991. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1992. nv->add_firmware_options[0] |= BIT_5;
  1993. }
  1994. strcpy(ha->model_number, "QLA22xx");
  1995. } else /*if (IS_QLA2100(ha))*/ {
  1996. strcpy(ha->model_number, "QLA2100");
  1997. }
  1998. /*
  1999. * Copy over NVRAM RISC parameter block to initialization control block.
  2000. */
  2001. dptr1 = (uint8_t *)icb;
  2002. dptr2 = (uint8_t *)&nv->parameter_block_version;
  2003. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  2004. while (cnt--)
  2005. *dptr1++ = *dptr2++;
  2006. /* Copy 2nd half. */
  2007. dptr1 = (uint8_t *)icb->add_firmware_options;
  2008. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2009. while (cnt--)
  2010. *dptr1++ = *dptr2++;
  2011. /* Use alternate WWN? */
  2012. if (nv->host_p[1] & BIT_7) {
  2013. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2014. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2015. }
  2016. /* Prepare nodename */
  2017. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2018. /*
  2019. * Firmware will apply the following mask if the nodename was
  2020. * not provided.
  2021. */
  2022. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2023. icb->node_name[0] &= 0xF0;
  2024. }
  2025. /*
  2026. * Set host adapter parameters.
  2027. */
  2028. if (nv->host_p[0] & BIT_7)
  2029. ql2xextended_error_logging = 1;
  2030. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2031. /* Always load RISC code on non ISP2[12]00 chips. */
  2032. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2033. ha->flags.disable_risc_code_load = 0;
  2034. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2035. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2036. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2037. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2038. ha->flags.disable_serdes = 0;
  2039. ha->operating_mode =
  2040. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2041. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2042. sizeof(ha->fw_seriallink_options));
  2043. /* save HBA serial number */
  2044. ha->serial0 = icb->port_name[5];
  2045. ha->serial1 = icb->port_name[6];
  2046. ha->serial2 = icb->port_name[7];
  2047. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2048. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2049. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2050. ha->retry_count = nv->retry_count;
  2051. /* Set minimum login_timeout to 4 seconds. */
  2052. if (nv->login_timeout != ql2xlogintimeout)
  2053. nv->login_timeout = ql2xlogintimeout;
  2054. if (nv->login_timeout < 4)
  2055. nv->login_timeout = 4;
  2056. ha->login_timeout = nv->login_timeout;
  2057. icb->login_timeout = nv->login_timeout;
  2058. /* Set minimum RATOV to 100 tenths of a second. */
  2059. ha->r_a_tov = 100;
  2060. ha->loop_reset_delay = nv->reset_delay;
  2061. /* Link Down Timeout = 0:
  2062. *
  2063. * When Port Down timer expires we will start returning
  2064. * I/O's to OS with "DID_NO_CONNECT".
  2065. *
  2066. * Link Down Timeout != 0:
  2067. *
  2068. * The driver waits for the link to come up after link down
  2069. * before returning I/Os to OS with "DID_NO_CONNECT".
  2070. */
  2071. if (nv->link_down_timeout == 0) {
  2072. ha->loop_down_abort_time =
  2073. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2074. } else {
  2075. ha->link_down_timeout = nv->link_down_timeout;
  2076. ha->loop_down_abort_time =
  2077. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2078. }
  2079. /*
  2080. * Need enough time to try and get the port back.
  2081. */
  2082. ha->port_down_retry_count = nv->port_down_retry_count;
  2083. if (qlport_down_retry)
  2084. ha->port_down_retry_count = qlport_down_retry;
  2085. /* Set login_retry_count */
  2086. ha->login_retry_count = nv->retry_count;
  2087. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2088. ha->port_down_retry_count > 3)
  2089. ha->login_retry_count = ha->port_down_retry_count;
  2090. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2091. ha->login_retry_count = ha->port_down_retry_count;
  2092. if (ql2xloginretrycount)
  2093. ha->login_retry_count = ql2xloginretrycount;
  2094. icb->lun_enables = __constant_cpu_to_le16(0);
  2095. icb->command_resource_count = 0;
  2096. icb->immediate_notify_resource_count = 0;
  2097. icb->timeout = __constant_cpu_to_le16(0);
  2098. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2099. /* Enable RIO */
  2100. icb->firmware_options[0] &= ~BIT_3;
  2101. icb->add_firmware_options[0] &=
  2102. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2103. icb->add_firmware_options[0] |= BIT_2;
  2104. icb->response_accumulation_timer = 3;
  2105. icb->interrupt_delay_timer = 5;
  2106. vha->flags.process_response_queue = 1;
  2107. } else {
  2108. /* Enable ZIO. */
  2109. if (!vha->flags.init_done) {
  2110. ha->zio_mode = icb->add_firmware_options[0] &
  2111. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2112. ha->zio_timer = icb->interrupt_delay_timer ?
  2113. icb->interrupt_delay_timer: 2;
  2114. }
  2115. icb->add_firmware_options[0] &=
  2116. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2117. vha->flags.process_response_queue = 0;
  2118. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2119. ha->zio_mode = QLA_ZIO_MODE_6;
  2120. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2121. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2122. ha->zio_timer * 100));
  2123. qla_printk(KERN_INFO, ha,
  2124. "ZIO mode %d enabled; timer delay (%d us).\n",
  2125. ha->zio_mode, ha->zio_timer * 100);
  2126. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2127. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2128. vha->flags.process_response_queue = 1;
  2129. }
  2130. }
  2131. if (rval) {
  2132. DEBUG2_3(printk(KERN_WARNING
  2133. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2134. }
  2135. return (rval);
  2136. }
  2137. static void
  2138. qla2x00_rport_del(void *data)
  2139. {
  2140. fc_port_t *fcport = data;
  2141. struct fc_rport *rport;
  2142. spin_lock_irq(fcport->vha->host->host_lock);
  2143. rport = fcport->drport ? fcport->drport: fcport->rport;
  2144. fcport->drport = NULL;
  2145. spin_unlock_irq(fcport->vha->host->host_lock);
  2146. if (rport)
  2147. fc_remote_port_delete(rport);
  2148. }
  2149. /**
  2150. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2151. * @ha: HA context
  2152. * @flags: allocation flags
  2153. *
  2154. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2155. */
  2156. fc_port_t *
  2157. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2158. {
  2159. fc_port_t *fcport;
  2160. fcport = kzalloc(sizeof(fc_port_t), flags);
  2161. if (!fcport)
  2162. return NULL;
  2163. /* Setup fcport template structure. */
  2164. fcport->vha = vha;
  2165. fcport->vp_idx = vha->vp_idx;
  2166. fcport->port_type = FCT_UNKNOWN;
  2167. fcport->loop_id = FC_NO_LOOP_ID;
  2168. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2169. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2170. return fcport;
  2171. }
  2172. /*
  2173. * qla2x00_configure_loop
  2174. * Updates Fibre Channel Device Database with what is actually on loop.
  2175. *
  2176. * Input:
  2177. * ha = adapter block pointer.
  2178. *
  2179. * Returns:
  2180. * 0 = success.
  2181. * 1 = error.
  2182. * 2 = database was full and device was not configured.
  2183. */
  2184. static int
  2185. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2186. {
  2187. int rval;
  2188. unsigned long flags, save_flags;
  2189. struct qla_hw_data *ha = vha->hw;
  2190. rval = QLA_SUCCESS;
  2191. /* Get Initiator ID */
  2192. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2193. rval = qla2x00_configure_hba(vha);
  2194. if (rval != QLA_SUCCESS) {
  2195. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2196. vha->host_no));
  2197. return (rval);
  2198. }
  2199. }
  2200. save_flags = flags = vha->dpc_flags;
  2201. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2202. vha->host_no, flags));
  2203. /*
  2204. * If we have both an RSCN and PORT UPDATE pending then handle them
  2205. * both at the same time.
  2206. */
  2207. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2208. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2209. qla2x00_get_data_rate(vha);
  2210. /* Determine what we need to do */
  2211. if (ha->current_topology == ISP_CFG_FL &&
  2212. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2213. vha->flags.rscn_queue_overflow = 1;
  2214. set_bit(RSCN_UPDATE, &flags);
  2215. } else if (ha->current_topology == ISP_CFG_F &&
  2216. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2217. vha->flags.rscn_queue_overflow = 1;
  2218. set_bit(RSCN_UPDATE, &flags);
  2219. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2220. } else if (ha->current_topology == ISP_CFG_N) {
  2221. clear_bit(RSCN_UPDATE, &flags);
  2222. } else if (!vha->flags.online ||
  2223. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2224. vha->flags.rscn_queue_overflow = 1;
  2225. set_bit(RSCN_UPDATE, &flags);
  2226. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2227. }
  2228. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2229. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2230. rval = QLA_FUNCTION_FAILED;
  2231. else
  2232. rval = qla2x00_configure_local_loop(vha);
  2233. }
  2234. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2235. if (LOOP_TRANSITION(vha))
  2236. rval = QLA_FUNCTION_FAILED;
  2237. else
  2238. rval = qla2x00_configure_fabric(vha);
  2239. }
  2240. if (rval == QLA_SUCCESS) {
  2241. if (atomic_read(&vha->loop_down_timer) ||
  2242. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2243. rval = QLA_FUNCTION_FAILED;
  2244. } else {
  2245. atomic_set(&vha->loop_state, LOOP_READY);
  2246. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2247. }
  2248. }
  2249. if (rval) {
  2250. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2251. __func__, vha->host_no));
  2252. } else {
  2253. DEBUG3(printk("%s: exiting normally\n", __func__));
  2254. }
  2255. /* Restore state if a resync event occurred during processing */
  2256. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2257. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2258. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2259. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2260. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2261. if (!IS_ALOGIO_CAPABLE(ha))
  2262. vha->flags.rscn_queue_overflow = 1;
  2263. }
  2264. }
  2265. return (rval);
  2266. }
  2267. /*
  2268. * qla2x00_configure_local_loop
  2269. * Updates Fibre Channel Device Database with local loop devices.
  2270. *
  2271. * Input:
  2272. * ha = adapter block pointer.
  2273. *
  2274. * Returns:
  2275. * 0 = success.
  2276. */
  2277. static int
  2278. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2279. {
  2280. int rval, rval2;
  2281. int found_devs;
  2282. int found;
  2283. fc_port_t *fcport, *new_fcport;
  2284. uint16_t index;
  2285. uint16_t entries;
  2286. char *id_iter;
  2287. uint16_t loop_id;
  2288. uint8_t domain, area, al_pa;
  2289. struct qla_hw_data *ha = vha->hw;
  2290. found_devs = 0;
  2291. new_fcport = NULL;
  2292. entries = MAX_FIBRE_DEVICES;
  2293. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2294. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2295. /* Get list of logged in devices. */
  2296. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2297. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2298. &entries);
  2299. if (rval != QLA_SUCCESS)
  2300. goto cleanup_allocation;
  2301. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2302. vha->host_no, entries));
  2303. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2304. entries * sizeof(struct gid_list_info)));
  2305. /* Allocate temporary fcport for any new fcports discovered. */
  2306. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2307. if (new_fcport == NULL) {
  2308. rval = QLA_MEMORY_ALLOC_FAILED;
  2309. goto cleanup_allocation;
  2310. }
  2311. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2312. /*
  2313. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2314. */
  2315. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2316. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2317. fcport->port_type != FCT_BROADCAST &&
  2318. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2319. DEBUG(printk("scsi(%ld): Marking port lost, "
  2320. "loop_id=0x%04x\n",
  2321. vha->host_no, fcport->loop_id));
  2322. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2323. }
  2324. }
  2325. /* Add devices to port list. */
  2326. id_iter = (char *)ha->gid_list;
  2327. for (index = 0; index < entries; index++) {
  2328. domain = ((struct gid_list_info *)id_iter)->domain;
  2329. area = ((struct gid_list_info *)id_iter)->area;
  2330. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2331. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2332. loop_id = (uint16_t)
  2333. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2334. else
  2335. loop_id = le16_to_cpu(
  2336. ((struct gid_list_info *)id_iter)->loop_id);
  2337. id_iter += ha->gid_list_info_size;
  2338. /* Bypass reserved domain fields. */
  2339. if ((domain & 0xf0) == 0xf0)
  2340. continue;
  2341. /* Bypass if not same domain and area of adapter. */
  2342. if (area && domain &&
  2343. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2344. continue;
  2345. /* Bypass invalid local loop ID. */
  2346. if (loop_id > LAST_LOCAL_LOOP_ID)
  2347. continue;
  2348. /* Fill in member data. */
  2349. new_fcport->d_id.b.domain = domain;
  2350. new_fcport->d_id.b.area = area;
  2351. new_fcport->d_id.b.al_pa = al_pa;
  2352. new_fcport->loop_id = loop_id;
  2353. new_fcport->vp_idx = vha->vp_idx;
  2354. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2355. if (rval2 != QLA_SUCCESS) {
  2356. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2357. "information -- get_port_database=%x, "
  2358. "loop_id=0x%04x\n",
  2359. vha->host_no, rval2, new_fcport->loop_id));
  2360. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2361. vha->host_no));
  2362. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2363. continue;
  2364. }
  2365. /* Check for matching device in port list. */
  2366. found = 0;
  2367. fcport = NULL;
  2368. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2369. if (memcmp(new_fcport->port_name, fcport->port_name,
  2370. WWN_SIZE))
  2371. continue;
  2372. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2373. fcport->loop_id = new_fcport->loop_id;
  2374. fcport->port_type = new_fcport->port_type;
  2375. fcport->d_id.b24 = new_fcport->d_id.b24;
  2376. memcpy(fcport->node_name, new_fcport->node_name,
  2377. WWN_SIZE);
  2378. found++;
  2379. break;
  2380. }
  2381. if (!found) {
  2382. /* New device, add to fcports list. */
  2383. if (vha->vp_idx) {
  2384. new_fcport->vha = vha;
  2385. new_fcport->vp_idx = vha->vp_idx;
  2386. }
  2387. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2388. /* Allocate a new replacement fcport. */
  2389. fcport = new_fcport;
  2390. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2391. if (new_fcport == NULL) {
  2392. rval = QLA_MEMORY_ALLOC_FAILED;
  2393. goto cleanup_allocation;
  2394. }
  2395. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2396. }
  2397. /* Base iIDMA settings on HBA port speed. */
  2398. fcport->fp_speed = ha->link_data_rate;
  2399. qla2x00_update_fcport(vha, fcport);
  2400. found_devs++;
  2401. }
  2402. cleanup_allocation:
  2403. kfree(new_fcport);
  2404. if (rval != QLA_SUCCESS) {
  2405. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2406. "rval=%x\n", vha->host_no, rval));
  2407. }
  2408. return (rval);
  2409. }
  2410. static void
  2411. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2412. {
  2413. #define LS_UNKNOWN 2
  2414. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2415. char *link_speed;
  2416. int rval;
  2417. uint16_t mb[4];
  2418. struct qla_hw_data *ha = vha->hw;
  2419. if (!IS_IIDMA_CAPABLE(ha))
  2420. return;
  2421. if (atomic_read(&fcport->state) != FCS_ONLINE)
  2422. return;
  2423. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2424. fcport->fp_speed > ha->link_data_rate)
  2425. return;
  2426. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2427. mb);
  2428. if (rval != QLA_SUCCESS) {
  2429. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2430. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2431. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2432. fcport->port_name[2], fcport->port_name[3],
  2433. fcport->port_name[4], fcport->port_name[5],
  2434. fcport->port_name[6], fcport->port_name[7], rval,
  2435. fcport->fp_speed, mb[0], mb[1]));
  2436. } else {
  2437. link_speed = link_speeds[LS_UNKNOWN];
  2438. if (fcport->fp_speed < 5)
  2439. link_speed = link_speeds[fcport->fp_speed];
  2440. else if (fcport->fp_speed == 0x13)
  2441. link_speed = link_speeds[5];
  2442. DEBUG2(qla_printk(KERN_INFO, ha,
  2443. "iIDMA adjusted to %s GB/s on "
  2444. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2445. link_speed, fcport->port_name[0],
  2446. fcport->port_name[1], fcport->port_name[2],
  2447. fcport->port_name[3], fcport->port_name[4],
  2448. fcport->port_name[5], fcport->port_name[6],
  2449. fcport->port_name[7]));
  2450. }
  2451. }
  2452. static void
  2453. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2454. {
  2455. struct fc_rport_identifiers rport_ids;
  2456. struct fc_rport *rport;
  2457. struct qla_hw_data *ha = vha->hw;
  2458. qla2x00_rport_del(fcport);
  2459. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2460. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2461. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2462. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2463. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2464. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2465. if (!rport) {
  2466. qla_printk(KERN_WARNING, ha,
  2467. "Unable to allocate fc remote port!\n");
  2468. return;
  2469. }
  2470. spin_lock_irq(fcport->vha->host->host_lock);
  2471. *((fc_port_t **)rport->dd_data) = fcport;
  2472. spin_unlock_irq(fcport->vha->host->host_lock);
  2473. rport->supported_classes = fcport->supported_classes;
  2474. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2475. if (fcport->port_type == FCT_INITIATOR)
  2476. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2477. if (fcport->port_type == FCT_TARGET)
  2478. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2479. fc_remote_port_rolechg(rport, rport_ids.roles);
  2480. }
  2481. /*
  2482. * qla2x00_update_fcport
  2483. * Updates device on list.
  2484. *
  2485. * Input:
  2486. * ha = adapter block pointer.
  2487. * fcport = port structure pointer.
  2488. *
  2489. * Return:
  2490. * 0 - Success
  2491. * BIT_0 - error
  2492. *
  2493. * Context:
  2494. * Kernel context.
  2495. */
  2496. void
  2497. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2498. {
  2499. fcport->vha = vha;
  2500. fcport->login_retry = 0;
  2501. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2502. qla2x00_iidma_fcport(vha, fcport);
  2503. qla24xx_update_fcport_fcp_prio(vha, fcport);
  2504. qla2x00_reg_remote_port(vha, fcport);
  2505. atomic_set(&fcport->state, FCS_ONLINE);
  2506. }
  2507. /*
  2508. * qla2x00_configure_fabric
  2509. * Setup SNS devices with loop ID's.
  2510. *
  2511. * Input:
  2512. * ha = adapter block pointer.
  2513. *
  2514. * Returns:
  2515. * 0 = success.
  2516. * BIT_0 = error
  2517. */
  2518. static int
  2519. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2520. {
  2521. int rval, rval2;
  2522. fc_port_t *fcport, *fcptemp;
  2523. uint16_t next_loopid;
  2524. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2525. uint16_t loop_id;
  2526. LIST_HEAD(new_fcports);
  2527. struct qla_hw_data *ha = vha->hw;
  2528. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2529. /* If FL port exists, then SNS is present */
  2530. if (IS_FWI2_CAPABLE(ha))
  2531. loop_id = NPH_F_PORT;
  2532. else
  2533. loop_id = SNS_FL_PORT;
  2534. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2535. if (rval != QLA_SUCCESS) {
  2536. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2537. "Port\n", vha->host_no));
  2538. vha->device_flags &= ~SWITCH_FOUND;
  2539. return (QLA_SUCCESS);
  2540. }
  2541. vha->device_flags |= SWITCH_FOUND;
  2542. /* Mark devices that need re-synchronization. */
  2543. rval2 = qla2x00_device_resync(vha);
  2544. if (rval2 == QLA_RSCNS_HANDLED) {
  2545. /* No point doing the scan, just continue. */
  2546. return (QLA_SUCCESS);
  2547. }
  2548. do {
  2549. /* FDMI support. */
  2550. if (ql2xfdmienable &&
  2551. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2552. qla2x00_fdmi_register(vha);
  2553. /* Ensure we are logged into the SNS. */
  2554. if (IS_FWI2_CAPABLE(ha))
  2555. loop_id = NPH_SNS;
  2556. else
  2557. loop_id = SIMPLE_NAME_SERVER;
  2558. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2559. 0xfc, mb, BIT_1 | BIT_0);
  2560. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2561. DEBUG2(qla_printk(KERN_INFO, ha,
  2562. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2563. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2564. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2565. return (QLA_SUCCESS);
  2566. }
  2567. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2568. if (qla2x00_rft_id(vha)) {
  2569. /* EMPTY */
  2570. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2571. "TYPE failed.\n", vha->host_no));
  2572. }
  2573. if (qla2x00_rff_id(vha)) {
  2574. /* EMPTY */
  2575. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2576. "Features failed.\n", vha->host_no));
  2577. }
  2578. if (qla2x00_rnn_id(vha)) {
  2579. /* EMPTY */
  2580. DEBUG2(printk("scsi(%ld): Register Node Name "
  2581. "failed.\n", vha->host_no));
  2582. } else if (qla2x00_rsnn_nn(vha)) {
  2583. /* EMPTY */
  2584. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2585. "Node Name failed.\n", vha->host_no));
  2586. }
  2587. }
  2588. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2589. if (rval != QLA_SUCCESS)
  2590. break;
  2591. /*
  2592. * Logout all previous fabric devices marked lost, except
  2593. * FCP2 devices.
  2594. */
  2595. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2596. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2597. break;
  2598. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2599. continue;
  2600. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2601. qla2x00_mark_device_lost(vha, fcport,
  2602. ql2xplogiabsentdevice, 0);
  2603. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2604. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2605. fcport->port_type != FCT_INITIATOR &&
  2606. fcport->port_type != FCT_BROADCAST) {
  2607. ha->isp_ops->fabric_logout(vha,
  2608. fcport->loop_id,
  2609. fcport->d_id.b.domain,
  2610. fcport->d_id.b.area,
  2611. fcport->d_id.b.al_pa);
  2612. fcport->loop_id = FC_NO_LOOP_ID;
  2613. }
  2614. }
  2615. }
  2616. /* Starting free loop ID. */
  2617. next_loopid = ha->min_external_loopid;
  2618. /*
  2619. * Scan through our port list and login entries that need to be
  2620. * logged in.
  2621. */
  2622. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2623. if (atomic_read(&vha->loop_down_timer) ||
  2624. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2625. break;
  2626. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2627. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2628. continue;
  2629. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2630. fcport->loop_id = next_loopid;
  2631. rval = qla2x00_find_new_loop_id(
  2632. base_vha, fcport);
  2633. if (rval != QLA_SUCCESS) {
  2634. /* Ran out of IDs to use */
  2635. break;
  2636. }
  2637. }
  2638. /* Login and update database */
  2639. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2640. }
  2641. /* Exit if out of loop IDs. */
  2642. if (rval != QLA_SUCCESS) {
  2643. break;
  2644. }
  2645. /*
  2646. * Login and add the new devices to our port list.
  2647. */
  2648. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2649. if (atomic_read(&vha->loop_down_timer) ||
  2650. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2651. break;
  2652. /* Find a new loop ID to use. */
  2653. fcport->loop_id = next_loopid;
  2654. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2655. if (rval != QLA_SUCCESS) {
  2656. /* Ran out of IDs to use */
  2657. break;
  2658. }
  2659. /* Login and update database */
  2660. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2661. if (vha->vp_idx) {
  2662. fcport->vha = vha;
  2663. fcport->vp_idx = vha->vp_idx;
  2664. }
  2665. list_move_tail(&fcport->list, &vha->vp_fcports);
  2666. }
  2667. } while (0);
  2668. /* Free all new device structures not processed. */
  2669. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2670. list_del(&fcport->list);
  2671. kfree(fcport);
  2672. }
  2673. if (rval) {
  2674. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2675. "rval=%d\n", vha->host_no, rval));
  2676. }
  2677. return (rval);
  2678. }
  2679. /*
  2680. * qla2x00_find_all_fabric_devs
  2681. *
  2682. * Input:
  2683. * ha = adapter block pointer.
  2684. * dev = database device entry pointer.
  2685. *
  2686. * Returns:
  2687. * 0 = success.
  2688. *
  2689. * Context:
  2690. * Kernel context.
  2691. */
  2692. static int
  2693. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2694. struct list_head *new_fcports)
  2695. {
  2696. int rval;
  2697. uint16_t loop_id;
  2698. fc_port_t *fcport, *new_fcport, *fcptemp;
  2699. int found;
  2700. sw_info_t *swl;
  2701. int swl_idx;
  2702. int first_dev, last_dev;
  2703. port_id_t wrap = {}, nxt_d_id;
  2704. struct qla_hw_data *ha = vha->hw;
  2705. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2706. struct scsi_qla_host *tvp;
  2707. rval = QLA_SUCCESS;
  2708. /* Try GID_PT to get device list, else GAN. */
  2709. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2710. if (!swl) {
  2711. /*EMPTY*/
  2712. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2713. "on GA_NXT\n", vha->host_no));
  2714. } else {
  2715. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2716. kfree(swl);
  2717. swl = NULL;
  2718. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2719. kfree(swl);
  2720. swl = NULL;
  2721. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2722. kfree(swl);
  2723. swl = NULL;
  2724. } else if (ql2xiidmaenable &&
  2725. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2726. qla2x00_gpsc(vha, swl);
  2727. }
  2728. /* If other queries succeeded probe for FC-4 type */
  2729. if (swl)
  2730. qla2x00_gff_id(vha, swl);
  2731. }
  2732. swl_idx = 0;
  2733. /* Allocate temporary fcport for any new fcports discovered. */
  2734. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2735. if (new_fcport == NULL) {
  2736. kfree(swl);
  2737. return (QLA_MEMORY_ALLOC_FAILED);
  2738. }
  2739. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2740. /* Set start port ID scan at adapter ID. */
  2741. first_dev = 1;
  2742. last_dev = 0;
  2743. /* Starting free loop ID. */
  2744. loop_id = ha->min_external_loopid;
  2745. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2746. if (qla2x00_is_reserved_id(vha, loop_id))
  2747. continue;
  2748. if (ha->current_topology == ISP_CFG_FL &&
  2749. (atomic_read(&vha->loop_down_timer) ||
  2750. LOOP_TRANSITION(vha))) {
  2751. atomic_set(&vha->loop_down_timer, 0);
  2752. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2753. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2754. break;
  2755. }
  2756. if (swl != NULL) {
  2757. if (last_dev) {
  2758. wrap.b24 = new_fcport->d_id.b24;
  2759. } else {
  2760. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2761. memcpy(new_fcport->node_name,
  2762. swl[swl_idx].node_name, WWN_SIZE);
  2763. memcpy(new_fcport->port_name,
  2764. swl[swl_idx].port_name, WWN_SIZE);
  2765. memcpy(new_fcport->fabric_port_name,
  2766. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2767. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2768. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2769. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2770. last_dev = 1;
  2771. }
  2772. swl_idx++;
  2773. }
  2774. } else {
  2775. /* Send GA_NXT to the switch */
  2776. rval = qla2x00_ga_nxt(vha, new_fcport);
  2777. if (rval != QLA_SUCCESS) {
  2778. qla_printk(KERN_WARNING, ha,
  2779. "SNS scan failed -- assuming zero-entry "
  2780. "result...\n");
  2781. list_for_each_entry_safe(fcport, fcptemp,
  2782. new_fcports, list) {
  2783. list_del(&fcport->list);
  2784. kfree(fcport);
  2785. }
  2786. rval = QLA_SUCCESS;
  2787. break;
  2788. }
  2789. }
  2790. /* If wrap on switch device list, exit. */
  2791. if (first_dev) {
  2792. wrap.b24 = new_fcport->d_id.b24;
  2793. first_dev = 0;
  2794. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2795. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2796. vha->host_no, new_fcport->d_id.b.domain,
  2797. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2798. break;
  2799. }
  2800. /* Bypass if same physical adapter. */
  2801. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2802. continue;
  2803. /* Bypass virtual ports of the same host. */
  2804. found = 0;
  2805. if (ha->num_vhosts) {
  2806. unsigned long flags;
  2807. spin_lock_irqsave(&ha->vport_slock, flags);
  2808. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2809. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2810. found = 1;
  2811. break;
  2812. }
  2813. }
  2814. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2815. if (found)
  2816. continue;
  2817. }
  2818. /* Bypass if same domain and area of adapter. */
  2819. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2820. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2821. ISP_CFG_FL)
  2822. continue;
  2823. /* Bypass reserved domain fields. */
  2824. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2825. continue;
  2826. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2827. if (ql2xgffidenable &&
  2828. (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2829. new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
  2830. continue;
  2831. /* Locate matching device in database. */
  2832. found = 0;
  2833. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2834. if (memcmp(new_fcport->port_name, fcport->port_name,
  2835. WWN_SIZE))
  2836. continue;
  2837. found++;
  2838. /* Update port state. */
  2839. memcpy(fcport->fabric_port_name,
  2840. new_fcport->fabric_port_name, WWN_SIZE);
  2841. fcport->fp_speed = new_fcport->fp_speed;
  2842. /*
  2843. * If address the same and state FCS_ONLINE, nothing
  2844. * changed.
  2845. */
  2846. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2847. atomic_read(&fcport->state) == FCS_ONLINE) {
  2848. break;
  2849. }
  2850. /*
  2851. * If device was not a fabric device before.
  2852. */
  2853. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2854. fcport->d_id.b24 = new_fcport->d_id.b24;
  2855. fcport->loop_id = FC_NO_LOOP_ID;
  2856. fcport->flags |= (FCF_FABRIC_DEVICE |
  2857. FCF_LOGIN_NEEDED);
  2858. break;
  2859. }
  2860. /*
  2861. * Port ID changed or device was marked to be updated;
  2862. * Log it out if still logged in and mark it for
  2863. * relogin later.
  2864. */
  2865. fcport->d_id.b24 = new_fcport->d_id.b24;
  2866. fcport->flags |= FCF_LOGIN_NEEDED;
  2867. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2868. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2869. fcport->port_type != FCT_INITIATOR &&
  2870. fcport->port_type != FCT_BROADCAST) {
  2871. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2872. fcport->d_id.b.domain, fcport->d_id.b.area,
  2873. fcport->d_id.b.al_pa);
  2874. fcport->loop_id = FC_NO_LOOP_ID;
  2875. }
  2876. break;
  2877. }
  2878. if (found)
  2879. continue;
  2880. /* If device was not in our fcports list, then add it. */
  2881. list_add_tail(&new_fcport->list, new_fcports);
  2882. /* Allocate a new replacement fcport. */
  2883. nxt_d_id.b24 = new_fcport->d_id.b24;
  2884. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2885. if (new_fcport == NULL) {
  2886. kfree(swl);
  2887. return (QLA_MEMORY_ALLOC_FAILED);
  2888. }
  2889. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2890. new_fcport->d_id.b24 = nxt_d_id.b24;
  2891. }
  2892. kfree(swl);
  2893. kfree(new_fcport);
  2894. return (rval);
  2895. }
  2896. /*
  2897. * qla2x00_find_new_loop_id
  2898. * Scan through our port list and find a new usable loop ID.
  2899. *
  2900. * Input:
  2901. * ha: adapter state pointer.
  2902. * dev: port structure pointer.
  2903. *
  2904. * Returns:
  2905. * qla2x00 local function return status code.
  2906. *
  2907. * Context:
  2908. * Kernel context.
  2909. */
  2910. static int
  2911. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2912. {
  2913. int rval;
  2914. int found;
  2915. fc_port_t *fcport;
  2916. uint16_t first_loop_id;
  2917. struct qla_hw_data *ha = vha->hw;
  2918. struct scsi_qla_host *vp;
  2919. struct scsi_qla_host *tvp;
  2920. unsigned long flags = 0;
  2921. rval = QLA_SUCCESS;
  2922. /* Save starting loop ID. */
  2923. first_loop_id = dev->loop_id;
  2924. for (;;) {
  2925. /* Skip loop ID if already used by adapter. */
  2926. if (dev->loop_id == vha->loop_id)
  2927. dev->loop_id++;
  2928. /* Skip reserved loop IDs. */
  2929. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2930. dev->loop_id++;
  2931. /* Reset loop ID if passed the end. */
  2932. if (dev->loop_id > ha->max_loop_id) {
  2933. /* first loop ID. */
  2934. dev->loop_id = ha->min_external_loopid;
  2935. }
  2936. /* Check for loop ID being already in use. */
  2937. found = 0;
  2938. fcport = NULL;
  2939. spin_lock_irqsave(&ha->vport_slock, flags);
  2940. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2941. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2942. if (fcport->loop_id == dev->loop_id &&
  2943. fcport != dev) {
  2944. /* ID possibly in use */
  2945. found++;
  2946. break;
  2947. }
  2948. }
  2949. if (found)
  2950. break;
  2951. }
  2952. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2953. /* If not in use then it is free to use. */
  2954. if (!found) {
  2955. break;
  2956. }
  2957. /* ID in use. Try next value. */
  2958. dev->loop_id++;
  2959. /* If wrap around. No free ID to use. */
  2960. if (dev->loop_id == first_loop_id) {
  2961. dev->loop_id = FC_NO_LOOP_ID;
  2962. rval = QLA_FUNCTION_FAILED;
  2963. break;
  2964. }
  2965. }
  2966. return (rval);
  2967. }
  2968. /*
  2969. * qla2x00_device_resync
  2970. * Marks devices in the database that needs resynchronization.
  2971. *
  2972. * Input:
  2973. * ha = adapter block pointer.
  2974. *
  2975. * Context:
  2976. * Kernel context.
  2977. */
  2978. static int
  2979. qla2x00_device_resync(scsi_qla_host_t *vha)
  2980. {
  2981. int rval;
  2982. uint32_t mask;
  2983. fc_port_t *fcport;
  2984. uint32_t rscn_entry;
  2985. uint8_t rscn_out_iter;
  2986. uint8_t format;
  2987. port_id_t d_id = {};
  2988. rval = QLA_RSCNS_HANDLED;
  2989. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2990. vha->flags.rscn_queue_overflow) {
  2991. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2992. format = MSB(MSW(rscn_entry));
  2993. d_id.b.domain = LSB(MSW(rscn_entry));
  2994. d_id.b.area = MSB(LSW(rscn_entry));
  2995. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2996. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2997. "[%02x/%02x%02x%02x].\n",
  2998. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2999. d_id.b.area, d_id.b.al_pa));
  3000. vha->rscn_out_ptr++;
  3001. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  3002. vha->rscn_out_ptr = 0;
  3003. /* Skip duplicate entries. */
  3004. for (rscn_out_iter = vha->rscn_out_ptr;
  3005. !vha->flags.rscn_queue_overflow &&
  3006. rscn_out_iter != vha->rscn_in_ptr;
  3007. rscn_out_iter = (rscn_out_iter ==
  3008. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  3009. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  3010. break;
  3011. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3012. "entry found at [%d].\n", vha->host_no,
  3013. rscn_out_iter));
  3014. vha->rscn_out_ptr = rscn_out_iter;
  3015. }
  3016. /* Queue overflow, set switch default case. */
  3017. if (vha->flags.rscn_queue_overflow) {
  3018. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3019. "overflow.\n", vha->host_no));
  3020. format = 3;
  3021. vha->flags.rscn_queue_overflow = 0;
  3022. }
  3023. switch (format) {
  3024. case 0:
  3025. mask = 0xffffff;
  3026. break;
  3027. case 1:
  3028. mask = 0xffff00;
  3029. break;
  3030. case 2:
  3031. mask = 0xff0000;
  3032. break;
  3033. default:
  3034. mask = 0x0;
  3035. d_id.b24 = 0;
  3036. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3037. break;
  3038. }
  3039. rval = QLA_SUCCESS;
  3040. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3041. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3042. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3043. fcport->port_type == FCT_BROADCAST)
  3044. continue;
  3045. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3046. if (format != 3 ||
  3047. fcport->port_type != FCT_INITIATOR) {
  3048. qla2x00_mark_device_lost(vha, fcport,
  3049. 0, 0);
  3050. }
  3051. }
  3052. }
  3053. }
  3054. return (rval);
  3055. }
  3056. /*
  3057. * qla2x00_fabric_dev_login
  3058. * Login fabric target device and update FC port database.
  3059. *
  3060. * Input:
  3061. * ha: adapter state pointer.
  3062. * fcport: port structure list pointer.
  3063. * next_loopid: contains value of a new loop ID that can be used
  3064. * by the next login attempt.
  3065. *
  3066. * Returns:
  3067. * qla2x00 local function return status code.
  3068. *
  3069. * Context:
  3070. * Kernel context.
  3071. */
  3072. static int
  3073. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3074. uint16_t *next_loopid)
  3075. {
  3076. int rval;
  3077. int retry;
  3078. uint8_t opts;
  3079. struct qla_hw_data *ha = vha->hw;
  3080. rval = QLA_SUCCESS;
  3081. retry = 0;
  3082. if (IS_ALOGIO_CAPABLE(ha)) {
  3083. if (fcport->flags & FCF_ASYNC_SENT)
  3084. return rval;
  3085. fcport->flags |= FCF_ASYNC_SENT;
  3086. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3087. if (!rval)
  3088. return rval;
  3089. }
  3090. fcport->flags &= ~FCF_ASYNC_SENT;
  3091. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3092. if (rval == QLA_SUCCESS) {
  3093. /* Send an ADISC to FCP2 devices.*/
  3094. opts = 0;
  3095. if (fcport->flags & FCF_FCP2_DEVICE)
  3096. opts |= BIT_1;
  3097. rval = qla2x00_get_port_database(vha, fcport, opts);
  3098. if (rval != QLA_SUCCESS) {
  3099. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3100. fcport->d_id.b.domain, fcport->d_id.b.area,
  3101. fcport->d_id.b.al_pa);
  3102. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3103. } else {
  3104. qla2x00_update_fcport(vha, fcport);
  3105. }
  3106. }
  3107. return (rval);
  3108. }
  3109. /*
  3110. * qla2x00_fabric_login
  3111. * Issue fabric login command.
  3112. *
  3113. * Input:
  3114. * ha = adapter block pointer.
  3115. * device = pointer to FC device type structure.
  3116. *
  3117. * Returns:
  3118. * 0 - Login successfully
  3119. * 1 - Login failed
  3120. * 2 - Initiator device
  3121. * 3 - Fatal error
  3122. */
  3123. int
  3124. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3125. uint16_t *next_loopid)
  3126. {
  3127. int rval;
  3128. int retry;
  3129. uint16_t tmp_loopid;
  3130. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3131. struct qla_hw_data *ha = vha->hw;
  3132. retry = 0;
  3133. tmp_loopid = 0;
  3134. for (;;) {
  3135. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3136. "for port %02x%02x%02x.\n",
  3137. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3138. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3139. /* Login fcport on switch. */
  3140. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3141. fcport->d_id.b.domain, fcport->d_id.b.area,
  3142. fcport->d_id.b.al_pa, mb, BIT_0);
  3143. if (mb[0] == MBS_PORT_ID_USED) {
  3144. /*
  3145. * Device has another loop ID. The firmware team
  3146. * recommends the driver perform an implicit login with
  3147. * the specified ID again. The ID we just used is save
  3148. * here so we return with an ID that can be tried by
  3149. * the next login.
  3150. */
  3151. retry++;
  3152. tmp_loopid = fcport->loop_id;
  3153. fcport->loop_id = mb[1];
  3154. DEBUG(printk("Fabric Login: port in use - next "
  3155. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3156. fcport->loop_id, fcport->d_id.b.domain,
  3157. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3158. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3159. /*
  3160. * Login succeeded.
  3161. */
  3162. if (retry) {
  3163. /* A retry occurred before. */
  3164. *next_loopid = tmp_loopid;
  3165. } else {
  3166. /*
  3167. * No retry occurred before. Just increment the
  3168. * ID value for next login.
  3169. */
  3170. *next_loopid = (fcport->loop_id + 1);
  3171. }
  3172. if (mb[1] & BIT_0) {
  3173. fcport->port_type = FCT_INITIATOR;
  3174. } else {
  3175. fcport->port_type = FCT_TARGET;
  3176. if (mb[1] & BIT_1) {
  3177. fcport->flags |= FCF_FCP2_DEVICE;
  3178. }
  3179. }
  3180. if (mb[10] & BIT_0)
  3181. fcport->supported_classes |= FC_COS_CLASS2;
  3182. if (mb[10] & BIT_1)
  3183. fcport->supported_classes |= FC_COS_CLASS3;
  3184. rval = QLA_SUCCESS;
  3185. break;
  3186. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3187. /*
  3188. * Loop ID already used, try next loop ID.
  3189. */
  3190. fcport->loop_id++;
  3191. rval = qla2x00_find_new_loop_id(vha, fcport);
  3192. if (rval != QLA_SUCCESS) {
  3193. /* Ran out of loop IDs to use */
  3194. break;
  3195. }
  3196. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3197. /*
  3198. * Firmware possibly timed out during login. If NO
  3199. * retries are left to do then the device is declared
  3200. * dead.
  3201. */
  3202. *next_loopid = fcport->loop_id;
  3203. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3204. fcport->d_id.b.domain, fcport->d_id.b.area,
  3205. fcport->d_id.b.al_pa);
  3206. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3207. rval = 1;
  3208. break;
  3209. } else {
  3210. /*
  3211. * unrecoverable / not handled error
  3212. */
  3213. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3214. "loop_id=%x jiffies=%lx.\n",
  3215. __func__, vha->host_no, mb[0],
  3216. fcport->d_id.b.domain, fcport->d_id.b.area,
  3217. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3218. *next_loopid = fcport->loop_id;
  3219. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3220. fcport->d_id.b.domain, fcport->d_id.b.area,
  3221. fcport->d_id.b.al_pa);
  3222. fcport->loop_id = FC_NO_LOOP_ID;
  3223. fcport->login_retry = 0;
  3224. rval = 3;
  3225. break;
  3226. }
  3227. }
  3228. return (rval);
  3229. }
  3230. /*
  3231. * qla2x00_local_device_login
  3232. * Issue local device login command.
  3233. *
  3234. * Input:
  3235. * ha = adapter block pointer.
  3236. * loop_id = loop id of device to login to.
  3237. *
  3238. * Returns (Where's the #define!!!!):
  3239. * 0 - Login successfully
  3240. * 1 - Login failed
  3241. * 3 - Fatal error
  3242. */
  3243. int
  3244. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3245. {
  3246. int rval;
  3247. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3248. memset(mb, 0, sizeof(mb));
  3249. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3250. if (rval == QLA_SUCCESS) {
  3251. /* Interrogate mailbox registers for any errors */
  3252. if (mb[0] == MBS_COMMAND_ERROR)
  3253. rval = 1;
  3254. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3255. /* device not in PCB table */
  3256. rval = 3;
  3257. }
  3258. return (rval);
  3259. }
  3260. /*
  3261. * qla2x00_loop_resync
  3262. * Resync with fibre channel devices.
  3263. *
  3264. * Input:
  3265. * ha = adapter block pointer.
  3266. *
  3267. * Returns:
  3268. * 0 = success
  3269. */
  3270. int
  3271. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3272. {
  3273. int rval = QLA_SUCCESS;
  3274. uint32_t wait_time;
  3275. struct req_que *req;
  3276. struct rsp_que *rsp;
  3277. if (vha->hw->flags.cpu_affinity_enabled)
  3278. req = vha->hw->req_q_map[0];
  3279. else
  3280. req = vha->req;
  3281. rsp = req->rsp;
  3282. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3283. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3284. if (vha->flags.online) {
  3285. if (!(rval = qla2x00_fw_ready(vha))) {
  3286. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3287. wait_time = 256;
  3288. do {
  3289. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3290. /* Issue a marker after FW becomes ready. */
  3291. qla2x00_marker(vha, req, rsp, 0, 0,
  3292. MK_SYNC_ALL);
  3293. vha->marker_needed = 0;
  3294. /* Remap devices on Loop. */
  3295. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3296. qla2x00_configure_loop(vha);
  3297. wait_time--;
  3298. } while (!atomic_read(&vha->loop_down_timer) &&
  3299. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3300. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3301. &vha->dpc_flags)));
  3302. }
  3303. }
  3304. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3305. return (QLA_FUNCTION_FAILED);
  3306. if (rval)
  3307. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3308. return (rval);
  3309. }
  3310. /*
  3311. * qla2x00_perform_loop_resync
  3312. * Description: This function will set the appropriate flags and call
  3313. * qla2x00_loop_resync. If successful loop will be resynced
  3314. * Arguments : scsi_qla_host_t pointer
  3315. * returm : Success or Failure
  3316. */
  3317. int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
  3318. {
  3319. int32_t rval = 0;
  3320. if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
  3321. /*Configure the flags so that resync happens properly*/
  3322. atomic_set(&ha->loop_down_timer, 0);
  3323. if (!(ha->device_flags & DFLG_NO_CABLE)) {
  3324. atomic_set(&ha->loop_state, LOOP_UP);
  3325. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3326. set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
  3327. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3328. rval = qla2x00_loop_resync(ha);
  3329. } else
  3330. atomic_set(&ha->loop_state, LOOP_DEAD);
  3331. clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
  3332. }
  3333. return rval;
  3334. }
  3335. void
  3336. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3337. {
  3338. fc_port_t *fcport;
  3339. struct scsi_qla_host *vha;
  3340. struct qla_hw_data *ha = base_vha->hw;
  3341. unsigned long flags;
  3342. spin_lock_irqsave(&ha->vport_slock, flags);
  3343. /* Go with deferred removal of rport references. */
  3344. list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
  3345. atomic_inc(&vha->vref_count);
  3346. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3347. if (fcport->drport &&
  3348. atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
  3349. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3350. qla2x00_rport_del(fcport);
  3351. spin_lock_irqsave(&ha->vport_slock, flags);
  3352. }
  3353. }
  3354. atomic_dec(&vha->vref_count);
  3355. }
  3356. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3357. }
  3358. /*
  3359. * qla82xx_quiescent_state_cleanup
  3360. * Description: This function will block the new I/Os
  3361. * Its not aborting any I/Os as context
  3362. * is not destroyed during quiescence
  3363. * Arguments: scsi_qla_host_t
  3364. * return : void
  3365. */
  3366. void
  3367. qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
  3368. {
  3369. struct qla_hw_data *ha = vha->hw;
  3370. struct scsi_qla_host *vp;
  3371. qla_printk(KERN_INFO, ha,
  3372. "Performing ISP error recovery - ha= %p.\n", ha);
  3373. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  3374. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3375. atomic_set(&vha->loop_state, LOOP_DOWN);
  3376. qla2x00_mark_all_devices_lost(vha, 0);
  3377. list_for_each_entry(vp, &ha->vp_list, list)
  3378. qla2x00_mark_all_devices_lost(vha, 0);
  3379. } else {
  3380. if (!atomic_read(&vha->loop_down_timer))
  3381. atomic_set(&vha->loop_down_timer,
  3382. LOOP_DOWN_TIME);
  3383. }
  3384. /* Wait for pending cmds to complete */
  3385. qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
  3386. }
  3387. void
  3388. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3389. {
  3390. struct qla_hw_data *ha = vha->hw;
  3391. struct scsi_qla_host *vp;
  3392. unsigned long flags;
  3393. vha->flags.online = 0;
  3394. ha->flags.chip_reset_done = 0;
  3395. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3396. ha->qla_stats.total_isp_aborts++;
  3397. qla_printk(KERN_INFO, ha,
  3398. "Performing ISP error recovery - ha= %p.\n", ha);
  3399. /* Chip reset does not apply to 82XX */
  3400. if (!IS_QLA82XX(ha))
  3401. ha->isp_ops->reset_chip(vha);
  3402. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3403. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3404. atomic_set(&vha->loop_state, LOOP_DOWN);
  3405. qla2x00_mark_all_devices_lost(vha, 0);
  3406. spin_lock_irqsave(&ha->vport_slock, flags);
  3407. list_for_each_entry(vp, &ha->vp_list, list) {
  3408. atomic_inc(&vp->vref_count);
  3409. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3410. qla2x00_mark_all_devices_lost(vp, 0);
  3411. spin_lock_irqsave(&ha->vport_slock, flags);
  3412. atomic_dec(&vp->vref_count);
  3413. }
  3414. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3415. } else {
  3416. if (!atomic_read(&vha->loop_down_timer))
  3417. atomic_set(&vha->loop_down_timer,
  3418. LOOP_DOWN_TIME);
  3419. }
  3420. if (!ha->flags.eeh_busy) {
  3421. /* Make sure for ISP 82XX IO DMA is complete */
  3422. if (IS_QLA82XX(ha))
  3423. qla82xx_chip_reset_cleanup(vha);
  3424. /* Requeue all commands in outstanding command list. */
  3425. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3426. }
  3427. }
  3428. /*
  3429. * qla2x00_abort_isp
  3430. * Resets ISP and aborts all outstanding commands.
  3431. *
  3432. * Input:
  3433. * ha = adapter block pointer.
  3434. *
  3435. * Returns:
  3436. * 0 = success
  3437. */
  3438. int
  3439. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3440. {
  3441. int rval;
  3442. uint8_t status = 0;
  3443. struct qla_hw_data *ha = vha->hw;
  3444. struct scsi_qla_host *vp;
  3445. struct req_que *req = ha->req_q_map[0];
  3446. unsigned long flags;
  3447. if (vha->flags.online) {
  3448. qla2x00_abort_isp_cleanup(vha);
  3449. if (unlikely(pci_channel_offline(ha->pdev) &&
  3450. ha->flags.pci_channel_io_perm_failure)) {
  3451. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3452. status = 0;
  3453. return status;
  3454. }
  3455. ha->isp_ops->get_flash_version(vha, req->ring);
  3456. ha->isp_ops->nvram_config(vha);
  3457. if (!qla2x00_restart_isp(vha)) {
  3458. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3459. if (!atomic_read(&vha->loop_down_timer)) {
  3460. /*
  3461. * Issue marker command only when we are going
  3462. * to start the I/O .
  3463. */
  3464. vha->marker_needed = 1;
  3465. }
  3466. vha->flags.online = 1;
  3467. ha->isp_ops->enable_intrs(ha);
  3468. ha->isp_abort_cnt = 0;
  3469. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3470. if (IS_QLA81XX(ha))
  3471. qla2x00_get_fw_version(vha,
  3472. &ha->fw_major_version,
  3473. &ha->fw_minor_version,
  3474. &ha->fw_subminor_version,
  3475. &ha->fw_attributes, &ha->fw_memory_size,
  3476. ha->mpi_version, &ha->mpi_capabilities,
  3477. ha->phy_version);
  3478. if (ha->fce) {
  3479. ha->flags.fce_enabled = 1;
  3480. memset(ha->fce, 0,
  3481. fce_calc_size(ha->fce_bufs));
  3482. rval = qla2x00_enable_fce_trace(vha,
  3483. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3484. &ha->fce_bufs);
  3485. if (rval) {
  3486. qla_printk(KERN_WARNING, ha,
  3487. "Unable to reinitialize FCE "
  3488. "(%d).\n", rval);
  3489. ha->flags.fce_enabled = 0;
  3490. }
  3491. }
  3492. if (ha->eft) {
  3493. memset(ha->eft, 0, EFT_SIZE);
  3494. rval = qla2x00_enable_eft_trace(vha,
  3495. ha->eft_dma, EFT_NUM_BUFFERS);
  3496. if (rval) {
  3497. qla_printk(KERN_WARNING, ha,
  3498. "Unable to reinitialize EFT "
  3499. "(%d).\n", rval);
  3500. }
  3501. }
  3502. } else { /* failed the ISP abort */
  3503. vha->flags.online = 1;
  3504. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3505. if (ha->isp_abort_cnt == 0) {
  3506. qla_printk(KERN_WARNING, ha,
  3507. "ISP error recovery failed - "
  3508. "board disabled\n");
  3509. /*
  3510. * The next call disables the board
  3511. * completely.
  3512. */
  3513. ha->isp_ops->reset_adapter(vha);
  3514. vha->flags.online = 0;
  3515. clear_bit(ISP_ABORT_RETRY,
  3516. &vha->dpc_flags);
  3517. status = 0;
  3518. } else { /* schedule another ISP abort */
  3519. ha->isp_abort_cnt--;
  3520. DEBUG(printk("qla%ld: ISP abort - "
  3521. "retry remaining %d\n",
  3522. vha->host_no, ha->isp_abort_cnt));
  3523. status = 1;
  3524. }
  3525. } else {
  3526. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3527. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3528. "- retrying (%d) more times\n",
  3529. vha->host_no, ha->isp_abort_cnt));
  3530. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3531. status = 1;
  3532. }
  3533. }
  3534. }
  3535. if (!status) {
  3536. DEBUG(printk(KERN_INFO
  3537. "qla2x00_abort_isp(%ld): succeeded.\n",
  3538. vha->host_no));
  3539. spin_lock_irqsave(&ha->vport_slock, flags);
  3540. list_for_each_entry(vp, &ha->vp_list, list) {
  3541. if (vp->vp_idx) {
  3542. atomic_inc(&vp->vref_count);
  3543. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3544. qla2x00_vp_abort_isp(vp);
  3545. spin_lock_irqsave(&ha->vport_slock, flags);
  3546. atomic_dec(&vp->vref_count);
  3547. }
  3548. }
  3549. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3550. } else {
  3551. qla_printk(KERN_INFO, ha,
  3552. "qla2x00_abort_isp: **** FAILED ****\n");
  3553. }
  3554. return(status);
  3555. }
  3556. /*
  3557. * qla2x00_restart_isp
  3558. * restarts the ISP after a reset
  3559. *
  3560. * Input:
  3561. * ha = adapter block pointer.
  3562. *
  3563. * Returns:
  3564. * 0 = success
  3565. */
  3566. static int
  3567. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3568. {
  3569. int status = 0;
  3570. uint32_t wait_time;
  3571. struct qla_hw_data *ha = vha->hw;
  3572. struct req_que *req = ha->req_q_map[0];
  3573. struct rsp_que *rsp = ha->rsp_q_map[0];
  3574. /* If firmware needs to be loaded */
  3575. if (qla2x00_isp_firmware(vha)) {
  3576. vha->flags.online = 0;
  3577. status = ha->isp_ops->chip_diag(vha);
  3578. if (!status)
  3579. status = qla2x00_setup_chip(vha);
  3580. }
  3581. if (!status && !(status = qla2x00_init_rings(vha))) {
  3582. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3583. ha->flags.chip_reset_done = 1;
  3584. /* Initialize the queues in use */
  3585. qla25xx_init_queues(ha);
  3586. status = qla2x00_fw_ready(vha);
  3587. if (!status) {
  3588. DEBUG(printk("%s(): Start configure loop, "
  3589. "status = %d\n", __func__, status));
  3590. /* Issue a marker after FW becomes ready. */
  3591. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3592. vha->flags.online = 1;
  3593. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3594. wait_time = 256;
  3595. do {
  3596. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3597. qla2x00_configure_loop(vha);
  3598. wait_time--;
  3599. } while (!atomic_read(&vha->loop_down_timer) &&
  3600. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3601. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3602. &vha->dpc_flags)));
  3603. }
  3604. /* if no cable then assume it's good */
  3605. if ((vha->device_flags & DFLG_NO_CABLE))
  3606. status = 0;
  3607. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3608. __func__,
  3609. status));
  3610. }
  3611. return (status);
  3612. }
  3613. static int
  3614. qla25xx_init_queues(struct qla_hw_data *ha)
  3615. {
  3616. struct rsp_que *rsp = NULL;
  3617. struct req_que *req = NULL;
  3618. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3619. int ret = -1;
  3620. int i;
  3621. for (i = 1; i < ha->max_rsp_queues; i++) {
  3622. rsp = ha->rsp_q_map[i];
  3623. if (rsp) {
  3624. rsp->options &= ~BIT_0;
  3625. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3626. if (ret != QLA_SUCCESS)
  3627. DEBUG2_17(printk(KERN_WARNING
  3628. "%s Rsp que:%d init failed\n", __func__,
  3629. rsp->id));
  3630. else
  3631. DEBUG2_17(printk(KERN_INFO
  3632. "%s Rsp que:%d inited\n", __func__,
  3633. rsp->id));
  3634. }
  3635. }
  3636. for (i = 1; i < ha->max_req_queues; i++) {
  3637. req = ha->req_q_map[i];
  3638. if (req) {
  3639. /* Clear outstanding commands array. */
  3640. req->options &= ~BIT_0;
  3641. ret = qla25xx_init_req_que(base_vha, req);
  3642. if (ret != QLA_SUCCESS)
  3643. DEBUG2_17(printk(KERN_WARNING
  3644. "%s Req que:%d init failed\n", __func__,
  3645. req->id));
  3646. else
  3647. DEBUG2_17(printk(KERN_WARNING
  3648. "%s Req que:%d inited\n", __func__,
  3649. req->id));
  3650. }
  3651. }
  3652. return ret;
  3653. }
  3654. /*
  3655. * qla2x00_reset_adapter
  3656. * Reset adapter.
  3657. *
  3658. * Input:
  3659. * ha = adapter block pointer.
  3660. */
  3661. void
  3662. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3663. {
  3664. unsigned long flags = 0;
  3665. struct qla_hw_data *ha = vha->hw;
  3666. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3667. vha->flags.online = 0;
  3668. ha->isp_ops->disable_intrs(ha);
  3669. spin_lock_irqsave(&ha->hardware_lock, flags);
  3670. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3671. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3672. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3673. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3674. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3675. }
  3676. void
  3677. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3678. {
  3679. unsigned long flags = 0;
  3680. struct qla_hw_data *ha = vha->hw;
  3681. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3682. if (IS_QLA82XX(ha))
  3683. return;
  3684. vha->flags.online = 0;
  3685. ha->isp_ops->disable_intrs(ha);
  3686. spin_lock_irqsave(&ha->hardware_lock, flags);
  3687. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3688. RD_REG_DWORD(&reg->hccr);
  3689. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3690. RD_REG_DWORD(&reg->hccr);
  3691. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3692. if (IS_NOPOLLING_TYPE(ha))
  3693. ha->isp_ops->enable_intrs(ha);
  3694. }
  3695. /* On sparc systems, obtain port and node WWN from firmware
  3696. * properties.
  3697. */
  3698. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3699. struct nvram_24xx *nv)
  3700. {
  3701. #ifdef CONFIG_SPARC
  3702. struct qla_hw_data *ha = vha->hw;
  3703. struct pci_dev *pdev = ha->pdev;
  3704. struct device_node *dp = pci_device_to_OF_node(pdev);
  3705. const u8 *val;
  3706. int len;
  3707. val = of_get_property(dp, "port-wwn", &len);
  3708. if (val && len >= WWN_SIZE)
  3709. memcpy(nv->port_name, val, WWN_SIZE);
  3710. val = of_get_property(dp, "node-wwn", &len);
  3711. if (val && len >= WWN_SIZE)
  3712. memcpy(nv->node_name, val, WWN_SIZE);
  3713. #endif
  3714. }
  3715. int
  3716. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3717. {
  3718. int rval;
  3719. struct init_cb_24xx *icb;
  3720. struct nvram_24xx *nv;
  3721. uint32_t *dptr;
  3722. uint8_t *dptr1, *dptr2;
  3723. uint32_t chksum;
  3724. uint16_t cnt;
  3725. struct qla_hw_data *ha = vha->hw;
  3726. rval = QLA_SUCCESS;
  3727. icb = (struct init_cb_24xx *)ha->init_cb;
  3728. nv = ha->nvram;
  3729. /* Determine NVRAM starting address. */
  3730. if (ha->flags.port0) {
  3731. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3732. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3733. } else {
  3734. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3735. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3736. }
  3737. ha->nvram_size = sizeof(struct nvram_24xx);
  3738. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3739. if (IS_QLA82XX(ha))
  3740. ha->vpd_size = FA_VPD_SIZE_82XX;
  3741. /* Get VPD data into cache */
  3742. ha->vpd = ha->nvram + VPD_OFFSET;
  3743. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3744. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3745. /* Get NVRAM data into cache and calculate checksum. */
  3746. dptr = (uint32_t *)nv;
  3747. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3748. ha->nvram_size);
  3749. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3750. chksum += le32_to_cpu(*dptr++);
  3751. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3752. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3753. /* Bad NVRAM data, set defaults parameters. */
  3754. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3755. || nv->id[3] != ' ' ||
  3756. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3757. /* Reset NVRAM data. */
  3758. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3759. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3760. le16_to_cpu(nv->nvram_version));
  3761. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3762. "invalid -- WWPN) defaults.\n");
  3763. /*
  3764. * Set default initialization control block.
  3765. */
  3766. memset(nv, 0, ha->nvram_size);
  3767. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3768. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3769. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3770. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3771. nv->exchange_count = __constant_cpu_to_le16(0);
  3772. nv->hard_address = __constant_cpu_to_le16(124);
  3773. nv->port_name[0] = 0x21;
  3774. nv->port_name[1] = 0x00 + ha->port_no;
  3775. nv->port_name[2] = 0x00;
  3776. nv->port_name[3] = 0xe0;
  3777. nv->port_name[4] = 0x8b;
  3778. nv->port_name[5] = 0x1c;
  3779. nv->port_name[6] = 0x55;
  3780. nv->port_name[7] = 0x86;
  3781. nv->node_name[0] = 0x20;
  3782. nv->node_name[1] = 0x00;
  3783. nv->node_name[2] = 0x00;
  3784. nv->node_name[3] = 0xe0;
  3785. nv->node_name[4] = 0x8b;
  3786. nv->node_name[5] = 0x1c;
  3787. nv->node_name[6] = 0x55;
  3788. nv->node_name[7] = 0x86;
  3789. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3790. nv->login_retry_count = __constant_cpu_to_le16(8);
  3791. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3792. nv->login_timeout = __constant_cpu_to_le16(0);
  3793. nv->firmware_options_1 =
  3794. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3795. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3796. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3797. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3798. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3799. nv->efi_parameters = __constant_cpu_to_le32(0);
  3800. nv->reset_delay = 5;
  3801. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3802. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3803. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3804. rval = 1;
  3805. }
  3806. /* Reset Initialization control block */
  3807. memset(icb, 0, ha->init_cb_size);
  3808. /* Copy 1st segment. */
  3809. dptr1 = (uint8_t *)icb;
  3810. dptr2 = (uint8_t *)&nv->version;
  3811. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3812. while (cnt--)
  3813. *dptr1++ = *dptr2++;
  3814. icb->login_retry_count = nv->login_retry_count;
  3815. icb->link_down_on_nos = nv->link_down_on_nos;
  3816. /* Copy 2nd segment. */
  3817. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3818. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3819. cnt = (uint8_t *)&icb->reserved_3 -
  3820. (uint8_t *)&icb->interrupt_delay_timer;
  3821. while (cnt--)
  3822. *dptr1++ = *dptr2++;
  3823. /*
  3824. * Setup driver NVRAM options.
  3825. */
  3826. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3827. "QLA2462");
  3828. /* Use alternate WWN? */
  3829. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3830. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3831. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3832. }
  3833. /* Prepare nodename */
  3834. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3835. /*
  3836. * Firmware will apply the following mask if the nodename was
  3837. * not provided.
  3838. */
  3839. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3840. icb->node_name[0] &= 0xF0;
  3841. }
  3842. /* Set host adapter parameters. */
  3843. ha->flags.disable_risc_code_load = 0;
  3844. ha->flags.enable_lip_reset = 0;
  3845. ha->flags.enable_lip_full_login =
  3846. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3847. ha->flags.enable_target_reset =
  3848. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3849. ha->flags.enable_led_scheme = 0;
  3850. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3851. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3852. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3853. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3854. sizeof(ha->fw_seriallink_options24));
  3855. /* save HBA serial number */
  3856. ha->serial0 = icb->port_name[5];
  3857. ha->serial1 = icb->port_name[6];
  3858. ha->serial2 = icb->port_name[7];
  3859. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3860. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3861. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3862. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3863. /* Set minimum login_timeout to 4 seconds. */
  3864. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3865. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3866. if (le16_to_cpu(nv->login_timeout) < 4)
  3867. nv->login_timeout = __constant_cpu_to_le16(4);
  3868. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3869. icb->login_timeout = nv->login_timeout;
  3870. /* Set minimum RATOV to 100 tenths of a second. */
  3871. ha->r_a_tov = 100;
  3872. ha->loop_reset_delay = nv->reset_delay;
  3873. /* Link Down Timeout = 0:
  3874. *
  3875. * When Port Down timer expires we will start returning
  3876. * I/O's to OS with "DID_NO_CONNECT".
  3877. *
  3878. * Link Down Timeout != 0:
  3879. *
  3880. * The driver waits for the link to come up after link down
  3881. * before returning I/Os to OS with "DID_NO_CONNECT".
  3882. */
  3883. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3884. ha->loop_down_abort_time =
  3885. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3886. } else {
  3887. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3888. ha->loop_down_abort_time =
  3889. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3890. }
  3891. /* Need enough time to try and get the port back. */
  3892. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3893. if (qlport_down_retry)
  3894. ha->port_down_retry_count = qlport_down_retry;
  3895. /* Set login_retry_count */
  3896. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3897. if (ha->port_down_retry_count ==
  3898. le16_to_cpu(nv->port_down_retry_count) &&
  3899. ha->port_down_retry_count > 3)
  3900. ha->login_retry_count = ha->port_down_retry_count;
  3901. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3902. ha->login_retry_count = ha->port_down_retry_count;
  3903. if (ql2xloginretrycount)
  3904. ha->login_retry_count = ql2xloginretrycount;
  3905. /* Enable ZIO. */
  3906. if (!vha->flags.init_done) {
  3907. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3908. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3909. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3910. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3911. }
  3912. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3913. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3914. vha->flags.process_response_queue = 0;
  3915. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3916. ha->zio_mode = QLA_ZIO_MODE_6;
  3917. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3918. "(%d us).\n", vha->host_no, ha->zio_mode,
  3919. ha->zio_timer * 100));
  3920. qla_printk(KERN_INFO, ha,
  3921. "ZIO mode %d enabled; timer delay (%d us).\n",
  3922. ha->zio_mode, ha->zio_timer * 100);
  3923. icb->firmware_options_2 |= cpu_to_le32(
  3924. (uint32_t)ha->zio_mode);
  3925. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3926. vha->flags.process_response_queue = 1;
  3927. }
  3928. if (rval) {
  3929. DEBUG2_3(printk(KERN_WARNING
  3930. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3931. }
  3932. return (rval);
  3933. }
  3934. static int
  3935. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3936. uint32_t faddr)
  3937. {
  3938. int rval = QLA_SUCCESS;
  3939. int segments, fragment;
  3940. uint32_t *dcode, dlen;
  3941. uint32_t risc_addr;
  3942. uint32_t risc_size;
  3943. uint32_t i;
  3944. struct qla_hw_data *ha = vha->hw;
  3945. struct req_que *req = ha->req_q_map[0];
  3946. qla_printk(KERN_INFO, ha,
  3947. "FW: Loading from flash (%x)...\n", faddr);
  3948. rval = QLA_SUCCESS;
  3949. segments = FA_RISC_CODE_SEGMENTS;
  3950. dcode = (uint32_t *)req->ring;
  3951. *srisc_addr = 0;
  3952. /* Validate firmware image by checking version. */
  3953. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3954. for (i = 0; i < 4; i++)
  3955. dcode[i] = be32_to_cpu(dcode[i]);
  3956. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3957. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3958. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3959. dcode[3] == 0)) {
  3960. qla_printk(KERN_WARNING, ha,
  3961. "Unable to verify integrity of flash firmware image!\n");
  3962. qla_printk(KERN_WARNING, ha,
  3963. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3964. dcode[1], dcode[2], dcode[3]);
  3965. return QLA_FUNCTION_FAILED;
  3966. }
  3967. while (segments && rval == QLA_SUCCESS) {
  3968. /* Read segment's load information. */
  3969. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3970. risc_addr = be32_to_cpu(dcode[2]);
  3971. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3972. risc_size = be32_to_cpu(dcode[3]);
  3973. fragment = 0;
  3974. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3975. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3976. if (dlen > risc_size)
  3977. dlen = risc_size;
  3978. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3979. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3980. vha->host_no, risc_addr, dlen, faddr));
  3981. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3982. for (i = 0; i < dlen; i++)
  3983. dcode[i] = swab32(dcode[i]);
  3984. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3985. dlen);
  3986. if (rval) {
  3987. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3988. "segment %d of firmware\n", vha->host_no,
  3989. fragment));
  3990. qla_printk(KERN_WARNING, ha,
  3991. "[ERROR] Failed to load segment %d of "
  3992. "firmware\n", fragment);
  3993. break;
  3994. }
  3995. faddr += dlen;
  3996. risc_addr += dlen;
  3997. risc_size -= dlen;
  3998. fragment++;
  3999. }
  4000. /* Next segment. */
  4001. segments--;
  4002. }
  4003. return rval;
  4004. }
  4005. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  4006. int
  4007. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4008. {
  4009. int rval;
  4010. int i, fragment;
  4011. uint16_t *wcode, *fwcode;
  4012. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  4013. struct fw_blob *blob;
  4014. struct qla_hw_data *ha = vha->hw;
  4015. struct req_que *req = ha->req_q_map[0];
  4016. /* Load firmware blob. */
  4017. blob = qla2x00_request_firmware(vha);
  4018. if (!blob) {
  4019. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4020. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4021. "from: " QLA_FW_URL ".\n");
  4022. return QLA_FUNCTION_FAILED;
  4023. }
  4024. rval = QLA_SUCCESS;
  4025. wcode = (uint16_t *)req->ring;
  4026. *srisc_addr = 0;
  4027. fwcode = (uint16_t *)blob->fw->data;
  4028. fwclen = 0;
  4029. /* Validate firmware image by checking version. */
  4030. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  4031. qla_printk(KERN_WARNING, ha,
  4032. "Unable to verify integrity of firmware image (%Zd)!\n",
  4033. blob->fw->size);
  4034. goto fail_fw_integrity;
  4035. }
  4036. for (i = 0; i < 4; i++)
  4037. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  4038. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  4039. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  4040. wcode[2] == 0 && wcode[3] == 0)) {
  4041. qla_printk(KERN_WARNING, ha,
  4042. "Unable to verify integrity of firmware image!\n");
  4043. qla_printk(KERN_WARNING, ha,
  4044. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  4045. wcode[1], wcode[2], wcode[3]);
  4046. goto fail_fw_integrity;
  4047. }
  4048. seg = blob->segs;
  4049. while (*seg && rval == QLA_SUCCESS) {
  4050. risc_addr = *seg;
  4051. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  4052. risc_size = be16_to_cpu(fwcode[3]);
  4053. /* Validate firmware image size. */
  4054. fwclen += risc_size * sizeof(uint16_t);
  4055. if (blob->fw->size < fwclen) {
  4056. qla_printk(KERN_WARNING, ha,
  4057. "Unable to verify integrity of firmware image "
  4058. "(%Zd)!\n", blob->fw->size);
  4059. goto fail_fw_integrity;
  4060. }
  4061. fragment = 0;
  4062. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4063. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  4064. if (wlen > risc_size)
  4065. wlen = risc_size;
  4066. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4067. "addr %x, number of words 0x%x.\n", vha->host_no,
  4068. risc_addr, wlen));
  4069. for (i = 0; i < wlen; i++)
  4070. wcode[i] = swab16(fwcode[i]);
  4071. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4072. wlen);
  4073. if (rval) {
  4074. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4075. "segment %d of firmware\n", vha->host_no,
  4076. fragment));
  4077. qla_printk(KERN_WARNING, ha,
  4078. "[ERROR] Failed to load segment %d of "
  4079. "firmware\n", fragment);
  4080. break;
  4081. }
  4082. fwcode += wlen;
  4083. risc_addr += wlen;
  4084. risc_size -= wlen;
  4085. fragment++;
  4086. }
  4087. /* Next segment. */
  4088. seg++;
  4089. }
  4090. return rval;
  4091. fail_fw_integrity:
  4092. return QLA_FUNCTION_FAILED;
  4093. }
  4094. static int
  4095. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4096. {
  4097. int rval;
  4098. int segments, fragment;
  4099. uint32_t *dcode, dlen;
  4100. uint32_t risc_addr;
  4101. uint32_t risc_size;
  4102. uint32_t i;
  4103. struct fw_blob *blob;
  4104. uint32_t *fwcode, fwclen;
  4105. struct qla_hw_data *ha = vha->hw;
  4106. struct req_que *req = ha->req_q_map[0];
  4107. /* Load firmware blob. */
  4108. blob = qla2x00_request_firmware(vha);
  4109. if (!blob) {
  4110. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4111. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4112. "from: " QLA_FW_URL ".\n");
  4113. return QLA_FUNCTION_FAILED;
  4114. }
  4115. qla_printk(KERN_INFO, ha,
  4116. "FW: Loading via request-firmware...\n");
  4117. rval = QLA_SUCCESS;
  4118. segments = FA_RISC_CODE_SEGMENTS;
  4119. dcode = (uint32_t *)req->ring;
  4120. *srisc_addr = 0;
  4121. fwcode = (uint32_t *)blob->fw->data;
  4122. fwclen = 0;
  4123. /* Validate firmware image by checking version. */
  4124. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4125. qla_printk(KERN_WARNING, ha,
  4126. "Unable to verify integrity of firmware image (%Zd)!\n",
  4127. blob->fw->size);
  4128. goto fail_fw_integrity;
  4129. }
  4130. for (i = 0; i < 4; i++)
  4131. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4132. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4133. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4134. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4135. dcode[3] == 0)) {
  4136. qla_printk(KERN_WARNING, ha,
  4137. "Unable to verify integrity of firmware image!\n");
  4138. qla_printk(KERN_WARNING, ha,
  4139. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4140. dcode[1], dcode[2], dcode[3]);
  4141. goto fail_fw_integrity;
  4142. }
  4143. while (segments && rval == QLA_SUCCESS) {
  4144. risc_addr = be32_to_cpu(fwcode[2]);
  4145. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4146. risc_size = be32_to_cpu(fwcode[3]);
  4147. /* Validate firmware image size. */
  4148. fwclen += risc_size * sizeof(uint32_t);
  4149. if (blob->fw->size < fwclen) {
  4150. qla_printk(KERN_WARNING, ha,
  4151. "Unable to verify integrity of firmware image "
  4152. "(%Zd)!\n", blob->fw->size);
  4153. goto fail_fw_integrity;
  4154. }
  4155. fragment = 0;
  4156. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4157. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4158. if (dlen > risc_size)
  4159. dlen = risc_size;
  4160. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4161. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4162. risc_addr, dlen));
  4163. for (i = 0; i < dlen; i++)
  4164. dcode[i] = swab32(fwcode[i]);
  4165. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4166. dlen);
  4167. if (rval) {
  4168. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4169. "segment %d of firmware\n", vha->host_no,
  4170. fragment));
  4171. qla_printk(KERN_WARNING, ha,
  4172. "[ERROR] Failed to load segment %d of "
  4173. "firmware\n", fragment);
  4174. break;
  4175. }
  4176. fwcode += dlen;
  4177. risc_addr += dlen;
  4178. risc_size -= dlen;
  4179. fragment++;
  4180. }
  4181. /* Next segment. */
  4182. segments--;
  4183. }
  4184. return rval;
  4185. fail_fw_integrity:
  4186. return QLA_FUNCTION_FAILED;
  4187. }
  4188. int
  4189. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4190. {
  4191. int rval;
  4192. if (ql2xfwloadbin == 1)
  4193. return qla81xx_load_risc(vha, srisc_addr);
  4194. /*
  4195. * FW Load priority:
  4196. * 1) Firmware via request-firmware interface (.bin file).
  4197. * 2) Firmware residing in flash.
  4198. */
  4199. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4200. if (rval == QLA_SUCCESS)
  4201. return rval;
  4202. return qla24xx_load_risc_flash(vha, srisc_addr,
  4203. vha->hw->flt_region_fw);
  4204. }
  4205. int
  4206. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4207. {
  4208. int rval;
  4209. struct qla_hw_data *ha = vha->hw;
  4210. if (ql2xfwloadbin == 2)
  4211. goto try_blob_fw;
  4212. /*
  4213. * FW Load priority:
  4214. * 1) Firmware residing in flash.
  4215. * 2) Firmware via request-firmware interface (.bin file).
  4216. * 3) Golden-Firmware residing in flash -- limited operation.
  4217. */
  4218. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4219. if (rval == QLA_SUCCESS)
  4220. return rval;
  4221. try_blob_fw:
  4222. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4223. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4224. return rval;
  4225. qla_printk(KERN_ERR, ha,
  4226. "FW: Attempting to fallback to golden firmware...\n");
  4227. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4228. if (rval != QLA_SUCCESS)
  4229. return rval;
  4230. qla_printk(KERN_ERR, ha,
  4231. "FW: Please update operational firmware...\n");
  4232. ha->flags.running_gold_fw = 1;
  4233. return rval;
  4234. }
  4235. void
  4236. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4237. {
  4238. int ret, retries;
  4239. struct qla_hw_data *ha = vha->hw;
  4240. if (ha->flags.pci_channel_io_perm_failure)
  4241. return;
  4242. if (!IS_FWI2_CAPABLE(ha))
  4243. return;
  4244. if (!ha->fw_major_version)
  4245. return;
  4246. ret = qla2x00_stop_firmware(vha);
  4247. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4248. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4249. ha->isp_ops->reset_chip(vha);
  4250. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4251. continue;
  4252. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4253. continue;
  4254. qla_printk(KERN_INFO, ha,
  4255. "Attempting retry of stop-firmware command...\n");
  4256. ret = qla2x00_stop_firmware(vha);
  4257. }
  4258. }
  4259. int
  4260. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4261. {
  4262. int rval = QLA_SUCCESS;
  4263. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4264. struct qla_hw_data *ha = vha->hw;
  4265. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4266. struct req_que *req;
  4267. struct rsp_que *rsp;
  4268. if (!vha->vp_idx)
  4269. return -EINVAL;
  4270. rval = qla2x00_fw_ready(base_vha);
  4271. if (ha->flags.cpu_affinity_enabled)
  4272. req = ha->req_q_map[0];
  4273. else
  4274. req = vha->req;
  4275. rsp = req->rsp;
  4276. if (rval == QLA_SUCCESS) {
  4277. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4278. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4279. }
  4280. vha->flags.management_server_logged_in = 0;
  4281. /* Login to SNS first */
  4282. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4283. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4284. DEBUG15(qla_printk(KERN_INFO, ha,
  4285. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4286. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4287. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4288. return (QLA_FUNCTION_FAILED);
  4289. }
  4290. atomic_set(&vha->loop_down_timer, 0);
  4291. atomic_set(&vha->loop_state, LOOP_UP);
  4292. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4293. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4294. rval = qla2x00_loop_resync(base_vha);
  4295. return rval;
  4296. }
  4297. /* 84XX Support **************************************************************/
  4298. static LIST_HEAD(qla_cs84xx_list);
  4299. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4300. static struct qla_chip_state_84xx *
  4301. qla84xx_get_chip(struct scsi_qla_host *vha)
  4302. {
  4303. struct qla_chip_state_84xx *cs84xx;
  4304. struct qla_hw_data *ha = vha->hw;
  4305. mutex_lock(&qla_cs84xx_mutex);
  4306. /* Find any shared 84xx chip. */
  4307. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4308. if (cs84xx->bus == ha->pdev->bus) {
  4309. kref_get(&cs84xx->kref);
  4310. goto done;
  4311. }
  4312. }
  4313. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4314. if (!cs84xx)
  4315. goto done;
  4316. kref_init(&cs84xx->kref);
  4317. spin_lock_init(&cs84xx->access_lock);
  4318. mutex_init(&cs84xx->fw_update_mutex);
  4319. cs84xx->bus = ha->pdev->bus;
  4320. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4321. done:
  4322. mutex_unlock(&qla_cs84xx_mutex);
  4323. return cs84xx;
  4324. }
  4325. static void
  4326. __qla84xx_chip_release(struct kref *kref)
  4327. {
  4328. struct qla_chip_state_84xx *cs84xx =
  4329. container_of(kref, struct qla_chip_state_84xx, kref);
  4330. mutex_lock(&qla_cs84xx_mutex);
  4331. list_del(&cs84xx->list);
  4332. mutex_unlock(&qla_cs84xx_mutex);
  4333. kfree(cs84xx);
  4334. }
  4335. void
  4336. qla84xx_put_chip(struct scsi_qla_host *vha)
  4337. {
  4338. struct qla_hw_data *ha = vha->hw;
  4339. if (ha->cs84xx)
  4340. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4341. }
  4342. static int
  4343. qla84xx_init_chip(scsi_qla_host_t *vha)
  4344. {
  4345. int rval;
  4346. uint16_t status[2];
  4347. struct qla_hw_data *ha = vha->hw;
  4348. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4349. rval = qla84xx_verify_chip(vha, status);
  4350. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4351. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4352. QLA_SUCCESS;
  4353. }
  4354. /* 81XX Support **************************************************************/
  4355. int
  4356. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4357. {
  4358. int rval;
  4359. struct init_cb_81xx *icb;
  4360. struct nvram_81xx *nv;
  4361. uint32_t *dptr;
  4362. uint8_t *dptr1, *dptr2;
  4363. uint32_t chksum;
  4364. uint16_t cnt;
  4365. struct qla_hw_data *ha = vha->hw;
  4366. rval = QLA_SUCCESS;
  4367. icb = (struct init_cb_81xx *)ha->init_cb;
  4368. nv = ha->nvram;
  4369. /* Determine NVRAM starting address. */
  4370. ha->nvram_size = sizeof(struct nvram_81xx);
  4371. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4372. /* Get VPD data into cache */
  4373. ha->vpd = ha->nvram + VPD_OFFSET;
  4374. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4375. ha->vpd_size);
  4376. /* Get NVRAM data into cache and calculate checksum. */
  4377. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4378. ha->nvram_size);
  4379. dptr = (uint32_t *)nv;
  4380. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4381. chksum += le32_to_cpu(*dptr++);
  4382. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4383. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4384. /* Bad NVRAM data, set defaults parameters. */
  4385. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4386. || nv->id[3] != ' ' ||
  4387. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4388. /* Reset NVRAM data. */
  4389. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4390. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4391. le16_to_cpu(nv->nvram_version));
  4392. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4393. "invalid -- WWPN) defaults.\n");
  4394. /*
  4395. * Set default initialization control block.
  4396. */
  4397. memset(nv, 0, ha->nvram_size);
  4398. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4399. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4400. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4401. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4402. nv->exchange_count = __constant_cpu_to_le16(0);
  4403. nv->port_name[0] = 0x21;
  4404. nv->port_name[1] = 0x00 + ha->port_no;
  4405. nv->port_name[2] = 0x00;
  4406. nv->port_name[3] = 0xe0;
  4407. nv->port_name[4] = 0x8b;
  4408. nv->port_name[5] = 0x1c;
  4409. nv->port_name[6] = 0x55;
  4410. nv->port_name[7] = 0x86;
  4411. nv->node_name[0] = 0x20;
  4412. nv->node_name[1] = 0x00;
  4413. nv->node_name[2] = 0x00;
  4414. nv->node_name[3] = 0xe0;
  4415. nv->node_name[4] = 0x8b;
  4416. nv->node_name[5] = 0x1c;
  4417. nv->node_name[6] = 0x55;
  4418. nv->node_name[7] = 0x86;
  4419. nv->login_retry_count = __constant_cpu_to_le16(8);
  4420. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4421. nv->login_timeout = __constant_cpu_to_le16(0);
  4422. nv->firmware_options_1 =
  4423. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4424. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4425. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4426. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4427. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4428. nv->efi_parameters = __constant_cpu_to_le32(0);
  4429. nv->reset_delay = 5;
  4430. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4431. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4432. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4433. nv->enode_mac[0] = 0x00;
  4434. nv->enode_mac[1] = 0x02;
  4435. nv->enode_mac[2] = 0x03;
  4436. nv->enode_mac[3] = 0x04;
  4437. nv->enode_mac[4] = 0x05;
  4438. nv->enode_mac[5] = 0x06 + ha->port_no;
  4439. rval = 1;
  4440. }
  4441. /* Reset Initialization control block */
  4442. memset(icb, 0, sizeof(struct init_cb_81xx));
  4443. /* Copy 1st segment. */
  4444. dptr1 = (uint8_t *)icb;
  4445. dptr2 = (uint8_t *)&nv->version;
  4446. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4447. while (cnt--)
  4448. *dptr1++ = *dptr2++;
  4449. icb->login_retry_count = nv->login_retry_count;
  4450. /* Copy 2nd segment. */
  4451. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4452. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4453. cnt = (uint8_t *)&icb->reserved_5 -
  4454. (uint8_t *)&icb->interrupt_delay_timer;
  4455. while (cnt--)
  4456. *dptr1++ = *dptr2++;
  4457. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4458. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4459. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4460. icb->enode_mac[0] = 0x01;
  4461. icb->enode_mac[1] = 0x02;
  4462. icb->enode_mac[2] = 0x03;
  4463. icb->enode_mac[3] = 0x04;
  4464. icb->enode_mac[4] = 0x05;
  4465. icb->enode_mac[5] = 0x06 + ha->port_no;
  4466. }
  4467. /* Use extended-initialization control block. */
  4468. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4469. /*
  4470. * Setup driver NVRAM options.
  4471. */
  4472. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4473. "QLE8XXX");
  4474. /* Use alternate WWN? */
  4475. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4476. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4477. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4478. }
  4479. /* Prepare nodename */
  4480. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4481. /*
  4482. * Firmware will apply the following mask if the nodename was
  4483. * not provided.
  4484. */
  4485. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4486. icb->node_name[0] &= 0xF0;
  4487. }
  4488. /* Set host adapter parameters. */
  4489. ha->flags.disable_risc_code_load = 0;
  4490. ha->flags.enable_lip_reset = 0;
  4491. ha->flags.enable_lip_full_login =
  4492. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4493. ha->flags.enable_target_reset =
  4494. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4495. ha->flags.enable_led_scheme = 0;
  4496. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4497. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4498. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4499. /* save HBA serial number */
  4500. ha->serial0 = icb->port_name[5];
  4501. ha->serial1 = icb->port_name[6];
  4502. ha->serial2 = icb->port_name[7];
  4503. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4504. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4505. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4506. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4507. /* Set minimum login_timeout to 4 seconds. */
  4508. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4509. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4510. if (le16_to_cpu(nv->login_timeout) < 4)
  4511. nv->login_timeout = __constant_cpu_to_le16(4);
  4512. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4513. icb->login_timeout = nv->login_timeout;
  4514. /* Set minimum RATOV to 100 tenths of a second. */
  4515. ha->r_a_tov = 100;
  4516. ha->loop_reset_delay = nv->reset_delay;
  4517. /* Link Down Timeout = 0:
  4518. *
  4519. * When Port Down timer expires we will start returning
  4520. * I/O's to OS with "DID_NO_CONNECT".
  4521. *
  4522. * Link Down Timeout != 0:
  4523. *
  4524. * The driver waits for the link to come up after link down
  4525. * before returning I/Os to OS with "DID_NO_CONNECT".
  4526. */
  4527. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4528. ha->loop_down_abort_time =
  4529. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4530. } else {
  4531. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4532. ha->loop_down_abort_time =
  4533. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4534. }
  4535. /* Need enough time to try and get the port back. */
  4536. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4537. if (qlport_down_retry)
  4538. ha->port_down_retry_count = qlport_down_retry;
  4539. /* Set login_retry_count */
  4540. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4541. if (ha->port_down_retry_count ==
  4542. le16_to_cpu(nv->port_down_retry_count) &&
  4543. ha->port_down_retry_count > 3)
  4544. ha->login_retry_count = ha->port_down_retry_count;
  4545. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4546. ha->login_retry_count = ha->port_down_retry_count;
  4547. if (ql2xloginretrycount)
  4548. ha->login_retry_count = ql2xloginretrycount;
  4549. /* Enable ZIO. */
  4550. if (!vha->flags.init_done) {
  4551. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4552. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4553. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4554. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4555. }
  4556. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4557. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4558. vha->flags.process_response_queue = 0;
  4559. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4560. ha->zio_mode = QLA_ZIO_MODE_6;
  4561. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4562. "(%d us).\n", vha->host_no, ha->zio_mode,
  4563. ha->zio_timer * 100));
  4564. qla_printk(KERN_INFO, ha,
  4565. "ZIO mode %d enabled; timer delay (%d us).\n",
  4566. ha->zio_mode, ha->zio_timer * 100);
  4567. icb->firmware_options_2 |= cpu_to_le32(
  4568. (uint32_t)ha->zio_mode);
  4569. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4570. vha->flags.process_response_queue = 1;
  4571. }
  4572. if (rval) {
  4573. DEBUG2_3(printk(KERN_WARNING
  4574. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4575. }
  4576. return (rval);
  4577. }
  4578. int
  4579. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4580. {
  4581. int status, rval;
  4582. uint32_t wait_time;
  4583. struct qla_hw_data *ha = vha->hw;
  4584. struct req_que *req = ha->req_q_map[0];
  4585. struct rsp_que *rsp = ha->rsp_q_map[0];
  4586. struct scsi_qla_host *vp;
  4587. unsigned long flags;
  4588. status = qla2x00_init_rings(vha);
  4589. if (!status) {
  4590. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4591. ha->flags.chip_reset_done = 1;
  4592. status = qla2x00_fw_ready(vha);
  4593. if (!status) {
  4594. qla_printk(KERN_INFO, ha,
  4595. "%s(): Start configure loop, "
  4596. "status = %d\n", __func__, status);
  4597. /* Issue a marker after FW becomes ready. */
  4598. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4599. vha->flags.online = 1;
  4600. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4601. wait_time = 256;
  4602. do {
  4603. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4604. qla2x00_configure_loop(vha);
  4605. wait_time--;
  4606. } while (!atomic_read(&vha->loop_down_timer) &&
  4607. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4608. wait_time &&
  4609. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4610. }
  4611. /* if no cable then assume it's good */
  4612. if ((vha->device_flags & DFLG_NO_CABLE))
  4613. status = 0;
  4614. qla_printk(KERN_INFO, ha,
  4615. "%s(): Configure loop done, status = 0x%x\n",
  4616. __func__, status);
  4617. }
  4618. if (!status) {
  4619. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4620. if (!atomic_read(&vha->loop_down_timer)) {
  4621. /*
  4622. * Issue marker command only when we are going
  4623. * to start the I/O .
  4624. */
  4625. vha->marker_needed = 1;
  4626. }
  4627. vha->flags.online = 1;
  4628. ha->isp_ops->enable_intrs(ha);
  4629. ha->isp_abort_cnt = 0;
  4630. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4631. if (ha->fce) {
  4632. ha->flags.fce_enabled = 1;
  4633. memset(ha->fce, 0,
  4634. fce_calc_size(ha->fce_bufs));
  4635. rval = qla2x00_enable_fce_trace(vha,
  4636. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4637. &ha->fce_bufs);
  4638. if (rval) {
  4639. qla_printk(KERN_WARNING, ha,
  4640. "Unable to reinitialize FCE "
  4641. "(%d).\n", rval);
  4642. ha->flags.fce_enabled = 0;
  4643. }
  4644. }
  4645. if (ha->eft) {
  4646. memset(ha->eft, 0, EFT_SIZE);
  4647. rval = qla2x00_enable_eft_trace(vha,
  4648. ha->eft_dma, EFT_NUM_BUFFERS);
  4649. if (rval) {
  4650. qla_printk(KERN_WARNING, ha,
  4651. "Unable to reinitialize EFT "
  4652. "(%d).\n", rval);
  4653. }
  4654. }
  4655. }
  4656. if (!status) {
  4657. DEBUG(printk(KERN_INFO
  4658. "qla82xx_restart_isp(%ld): succeeded.\n",
  4659. vha->host_no));
  4660. spin_lock_irqsave(&ha->vport_slock, flags);
  4661. list_for_each_entry(vp, &ha->vp_list, list) {
  4662. if (vp->vp_idx) {
  4663. atomic_inc(&vp->vref_count);
  4664. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4665. qla2x00_vp_abort_isp(vp);
  4666. spin_lock_irqsave(&ha->vport_slock, flags);
  4667. atomic_dec(&vp->vref_count);
  4668. }
  4669. }
  4670. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4671. } else {
  4672. qla_printk(KERN_INFO, ha,
  4673. "qla82xx_restart_isp: **** FAILED ****\n");
  4674. }
  4675. return status;
  4676. }
  4677. void
  4678. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4679. {
  4680. struct qla_hw_data *ha = vha->hw;
  4681. if (!ql2xetsenable)
  4682. return;
  4683. /* Enable ETS Burst. */
  4684. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4685. ha->fw_options[2] |= BIT_9;
  4686. qla2x00_set_fw_options(vha, ha->fw_options);
  4687. }
  4688. /*
  4689. * qla24xx_get_fcp_prio
  4690. * Gets the fcp cmd priority value for the logged in port.
  4691. * Looks for a match of the port descriptors within
  4692. * each of the fcp prio config entries. If a match is found,
  4693. * the tag (priority) value is returned.
  4694. *
  4695. * Input:
  4696. * vha = scsi host structure pointer.
  4697. * fcport = port structure pointer.
  4698. *
  4699. * Return:
  4700. * non-zero (if found)
  4701. * 0 (if not found)
  4702. *
  4703. * Context:
  4704. * Kernel context
  4705. */
  4706. uint8_t
  4707. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4708. {
  4709. int i, entries;
  4710. uint8_t pid_match, wwn_match;
  4711. uint8_t priority;
  4712. uint32_t pid1, pid2;
  4713. uint64_t wwn1, wwn2;
  4714. struct qla_fcp_prio_entry *pri_entry;
  4715. struct qla_hw_data *ha = vha->hw;
  4716. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4717. return 0;
  4718. priority = 0;
  4719. entries = ha->fcp_prio_cfg->num_entries;
  4720. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4721. for (i = 0; i < entries; i++) {
  4722. pid_match = wwn_match = 0;
  4723. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4724. pri_entry++;
  4725. continue;
  4726. }
  4727. /* check source pid for a match */
  4728. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4729. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4730. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4731. if (pid1 == INVALID_PORT_ID)
  4732. pid_match++;
  4733. else if (pid1 == pid2)
  4734. pid_match++;
  4735. }
  4736. /* check destination pid for a match */
  4737. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4738. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4739. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4740. if (pid1 == INVALID_PORT_ID)
  4741. pid_match++;
  4742. else if (pid1 == pid2)
  4743. pid_match++;
  4744. }
  4745. /* check source WWN for a match */
  4746. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4747. wwn1 = wwn_to_u64(vha->port_name);
  4748. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4749. if (wwn2 == (uint64_t)-1)
  4750. wwn_match++;
  4751. else if (wwn1 == wwn2)
  4752. wwn_match++;
  4753. }
  4754. /* check destination WWN for a match */
  4755. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4756. wwn1 = wwn_to_u64(fcport->port_name);
  4757. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4758. if (wwn2 == (uint64_t)-1)
  4759. wwn_match++;
  4760. else if (wwn1 == wwn2)
  4761. wwn_match++;
  4762. }
  4763. if (pid_match == 2 || wwn_match == 2) {
  4764. /* Found a matching entry */
  4765. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4766. priority = pri_entry->tag;
  4767. break;
  4768. }
  4769. pri_entry++;
  4770. }
  4771. return priority;
  4772. }
  4773. /*
  4774. * qla24xx_update_fcport_fcp_prio
  4775. * Activates fcp priority for the logged in fc port
  4776. *
  4777. * Input:
  4778. * vha = scsi host structure pointer.
  4779. * fcp = port structure pointer.
  4780. *
  4781. * Return:
  4782. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4783. *
  4784. * Context:
  4785. * Kernel context.
  4786. */
  4787. int
  4788. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4789. {
  4790. int ret;
  4791. uint8_t priority;
  4792. uint16_t mb[5];
  4793. if (fcport->port_type != FCT_TARGET ||
  4794. fcport->loop_id == FC_NO_LOOP_ID)
  4795. return QLA_FUNCTION_FAILED;
  4796. priority = qla24xx_get_fcp_prio(vha, fcport);
  4797. ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
  4798. if (ret == QLA_SUCCESS)
  4799. fcport->fcp_prio = priority;
  4800. else
  4801. DEBUG2(printk(KERN_WARNING
  4802. "scsi(%ld): Unable to activate fcp priority, "
  4803. " ret=0x%x\n", vha->host_no, ret));
  4804. return ret;
  4805. }
  4806. /*
  4807. * qla24xx_update_all_fcp_prio
  4808. * Activates fcp priority for all the logged in ports
  4809. *
  4810. * Input:
  4811. * ha = adapter block pointer.
  4812. *
  4813. * Return:
  4814. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4815. *
  4816. * Context:
  4817. * Kernel context.
  4818. */
  4819. int
  4820. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4821. {
  4822. int ret;
  4823. fc_port_t *fcport;
  4824. ret = QLA_FUNCTION_FAILED;
  4825. /* We need to set priority for all logged in ports */
  4826. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4827. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4828. return ret;
  4829. }